From b7eaf07677ba700ac6f91c10d591060d314e0789 Mon Sep 17 00:00:00 2001 From: Chris Fallin Date: Thu, 6 Apr 2023 11:11:03 -0700 Subject: [PATCH] Cranelift: remove non-egraphs optimization pipeline and `use_egraphs` option. (#6167) * Cranelift: remove non-egraphs optimization pipeline and `use_egraphs` option. This PR removes the LICM, GVN, and preopt passes, and associated support pieces, from `cranelift-codegen`. Not to worry, we still have optimizations: the egraph framework subsumes all of these, and has been on by default since #5181. A few decision points: - Filetests for the legacy LICM, GVN and simple_preopt were removed too. As we built optimizations in the egraph framework we wrote new tests for the equivalent functionality, and many of the old tests were testing specific behaviors in the old implementations that may not be relevant anymore. However if folks prefer I could take a different approach here and try to port over all of the tests. - The corresponding filetest modes (commands) were deleted too. The `test alias_analysis` mode remains, but no longer invokes a separate GVN first (since there is no separate GVN that will not also do alias analysis) so the tests were tweaked slightly to work with that. The egrpah testsuite also covers alias analysis. - The `divconst_magic_numbers` module is removed since it's unused without `simple_preopt`, though this is the one remaining optimization we still need to build in the egraphs framework, pending #5908. The magic numbers will live forever in git history so removing this in the meantime is not a major issue IMHO. - The `use_egraphs` setting itself was removed at both the Cranelift and Wasmtime levels. It has been marked deprecated for a few releases now (Wasmtime 6.0, 7.0, upcoming 8.0, and corresponding Cranelift versions) so I think this is probably OK. As an alternative if anyone feels strongly, we could leave the setting and make it a no-op. * Update test outputs for remaining test differences. --- cranelift/codegen/meta/src/shared/settings.rs | 13 - cranelift/codegen/src/context.rs | 46 +- .../codegen/src/divconst_magic_numbers.rs | 1083 ----------------- cranelift/codegen/src/fx.rs | 5 - cranelift/codegen/src/lib.rs | 4 - cranelift/codegen/src/licm.rs | 241 ---- cranelift/codegen/src/machinst/isle.rs | 23 - cranelift/codegen/src/settings.rs | 1 - cranelift/codegen/src/simple_gvn.rs | 149 --- cranelift/codegen/src/simple_preopt.rs | 796 ------------ .../filetests/alias/simple-alias.clif | 10 +- .../filetests/filetests/egraph/algebraic.clif | 1 - .../filetests/egraph/alias_analysis.clif | 1 - .../filetests/filetests/egraph/basic-gvn.clif | 1 - .../filetests/filetests/egraph/bitselect.clif | 1 - .../filetests/egraph/cprop-splat.clif | 1 - .../filetests/filetests/egraph/cprop.clif | 1 - .../filetests/filetests/egraph/i128-opts.clif | 1 - .../filetests/egraph/icmp-parameterized.clif | 1 - .../filetests/filetests/egraph/icmp.clif | 1 - .../filetests/filetests/egraph/isplit.clif | 1 - .../filetests/egraph/issue-5405.clif | 1 - .../filetests/egraph/issue-5417.clif | 1 - .../filetests/egraph/issue-5437.clif | 1 - .../filetests/filetests/egraph/licm.clif | 1 - .../egraph/make-icmp-parameterized-tests.sh | 1 - .../filetests/filetests/egraph/misc.clif | 1 - .../filetests/filetests/egraph/mul-pow-2.clif | 1 - .../filetests/egraph/multivalue.clif | 1 - .../filetests/egraph/not_a_load.clif | 1 - .../filetests/filetests/egraph/remat.clif | 1 - .../filetests/filetests/egraph/select.clif | 1 - .../filetests/isa/aarch64/arithmetic.clif | 8 +- .../filetests/isa/aarch64/bitops.clif | 16 +- .../filetests/filetests/isa/aarch64/call.clif | 128 +- .../filetests/isa/aarch64/condops.clif | 80 +- .../filetests/isa/aarch64/dynamic-slot.clif | 24 +- .../isa/aarch64/iconst-icmp-small.clif | 14 +- .../filetests/isa/aarch64/simd_load_zero.clif | 36 +- .../filetests/isa/aarch64/stack.clif | 548 +++++---- .../isa/aarch64/uadd_overflow_trap.clif | 32 +- ...rd_no_spectre_i32_access_0x1000_offset.wat | 8 +- ...o_spectre_i32_access_0xffff0000_offset.wat | 16 +- ...ard_no_spectre_i8_access_0x1000_offset.wat | 8 +- ...no_spectre_i8_access_0xffff0000_offset.wat | 16 +- ..._guard_yes_spectre_i32_access_0_offset.wat | 14 +- ...d_yes_spectre_i32_access_0x1000_offset.wat | 22 +- ...s_spectre_i32_access_0xffff0000_offset.wat | 44 +- ...0_guard_yes_spectre_i8_access_0_offset.wat | 14 +- ...rd_yes_spectre_i8_access_0x1000_offset.wat | 22 +- ...es_spectre_i8_access_0xffff0000_offset.wat | 44 +- ..._guard_yes_spectre_i32_access_0_offset.wat | 12 +- ...d_yes_spectre_i32_access_0x1000_offset.wat | 12 +- ...s_spectre_i32_access_0xffff0000_offset.wat | 20 +- ...f_guard_yes_spectre_i8_access_0_offset.wat | 14 +- ...rd_yes_spectre_i8_access_0x1000_offset.wat | 12 +- ...es_spectre_i8_access_0xffff0000_offset.wat | 20 +- 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..._guard_yes_spectre_i32_access_0_offset.wat | 10 +- ...d_yes_spectre_i32_access_0x1000_offset.wat | 12 +- ...f_guard_yes_spectre_i8_access_0_offset.wat | 10 +- ...rd_yes_spectre_i8_access_0x1000_offset.wat | 12 +- cranelift/filetests/filetests/licm/basic.clif | 39 - .../filetests/filetests/licm/br-table.clif | 19 - .../filetests/filetests/licm/complex.clif | 88 -- .../filetests/licm/critical-edge.clif | 50 - .../filetests/filetests/licm/encoding.clif | 40 - .../filetests/licm/load_readonly_notrap.clif | 51 - .../filetests/licm/multiple-blocks.clif | 55 - .../filetests/licm/nested_loops.clif | 58 - .../filetests/filetests/licm/reject.clif | 65 - .../filetests/licm/reject_load_notrap.clif | 52 - .../filetests/licm/reject_load_readonly.clif | 52 - .../filetests/licm/rewrite-jump-table.clif | 23 - .../filetests/runtests/issue5569.clif | 1 - .../filetests/filetests/simple_gvn/basic.clif | 43 - .../simple_gvn/idempotent-trapping.clif | 68 -- .../filetests/simple_gvn/readonly.clif | 25 - .../filetests/simple_gvn/reject.clif | 27 - .../filetests/simple_gvn/scopes.clif | 80 -- .../filetests/simple_preopt/branch.clif | 53 - .../simple_preopt/div_by_const_indirect.clif | 60 - .../div_by_const_non_power_of_2.clif | 267 ---- .../div_by_const_power_of_2.clif | 293 ----- ...order_instructions_when_transplanting.clif | 23 - .../fold-extended-move-wraparound.clif | 15 - .../filetests/simple_preopt/i128.clif | 28 - .../rem_by_const_non_power_of_2.clif | 286 ----- .../rem_by_const_power_of_2.clif | 292 ----- ...ing_instructions_and_cfg_predecessors.clif | 18 - .../filetests/simple_preopt/sign_extend.clif | 40 - .../filetests/simple_preopt/simplify32.clif | 62 - .../filetests/simple_preopt/simplify64.clif | 294 ----- .../duplicate-loads-dynamic-memory-egraph.wat | 88 -- .../wasm/duplicate-loads-dynamic-memory.wat | 33 +- .../duplicate-loads-static-memory-egraph.wat | 74 -- .../wasm/duplicate-loads-static-memory.wat | 17 +- ...re-access-same-index-different-offsets.wat | 1 - ...re-access-same-index-different-offsets.wat | 1 - cranelift/filetests/src/lib.rs | 6 - .../filetests/src/test_alias_analysis.rs | 3 - cranelift/filetests/src/test_licm.rs | 51 - cranelift/filetests/src/test_simple_gvn.rs | 44 - cranelift/filetests/src/test_simple_preopt.rs | 46 - cranelift/fuzzgen/src/lib.rs | 1 - crates/fuzzing/src/generators/config.rs | 3 - crates/wasmtime/src/config.rs | 24 - crates/wasmtime/src/engine.rs | 1 - 325 files changed, 3520 insertions(+), 8781 deletions(-) delete mode 100644 cranelift/codegen/src/divconst_magic_numbers.rs delete mode 100644 cranelift/codegen/src/licm.rs delete mode 100644 cranelift/codegen/src/simple_gvn.rs delete mode 100644 cranelift/codegen/src/simple_preopt.rs delete mode 100644 cranelift/filetests/filetests/licm/basic.clif delete mode 100644 cranelift/filetests/filetests/licm/br-table.clif delete mode 100644 cranelift/filetests/filetests/licm/complex.clif delete mode 100644 cranelift/filetests/filetests/licm/critical-edge.clif delete mode 100644 cranelift/filetests/filetests/licm/encoding.clif delete mode 100644 cranelift/filetests/filetests/licm/load_readonly_notrap.clif delete mode 100644 cranelift/filetests/filetests/licm/multiple-blocks.clif delete mode 100644 cranelift/filetests/filetests/licm/nested_loops.clif delete mode 100644 cranelift/filetests/filetests/licm/reject.clif delete mode 100644 cranelift/filetests/filetests/licm/reject_load_notrap.clif delete mode 100644 cranelift/filetests/filetests/licm/reject_load_readonly.clif delete mode 100644 cranelift/filetests/filetests/licm/rewrite-jump-table.clif delete mode 100644 cranelift/filetests/filetests/simple_gvn/basic.clif delete mode 100644 cranelift/filetests/filetests/simple_gvn/idempotent-trapping.clif delete mode 100644 cranelift/filetests/filetests/simple_gvn/readonly.clif delete mode 100644 cranelift/filetests/filetests/simple_gvn/reject.clif delete mode 100644 cranelift/filetests/filetests/simple_gvn/scopes.clif delete mode 100644 cranelift/filetests/filetests/simple_preopt/branch.clif delete mode 100644 cranelift/filetests/filetests/simple_preopt/div_by_const_indirect.clif delete mode 100644 cranelift/filetests/filetests/simple_preopt/div_by_const_non_power_of_2.clif delete mode 100644 cranelift/filetests/filetests/simple_preopt/div_by_const_power_of_2.clif delete mode 100644 cranelift/filetests/filetests/simple_preopt/do_not_reorder_instructions_when_transplanting.clif delete mode 100644 cranelift/filetests/filetests/simple_preopt/fold-extended-move-wraparound.clif delete mode 100644 cranelift/filetests/filetests/simple_preopt/i128.clif delete mode 100644 cranelift/filetests/filetests/simple_preopt/rem_by_const_non_power_of_2.clif delete mode 100644 cranelift/filetests/filetests/simple_preopt/rem_by_const_power_of_2.clif delete mode 100644 cranelift/filetests/filetests/simple_preopt/replace_branching_instructions_and_cfg_predecessors.clif delete mode 100644 cranelift/filetests/filetests/simple_preopt/sign_extend.clif delete mode 100644 cranelift/filetests/filetests/simple_preopt/simplify32.clif delete mode 100644 cranelift/filetests/filetests/simple_preopt/simplify64.clif delete mode 100644 cranelift/filetests/filetests/wasm/duplicate-loads-dynamic-memory-egraph.wat delete mode 100644 cranelift/filetests/filetests/wasm/duplicate-loads-static-memory-egraph.wat delete mode 100644 cranelift/filetests/src/test_licm.rs delete mode 100644 cranelift/filetests/src/test_simple_gvn.rs delete mode 100644 cranelift/filetests/src/test_simple_preopt.rs diff --git a/cranelift/codegen/meta/src/shared/settings.rs b/cranelift/codegen/meta/src/shared/settings.rs index e68412183aee..d9689b4fd1a8 100644 --- a/cranelift/codegen/meta/src/shared/settings.rs +++ b/cranelift/codegen/meta/src/shared/settings.rs @@ -53,19 +53,6 @@ pub(crate) fn define() -> SettingGroup { true, ); - settings.add_bool( - "use_egraphs", - "Enable egraph-based optimization.", - r#" - This enables an optimization phase that converts CLIF to an egraph (equivalence graph) - representation, performs various rewrites, and then converts it back. This should result in - better optimization, but the traditional optimization pass structure is also still - available by setting this to `false`. The `false` setting will eventually be - deprecated and removed. - "#, - true, - ); - settings.add_bool( "enable_verifier", "Run the Cranelift IR verifier at strategic times during compilation.", diff --git a/cranelift/codegen/src/context.rs b/cranelift/codegen/src/context.rs index b5b10eaa76c7..dc2ab0b4bdb2 100644 --- a/cranelift/codegen/src/context.rs +++ b/cranelift/codegen/src/context.rs @@ -17,15 +17,12 @@ use crate::flowgraph::ControlFlowGraph; use crate::ir::Function; use crate::isa::TargetIsa; use crate::legalizer::simple_legalize; -use crate::licm::do_licm; use crate::loop_analysis::LoopAnalysis; use crate::machinst::{CompiledCode, CompiledCodeStencil}; use crate::nan_canonicalization::do_nan_canonicalization; use crate::remove_constant_phis::do_remove_constant_phis; use crate::result::{CodegenResult, CompileResult}; use crate::settings::{FlagsOrIsa, OptLevel}; -use crate::simple_gvn::do_simple_gvn; -use crate::simple_preopt::do_preopt; use crate::trace; use crate::unreachable_code::eliminate_unreachable_code; use crate::verifier::{verify_context, VerifierErrors, VerifierResult}; @@ -172,22 +169,12 @@ impl Context { ); self.compute_cfg(); - if !isa.flags().use_egraphs() && opt_level != OptLevel::None { - self.preopt(isa)?; - } if isa.flags().enable_nan_canonicalization() { self.canonicalize_nans(isa)?; } self.legalize(isa)?; - if !isa.flags().use_egraphs() && opt_level != OptLevel::None { - self.compute_domtree(); - self.compute_loop_analysis(); - self.licm(isa)?; - self.simple_gvn(isa)?; - } - self.compute_domtree(); self.eliminate_unreachable_code(isa)?; @@ -198,14 +185,7 @@ impl Context { self.remove_constant_phis(isa)?; if opt_level != OptLevel::None { - if isa.flags().use_egraphs() { - self.egraph_pass()?; - } else if isa.flags().enable_alias_analysis() { - for _ in 0..2 { - self.replace_redundant_loads()?; - self.simple_gvn(isa)?; - } - } + self.egraph_pass()?; } Ok(()) @@ -294,13 +274,6 @@ impl Context { Ok(()) } - /// Perform pre-legalization rewrites on the function. - pub fn preopt(&mut self, isa: &dyn TargetIsa) -> CodegenResult<()> { - do_preopt(&mut self.func, isa); - self.verify_if(isa)?; - Ok(()) - } - /// Perform NaN canonicalizing rewrites on the function. pub fn canonicalize_nans(&mut self, isa: &dyn TargetIsa) -> CodegenResult<()> { do_nan_canonicalization(&mut self.func); @@ -341,23 +314,6 @@ impl Context { self.compute_domtree() } - /// Perform simple GVN on the function. - pub fn simple_gvn<'a, FOI: Into>>(&mut self, fisa: FOI) -> CodegenResult<()> { - do_simple_gvn(&mut self.func, &mut self.domtree); - self.verify_if(fisa) - } - - /// Perform LICM on the function. - pub fn licm(&mut self, isa: &dyn TargetIsa) -> CodegenResult<()> { - do_licm( - &mut self.func, - &mut self.cfg, - &mut self.domtree, - &mut self.loop_analysis, - ); - self.verify_if(isa) - } - /// Perform unreachable code elimination. pub fn eliminate_unreachable_code<'a, FOI>(&mut self, fisa: FOI) -> CodegenResult<()> where diff --git a/cranelift/codegen/src/divconst_magic_numbers.rs b/cranelift/codegen/src/divconst_magic_numbers.rs deleted file mode 100644 index af45444c4030..000000000000 --- a/cranelift/codegen/src/divconst_magic_numbers.rs +++ /dev/null @@ -1,1083 +0,0 @@ -//! Compute "magic numbers" for division-by-constants transformations. -//! -//! Math helpers for division by (non-power-of-2) constants. This is based -//! on the presentation in "Hacker's Delight" by Henry Warren, 2003. There -//! are four cases: {unsigned, signed} x {32 bit, 64 bit}. The word size -//! makes little difference, but the signed-vs-unsigned aspect has a large -//! effect. Therefore everything is presented in the order U32 U64 S32 S64 -//! so as to emphasise the similarity of the U32 and U64 cases and the S32 -//! and S64 cases. - -// Structures to hold the "magic numbers" computed. - -#[derive(PartialEq, Debug)] -pub struct MU32 { - pub mul_by: u32, - pub do_add: bool, - pub shift_by: i32, -} - -#[derive(PartialEq, Debug)] -pub struct MU64 { - pub mul_by: u64, - pub do_add: bool, - pub shift_by: i32, -} - -#[derive(PartialEq, Debug)] -pub struct MS32 { - pub mul_by: i32, - pub shift_by: i32, -} - -#[derive(PartialEq, Debug)] -pub struct MS64 { - pub mul_by: i64, - pub shift_by: i32, -} - -// The actual "magic number" generators follow. - -pub fn magic_u32(d: u32) -> MU32 { - debug_assert_ne!(d, 0); - debug_assert_ne!(d, 1); // d==1 generates out of range shifts. - - let mut do_add: bool = false; - let mut p: i32 = 31; - let nc: u32 = 0xFFFFFFFFu32 - u32::wrapping_neg(d) % d; - let mut q1: u32 = 0x80000000u32 / nc; - let mut r1: u32 = 0x80000000u32 - q1 * nc; - let mut q2: u32 = 0x7FFFFFFFu32 / d; - let mut r2: u32 = 0x7FFFFFFFu32 - q2 * d; - loop { - p = p + 1; - if r1 >= nc - r1 { - q1 = u32::wrapping_add(u32::wrapping_mul(2, q1), 1); - r1 = u32::wrapping_sub(u32::wrapping_mul(2, r1), nc); - } else { - q1 = u32::wrapping_mul(2, q1); - r1 = 2 * r1; - } - if r2 + 1 >= d - r2 { - if q2 >= 0x7FFFFFFFu32 { - do_add = true; - } - q2 = 2 * q2 + 1; - r2 = u32::wrapping_sub(u32::wrapping_add(u32::wrapping_mul(2, r2), 1), d); - } else { - if q2 >= 0x80000000u32 { - do_add = true; - } - q2 = u32::wrapping_mul(2, q2); - r2 = 2 * r2 + 1; - } - let delta: u32 = d - 1 - r2; - if !(p < 64 && (q1 < delta || (q1 == delta && r1 == 0))) { - break; - } - } - - MU32 { - mul_by: q2 + 1, - do_add, - shift_by: p - 32, - } -} - -pub fn magic_u64(d: u64) -> MU64 { - debug_assert_ne!(d, 0); - debug_assert_ne!(d, 1); // d==1 generates out of range shifts. - - let mut do_add: bool = false; - let mut p: i32 = 63; - let nc: u64 = 0xFFFFFFFFFFFFFFFFu64 - u64::wrapping_neg(d) % d; - let mut q1: u64 = 0x8000000000000000u64 / nc; - let mut r1: u64 = 0x8000000000000000u64 - q1 * nc; - let mut q2: u64 = 0x7FFFFFFFFFFFFFFFu64 / d; - let mut r2: u64 = 0x7FFFFFFFFFFFFFFFu64 - q2 * d; - loop { - p = p + 1; - if r1 >= nc - r1 { - q1 = u64::wrapping_add(u64::wrapping_mul(2, q1), 1); - r1 = u64::wrapping_sub(u64::wrapping_mul(2, r1), nc); - } else { - q1 = u64::wrapping_mul(2, q1); - r1 = 2 * r1; - } - if r2 + 1 >= d - r2 { - if q2 >= 0x7FFFFFFFFFFFFFFFu64 { - do_add = true; - } - q2 = 2 * q2 + 1; - r2 = u64::wrapping_sub(u64::wrapping_add(u64::wrapping_mul(2, r2), 1), d); - } else { - if q2 >= 0x8000000000000000u64 { - do_add = true; - } - q2 = u64::wrapping_mul(2, q2); - r2 = 2 * r2 + 1; - } - let delta: u64 = d - 1 - r2; - if !(p < 128 && (q1 < delta || (q1 == delta && r1 == 0))) { - break; - } - } - - MU64 { - mul_by: q2 + 1, - do_add, - shift_by: p - 64, - } -} - -pub fn magic_s32(d: i32) -> MS32 { - debug_assert_ne!(d, -1); - debug_assert_ne!(d, 0); - debug_assert_ne!(d, 1); - let two31: u32 = 0x80000000u32; - let mut p: i32 = 31; - let ad: u32 = i32::wrapping_abs(d) as u32; - let t: u32 = two31 + ((d as u32) >> 31); - let anc: u32 = u32::wrapping_sub(t - 1, t % ad); - let mut q1: u32 = two31 / anc; - let mut r1: u32 = two31 - q1 * anc; - let mut q2: u32 = two31 / ad; - let mut r2: u32 = two31 - q2 * ad; - loop { - p = p + 1; - q1 = 2 * q1; - r1 = 2 * r1; - if r1 >= anc { - q1 = q1 + 1; - r1 = r1 - anc; - } - q2 = 2 * q2; - r2 = 2 * r2; - if r2 >= ad { - q2 = q2 + 1; - r2 = r2 - ad; - } - let delta: u32 = ad - r2; - if !(q1 < delta || (q1 == delta && r1 == 0)) { - break; - } - } - - MS32 { - mul_by: (if d < 0 { - u32::wrapping_neg(q2 + 1) - } else { - q2 + 1 - }) as i32, - shift_by: p - 32, - } -} - -pub fn magic_s64(d: i64) -> MS64 { - debug_assert_ne!(d, -1); - debug_assert_ne!(d, 0); - debug_assert_ne!(d, 1); - let two63: u64 = 0x8000000000000000u64; - let mut p: i32 = 63; - let ad: u64 = i64::wrapping_abs(d) as u64; - let t: u64 = two63 + ((d as u64) >> 63); - let anc: u64 = u64::wrapping_sub(t - 1, t % ad); - let mut q1: u64 = two63 / anc; - let mut r1: u64 = two63 - q1 * anc; - let mut q2: u64 = two63 / ad; - let mut r2: u64 = two63 - q2 * ad; - loop { - p = p + 1; - q1 = 2 * q1; - r1 = 2 * r1; - if r1 >= anc { - q1 = q1 + 1; - r1 = r1 - anc; - } - q2 = 2 * q2; - r2 = 2 * r2; - if r2 >= ad { - q2 = q2 + 1; - r2 = r2 - ad; - } - let delta: u64 = ad - r2; - if !(q1 < delta || (q1 == delta && r1 == 0)) { - break; - } - } - - MS64 { - mul_by: (if d < 0 { - u64::wrapping_neg(q2 + 1) - } else { - q2 + 1 - }) as i64, - shift_by: p - 64, - } -} - -#[cfg(test)] -mod tests { - use super::{magic_s32, magic_s64, magic_u32, magic_u64}; - use super::{MS32, MS64, MU32, MU64}; - - fn make_mu32(mul_by: u32, do_add: bool, shift_by: i32) -> MU32 { - MU32 { - mul_by, - do_add, - shift_by, - } - } - - fn make_mu64(mul_by: u64, do_add: bool, shift_by: i32) -> MU64 { - MU64 { - mul_by, - do_add, - shift_by, - } - } - - fn make_ms32(mul_by: i32, shift_by: i32) -> MS32 { - MS32 { mul_by, shift_by } - } - - fn make_ms64(mul_by: i64, shift_by: i32) -> MS64 { - MS64 { mul_by, shift_by } - } - - #[test] - fn test_magic_u32() { - assert_eq!(magic_u32(2u32), make_mu32(0x80000000u32, false, 0)); - assert_eq!(magic_u32(3u32), make_mu32(0xaaaaaaabu32, false, 1)); - assert_eq!(magic_u32(4u32), make_mu32(0x40000000u32, false, 0)); - assert_eq!(magic_u32(5u32), make_mu32(0xcccccccdu32, false, 2)); - assert_eq!(magic_u32(6u32), make_mu32(0xaaaaaaabu32, false, 2)); - assert_eq!(magic_u32(7u32), make_mu32(0x24924925u32, true, 3)); - assert_eq!(magic_u32(9u32), make_mu32(0x38e38e39u32, false, 1)); - assert_eq!(magic_u32(10u32), make_mu32(0xcccccccdu32, false, 3)); - assert_eq!(magic_u32(11u32), make_mu32(0xba2e8ba3u32, false, 3)); - assert_eq!(magic_u32(12u32), make_mu32(0xaaaaaaabu32, false, 3)); - assert_eq!(magic_u32(25u32), make_mu32(0x51eb851fu32, false, 3)); - assert_eq!(magic_u32(125u32), make_mu32(0x10624dd3u32, false, 3)); - assert_eq!(magic_u32(625u32), make_mu32(0xd1b71759u32, false, 9)); - assert_eq!(magic_u32(1337u32), make_mu32(0x88233b2bu32, true, 11)); - assert_eq!(magic_u32(65535u32), make_mu32(0x80008001u32, false, 15)); - assert_eq!(magic_u32(65536u32), make_mu32(0x00010000u32, false, 0)); - assert_eq!(magic_u32(65537u32), make_mu32(0xffff0001u32, false, 16)); - assert_eq!(magic_u32(31415927u32), make_mu32(0x445b4553u32, false, 23)); - assert_eq!( - magic_u32(0xdeadbeefu32), - make_mu32(0x93275ab3u32, false, 31) - ); - assert_eq!( - magic_u32(0xfffffffdu32), - make_mu32(0x40000001u32, false, 30) - ); - assert_eq!(magic_u32(0xfffffffeu32), make_mu32(0x00000003u32, true, 32)); - assert_eq!( - magic_u32(0xffffffffu32), - make_mu32(0x80000001u32, false, 31) - ); - } - - #[test] - fn test_magic_u64() { - assert_eq!(magic_u64(2u64), make_mu64(0x8000000000000000u64, false, 0)); - assert_eq!(magic_u64(3u64), make_mu64(0xaaaaaaaaaaaaaaabu64, false, 1)); - assert_eq!(magic_u64(4u64), make_mu64(0x4000000000000000u64, false, 0)); - assert_eq!(magic_u64(5u64), make_mu64(0xcccccccccccccccdu64, false, 2)); - assert_eq!(magic_u64(6u64), make_mu64(0xaaaaaaaaaaaaaaabu64, false, 2)); - assert_eq!(magic_u64(7u64), make_mu64(0x2492492492492493u64, true, 3)); - assert_eq!(magic_u64(9u64), make_mu64(0xe38e38e38e38e38fu64, false, 3)); - assert_eq!(magic_u64(10u64), make_mu64(0xcccccccccccccccdu64, false, 3)); - assert_eq!(magic_u64(11u64), make_mu64(0x2e8ba2e8ba2e8ba3u64, false, 1)); - assert_eq!(magic_u64(12u64), make_mu64(0xaaaaaaaaaaaaaaabu64, false, 3)); - assert_eq!(magic_u64(25u64), make_mu64(0x47ae147ae147ae15u64, true, 5)); - assert_eq!(magic_u64(125u64), make_mu64(0x0624dd2f1a9fbe77u64, true, 7)); - assert_eq!( - magic_u64(625u64), - make_mu64(0x346dc5d63886594bu64, false, 7) - ); - assert_eq!( - magic_u64(1337u64), - make_mu64(0xc4119d952866a139u64, false, 10) - ); - assert_eq!( - magic_u64(31415927u64), - make_mu64(0x116d154b9c3d2f85u64, true, 25) - ); - assert_eq!( - magic_u64(0x00000000deadbeefu64), - make_mu64(0x93275ab2dfc9094bu64, false, 31) - ); - assert_eq!( - magic_u64(0x00000000fffffffdu64), - make_mu64(0x8000000180000005u64, false, 31) - ); - assert_eq!( - magic_u64(0x00000000fffffffeu64), - make_mu64(0x0000000200000005u64, true, 32) - ); - assert_eq!( - magic_u64(0x00000000ffffffffu64), - make_mu64(0x8000000080000001u64, false, 31) - ); - assert_eq!( - magic_u64(0x0000000100000000u64), - make_mu64(0x0000000100000000u64, false, 0) - ); - assert_eq!( - magic_u64(0x0000000100000001u64), - make_mu64(0xffffffff00000001u64, false, 32) - ); - assert_eq!( - magic_u64(0x0ddc0ffeebadf00du64), - make_mu64(0x2788e9d394b77da1u64, true, 60) - ); - assert_eq!( - magic_u64(0xfffffffffffffffdu64), - make_mu64(0x4000000000000001u64, false, 62) - ); - assert_eq!( - magic_u64(0xfffffffffffffffeu64), - make_mu64(0x0000000000000003u64, true, 64) - ); - assert_eq!( - magic_u64(0xffffffffffffffffu64), - make_mu64(0x8000000000000001u64, false, 63) - ); - } - - #[test] - fn test_magic_s32() { - assert_eq!( - magic_s32(-0x80000000i32), - make_ms32(0x7fffffffu32 as i32, 30) - ); - assert_eq!( - magic_s32(-0x7FFFFFFFi32), - make_ms32(0xbfffffffu32 as i32, 29) - ); - assert_eq!( - magic_s32(-0x7FFFFFFEi32), - make_ms32(0x7ffffffdu32 as i32, 30) - ); - assert_eq!(magic_s32(-31415927i32), make_ms32(0xbba4baadu32 as i32, 23)); - assert_eq!(magic_s32(-1337i32), make_ms32(0x9df73135u32 as i32, 9)); - assert_eq!(magic_s32(-256i32), make_ms32(0x7fffffffu32 as i32, 7)); - assert_eq!(magic_s32(-5i32), make_ms32(0x99999999u32 as i32, 1)); - assert_eq!(magic_s32(-3i32), make_ms32(0x55555555u32 as i32, 1)); - assert_eq!(magic_s32(-2i32), make_ms32(0x7fffffffu32 as i32, 0)); - assert_eq!(magic_s32(2i32), make_ms32(0x80000001u32 as i32, 0)); - assert_eq!(magic_s32(3i32), make_ms32(0x55555556u32 as i32, 0)); - assert_eq!(magic_s32(4i32), make_ms32(0x80000001u32 as i32, 1)); - assert_eq!(magic_s32(5i32), make_ms32(0x66666667u32 as i32, 1)); - assert_eq!(magic_s32(6i32), make_ms32(0x2aaaaaabu32 as i32, 0)); - assert_eq!(magic_s32(7i32), make_ms32(0x92492493u32 as i32, 2)); - assert_eq!(magic_s32(9i32), make_ms32(0x38e38e39u32 as i32, 1)); - assert_eq!(magic_s32(10i32), make_ms32(0x66666667u32 as i32, 2)); - assert_eq!(magic_s32(11i32), make_ms32(0x2e8ba2e9u32 as i32, 1)); - assert_eq!(magic_s32(12i32), make_ms32(0x2aaaaaabu32 as i32, 1)); - assert_eq!(magic_s32(25i32), make_ms32(0x51eb851fu32 as i32, 3)); - assert_eq!(magic_s32(125i32), make_ms32(0x10624dd3u32 as i32, 3)); - assert_eq!(magic_s32(625i32), make_ms32(0x68db8badu32 as i32, 8)); - assert_eq!(magic_s32(1337i32), make_ms32(0x6208cecbu32 as i32, 9)); - assert_eq!(magic_s32(31415927i32), make_ms32(0x445b4553u32 as i32, 23)); - assert_eq!( - magic_s32(0x7ffffffei32), - make_ms32(0x80000003u32 as i32, 30) - ); - assert_eq!( - magic_s32(0x7fffffffi32), - make_ms32(0x40000001u32 as i32, 29) - ); - } - - #[test] - fn test_magic_s64() { - assert_eq!( - magic_s64(-0x8000000000000000i64), - make_ms64(0x7fffffffffffffffu64 as i64, 62) - ); - assert_eq!( - magic_s64(-0x7FFFFFFFFFFFFFFFi64), - make_ms64(0xbfffffffffffffffu64 as i64, 61) - ); - assert_eq!( - magic_s64(-0x7FFFFFFFFFFFFFFEi64), - make_ms64(0x7ffffffffffffffdu64 as i64, 62) - ); - assert_eq!( - magic_s64(-0x0ddC0ffeeBadF00di64), - make_ms64(0x6c3b8b1635a4412fu64 as i64, 59) - ); - assert_eq!( - magic_s64(-0x100000001i64), - make_ms64(0x800000007fffffffu64 as i64, 31) - ); - assert_eq!( - magic_s64(-0x100000000i64), - make_ms64(0x7fffffffffffffffu64 as i64, 31) - ); - assert_eq!( - magic_s64(-0xFFFFFFFFi64), - make_ms64(0x7fffffff7fffffffu64 as i64, 31) - ); - assert_eq!( - magic_s64(-0xFFFFFFFEi64), - make_ms64(0x7ffffffefffffffdu64 as i64, 31) - ); - assert_eq!( - magic_s64(-0xFFFFFFFDi64), - make_ms64(0x7ffffffe7ffffffbu64 as i64, 31) - ); - assert_eq!( - magic_s64(-0xDeadBeefi64), - make_ms64(0x6cd8a54d2036f6b5u64 as i64, 31) - ); - assert_eq!( - magic_s64(-31415927i64), - make_ms64(0x7749755a31e1683du64 as i64, 24) - ); - assert_eq!( - magic_s64(-1337i64), - make_ms64(0x9df731356bccaf63u64 as i64, 9) - ); - assert_eq!( - magic_s64(-256i64), - make_ms64(0x7fffffffffffffffu64 as i64, 7) - ); - assert_eq!(magic_s64(-5i64), make_ms64(0x9999999999999999u64 as i64, 1)); - assert_eq!(magic_s64(-3i64), make_ms64(0x5555555555555555u64 as i64, 1)); - assert_eq!(magic_s64(-2i64), make_ms64(0x7fffffffffffffffu64 as i64, 0)); - assert_eq!(magic_s64(2i64), make_ms64(0x8000000000000001u64 as i64, 0)); - assert_eq!(magic_s64(3i64), make_ms64(0x5555555555555556u64 as i64, 0)); - assert_eq!(magic_s64(4i64), make_ms64(0x8000000000000001u64 as i64, 1)); - assert_eq!(magic_s64(5i64), make_ms64(0x6666666666666667u64 as i64, 1)); - assert_eq!(magic_s64(6i64), make_ms64(0x2aaaaaaaaaaaaaabu64 as i64, 0)); - assert_eq!(magic_s64(7i64), make_ms64(0x4924924924924925u64 as i64, 1)); - assert_eq!(magic_s64(9i64), make_ms64(0x1c71c71c71c71c72u64 as i64, 0)); - assert_eq!(magic_s64(10i64), make_ms64(0x6666666666666667u64 as i64, 2)); - assert_eq!(magic_s64(11i64), make_ms64(0x2e8ba2e8ba2e8ba3u64 as i64, 1)); - assert_eq!(magic_s64(12i64), make_ms64(0x2aaaaaaaaaaaaaabu64 as i64, 1)); - assert_eq!(magic_s64(25i64), make_ms64(0xa3d70a3d70a3d70bu64 as i64, 4)); - assert_eq!( - magic_s64(125i64), - make_ms64(0x20c49ba5e353f7cfu64 as i64, 4) - ); - assert_eq!( - magic_s64(625i64), - make_ms64(0x346dc5d63886594bu64 as i64, 7) - ); - assert_eq!( - magic_s64(1337i64), - make_ms64(0x6208ceca9433509du64 as i64, 9) - ); - assert_eq!( - magic_s64(31415927i64), - make_ms64(0x88b68aa5ce1e97c3u64 as i64, 24) - ); - assert_eq!( - magic_s64(0x00000000deadbeefi64), - make_ms64(0x93275ab2dfc9094bu64 as i64, 31) - ); - assert_eq!( - magic_s64(0x00000000fffffffdi64), - make_ms64(0x8000000180000005u64 as i64, 31) - ); - assert_eq!( - magic_s64(0x00000000fffffffei64), - make_ms64(0x8000000100000003u64 as i64, 31) - ); - assert_eq!( - magic_s64(0x00000000ffffffffi64), - make_ms64(0x8000000080000001u64 as i64, 31) - ); - assert_eq!( - magic_s64(0x0000000100000000i64), - make_ms64(0x8000000000000001u64 as i64, 31) - ); - assert_eq!( - magic_s64(0x0000000100000001i64), - make_ms64(0x7fffffff80000001u64 as i64, 31) - ); - assert_eq!( - magic_s64(0x0ddc0ffeebadf00di64), - make_ms64(0x93c474e9ca5bbed1u64 as i64, 59) - ); - assert_eq!( - magic_s64(0x7ffffffffffffffdi64), - make_ms64(0x2000000000000001u64 as i64, 60) - ); - assert_eq!( - magic_s64(0x7ffffffffffffffei64), - make_ms64(0x8000000000000003u64 as i64, 62) - ); - assert_eq!( - magic_s64(0x7fffffffffffffffi64), - make_ms64(0x4000000000000001u64 as i64, 61) - ); - } - - #[test] - fn test_magic_generators_dont_panic() { - // The point of this is to check that the magic number generators - // don't panic with integer wraparounds, especially at boundary cases - // for their arguments. The actual results are thrown away, although - // we force `total` to be used, so that rustc can't optimise the - // entire computation away. - - // Testing UP magic_u32 - let mut total: u64 = 0; - for x in 2..(200 * 1000u32) { - let m = magic_u32(x); - total = total ^ (m.mul_by as u64); - total = total + (m.shift_by as u64); - total = total + (if m.do_add { 123 } else { 456 }); - } - assert_eq!(total, 2481999609); - - total = 0; - // Testing MIDPOINT magic_u32 - for x in 0x8000_0000u32 - 10 * 1000u32..0x8000_0000u32 + 10 * 1000u32 { - let m = magic_u32(x); - total = total ^ (m.mul_by as u64); - total = total + (m.shift_by as u64); - total = total + (if m.do_add { 123 } else { 456 }); - } - assert_eq!(total, 2399809723); - - total = 0; - // Testing DOWN magic_u32 - for x in 0..(200 * 1000u32) { - let m = magic_u32(0xFFFF_FFFFu32 - x); - total = total ^ (m.mul_by as u64); - total = total + (m.shift_by as u64); - total = total + (if m.do_add { 123 } else { 456 }); - } - assert_eq!(total, 271138267); - - // Testing UP magic_u64 - total = 0; - for x in 2..(200 * 1000u64) { - let m = magic_u64(x); - total = total ^ m.mul_by; - total = total + (m.shift_by as u64); - total = total + (if m.do_add { 123 } else { 456 }); - } - assert_eq!(total, 7430004086976261161); - - total = 0; - // Testing MIDPOINT magic_u64 - for x in 0x8000_0000_0000_0000u64 - 10 * 1000u64..0x8000_0000_0000_0000u64 + 10 * 1000u64 { - let m = magic_u64(x); - total = total ^ m.mul_by; - total = total + (m.shift_by as u64); - total = total + (if m.do_add { 123 } else { 456 }); - } - assert_eq!(total, 10312117246769520603); - - // Testing DOWN magic_u64 - total = 0; - for x in 0..(200 * 1000u64) { - let m = magic_u64(0xFFFF_FFFF_FFFF_FFFFu64 - x); - total = total ^ m.mul_by; - total = total + (m.shift_by as u64); - total = total + (if m.do_add { 123 } else { 456 }); - } - assert_eq!(total, 1126603594357269734); - - // Testing UP magic_s32 - total = 0; - for x in 0..(200 * 1000i32) { - let m = magic_s32(-0x8000_0000i32 + x); - total = total ^ (m.mul_by as u64); - total = total + (m.shift_by as u64); - } - assert_eq!(total, 18446744069953376812); - - total = 0; - // Testing MIDPOINT magic_s32 - for x in 0..(200 * 1000i32) { - let x2 = -100 * 1000i32 + x; - if x2 != -1 && x2 != 0 && x2 != 1 { - let m = magic_s32(x2); - total = total ^ (m.mul_by as u64); - total = total + (m.shift_by as u64); - } - } - assert_eq!(total, 351839350); - - // Testing DOWN magic_s32 - total = 0; - for x in 0..(200 * 1000i32) { - let m = magic_s32(0x7FFF_FFFFi32 - x); - total = total ^ (m.mul_by as u64); - total = total + (m.shift_by as u64); - } - assert_eq!(total, 18446744072916880714); - - // Testing UP magic_s64 - total = 0; - for x in 0..(200 * 1000i64) { - let m = magic_s64(-0x8000_0000_0000_0000i64 + x); - total = total ^ (m.mul_by as u64); - total = total + (m.shift_by as u64); - } - assert_eq!(total, 17929885647724831014); - - total = 0; - // Testing MIDPOINT magic_s64 - for x in 0..(200 * 1000i64) { - let x2 = -100 * 1000i64 + x; - if x2 != -1 && x2 != 0 && x2 != 1 { - let m = magic_s64(x2); - total = total ^ (m.mul_by as u64); - total = total + (m.shift_by as u64); - } - } - assert_eq!(total, 18106042338125661964); - - // Testing DOWN magic_s64 - total = 0; - for x in 0..(200 * 1000i64) { - let m = magic_s64(0x7FFF_FFFF_FFFF_FFFFi64 - x); - total = total ^ (m.mul_by as u64); - total = total + (m.shift_by as u64); - } - assert_eq!(total, 563301797155560970); - } - - #[test] - fn test_magic_generators_give_correct_numbers() { - // For a variety of values for both `n` and `d`, compute the magic - // numbers for `d`, and in effect interpret them so as to compute - // `n / d`. Check that that equals the value of `n / d` computed - // directly by the hardware. This serves to check that the magic - // number generates work properly. In total, 50,148,000 tests are - // done. - - // Some constants - const MIN_U32: u32 = 0; - const MAX_U32: u32 = 0xFFFF_FFFFu32; - const MAX_U32_HALF: u32 = 0x8000_0000u32; // more or less - - const MIN_S32: i32 = 0x8000_0000u32 as i32; - const MAX_S32: i32 = 0x7FFF_FFFFu32 as i32; - - const MIN_U64: u64 = 0; - const MAX_U64: u64 = 0xFFFF_FFFF_FFFF_FFFFu64; - const MAX_U64_HALF: u64 = 0x8000_0000_0000_0000u64; // ditto - - const MIN_S64: i64 = 0x8000_0000_0000_0000u64 as i64; - const MAX_S64: i64 = 0x7FFF_FFFF_FFFF_FFFFu64 as i64; - - // These generate reference results for signed/unsigned 32/64 bit - // division, rounding towards zero. - fn div_u32(x: u32, y: u32) -> u32 { - return x / y; - } - fn div_s32(x: i32, y: i32) -> i32 { - return x / y; - } - fn div_u64(x: u64, y: u64) -> u64 { - return x / y; - } - fn div_s64(x: i64, y: i64) -> i64 { - return x / y; - } - - // Returns the high half of a 32 bit unsigned widening multiply. - fn mulhw_u32(x: u32, y: u32) -> u32 { - let x64: u64 = x as u64; - let y64: u64 = y as u64; - let r64: u64 = x64 * y64; - (r64 >> 32) as u32 - } - - // Returns the high half of a 32 bit signed widening multiply. - fn mulhw_s32(x: i32, y: i32) -> i32 { - let x64: i64 = x as i64; - let y64: i64 = y as i64; - let r64: i64 = x64 * y64; - (r64 >> 32) as i32 - } - - // Returns the high half of a 64 bit unsigned widening multiply. - fn mulhw_u64(x: u64, y: u64) -> u64 { - let t0: u64 = x & 0xffffffffu64; - let t1: u64 = x >> 32; - let t2: u64 = y & 0xffffffffu64; - let t3: u64 = y >> 32; - let t4: u64 = t0 * t2; - let t5: u64 = t1 * t2 + (t4 >> 32); - let t6: u64 = t5 & 0xffffffffu64; - let t7: u64 = t5 >> 32; - let t8: u64 = t0 * t3 + t6; - let t9: u64 = t1 * t3 + t7 + (t8 >> 32); - t9 - } - - // Returns the high half of a 64 bit signed widening multiply. - fn mulhw_s64(x: i64, y: i64) -> i64 { - let t0: u64 = x as u64 & 0xffffffffu64; - let t1: i64 = x >> 32; - let t2: u64 = y as u64 & 0xffffffffu64; - let t3: i64 = y >> 32; - let t4: u64 = t0 * t2; - let t5: i64 = t1 * t2 as i64 + (t4 >> 32) as i64; - let t6: u64 = t5 as u64 & 0xffffffffu64; - let t7: i64 = t5 >> 32; - let t8: i64 = t0 as i64 * t3 + t6 as i64; - let t9: i64 = t1 * t3 + t7 + (t8 >> 32); - t9 - } - - // Compute the magic numbers for `d` and then use them to compute and - // check `n / d` for around 1000 values of `n`, using unsigned 32-bit - // division. - fn test_magic_u32_inner(d: u32, n_tests_done: &mut i32) { - // Advance the numerator (the `n` in `n / d`) so as to test - // densely near the range ends (and, in the signed variants, near - // zero) but not so densely away from those regions. - fn advance_n_u32(x: u32) -> u32 { - if x < MIN_U32 + 110 { - return x + 1; - } - if x < MIN_U32 + 1700 { - return x + 23; - } - if x < MAX_U32 - 1700 { - let xd: f64 = (x as f64) * 1.06415927; - return if xd >= (MAX_U32 - 1700) as f64 { - MAX_U32 - 1700 - } else { - xd as u32 - }; - } - if x < MAX_U32 - 110 { - return x + 23; - } - u32::wrapping_add(x, 1) - } - - let magic: MU32 = magic_u32(d); - let mut n: u32 = MIN_U32; - loop { - *n_tests_done += 1; - // Compute and check `q = n / d` using `magic`. - let mut q: u32 = mulhw_u32(n, magic.mul_by); - if magic.do_add { - assert!(magic.shift_by >= 1 && magic.shift_by <= 32); - let mut t: u32 = n - q; - t >>= 1; - t = t + q; - q = t >> (magic.shift_by - 1); - } else { - assert!(magic.shift_by >= 0 && magic.shift_by <= 31); - q >>= magic.shift_by; - } - - assert_eq!(q, div_u32(n, d)); - - n = advance_n_u32(n); - if n == MIN_U32 { - break; - } - } - } - - // Compute the magic numbers for `d` and then use them to compute and - // check `n / d` for around 1000 values of `n`, using signed 32-bit - // division. - fn test_magic_s32_inner(d: i32, n_tests_done: &mut i32) { - // See comment on advance_n_u32 above. - fn advance_n_s32(x: i32) -> i32 { - if x >= 0 && x <= 29 { - return x + 1; - } - if x < MIN_S32 + 110 { - return x + 1; - } - if x < MIN_S32 + 1700 { - return x + 23; - } - if x < MAX_S32 - 1700 { - let mut xd: f64 = x as f64; - xd = if xd < 0.0 { - xd / 1.06415927 - } else { - xd * 1.06415927 - }; - return if xd >= (MAX_S32 - 1700) as f64 { - MAX_S32 - 1700 - } else { - xd as i32 - }; - } - if x < MAX_S32 - 110 { - return x + 23; - } - if x == MAX_S32 { - return MIN_S32; - } - x + 1 - } - - let magic: MS32 = magic_s32(d); - let mut n: i32 = MIN_S32; - loop { - *n_tests_done += 1; - // Compute and check `q = n / d` using `magic`. - let mut q: i32 = mulhw_s32(n, magic.mul_by); - if d > 0 && magic.mul_by < 0 { - q = q + n; - } else if d < 0 && magic.mul_by > 0 { - q = q - n; - } - assert!(magic.shift_by >= 0 && magic.shift_by <= 31); - q = q >> magic.shift_by; - let mut t: u32 = q as u32; - t = t >> 31; - q = q + (t as i32); - - assert_eq!(q, div_s32(n, d)); - - n = advance_n_s32(n); - if n == MIN_S32 { - break; - } - } - } - - // Compute the magic numbers for `d` and then use them to compute and - // check `n / d` for around 1000 values of `n`, using unsigned 64-bit - // division. - fn test_magic_u64_inner(d: u64, n_tests_done: &mut i32) { - // See comment on advance_n_u32 above. - fn advance_n_u64(x: u64) -> u64 { - if x < MIN_U64 + 110 { - return x + 1; - } - if x < MIN_U64 + 1700 { - return x + 23; - } - if x < MAX_U64 - 1700 { - let xd: f64 = (x as f64) * 1.06415927; - return if xd >= (MAX_U64 - 1700) as f64 { - MAX_U64 - 1700 - } else { - xd as u64 - }; - } - if x < MAX_U64 - 110 { - return x + 23; - } - u64::wrapping_add(x, 1) - } - - let magic: MU64 = magic_u64(d); - let mut n: u64 = MIN_U64; - loop { - *n_tests_done += 1; - // Compute and check `q = n / d` using `magic`. - let mut q = mulhw_u64(n, magic.mul_by); - if magic.do_add { - assert!(magic.shift_by >= 1 && magic.shift_by <= 64); - let mut t: u64 = n - q; - t >>= 1; - t = t + q; - q = t >> (magic.shift_by - 1); - } else { - assert!(magic.shift_by >= 0 && magic.shift_by <= 63); - q >>= magic.shift_by; - } - - assert_eq!(q, div_u64(n, d)); - - n = advance_n_u64(n); - if n == MIN_U64 { - break; - } - } - } - - // Compute the magic numbers for `d` and then use them to compute and - // check `n / d` for around 1000 values of `n`, using signed 64-bit - // division. - fn test_magic_s64_inner(d: i64, n_tests_done: &mut i32) { - // See comment on advance_n_u32 above. - fn advance_n_s64(x: i64) -> i64 { - if x >= 0 && x <= 29 { - return x + 1; - } - if x < MIN_S64 + 110 { - return x + 1; - } - if x < MIN_S64 + 1700 { - return x + 23; - } - if x < MAX_S64 - 1700 { - let mut xd: f64 = x as f64; - xd = if xd < 0.0 { - xd / 1.06415927 - } else { - xd * 1.06415927 - }; - return if xd >= (MAX_S64 - 1700) as f64 { - MAX_S64 - 1700 - } else { - xd as i64 - }; - } - if x < MAX_S64 - 110 { - return x + 23; - } - if x == MAX_S64 { - return MIN_S64; - } - x + 1 - } - - let magic: MS64 = magic_s64(d); - let mut n: i64 = MIN_S64; - loop { - *n_tests_done += 1; - // Compute and check `q = n / d` using `magic`. */ - let mut q: i64 = mulhw_s64(n, magic.mul_by); - if d > 0 && magic.mul_by < 0 { - q = q + n; - } else if d < 0 && magic.mul_by > 0 { - q = q - n; - } - assert!(magic.shift_by >= 0 && magic.shift_by <= 63); - q = q >> magic.shift_by; - let mut t: u64 = q as u64; - t = t >> 63; - q = q + (t as i64); - - assert_eq!(q, div_s64(n, d)); - - n = advance_n_s64(n); - if n == MIN_S64 { - break; - } - } - } - - // Using all the above support machinery, actually run the tests. - - let mut n_tests_done: i32 = 0; - - // u32 division tests - { - // 2 .. 3k - let mut d: u32 = 2; - for _ in 0..3 * 1000 { - test_magic_u32_inner(d, &mut n_tests_done); - d += 1; - } - - // across the midpoint: midpoint - 3k .. midpoint + 3k - d = MAX_U32_HALF - 3 * 1000; - for _ in 0..2 * 3 * 1000 { - test_magic_u32_inner(d, &mut n_tests_done); - d += 1; - } - - // MAX_U32 - 3k .. MAX_U32 (in reverse order) - d = MAX_U32; - for _ in 0..3 * 1000 { - test_magic_u32_inner(d, &mut n_tests_done); - d -= 1; - } - } - - // s32 division tests - { - // MIN_S32 .. MIN_S32 + 3k - let mut d: i32 = MIN_S32; - for _ in 0..3 * 1000 { - test_magic_s32_inner(d, &mut n_tests_done); - d += 1; - } - - // -3k .. -2 (in reverse order) - d = -2; - for _ in 0..3 * 1000 { - test_magic_s32_inner(d, &mut n_tests_done); - d -= 1; - } - - // 2 .. 3k - d = 2; - for _ in 0..3 * 1000 { - test_magic_s32_inner(d, &mut n_tests_done); - d += 1; - } - - // MAX_S32 - 3k .. MAX_S32 (in reverse order) - d = MAX_S32; - for _ in 0..3 * 1000 { - test_magic_s32_inner(d, &mut n_tests_done); - d -= 1; - } - } - - // u64 division tests - { - // 2 .. 3k - let mut d: u64 = 2; - for _ in 0..3 * 1000 { - test_magic_u64_inner(d, &mut n_tests_done); - d += 1; - } - - // across the midpoint: midpoint - 3k .. midpoint + 3k - d = MAX_U64_HALF - 3 * 1000; - for _ in 0..2 * 3 * 1000 { - test_magic_u64_inner(d, &mut n_tests_done); - d += 1; - } - - // mAX_U64 - 3000 .. mAX_U64 (in reverse order) - d = MAX_U64; - for _ in 0..3 * 1000 { - test_magic_u64_inner(d, &mut n_tests_done); - d -= 1; - } - } - - // s64 division tests - { - // MIN_S64 .. MIN_S64 + 3k - let mut d: i64 = MIN_S64; - for _ in 0..3 * 1000 { - test_magic_s64_inner(d, &mut n_tests_done); - d += 1; - } - - // -3k .. -2 (in reverse order) - d = -2; - for _ in 0..3 * 1000 { - test_magic_s64_inner(d, &mut n_tests_done); - d -= 1; - } - - // 2 .. 3k - d = 2; - for _ in 0..3 * 1000 { - test_magic_s64_inner(d, &mut n_tests_done); - d += 1; - } - - // MAX_S64 - 3k .. MAX_S64 (in reverse order) - d = MAX_S64; - for _ in 0..3 * 1000 { - test_magic_s64_inner(d, &mut n_tests_done); - d -= 1; - } - } - assert_eq!(n_tests_done, 50_148_000); - } -} diff --git a/cranelift/codegen/src/fx.rs b/cranelift/codegen/src/fx.rs index 36eb62df9013..bb1a9e59e6c6 100644 --- a/cranelift/codegen/src/fx.rs +++ b/cranelift/codegen/src/fx.rs @@ -23,11 +23,6 @@ pub fn FxHashMap() -> FxHashMap { HashMap::default() } -#[allow(non_snake_case)] -pub fn FxHashSet() -> FxHashSet { - HashSet::default() -} - /// A speedy hash algorithm for use within rustc. The hashmap in liballoc /// by default uses SipHash which isn't quite as speedy as we want. In the /// compiler we're not really worried about DOS attempts, so we use a fast diff --git a/cranelift/codegen/src/lib.rs b/cranelift/codegen/src/lib.rs index 39c0f14809bb..d9f917cc5bfd 100644 --- a/cranelift/codegen/src/lib.rs +++ b/cranelift/codegen/src/lib.rs @@ -102,21 +102,17 @@ mod constant_hash; mod context; mod ctxhash; mod dce; -mod divconst_magic_numbers; mod egraph; mod fx; mod inst_predicates; mod isle_prelude; mod iterators; mod legalizer; -mod licm; mod nan_canonicalization; mod opts; mod remove_constant_phis; mod result; mod scoped_hash_map; -mod simple_gvn; -mod simple_preopt; mod unionfind; mod unreachable_code; mod value_label; diff --git a/cranelift/codegen/src/licm.rs b/cranelift/codegen/src/licm.rs deleted file mode 100644 index 9f543392cd1c..000000000000 --- a/cranelift/codegen/src/licm.rs +++ /dev/null @@ -1,241 +0,0 @@ -//! A Loop Invariant Code Motion optimization pass - -use crate::cursor::{Cursor, FuncCursor}; -use crate::dominator_tree::DominatorTree; -use crate::entity::{EntityList, ListPool}; -use crate::flowgraph::{BlockPredecessor, ControlFlowGraph}; -use crate::fx::FxHashSet; -use crate::ir::{ - Block, DataFlowGraph, Function, Inst, InstBuilder, InstructionData, Layout, Opcode, Type, Value, -}; -use crate::loop_analysis::{Loop, LoopAnalysis}; -use crate::timing; -use alloc::vec::Vec; - -/// Performs the LICM pass by detecting loops within the CFG and moving -/// loop-invariant instructions out of them. -/// Changes the CFG and domtree in-place during the operation. -pub fn do_licm( - func: &mut Function, - cfg: &mut ControlFlowGraph, - domtree: &mut DominatorTree, - loop_analysis: &mut LoopAnalysis, -) { - let _tt = timing::licm(); - debug_assert!(cfg.is_valid()); - debug_assert!(domtree.is_valid()); - debug_assert!(loop_analysis.is_valid()); - - for lp in loop_analysis.loops() { - // For each loop that we want to optimize we determine the set of loop-invariant - // instructions - let invariant_insts = remove_loop_invariant_instructions(lp, func, cfg, loop_analysis); - // Then we create the loop's pre-header and fill it with the invariant instructions - // Then we remove the invariant instructions from the loop body - if !invariant_insts.is_empty() { - // If the loop has a natural pre-header we use it, otherwise we create it. - let mut pos; - match has_pre_header(&func.layout, cfg, domtree, loop_analysis.loop_header(lp)) { - None => { - let pre_header = - create_pre_header(loop_analysis.loop_header(lp), func, cfg, domtree); - pos = FuncCursor::new(func).at_last_inst(pre_header); - } - // If there is a natural pre-header we insert new instructions just before the - // related jumping instruction (which is not necessarily at the end). - Some((_, last_inst)) => { - pos = FuncCursor::new(func).at_inst(last_inst); - } - }; - // The last instruction of the pre-header is the termination instruction (usually - // a jump) so we need to insert just before this. - for inst in invariant_insts { - pos.insert_inst(inst); - } - } - } - // We have to recompute the domtree to account for the changes - cfg.compute(func); - domtree.compute(func, cfg); -} - -/// Insert a pre-header before the header, modifying the function layout and CFG to reflect it. -/// A jump instruction to the header is placed at the end of the pre-header. -fn create_pre_header( - header: Block, - func: &mut Function, - cfg: &mut ControlFlowGraph, - domtree: &DominatorTree, -) -> Block { - let pool = &mut ListPool::::new(); - let header_args_values = func.dfg.block_params(header).to_vec(); - let header_args_types: Vec = header_args_values - .into_iter() - .map(|val| func.dfg.value_type(val)) - .collect(); - let pre_header = func.dfg.make_block(); - let mut pre_header_args_value: EntityList = EntityList::new(); - for typ in header_args_types { - pre_header_args_value.push(func.dfg.append_block_param(pre_header, typ), pool); - } - - for BlockPredecessor { - inst: last_inst, .. - } in cfg.pred_iter(header) - { - // We only follow normal edges (not the back edges) - if !domtree.dominates(header, last_inst, &func.layout) { - func.rewrite_branch_destination(last_inst, header, pre_header); - } - } - - // Inserts the pre-header at the right place in the layout. - let mut pos = FuncCursor::new(func).at_top(header); - pos.insert_block(pre_header); - pos.next_inst(); - pos.ins().jump(header, pre_header_args_value.as_slice(pool)); - - pre_header -} - -/// Detects if a loop header has a natural pre-header. -/// -/// A loop header has a pre-header if there is only one predecessor that the header doesn't -/// dominate. -/// Returns the pre-header Block and the instruction jumping to the header. -fn has_pre_header( - layout: &Layout, - cfg: &ControlFlowGraph, - domtree: &DominatorTree, - header: Block, -) -> Option<(Block, Inst)> { - let mut result = None; - for BlockPredecessor { - block: pred_block, - inst: branch_inst, - } in cfg.pred_iter(header) - { - // We only count normal edges (not the back edges) - if !domtree.dominates(header, branch_inst, layout) { - if result.is_some() { - // We have already found one, there are more than one - return None; - } - if branch_inst != layout.last_inst(pred_block).unwrap() - || cfg.succ_iter(pred_block).nth(1).is_some() - { - // It's along a critical edge, so don't use it. - return None; - } - result = Some((pred_block, branch_inst)); - } - } - result -} - -/// Test whether the given opcode is unsafe to even consider for LICM. -fn trivially_unsafe_for_licm(opcode: Opcode) -> bool { - opcode.can_store() - || opcode.is_call() - || opcode.is_branch() - || opcode.is_terminator() - || opcode.is_return() - || opcode.can_trap() - || opcode.other_side_effects() -} - -fn is_unsafe_load(inst_data: &InstructionData) -> bool { - match *inst_data { - InstructionData::Load { flags, .. } => !flags.readonly() || !flags.notrap(), - _ => inst_data.opcode().can_load(), - } -} - -/// Test whether the given instruction is loop-invariant. -fn is_loop_invariant(inst: Inst, dfg: &DataFlowGraph, loop_values: &FxHashSet) -> bool { - if trivially_unsafe_for_licm(dfg.insts[inst].opcode()) { - return false; - } - - if is_unsafe_load(&dfg.insts[inst]) { - return false; - } - - for arg in dfg.inst_values(inst) { - let arg = dfg.resolve_aliases(arg); - if loop_values.contains(&arg) { - return false; - } - } - true -} - -/// Traverses a loop in reverse post-order from a header block and identify loop-invariant -/// instructions. These loop-invariant instructions are then removed from the code and returned -/// (in reverse post-order) for later use. -fn remove_loop_invariant_instructions( - lp: Loop, - func: &mut Function, - cfg: &ControlFlowGraph, - loop_analysis: &LoopAnalysis, -) -> Vec { - let mut loop_values: FxHashSet = FxHashSet(); - let mut invariant_insts: Vec = Vec::new(); - let mut pos = FuncCursor::new(func); - // We traverse the loop block in reverse post-order. - for block in postorder_blocks_loop(loop_analysis, cfg, lp).iter().rev() { - // Arguments of the block are loop values - for val in pos.func.dfg.block_params(*block) { - loop_values.insert(*val); - } - pos.goto_top(*block); - #[cfg_attr(feature = "cargo-clippy", allow(clippy::block_in_if_condition_stmt))] - while let Some(inst) = pos.next_inst() { - if is_loop_invariant(inst, &pos.func.dfg, &loop_values) { - // If all the instruction's argument are defined outside the loop - // then this instruction is loop-invariant - invariant_insts.push(inst); - // We remove it from the loop - pos.remove_inst_and_step_back(); - } else { - // If the instruction is not loop-invariant we push its results in the set of - // loop values - for out in pos.func.dfg.inst_results(inst) { - loop_values.insert(*out); - } - } - } - } - invariant_insts -} - -/// Return blocks from a loop in post-order, starting from an entry point in the block. -fn postorder_blocks_loop( - loop_analysis: &LoopAnalysis, - cfg: &ControlFlowGraph, - lp: Loop, -) -> Vec { - let mut grey = FxHashSet(); - let mut black = FxHashSet(); - let mut stack = vec![loop_analysis.loop_header(lp)]; - let mut postorder = Vec::new(); - - while !stack.is_empty() { - let node = stack.pop().unwrap(); - if !grey.contains(&node) { - // This is a white node. Mark it as gray. - grey.insert(node); - stack.push(node); - // Get any children we've never seen before. - for child in cfg.succ_iter(node) { - if loop_analysis.is_in_loop(child, lp) && !grey.contains(&child) { - stack.push(child); - } - } - } else if !black.contains(&node) { - postorder.push(node); - black.insert(node); - } - } - postorder -} diff --git a/cranelift/codegen/src/machinst/isle.rs b/cranelift/codegen/src/machinst/isle.rs index 867102c32d6a..ce4bdd241dd5 100644 --- a/cranelift/codegen/src/machinst/isle.rs +++ b/cranelift/codegen/src/machinst/isle.rs @@ -128,29 +128,6 @@ macro_rules! isle_lower_prelude_methods { #[inline] fn put_in_regs(&mut self, val: Value) -> ValueRegs { - // If the value is a constant, then (re)materialize it at each - // use. This lowers register pressure. (Only do this if we are - // not using egraph-based compilation; the egraph framework - // more efficiently rematerializes constants where needed.) - if !(self.backend.flags().use_egraphs() - && self.backend.flags().opt_level() != OptLevel::None) - { - let inputs = self.lower_ctx.get_value_as_source_or_const(val); - if inputs.constant.is_some() { - let insn = match inputs.inst { - InputSourceInst::UniqueUse(insn, 0) => Some(insn), - InputSourceInst::Use(insn, 0) => Some(insn), - _ => None, - }; - if let Some(insn) = insn { - if let Some(regs) = self.backend.lower(self.lower_ctx, insn) { - assert!(regs.len() == 1); - return regs[0]; - } - } - } - } - self.lower_ctx.put_value_in_regs(val) } diff --git a/cranelift/codegen/src/settings.rs b/cranelift/codegen/src/settings.rs index 44d2504dff75..d48e1cbaa79f 100644 --- a/cranelift/codegen/src/settings.rs +++ b/cranelift/codegen/src/settings.rs @@ -528,7 +528,6 @@ probestack_strategy = "outline" regalloc_checker = false regalloc_verbose_logs = false enable_alias_analysis = true -use_egraphs = true enable_verifier = true is_pic = false use_colocated_libcalls = false diff --git a/cranelift/codegen/src/simple_gvn.rs b/cranelift/codegen/src/simple_gvn.rs deleted file mode 100644 index 6b09ae96b226..000000000000 --- a/cranelift/codegen/src/simple_gvn.rs +++ /dev/null @@ -1,149 +0,0 @@ -//! A simple GVN pass. - -use crate::cursor::{Cursor, FuncCursor}; -use crate::dominator_tree::DominatorTree; -use crate::ir::{Function, Inst, InstructionData, Opcode, Type}; -use crate::scoped_hash_map::ScopedHashMap; -use crate::timing; -use alloc::vec::Vec; -use core::cell::{Ref, RefCell}; -use core::hash::{Hash, Hasher}; - -/// Test whether the given opcode is unsafe to even consider for GVN. -fn trivially_unsafe_for_gvn(opcode: Opcode) -> bool { - opcode.is_call() - || opcode.is_branch() - || opcode.is_terminator() - || opcode.is_return() - || opcode.can_store() - || (opcode.can_trap() && !opcode.side_effects_idempotent()) - || (opcode.other_side_effects() && !opcode.side_effects_idempotent()) -} - -/// Test that, if the specified instruction is a load, it doesn't have the `readonly` memflag. -fn is_load_and_not_readonly(inst_data: &InstructionData) -> bool { - match *inst_data { - InstructionData::Load { flags, .. } => !flags.readonly(), - _ => inst_data.opcode().can_load(), - } -} - -/// Wrapper around `InstructionData` which implements `Eq` and `Hash` -#[derive(Clone)] -struct HashKey<'a, 'f: 'a> { - inst: InstructionData, - ty: Type, - pos: &'a RefCell>, -} -impl<'a, 'f: 'a> Hash for HashKey<'a, 'f> { - fn hash(&self, state: &mut H) { - let pool = &self.pos.borrow().func.dfg.value_lists; - self.inst.hash(state, pool, |value| value); - self.ty.hash(state); - } -} -impl<'a, 'f: 'a> PartialEq for HashKey<'a, 'f> { - fn eq(&self, other: &Self) -> bool { - let pool = &self.pos.borrow().func.dfg.value_lists; - self.inst.eq(&other.inst, pool, |value| value) && self.ty == other.ty - } -} -impl<'a, 'f: 'a> Eq for HashKey<'a, 'f> {} - -/// Perform simple GVN on `func`. -/// -pub fn do_simple_gvn(func: &mut Function, domtree: &mut DominatorTree) { - let _tt = timing::gvn(); - debug_assert!(domtree.is_valid()); - - // Visit blocks in a reverse post-order. - // - // The RefCell here is a bit ugly since the HashKeys in the ScopedHashMap - // need a reference to the function. - let pos = RefCell::new(FuncCursor::new(func)); - - let mut visible_values: ScopedHashMap = ScopedHashMap::new(); - let mut scope_stack: Vec = Vec::new(); - - for &block in domtree.cfg_postorder().iter().rev() { - { - // Pop any scopes that we just exited. - let layout = &pos.borrow().func.layout; - loop { - if let Some(current) = scope_stack.last() { - if domtree.dominates(*current, block, layout) { - break; - } - } else { - break; - } - scope_stack.pop(); - visible_values.decrement_depth(); - } - - // Push a scope for the current block. - scope_stack.push(layout.first_inst(block).unwrap()); - visible_values.increment_depth(); - } - - pos.borrow_mut().goto_top(block); - while let Some(inst) = { - let mut pos = pos.borrow_mut(); - pos.next_inst() - } { - // Resolve aliases, particularly aliases we created earlier. - pos.borrow_mut().func.dfg.resolve_aliases_in_arguments(inst); - - let func = Ref::map(pos.borrow(), |pos| &pos.func); - - let opcode = func.dfg.insts[inst].opcode(); - - if opcode.is_branch() && !opcode.is_terminator() { - scope_stack.push(func.layout.next_inst(inst).unwrap()); - visible_values.increment_depth(); - } - - if trivially_unsafe_for_gvn(opcode) { - continue; - } - - // These are split up to separate concerns. - if is_load_and_not_readonly(&func.dfg.insts[inst]) { - continue; - } - - let ctrl_typevar = func.dfg.ctrl_typevar(inst); - let key = HashKey { - inst: func.dfg.insts[inst], - ty: ctrl_typevar, - pos: &pos, - }; - use crate::scoped_hash_map::Entry::*; - match visible_values.entry(key) { - Occupied(entry) => { - #[allow(clippy::debug_assert_with_mut_call)] - { - // Clippy incorrectly believes `&func.layout` should not be used here: - // https://github.com/rust-lang/rust-clippy/issues/4737 - debug_assert!(domtree.dominates(*entry.get(), inst, &func.layout)); - } - - // If the redundant instruction is representing the current - // scope, pick a new representative. - let old = scope_stack.last_mut().unwrap(); - if *old == inst { - *old = func.layout.next_inst(inst).unwrap(); - } - // Replace the redundant instruction and remove it. - drop(func); - let mut pos = pos.borrow_mut(); - pos.func.dfg.replace_with_aliases(inst, *entry.get()); - pos.remove_inst_and_step_back(); - } - Vacant(entry) => { - entry.insert(inst); - } - } - } - } -} diff --git a/cranelift/codegen/src/simple_preopt.rs b/cranelift/codegen/src/simple_preopt.rs deleted file mode 100644 index f1e05d7e74cd..000000000000 --- a/cranelift/codegen/src/simple_preopt.rs +++ /dev/null @@ -1,796 +0,0 @@ -//! A pre-legalization rewriting pass. -//! -//! This module provides early-stage optimizations. The optimizations found -//! should be useful for already well-optimized code. - -use crate::cursor::{Cursor, FuncCursor}; -use crate::divconst_magic_numbers::{magic_s32, magic_s64, magic_u32, magic_u64}; -use crate::divconst_magic_numbers::{MS32, MS64, MU32, MU64}; -use crate::ir::{ - condcodes::IntCC, - instructions::Opcode, - types::{I128, I32, I64}, - DataFlowGraph, Function, Inst, InstBuilder, InstructionData, Type, Value, -}; -use crate::isa::TargetIsa; -use crate::timing; - -#[inline] -/// Replaces the unique result of the instruction inst to an alias of the given value, and -/// replaces the instruction with a nop. Can be used only on instructions producing one unique -/// result, otherwise will assert. -fn replace_single_result_with_alias(dfg: &mut DataFlowGraph, inst: Inst, value: Value) { - // Replace the result value by an alias. - let results = dfg.detach_results(inst); - debug_assert!(results.len(&dfg.value_lists) == 1); - let result = results.get(0, &dfg.value_lists).unwrap(); - dfg.change_to_alias(result, value); - - // Replace instruction by a nop. - dfg.replace(inst).nop(); -} - -//---------------------------------------------------------------------- -// -// Pattern-match helpers and transformation for div and rem by constants. - -// Simple math helpers - -/// if `x` is a power of two, or the negation thereof, return the power along -/// with a boolean that indicates whether `x` is negative. Else return None. -#[inline] -fn i32_is_power_of_two(x: i32) -> Option<(bool, u32)> { - // We have to special-case this because abs(x) isn't representable. - if x == -0x8000_0000 { - return Some((true, 31)); - } - let abs_x = i32::wrapping_abs(x) as u32; - if abs_x.is_power_of_two() { - return Some((x < 0, abs_x.trailing_zeros())); - } - None -} - -/// Same comments as for i32_is_power_of_two apply. -#[inline] -fn i64_is_power_of_two(x: i64) -> Option<(bool, u32)> { - // We have to special-case this because abs(x) isn't representable. - if x == -0x8000_0000_0000_0000 { - return Some((true, 63)); - } - let abs_x = i64::wrapping_abs(x) as u64; - if abs_x.is_power_of_two() { - return Some((x < 0, abs_x.trailing_zeros())); - } - None -} - -/// Representation of an instruction that can be replaced by a single division/remainder operation -/// between a left Value operand and a right immediate operand. -#[derive(Debug)] -enum DivRemByConstInfo { - DivU32(Value, u32), - DivU64(Value, u64), - DivS32(Value, i32), - DivS64(Value, i64), - RemU32(Value, u32), - RemU64(Value, u64), - RemS32(Value, i32), - RemS64(Value, i64), -} - -/// Possibly create a DivRemByConstInfo from the given components, by figuring out which, if any, -/// of the 8 cases apply, and also taking care to sanity-check the immediate. -fn package_up_divrem_info( - value: Value, - value_type: Type, - imm_i64: i64, - is_signed: bool, - is_rem: bool, -) -> Option { - let imm_u64 = imm_i64 as u64; - - match (is_signed, value_type) { - (false, I32) => { - if imm_u64 < 0x1_0000_0000 { - if is_rem { - Some(DivRemByConstInfo::RemU32(value, imm_u64 as u32)) - } else { - Some(DivRemByConstInfo::DivU32(value, imm_u64 as u32)) - } - } else { - None - } - } - - (false, I64) => { - // unsigned 64, no range constraint. - if is_rem { - Some(DivRemByConstInfo::RemU64(value, imm_u64)) - } else { - Some(DivRemByConstInfo::DivU64(value, imm_u64)) - } - } - - (true, I32) => { - if imm_u64 <= 0x7fff_ffff || imm_u64 >= 0xffff_ffff_8000_0000 { - if is_rem { - Some(DivRemByConstInfo::RemS32(value, imm_u64 as i32)) - } else { - Some(DivRemByConstInfo::DivS32(value, imm_u64 as i32)) - } - } else { - None - } - } - - (true, I64) => { - // signed 64, no range constraint. - if is_rem { - Some(DivRemByConstInfo::RemS64(value, imm_u64 as i64)) - } else { - Some(DivRemByConstInfo::DivS64(value, imm_u64 as i64)) - } - } - - _ => None, - } -} - -/// Examine `inst` to see if it is a div or rem by a constant, and if so return the operands, -/// signedness, operation size and div-vs-rem-ness in a handy bundle. -fn get_div_info(inst: Inst, dfg: &DataFlowGraph) -> Option { - if let InstructionData::BinaryImm64 { opcode, arg, imm } = dfg.insts[inst] { - let (is_signed, is_rem) = match opcode { - Opcode::UdivImm => (false, false), - Opcode::UremImm => (false, true), - Opcode::SdivImm => (true, false), - Opcode::SremImm => (true, true), - _ => return None, - }; - return package_up_divrem_info(arg, dfg.value_type(arg), imm.into(), is_signed, is_rem); - } - - None -} - -/// Actually do the transformation given a bundle containing the relevant information. -/// `divrem_info` describes a div or rem by a constant, that `pos` currently points at, and `inst` -/// is the associated instruction. `inst` is replaced by a sequence of other operations that -/// calculate the same result. Note that there are various `divrem_info` cases where we cannot do -/// any transformation, in which case `inst` is left unchanged. -fn do_divrem_transformation(divrem_info: &DivRemByConstInfo, pos: &mut FuncCursor, inst: Inst) { - let is_rem = match *divrem_info { - DivRemByConstInfo::DivU32(_, _) - | DivRemByConstInfo::DivU64(_, _) - | DivRemByConstInfo::DivS32(_, _) - | DivRemByConstInfo::DivS64(_, _) => false, - DivRemByConstInfo::RemU32(_, _) - | DivRemByConstInfo::RemU64(_, _) - | DivRemByConstInfo::RemS32(_, _) - | DivRemByConstInfo::RemS64(_, _) => true, - }; - - match *divrem_info { - // -------------------- U32 -------------------- - - // U32 div, rem by zero: ignore - DivRemByConstInfo::DivU32(_n1, 0) | DivRemByConstInfo::RemU32(_n1, 0) => {} - - // U32 div by 1: identity - // U32 rem by 1: zero - DivRemByConstInfo::DivU32(n1, 1) | DivRemByConstInfo::RemU32(n1, 1) => { - if is_rem { - pos.func.dfg.replace(inst).iconst(I32, 0); - } else { - replace_single_result_with_alias(&mut pos.func.dfg, inst, n1); - } - } - - // U32 div, rem by a power-of-2 - DivRemByConstInfo::DivU32(n1, d) | DivRemByConstInfo::RemU32(n1, d) - if d.is_power_of_two() => - { - debug_assert!(d >= 2); - // compute k where d == 2^k - let k = d.trailing_zeros(); - debug_assert!(k >= 1 && k <= 31); - if is_rem { - let mask = (1u64 << k) - 1; - pos.func.dfg.replace(inst).band_imm(n1, mask as i64); - } else { - pos.func.dfg.replace(inst).ushr_imm(n1, k as i64); - } - } - - // U32 div, rem by non-power-of-2 - DivRemByConstInfo::DivU32(n1, d) | DivRemByConstInfo::RemU32(n1, d) => { - debug_assert!(d >= 3); - let MU32 { - mul_by, - do_add, - shift_by, - } = magic_u32(d); - let qf; // final quotient - let q0 = pos.ins().iconst(I32, mul_by as i64); - let q1 = pos.ins().umulhi(n1, q0); - if do_add { - debug_assert!(shift_by >= 1 && shift_by <= 32); - let t1 = pos.ins().isub(n1, q1); - let t2 = pos.ins().ushr_imm(t1, 1); - let t3 = pos.ins().iadd(t2, q1); - // I never found any case where shift_by == 1 here. - // So there's no attempt to fold out a zero shift. - debug_assert_ne!(shift_by, 1); - qf = pos.ins().ushr_imm(t3, (shift_by - 1) as i64); - } else { - debug_assert!(shift_by >= 0 && shift_by <= 31); - // Whereas there are known cases here for shift_by == 0. - if shift_by > 0 { - qf = pos.ins().ushr_imm(q1, shift_by as i64); - } else { - qf = q1; - } - } - // Now qf holds the final quotient. If necessary calculate the - // remainder instead. - if is_rem { - let tt = pos.ins().imul_imm(qf, d as i64); - pos.func.dfg.replace(inst).isub(n1, tt); - } else { - replace_single_result_with_alias(&mut pos.func.dfg, inst, qf); - } - } - - // -------------------- U64 -------------------- - - // U64 div, rem by zero: ignore - DivRemByConstInfo::DivU64(_n1, 0) | DivRemByConstInfo::RemU64(_n1, 0) => {} - - // U64 div by 1: identity - // U64 rem by 1: zero - DivRemByConstInfo::DivU64(n1, 1) | DivRemByConstInfo::RemU64(n1, 1) => { - if is_rem { - pos.func.dfg.replace(inst).iconst(I64, 0); - } else { - replace_single_result_with_alias(&mut pos.func.dfg, inst, n1); - } - } - - // U64 div, rem by a power-of-2 - DivRemByConstInfo::DivU64(n1, d) | DivRemByConstInfo::RemU64(n1, d) - if d.is_power_of_two() => - { - debug_assert!(d >= 2); - // compute k where d == 2^k - let k = d.trailing_zeros(); - debug_assert!(k >= 1 && k <= 63); - if is_rem { - let mask = (1u64 << k) - 1; - pos.func.dfg.replace(inst).band_imm(n1, mask as i64); - } else { - pos.func.dfg.replace(inst).ushr_imm(n1, k as i64); - } - } - - // U64 div, rem by non-power-of-2 - DivRemByConstInfo::DivU64(n1, d) | DivRemByConstInfo::RemU64(n1, d) => { - debug_assert!(d >= 3); - let MU64 { - mul_by, - do_add, - shift_by, - } = magic_u64(d); - let qf; // final quotient - let q0 = pos.ins().iconst(I64, mul_by as i64); - let q1 = pos.ins().umulhi(n1, q0); - if do_add { - debug_assert!(shift_by >= 1 && shift_by <= 64); - let t1 = pos.ins().isub(n1, q1); - let t2 = pos.ins().ushr_imm(t1, 1); - let t3 = pos.ins().iadd(t2, q1); - // I never found any case where shift_by == 1 here. - // So there's no attempt to fold out a zero shift. - debug_assert_ne!(shift_by, 1); - qf = pos.ins().ushr_imm(t3, (shift_by - 1) as i64); - } else { - debug_assert!(shift_by >= 0 && shift_by <= 63); - // Whereas there are known cases here for shift_by == 0. - if shift_by > 0 { - qf = pos.ins().ushr_imm(q1, shift_by as i64); - } else { - qf = q1; - } - } - // Now qf holds the final quotient. If necessary calculate the - // remainder instead. - if is_rem { - let tt = pos.ins().imul_imm(qf, d as i64); - pos.func.dfg.replace(inst).isub(n1, tt); - } else { - replace_single_result_with_alias(&mut pos.func.dfg, inst, qf); - } - } - - // -------------------- S32 -------------------- - - // S32 div, rem by zero or -1: ignore - DivRemByConstInfo::DivS32(_n1, -1) - | DivRemByConstInfo::RemS32(_n1, -1) - | DivRemByConstInfo::DivS32(_n1, 0) - | DivRemByConstInfo::RemS32(_n1, 0) => {} - - // S32 div by 1: identity - // S32 rem by 1: zero - DivRemByConstInfo::DivS32(n1, 1) | DivRemByConstInfo::RemS32(n1, 1) => { - if is_rem { - pos.func.dfg.replace(inst).iconst(I32, 0); - } else { - replace_single_result_with_alias(&mut pos.func.dfg, inst, n1); - } - } - - DivRemByConstInfo::DivS32(n1, d) | DivRemByConstInfo::RemS32(n1, d) => { - if let Some((is_negative, k)) = i32_is_power_of_two(d) { - // k can be 31 only in the case that d is -2^31. - debug_assert!(k >= 1 && k <= 31); - let t1 = if k - 1 == 0 { - n1 - } else { - pos.ins().sshr_imm(n1, (k - 1) as i64) - }; - let t2 = pos.ins().ushr_imm(t1, (32 - k) as i64); - let t3 = pos.ins().iadd(n1, t2); - if is_rem { - // S32 rem by a power-of-2 - let t4 = pos.ins().band_imm(t3, i32::wrapping_neg(1 << k) as i64); - // Curiously, we don't care here what the sign of d is. - pos.func.dfg.replace(inst).isub(n1, t4); - } else { - // S32 div by a power-of-2 - let t4 = pos.ins().sshr_imm(t3, k as i64); - if is_negative { - pos.func.dfg.replace(inst).irsub_imm(t4, 0); - } else { - replace_single_result_with_alias(&mut pos.func.dfg, inst, t4); - } - } - } else { - // S32 div, rem by a non-power-of-2 - debug_assert!(d < -2 || d > 2); - let MS32 { mul_by, shift_by } = magic_s32(d); - let q0 = pos.ins().iconst(I32, mul_by as i64); - let q1 = pos.ins().smulhi(n1, q0); - let q2 = if d > 0 && mul_by < 0 { - pos.ins().iadd(q1, n1) - } else if d < 0 && mul_by > 0 { - pos.ins().isub(q1, n1) - } else { - q1 - }; - debug_assert!(shift_by >= 0 && shift_by <= 31); - let q3 = if shift_by == 0 { - q2 - } else { - pos.ins().sshr_imm(q2, shift_by as i64) - }; - let t1 = pos.ins().ushr_imm(q3, 31); - let qf = pos.ins().iadd(q3, t1); - // Now qf holds the final quotient. If necessary calculate - // the remainder instead. - if is_rem { - let tt = pos.ins().imul_imm(qf, d as i64); - pos.func.dfg.replace(inst).isub(n1, tt); - } else { - replace_single_result_with_alias(&mut pos.func.dfg, inst, qf); - } - } - } - - // -------------------- S64 -------------------- - - // S64 div, rem by zero or -1: ignore - DivRemByConstInfo::DivS64(_n1, -1) - | DivRemByConstInfo::RemS64(_n1, -1) - | DivRemByConstInfo::DivS64(_n1, 0) - | DivRemByConstInfo::RemS64(_n1, 0) => {} - - // S64 div by 1: identity - // S64 rem by 1: zero - DivRemByConstInfo::DivS64(n1, 1) | DivRemByConstInfo::RemS64(n1, 1) => { - if is_rem { - pos.func.dfg.replace(inst).iconst(I64, 0); - } else { - replace_single_result_with_alias(&mut pos.func.dfg, inst, n1); - } - } - - DivRemByConstInfo::DivS64(n1, d) | DivRemByConstInfo::RemS64(n1, d) => { - if let Some((is_negative, k)) = i64_is_power_of_two(d) { - // k can be 63 only in the case that d is -2^63. - debug_assert!(k >= 1 && k <= 63); - let t1 = if k - 1 == 0 { - n1 - } else { - pos.ins().sshr_imm(n1, (k - 1) as i64) - }; - let t2 = pos.ins().ushr_imm(t1, (64 - k) as i64); - let t3 = pos.ins().iadd(n1, t2); - if is_rem { - // S64 rem by a power-of-2 - let t4 = pos.ins().band_imm(t3, i64::wrapping_neg(1 << k)); - // Curiously, we don't care here what the sign of d is. - pos.func.dfg.replace(inst).isub(n1, t4); - } else { - // S64 div by a power-of-2 - let t4 = pos.ins().sshr_imm(t3, k as i64); - if is_negative { - pos.func.dfg.replace(inst).irsub_imm(t4, 0); - } else { - replace_single_result_with_alias(&mut pos.func.dfg, inst, t4); - } - } - } else { - // S64 div, rem by a non-power-of-2 - debug_assert!(d < -2 || d > 2); - let MS64 { mul_by, shift_by } = magic_s64(d); - let q0 = pos.ins().iconst(I64, mul_by); - let q1 = pos.ins().smulhi(n1, q0); - let q2 = if d > 0 && mul_by < 0 { - pos.ins().iadd(q1, n1) - } else if d < 0 && mul_by > 0 { - pos.ins().isub(q1, n1) - } else { - q1 - }; - debug_assert!(shift_by >= 0 && shift_by <= 63); - let q3 = if shift_by == 0 { - q2 - } else { - pos.ins().sshr_imm(q2, shift_by as i64) - }; - let t1 = pos.ins().ushr_imm(q3, 63); - let qf = pos.ins().iadd(q3, t1); - // Now qf holds the final quotient. If necessary calculate - // the remainder instead. - if is_rem { - let tt = pos.ins().imul_imm(qf, d); - pos.func.dfg.replace(inst).isub(n1, tt); - } else { - replace_single_result_with_alias(&mut pos.func.dfg, inst, qf); - } - } - } - } -} - -mod simplify { - use super::*; - use crate::ir::{ - dfg::ValueDef, - immediates, - instructions::Opcode, - types::{I16, I32, I8}, - }; - use std::marker::PhantomData; - - pub struct PeepholeOptimizer<'a, 'b> { - phantom: PhantomData<(&'a (), &'b ())>, - } - - pub fn peephole_optimizer<'a, 'b>(_: &dyn TargetIsa) -> PeepholeOptimizer<'a, 'b> { - PeepholeOptimizer { - phantom: PhantomData, - } - } - - pub fn apply_all<'a, 'b>( - _optimizer: &mut PeepholeOptimizer<'a, 'b>, - pos: &mut FuncCursor<'a>, - inst: Inst, - native_word_width: u32, - ) { - simplify(pos, inst, native_word_width); - branch_opt(pos, inst); - } - - #[inline] - fn resolve_imm64_value(dfg: &DataFlowGraph, value: Value) -> Option { - if let ValueDef::Result(candidate_inst, _) = dfg.value_def(value) { - if let InstructionData::UnaryImm { - opcode: Opcode::Iconst, - imm, - } = dfg.insts[candidate_inst] - { - return Some(imm); - } - } - None - } - - /// Try to transform [(x << N) >> N] into a (un)signed-extending move. - /// Returns true if the final instruction has been converted to such a move. - fn try_fold_extended_move( - pos: &mut FuncCursor, - inst: Inst, - opcode: Opcode, - arg: Value, - imm: immediates::Imm64, - ) -> bool { - if let ValueDef::Result(arg_inst, _) = pos.func.dfg.value_def(arg) { - if let InstructionData::BinaryImm64 { - opcode: Opcode::IshlImm, - arg: prev_arg, - imm: prev_imm, - } = &pos.func.dfg.insts[arg_inst] - { - if imm != *prev_imm { - return false; - } - - let dest_ty = pos.func.dfg.ctrl_typevar(inst); - if dest_ty != pos.func.dfg.ctrl_typevar(arg_inst) || !dest_ty.is_int() { - return false; - } - - let imm_bits: i64 = imm.into(); - let ireduce_ty = match (dest_ty.lane_bits() as i64).wrapping_sub(imm_bits) { - 8 => I8, - 16 => I16, - 32 => I32, - _ => return false, - }; - let ireduce_ty = ireduce_ty.by(dest_ty.lane_count()).unwrap(); - - // This becomes a no-op, since ireduce_ty has a smaller lane width than - // the argument type (also the destination type). - let arg = *prev_arg; - let narrower_arg = pos.ins().ireduce(ireduce_ty, arg); - - if opcode == Opcode::UshrImm { - pos.func.dfg.replace(inst).uextend(dest_ty, narrower_arg); - } else { - pos.func.dfg.replace(inst).sextend(dest_ty, narrower_arg); - } - return true; - } - } - false - } - - /// Apply basic simplifications. - /// - /// This folds constants with arithmetic to form `_imm` instructions, and other minor - /// simplifications. - /// - /// Doesn't apply some simplifications if the native word width (in bytes) is smaller than the - /// controlling type's width of the instruction. This would result in an illegal instruction that - /// would likely be expanded back into an instruction on smaller types with the same initial - /// opcode, creating unnecessary churn. - fn simplify(pos: &mut FuncCursor, inst: Inst, native_word_width: u32) { - match pos.func.dfg.insts[inst] { - InstructionData::Binary { opcode, args } => { - if let Some(mut imm) = resolve_imm64_value(&pos.func.dfg, args[1]) { - let new_opcode = match opcode { - Opcode::Iadd => Opcode::IaddImm, - Opcode::Imul => Opcode::ImulImm, - Opcode::Sdiv => Opcode::SdivImm, - Opcode::Udiv => Opcode::UdivImm, - Opcode::Srem => Opcode::SremImm, - Opcode::Urem => Opcode::UremImm, - Opcode::Band => Opcode::BandImm, - Opcode::Bor => Opcode::BorImm, - Opcode::Bxor => Opcode::BxorImm, - Opcode::Rotl => Opcode::RotlImm, - Opcode::Rotr => Opcode::RotrImm, - Opcode::Ishl => Opcode::IshlImm, - Opcode::Ushr => Opcode::UshrImm, - Opcode::Sshr => Opcode::SshrImm, - Opcode::Isub => { - imm = imm.wrapping_neg(); - Opcode::IaddImm - } - _ => return, - }; - let ty = pos.func.dfg.ctrl_typevar(inst); - if ty.bytes() <= native_word_width { - pos.func - .dfg - .replace(inst) - .BinaryImm64(new_opcode, ty, imm, args[0]); - - // Repeat for BinaryImm simplification. - simplify(pos, inst, native_word_width); - } - } else if let Some(imm) = resolve_imm64_value(&pos.func.dfg, args[0]) { - let new_opcode = match opcode { - Opcode::Iadd => Opcode::IaddImm, - Opcode::Imul => Opcode::ImulImm, - Opcode::Band => Opcode::BandImm, - Opcode::Bor => Opcode::BorImm, - Opcode::Bxor => Opcode::BxorImm, - Opcode::Isub => Opcode::IrsubImm, - _ => return, - }; - let ty = pos.func.dfg.ctrl_typevar(inst); - if ty.bytes() <= native_word_width { - pos.func - .dfg - .replace(inst) - .BinaryImm64(new_opcode, ty, imm, args[1]); - } - } - } - - InstructionData::BinaryImm64 { opcode, arg, imm } => { - let ty = pos.func.dfg.ctrl_typevar(inst); - - let mut arg = arg; - let mut imm = imm; - match opcode { - Opcode::IaddImm - | Opcode::ImulImm - | Opcode::BorImm - | Opcode::BandImm - | Opcode::BxorImm => { - // Fold binary_op(C2, binary_op(C1, x)) into binary_op(binary_op(C1, C2), x) - if let ValueDef::Result(arg_inst, _) = pos.func.dfg.value_def(arg) { - if let InstructionData::BinaryImm64 { - opcode: prev_opcode, - arg: prev_arg, - imm: prev_imm, - } = &pos.func.dfg.insts[arg_inst] - { - if opcode == *prev_opcode - && ty == pos.func.dfg.ctrl_typevar(arg_inst) - { - let lhs: i64 = imm.into(); - let rhs: i64 = (*prev_imm).into(); - let new_imm = match opcode { - Opcode::BorImm => lhs | rhs, - Opcode::BandImm => lhs & rhs, - Opcode::BxorImm => lhs ^ rhs, - Opcode::IaddImm => lhs.wrapping_add(rhs), - Opcode::ImulImm => lhs.wrapping_mul(rhs), - _ => panic!("can't happen"), - }; - let new_imm = immediates::Imm64::from(new_imm); - let new_arg = *prev_arg; - pos.func - .dfg - .replace(inst) - .BinaryImm64(opcode, ty, new_imm, new_arg); - imm = new_imm; - arg = new_arg; - } - } - } - } - - Opcode::UshrImm | Opcode::SshrImm => { - if pos.func.dfg.ctrl_typevar(inst).bytes() <= native_word_width - && try_fold_extended_move(pos, inst, opcode, arg, imm) - { - return; - } - } - - _ => {} - }; - - // Replace operations that are no-ops. - match (opcode, imm.into(), ty) { - (Opcode::IaddImm, 0, _) - | (Opcode::ImulImm, 1, _) - | (Opcode::SdivImm, 1, _) - | (Opcode::UdivImm, 1, _) - | (Opcode::BorImm, 0, _) - | (Opcode::BandImm, -1, _) - | (Opcode::BxorImm, 0, _) - | (Opcode::RotlImm, 0, _) - | (Opcode::RotrImm, 0, _) - | (Opcode::IshlImm, 0, _) - | (Opcode::UshrImm, 0, _) - | (Opcode::SshrImm, 0, _) => { - // Alias the result value with the original argument. - replace_single_result_with_alias(&mut pos.func.dfg, inst, arg); - } - (Opcode::ImulImm, 0, ty) | (Opcode::BandImm, 0, ty) if ty != I128 => { - // Replace by zero. - pos.func.dfg.replace(inst).iconst(ty, 0); - } - (Opcode::BorImm, -1, ty) if ty != I128 => { - // Replace by minus one. - pos.func.dfg.replace(inst).iconst(ty, -1); - } - _ => {} - } - } - - InstructionData::IntCompare { opcode, cond, args } => { - debug_assert_eq!(opcode, Opcode::Icmp); - if let Some(imm) = resolve_imm64_value(&pos.func.dfg, args[1]) { - if pos.func.dfg.ctrl_typevar(inst).bytes() <= native_word_width { - pos.func.dfg.replace(inst).icmp_imm(cond, args[0], imm); - } - } - } - - _ => {} - } - } - - /// Fold comparisons into branch operations when possible. - /// - /// This matches against operations which compare against zero, then use the - /// result in a conditional branch. - fn branch_opt(pos: &mut FuncCursor, inst: Inst) { - let (cmp_arg, new_then, new_else) = if let InstructionData::Brif { - arg: first_arg, - blocks: [block_then, block_else], - .. - } = pos.func.dfg.insts[inst] - { - let icmp_inst = - if let ValueDef::Result(icmp_inst, _) = pos.func.dfg.value_def(first_arg) { - icmp_inst - } else { - return; - }; - - if let InstructionData::IntCompareImm { - opcode: Opcode::IcmpImm, - arg: cmp_arg, - cond: cmp_cond, - imm: cmp_imm, - } = pos.func.dfg.insts[icmp_inst] - { - let cmp_imm: i64 = cmp_imm.into(); - if cmp_imm != 0 { - return; - } - - let (new_then, new_else) = match cmp_cond { - IntCC::Equal => (block_else, block_then), - IntCC::NotEqual => (block_then, block_else), - _ => return, - }; - - (cmp_arg, new_then, new_else) - } else { - return; - } - } else { - return; - }; - - if let InstructionData::Brif { arg, blocks, .. } = &mut pos.func.dfg.insts[inst] { - *arg = cmp_arg; - blocks[0] = new_then; - blocks[1] = new_else; - } else { - unreachable!(); - } - } -} - -/// The main pre-opt pass. -pub fn do_preopt(func: &mut Function, isa: &dyn TargetIsa) { - let _tt = timing::preopt(); - - let mut pos = FuncCursor::new(func); - let native_word_width = isa.pointer_bytes() as u32; - let mut optimizer = simplify::peephole_optimizer(isa); - - while let Some(_) = pos.next_block() { - while let Some(inst) = pos.next_inst() { - simplify::apply_all(&mut optimizer, &mut pos, inst, native_word_width); - - // Try to transform divide-by-constant into simpler operations. - if let Some(divrem_info) = get_div_info(inst, &pos.func.dfg) { - do_divrem_transformation(&divrem_info, &mut pos, inst); - continue; - } - } - } -} diff --git a/cranelift/filetests/filetests/alias/simple-alias.clif b/cranelift/filetests/filetests/alias/simple-alias.clif index ba3722bdf7d5..2994373265a5 100644 --- a/cranelift/filetests/filetests/alias/simple-alias.clif +++ b/cranelift/filetests/filetests/alias/simple-alias.clif @@ -15,16 +15,15 @@ block0(v0: i64, v1: i32): v2 = global_value.i64 gv1 v3 = load.i32 v2+8 ;; This should reuse the load above. - v4 = global_value.i64 gv1 - v5 = load.i32 v4+8 + v5 = load.i32 v2+8 ; check: v5 -> v3 call fn0(v0) ;; The second load is redundant wrt the first, but the call above ;; is a barrier that prevents reusing v3 or v5. - v6 = load.i32 v4+8 - v7 = load.i32 v4+8 + v6 = load.i32 v2+8 + v7 = load.i32 v2+8 ; check: v7 -> v6 return v3, v5, v6, v7 @@ -44,8 +43,7 @@ block0(v0: i64, v1: i32): store.i32 v1, v2+8 ;; This load should pick up the store above. - v3 = global_value.i64 gv1 - v4 = load.i32 v3+8 + v4 = load.i32 v2+8 ; check: v4 -> v1 return v4 diff --git a/cranelift/filetests/filetests/egraph/algebraic.clif b/cranelift/filetests/filetests/egraph/algebraic.clif index 02e2456ed9a4..b31af79e9326 100644 --- a/cranelift/filetests/filetests/egraph/algebraic.clif +++ b/cranelift/filetests/filetests/egraph/algebraic.clif @@ -1,6 +1,5 @@ test optimize set opt_level=speed -set use_egraphs=true target x86_64 function %f0(i32) -> i32 { diff --git a/cranelift/filetests/filetests/egraph/alias_analysis.clif b/cranelift/filetests/filetests/egraph/alias_analysis.clif index 87bc5073638b..83fa31de618a 100644 --- a/cranelift/filetests/filetests/egraph/alias_analysis.clif +++ b/cranelift/filetests/filetests/egraph/alias_analysis.clif @@ -1,6 +1,5 @@ test optimize set opt_level=speed -set use_egraphs=true target x86_64 function %f(i64) -> i64 { diff --git a/cranelift/filetests/filetests/egraph/basic-gvn.clif b/cranelift/filetests/filetests/egraph/basic-gvn.clif index 3d74a31b1e52..a983df692a49 100644 --- a/cranelift/filetests/filetests/egraph/basic-gvn.clif +++ b/cranelift/filetests/filetests/egraph/basic-gvn.clif @@ -1,6 +1,5 @@ test optimize set opt_level=speed -set use_egraphs=true target x86_64 function %f(i32, i32) -> i32 { diff --git a/cranelift/filetests/filetests/egraph/bitselect.clif b/cranelift/filetests/filetests/egraph/bitselect.clif index 91797bb39777..51c3294583ea 100644 --- a/cranelift/filetests/filetests/egraph/bitselect.clif +++ b/cranelift/filetests/filetests/egraph/bitselect.clif @@ -1,6 +1,5 @@ test optimize set opt_level=speed -set use_egraphs=true target x86_64 target aarch64 target s390x diff --git a/cranelift/filetests/filetests/egraph/cprop-splat.clif b/cranelift/filetests/filetests/egraph/cprop-splat.clif index 549663480ed7..cae8ec1c5882 100644 --- a/cranelift/filetests/filetests/egraph/cprop-splat.clif +++ b/cranelift/filetests/filetests/egraph/cprop-splat.clif @@ -1,6 +1,5 @@ test optimize precise-output set opt_level=speed -set use_egraphs=true target x86_64 function %i8x16_1() -> i8x16 { diff --git a/cranelift/filetests/filetests/egraph/cprop.clif b/cranelift/filetests/filetests/egraph/cprop.clif index 736e6c5c2bec..8e1fe569ccbb 100644 --- a/cranelift/filetests/filetests/egraph/cprop.clif +++ b/cranelift/filetests/filetests/egraph/cprop.clif @@ -1,6 +1,5 @@ test optimize set opt_level=speed -set use_egraphs=true target x86_64 function %f0() -> i8 { diff --git a/cranelift/filetests/filetests/egraph/i128-opts.clif b/cranelift/filetests/filetests/egraph/i128-opts.clif index f30b80bd25c1..40ef77f76763 100644 --- a/cranelift/filetests/filetests/egraph/i128-opts.clif +++ b/cranelift/filetests/filetests/egraph/i128-opts.clif @@ -1,6 +1,5 @@ test optimize set opt_level=speed -set use_egraphs=true target x86_64 ; This it a regression test to ensure that we don't insert a iconst.i128 when optimizing bxor. diff --git a/cranelift/filetests/filetests/egraph/icmp-parameterized.clif b/cranelift/filetests/filetests/egraph/icmp-parameterized.clif index ec1679c2c2a1..315f42481009 100644 --- a/cranelift/filetests/filetests/egraph/icmp-parameterized.clif +++ b/cranelift/filetests/filetests/egraph/icmp-parameterized.clif @@ -1,6 +1,5 @@ test optimize precise-output set opt_level=speed -set use_egraphs=true target x86_64 ;; !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! diff --git a/cranelift/filetests/filetests/egraph/icmp.clif b/cranelift/filetests/filetests/egraph/icmp.clif index eda94bb31eec..af37fa443a50 100644 --- a/cranelift/filetests/filetests/egraph/icmp.clif +++ b/cranelift/filetests/filetests/egraph/icmp.clif @@ -1,6 +1,5 @@ test optimize precise-output set opt_level=speed -set use_egraphs=true target x86_64 ;; Masking the result of a comparison with 1 always results in the comparison diff --git a/cranelift/filetests/filetests/egraph/isplit.clif b/cranelift/filetests/filetests/egraph/isplit.clif index e40c32fef84a..8c964c15e617 100644 --- a/cranelift/filetests/filetests/egraph/isplit.clif +++ b/cranelift/filetests/filetests/egraph/isplit.clif @@ -1,7 +1,6 @@ test interpret test run set opt_level=speed -set use_egraphs=true set enable_llvm_abi_extensions=true target x86_64 target aarch64 diff --git a/cranelift/filetests/filetests/egraph/issue-5405.clif b/cranelift/filetests/filetests/egraph/issue-5405.clif index db6f582ec7bf..90071a18b59b 100644 --- a/cranelift/filetests/filetests/egraph/issue-5405.clif +++ b/cranelift/filetests/filetests/egraph/issue-5405.clif @@ -1,7 +1,6 @@ test interpret test run set opt_level=speed -set use_egraphs=true target aarch64 function %a(i64) -> i8 system_v { diff --git a/cranelift/filetests/filetests/egraph/issue-5417.clif b/cranelift/filetests/filetests/egraph/issue-5417.clif index 98cb16eac157..40f0e8256f84 100644 --- a/cranelift/filetests/filetests/egraph/issue-5417.clif +++ b/cranelift/filetests/filetests/egraph/issue-5417.clif @@ -1,6 +1,5 @@ test compile set opt_level=speed -set use_egraphs=true target x86_64 target aarch64 target s390x diff --git a/cranelift/filetests/filetests/egraph/issue-5437.clif b/cranelift/filetests/filetests/egraph/issue-5437.clif index d20d8d207279..46959ec379c8 100644 --- a/cranelift/filetests/filetests/egraph/issue-5437.clif +++ b/cranelift/filetests/filetests/egraph/issue-5437.clif @@ -1,6 +1,5 @@ test compile set opt_level=speed -set use_egraphs=true target x86_64 target aarch64 target s390x diff --git a/cranelift/filetests/filetests/egraph/licm.clif b/cranelift/filetests/filetests/egraph/licm.clif index 8d6a5ec329cb..f2f84c58302c 100644 --- a/cranelift/filetests/filetests/egraph/licm.clif +++ b/cranelift/filetests/filetests/egraph/licm.clif @@ -1,6 +1,5 @@ test optimize set opt_level=speed -set use_egraphs=true target x86_64 function %f(i32, i32) -> i32 { diff --git a/cranelift/filetests/filetests/egraph/make-icmp-parameterized-tests.sh b/cranelift/filetests/filetests/egraph/make-icmp-parameterized-tests.sh index 9913c528e20e..1b495080a27b 100755 --- a/cranelift/filetests/filetests/egraph/make-icmp-parameterized-tests.sh +++ b/cranelift/filetests/filetests/egraph/make-icmp-parameterized-tests.sh @@ -9,7 +9,6 @@ function main { cat << EOF > $out test optimize precise-output set opt_level=speed -set use_egraphs=true target x86_64 ;; !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! diff --git a/cranelift/filetests/filetests/egraph/misc.clif b/cranelift/filetests/filetests/egraph/misc.clif index 5eb42631c823..8ac3adc20933 100644 --- a/cranelift/filetests/filetests/egraph/misc.clif +++ b/cranelift/filetests/filetests/egraph/misc.clif @@ -1,6 +1,5 @@ test optimize set opt_level=speed -set use_egraphs=true target x86_64 function %stack_load(i64) -> i64 { diff --git a/cranelift/filetests/filetests/egraph/mul-pow-2.clif b/cranelift/filetests/filetests/egraph/mul-pow-2.clif index e81ae49364ea..f3cee9986c7d 100644 --- a/cranelift/filetests/filetests/egraph/mul-pow-2.clif +++ b/cranelift/filetests/filetests/egraph/mul-pow-2.clif @@ -1,6 +1,5 @@ test optimize set opt_level=speed -set use_egraphs=true target x86_64 function %f0(i32) -> i32 { diff --git a/cranelift/filetests/filetests/egraph/multivalue.clif b/cranelift/filetests/filetests/egraph/multivalue.clif index 65c34c477c29..664f5809178f 100644 --- a/cranelift/filetests/filetests/egraph/multivalue.clif +++ b/cranelift/filetests/filetests/egraph/multivalue.clif @@ -1,6 +1,5 @@ test compile precise-output set opt_level=speed -set use_egraphs=true set machine_code_cfg_info=true target x86_64 diff --git a/cranelift/filetests/filetests/egraph/not_a_load.clif b/cranelift/filetests/filetests/egraph/not_a_load.clif index 6f40dfecf690..7eac0e98e9fb 100644 --- a/cranelift/filetests/filetests/egraph/not_a_load.clif +++ b/cranelift/filetests/filetests/egraph/not_a_load.clif @@ -1,6 +1,5 @@ test compile precise-output set opt_level=speed -set use_egraphs=true target x86_64 ;; `atomic_rmw` is not a load, but it reports `true` to `.can_load()`. We want diff --git a/cranelift/filetests/filetests/egraph/remat.clif b/cranelift/filetests/filetests/egraph/remat.clif index 5d43c71febe2..861e4a8cdd9e 100644 --- a/cranelift/filetests/filetests/egraph/remat.clif +++ b/cranelift/filetests/filetests/egraph/remat.clif @@ -1,6 +1,5 @@ test optimize set opt_level=speed -set use_egraphs=true target x86_64 function %f(i32) -> i32 { diff --git a/cranelift/filetests/filetests/egraph/select.clif b/cranelift/filetests/filetests/egraph/select.clif index 12096ce8f180..e8a225b4de73 100644 --- a/cranelift/filetests/filetests/egraph/select.clif +++ b/cranelift/filetests/filetests/egraph/select.clif @@ -1,6 +1,5 @@ test optimize set opt_level=speed -set use_egraphs=true target x86_64 target aarch64 target s390x diff --git a/cranelift/filetests/filetests/isa/aarch64/arithmetic.clif b/cranelift/filetests/filetests/isa/aarch64/arithmetic.clif index 1f10db51feed..e1a25c369b43 100644 --- a/cranelift/filetests/filetests/isa/aarch64/arithmetic.clif +++ b/cranelift/filetests/filetests/isa/aarch64/arithmetic.clif @@ -542,14 +542,14 @@ block0(v0: i64): ; VCode: ; block0: -; movz x2, #1 -; sub x0, xzr, x2 +; movz x3, #1 +; sub x0, xzr, x3 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov x2, #1 -; neg x0, x2 +; mov x3, #1 +; neg x0, x3 ; ret function %f30(i8x16) -> i8x16 { diff --git a/cranelift/filetests/filetests/isa/aarch64/bitops.clif b/cranelift/filetests/filetests/isa/aarch64/bitops.clif index 8dd69c514e88..f6b70b05e774 100644 --- a/cranelift/filetests/filetests/isa/aarch64/bitops.clif +++ b/cranelift/filetests/filetests/isa/aarch64/bitops.clif @@ -515,14 +515,14 @@ block0: ; VCode: ; block0: -; movz w0, #255 -; sxtb w0, w0 +; movz w1, #255 +; sxtb w0, w1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov w0, #0xff -; sxtb w0, w0 +; mov w1, #0xff +; sxtb w0, w1 ; ret function %sextend_i8() -> i32 { @@ -534,14 +534,14 @@ block0: ; VCode: ; block0: -; movz w0, #255 -; sxtb w0, w0 +; movz w1, #255 +; sxtb w0, w1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov w0, #0xff -; sxtb w0, w0 +; mov w1, #0xff +; sxtb w0, w1 ; ret function %bnot_i32(i32) -> i32 { diff --git a/cranelift/filetests/filetests/isa/aarch64/call.clif b/cranelift/filetests/filetests/isa/aarch64/call.clif index 8566175afc23..b72957697a1c 100644 --- a/cranelift/filetests/filetests/isa/aarch64/call.clif +++ b/cranelift/filetests/filetests/isa/aarch64/call.clif @@ -132,19 +132,18 @@ block0(v0: i8): ; stp fp, lr, [sp, #-16]! ; mov fp, sp ; block0: -; mov x8, x0 +; movz w7, #42 ; sub sp, sp, #16 ; virtual_sp_offset_adjust 16 -; movz w0, #42 -; movz w1, #42 -; movz w2, #42 -; movz w3, #42 -; movz w4, #42 -; movz w5, #42 -; movz w6, #42 -; movz w7, #42 -; strb w8, [sp] +; strb w0, [sp] ; load_ext_name x8, TestCase(%g)+0 +; mov x0, x7 +; mov x1, x7 +; mov x2, x7 +; mov x3, x7 +; mov x4, x7 +; mov x5, x7 +; mov x6, x7 ; blr x8 ; add sp, sp, #16 ; virtual_sp_offset_adjust -16 @@ -156,21 +155,20 @@ block0(v0: i8): ; stp x29, x30, [sp, #-0x10]! ; mov x29, sp ; block1: ; offset 0x8 -; mov x8, x0 -; sub sp, sp, #0x10 -; mov w0, #0x2a -; mov w1, #0x2a -; mov w2, #0x2a -; mov w3, #0x2a -; mov w4, #0x2a -; mov w5, #0x2a -; mov w6, #0x2a ; mov w7, #0x2a -; sturb w8, [sp] -; ldr x8, #0x3c -; b #0x44 +; sub sp, sp, #0x10 +; sturb w0, [sp] +; ldr x8, #0x1c +; b #0x24 ; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g 0 ; .byte 0x00, 0x00, 0x00, 0x00 +; mov x0, x7 +; mov x1, x7 +; mov x2, x7 +; mov x3, x7 +; mov x4, x7 +; mov x5, x7 +; mov x6, x7 ; blr x8 ; add sp, sp, #0x10 ; ldp x29, x30, [sp], #0x10 @@ -184,32 +182,28 @@ block0(v0: i8): ; VCode: ; block0: -; mov x9, x0 -; mov x8, x1 -; movz w0, #42 -; movz w1, #42 -; movz w2, #42 -; movz w3, #42 -; movz w4, #42 -; movz w5, #42 -; movz w6, #42 ; movz w7, #42 -; strb w9, [x8] +; strb w0, [x1] +; mov x0, x7 +; mov x1, x7 +; mov x2, x7 +; mov x3, x7 +; mov x4, x7 +; mov x5, x7 +; mov x6, x7 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov x9, x0 -; mov x8, x1 -; mov w0, #0x2a -; mov w1, #0x2a -; mov w2, #0x2a -; mov w3, #0x2a -; mov w4, #0x2a -; mov w5, #0x2a -; mov w6, #0x2a ; mov w7, #0x2a -; sturb w9, [x8] +; sturb w0, [x1] +; mov x0, x7 +; mov x1, x7 +; mov x2, x7 +; mov x3, x7 +; mov x4, x7 +; mov x5, x7 +; mov x6, x7 ; ret function %f8() { @@ -537,10 +531,10 @@ block0(v0: i64): ; mov fp, sp ; block0: ; mov x1, x0 -; movz x0, #42 ; movz x2, #42 -; load_ext_name x6, TestCase(%f11)+0 -; blr x6 +; load_ext_name x4, TestCase(%f11)+0 +; mov x0, x2 +; blr x4 ; ldp fp, lr, [sp], #16 ; ret ; @@ -550,13 +544,13 @@ block0(v0: i64): ; mov x29, sp ; block1: ; offset 0x8 ; mov x1, x0 -; mov x0, #0x2a ; mov x2, #0x2a -; ldr x6, #0x1c -; b #0x24 +; ldr x4, #0x18 +; b #0x20 ; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f11 0 ; .byte 0x00, 0x00, 0x00, 0x00 -; blr x6 +; mov x0, x2 +; blr x4 ; ldp x29, x30, [sp], #0x10 ; ret @@ -592,9 +586,9 @@ block0(v0: i64): ; block0: ; mov x2, x0 ; movz x3, #42 -; movz x0, #42 -; load_ext_name x6, TestCase(%f12)+0 -; blr x6 +; load_ext_name x4, TestCase(%f12)+0 +; mov x0, x3 +; blr x4 ; ldp fp, lr, [sp], #16 ; ret ; @@ -605,12 +599,12 @@ block0(v0: i64): ; block1: ; offset 0x8 ; mov x2, x0 ; mov x3, #0x2a -; mov x0, #0x2a -; ldr x6, #0x1c -; b #0x24 +; ldr x4, #0x18 +; b #0x20 ; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f12 0 ; .byte 0x00, 0x00, 0x00, 0x00 -; blr x6 +; mov x0, x3 +; blr x4 ; ldp x29, x30, [sp], #0x10 ; ret @@ -646,9 +640,9 @@ block0(v0: i64): ; block0: ; mov x1, x0 ; movz x2, #42 -; movz x0, #42 -; load_ext_name x6, TestCase(%f13)+0 -; blr x6 +; load_ext_name x4, TestCase(%f13)+0 +; mov x0, x2 +; blr x4 ; ldp fp, lr, [sp], #16 ; ret ; @@ -659,12 +653,12 @@ block0(v0: i64): ; block1: ; offset 0x8 ; mov x1, x0 ; mov x2, #0x2a -; mov x0, #0x2a -; ldr x6, #0x1c -; b #0x24 +; ldr x4, #0x18 +; b #0x20 ; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f13 0 ; .byte 0x00, 0x00, 0x00, 0x00 -; blr x6 +; mov x0, x2 +; blr x4 ; ldp x29, x30, [sp], #0x10 ; ret @@ -835,16 +829,16 @@ block0: ; block0: ; mov x6, x0 ; movz w0, #0 -; movz w4, #1 -; str w4, [x6] +; movz w3, #1 +; str w3, [x6] ; ret ; ; Disassembled: ; block0: ; offset 0x0 ; mov x6, x0 ; mov w0, #0 -; mov w4, #1 -; stur w4, [x6] +; mov w3, #1 +; stur w3, [x6] ; ret function %f17(i64 sret) { diff --git a/cranelift/filetests/filetests/isa/aarch64/condops.clif b/cranelift/filetests/filetests/isa/aarch64/condops.clif index d7e92269f825..ebee10ce61da 100644 --- a/cranelift/filetests/filetests/isa/aarch64/condops.clif +++ b/cranelift/filetests/filetests/isa/aarch64/condops.clif @@ -441,18 +441,18 @@ block0(v0: i128, v1: i8, v2: i8): ; VCode: ; block0: -; movz x6, #42 +; movz x7, #42 ; movz x8, #0 -; subs xzr, x0, x6 +; subs xzr, x0, x7 ; ccmp x1, x8, #nzcv, eq ; csel x0, x2, x3, eq ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov x6, #0x2a +; mov x7, #0x2a ; mov x8, #0 -; cmp x0, x6 +; cmp x0, x7 ; ccmp x1, x8, #0, eq ; csel x0, x2, x3, eq ; ret @@ -468,18 +468,18 @@ block0(v0: i128, v1: i16, v2: i16): ; VCode: ; block0: -; movz x6, #42 +; movz x7, #42 ; movz x8, #0 -; subs xzr, x0, x6 +; subs xzr, x0, x7 ; ccmp x1, x8, #nzcv, eq ; csel x0, x2, x3, eq ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov x6, #0x2a +; mov x7, #0x2a ; mov x8, #0 -; cmp x0, x6 +; cmp x0, x7 ; ccmp x1, x8, #0, eq ; csel x0, x2, x3, eq ; ret @@ -495,18 +495,18 @@ block0(v0: i128, v1: i32, v2: i32): ; VCode: ; block0: -; movz x6, #42 +; movz x7, #42 ; movz x8, #0 -; subs xzr, x0, x6 +; subs xzr, x0, x7 ; ccmp x1, x8, #nzcv, eq ; csel x0, x2, x3, eq ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov x6, #0x2a +; mov x7, #0x2a ; mov x8, #0 -; cmp x0, x6 +; cmp x0, x7 ; ccmp x1, x8, #0, eq ; csel x0, x2, x3, eq ; ret @@ -522,18 +522,18 @@ block0(v0: i128, v1: i64, v2: i64): ; VCode: ; block0: -; movz x6, #42 +; movz x7, #42 ; movz x8, #0 -; subs xzr, x0, x6 +; subs xzr, x0, x7 ; ccmp x1, x8, #nzcv, eq ; csel x0, x2, x3, eq ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov x6, #0x2a +; mov x7, #0x2a ; mov x8, #0 -; cmp x0, x6 +; cmp x0, x7 ; ccmp x1, x8, #0, eq ; csel x0, x2, x3, eq ; ret @@ -549,9 +549,9 @@ block0(v0: i128, v1: i128, v2: i128): ; VCode: ; block0: -; movz x9, #42 +; movz x10, #42 ; movz x11, #0 -; subs xzr, x0, x9 +; subs xzr, x0, x10 ; ccmp x1, x11, #nzcv, eq ; csel x0, x2, x4, eq ; csel x1, x3, x5, eq @@ -559,9 +559,9 @@ block0(v0: i128, v1: i128, v2: i128): ; ; Disassembled: ; block0: ; offset 0x0 -; mov x9, #0x2a +; mov x10, #0x2a ; mov x11, #0 -; cmp x0, x9 +; cmp x0, x10 ; ccmp x1, x11, #0, eq ; csel x0, x2, x4, eq ; csel x1, x3, x5, eq @@ -1046,9 +1046,9 @@ block0(v0: i128, v1: i8, v2: i8): ; VCode: ; block0: -; movz x6, #42 +; movz x7, #42 ; movz x8, #0 -; subs xzr, x0, x6 +; subs xzr, x0, x7 ; ccmp x1, x8, #nzcv, eq ; csel x0, x2, x3, eq ; csdb @@ -1056,9 +1056,9 @@ block0(v0: i128, v1: i8, v2: i8): ; ; Disassembled: ; block0: ; offset 0x0 -; mov x6, #0x2a +; mov x7, #0x2a ; mov x8, #0 -; cmp x0, x6 +; cmp x0, x7 ; ccmp x1, x8, #0, eq ; csel x0, x2, x3, eq ; csdb @@ -1075,9 +1075,9 @@ block0(v0: i128, v1: i16, v2: i16): ; VCode: ; block0: -; movz x6, #42 +; movz x7, #42 ; movz x8, #0 -; subs xzr, x0, x6 +; subs xzr, x0, x7 ; ccmp x1, x8, #nzcv, eq ; csel x0, x2, x3, eq ; csdb @@ -1085,9 +1085,9 @@ block0(v0: i128, v1: i16, v2: i16): ; ; Disassembled: ; block0: ; offset 0x0 -; mov x6, #0x2a +; mov x7, #0x2a ; mov x8, #0 -; cmp x0, x6 +; cmp x0, x7 ; ccmp x1, x8, #0, eq ; csel x0, x2, x3, eq ; csdb @@ -1104,9 +1104,9 @@ block0(v0: i128, v1: i32, v2: i32): ; VCode: ; block0: -; movz x6, #42 +; movz x7, #42 ; movz x8, #0 -; subs xzr, x0, x6 +; subs xzr, x0, x7 ; ccmp x1, x8, #nzcv, eq ; csel x0, x2, x3, eq ; csdb @@ -1114,9 +1114,9 @@ block0(v0: i128, v1: i32, v2: i32): ; ; Disassembled: ; block0: ; offset 0x0 -; mov x6, #0x2a +; mov x7, #0x2a ; mov x8, #0 -; cmp x0, x6 +; cmp x0, x7 ; ccmp x1, x8, #0, eq ; csel x0, x2, x3, eq ; csdb @@ -1133,9 +1133,9 @@ block0(v0: i128, v1: i64, v2: i64): ; VCode: ; block0: -; movz x6, #42 +; movz x7, #42 ; movz x8, #0 -; subs xzr, x0, x6 +; subs xzr, x0, x7 ; ccmp x1, x8, #nzcv, eq ; csel x0, x2, x3, eq ; csdb @@ -1143,9 +1143,9 @@ block0(v0: i128, v1: i64, v2: i64): ; ; Disassembled: ; block0: ; offset 0x0 -; mov x6, #0x2a +; mov x7, #0x2a ; mov x8, #0 -; cmp x0, x6 +; cmp x0, x7 ; ccmp x1, x8, #0, eq ; csel x0, x2, x3, eq ; csdb @@ -1162,9 +1162,9 @@ block0(v0: i128, v1: i128, v2: i128): ; VCode: ; block0: -; movz x9, #42 +; movz x10, #42 ; movz x11, #0 -; subs xzr, x0, x9 +; subs xzr, x0, x10 ; ccmp x1, x11, #nzcv, eq ; csel x0, x2, x4, eq ; csel x1, x3, x5, eq @@ -1173,9 +1173,9 @@ block0(v0: i128, v1: i128, v2: i128): ; ; Disassembled: ; block0: ; offset 0x0 -; mov x9, #0x2a +; mov x10, #0x2a ; mov x11, #0 -; cmp x0, x9 +; cmp x0, x10 ; ccmp x1, x11, #0, eq ; csel x0, x2, x4, eq ; csel x1, x3, x5, eq diff --git a/cranelift/filetests/filetests/isa/aarch64/dynamic-slot.clif b/cranelift/filetests/filetests/isa/aarch64/dynamic-slot.clif index 0d6f3dc524e9..fbefd5651dc2 100644 --- a/cranelift/filetests/filetests/isa/aarch64/dynamic-slot.clif +++ b/cranelift/filetests/filetests/isa/aarch64/dynamic-slot.clif @@ -16,9 +16,9 @@ block0: ; mov fp, sp ; sub sp, sp, #16 ; block0: -; mov x1, sp -; movz x2, #1 -; str x2, [x1] +; movz x1, #1 +; mov x2, sp +; str x1, [x2] ; add sp, sp, #16 ; ldp fp, lr, [sp], #16 ; ret @@ -29,9 +29,9 @@ block0: ; mov x29, sp ; sub sp, sp, #0x10 ; block1: ; offset 0xc -; mov x1, sp -; mov x2, #1 -; str x2, [x1] +; mov x1, #1 +; mov x2, sp +; str x1, [x2] ; add sp, sp, #0x10 ; ldp x29, x30, [sp], #0x10 ; ret @@ -51,9 +51,9 @@ block0: ; mov fp, sp ; sub sp, sp, #16 ; block0: -; mov x1, sp -; movz x2, #1 -; str x2, [x1] +; movz x1, #1 +; mov x2, sp +; str x1, [x2] ; add sp, sp, #16 ; ldp fp, lr, [sp], #16 ; ret @@ -64,9 +64,9 @@ block0: ; mov x29, sp ; sub sp, sp, #0x10 ; block1: ; offset 0xc -; mov x1, sp -; mov x2, #1 -; str x2, [x1] +; mov x1, #1 +; mov x2, sp +; str x1, [x2] ; add sp, sp, #0x10 ; ldp x29, x30, [sp], #0x10 ; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/iconst-icmp-small.clif b/cranelift/filetests/filetests/isa/aarch64/iconst-icmp-small.clif index 0afd8474ea64..c007a235ac62 100644 --- a/cranelift/filetests/filetests/isa/aarch64/iconst-icmp-small.clif +++ b/cranelift/filetests/filetests/isa/aarch64/iconst-icmp-small.clif @@ -15,19 +15,17 @@ block0: ; VCode: ; block0: -; movz w0, #56780 -; uxth w2, w0 -; movz w4, #56780 -; subs wzr, w2, w4, UXTH +; movz w2, #56780 +; uxth w1, w2 +; subs wzr, w1, w2, UXTH ; cset x0, ne ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov w0, #0xddcc -; uxth w2, w0 -; mov w4, #0xddcc -; cmp w2, w4, uxth +; mov w2, #0xddcc +; uxth w1, w2 +; cmp w1, w2, uxth ; cset x0, ne ; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/simd_load_zero.clif b/cranelift/filetests/filetests/isa/aarch64/simd_load_zero.clif index 6da64c99a340..9de222a9c489 100644 --- a/cranelift/filetests/filetests/isa/aarch64/simd_load_zero.clif +++ b/cranelift/filetests/filetests/isa/aarch64/simd_load_zero.clif @@ -11,16 +11,16 @@ block0: ; VCode: ; block0: -; movz x1, #1 -; movk x1, x1, #1, LSL #48 -; fmov d0, x1 +; movz x2, #1 +; movk x2, x2, #1, LSL #48 +; fmov d0, x2 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov x1, #1 -; movk x1, #1, lsl #48 -; fmov d0, x1 +; mov x2, #1 +; movk x2, #1, lsl #48 +; fmov d0, x2 ; ret function %f2() -> i32x4 { @@ -32,14 +32,14 @@ block0: ; VCode: ; block0: -; movz w0, #42679 -; fmov s0, w0 +; movz w1, #42679 +; fmov s0, w1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov w0, #0xa6b7 -; fmov s0, w0 +; mov w1, #0xa6b7 +; fmov s0, w1 ; ret function %f3() -> f32x4 { @@ -51,14 +51,14 @@ block0: ; VCode: ; block0: -; fmov s0, #1 -; fmov s0, s0 +; fmov s1, #1 +; fmov s0, s1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; fmov s0, #1.00000000 -; fmov s0, s0 +; fmov s1, #1.00000000 +; fmov s0, s1 ; ret function %f4() -> f64x2 { @@ -70,13 +70,13 @@ block0: ; VCode: ; block0: -; fmov d0, #1 -; fmov d0, d0 +; fmov d1, #1 +; fmov d0, d1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; fmov d0, #1.00000000 -; fmov d0, d0 +; fmov d1, #1.00000000 +; fmov d0, d1 ; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/stack.clif b/cranelift/filetests/filetests/isa/aarch64/stack.clif index 5753b0ef928b..2e16a7c0e472 100644 --- a/cranelift/filetests/filetests/isa/aarch64/stack.clif +++ b/cranelift/filetests/filetests/isa/aarch64/stack.clif @@ -370,147 +370,167 @@ block0(v0: i8): ; stp x23, x24, [sp, #-16]! ; stp x21, x22, [sp, #-16]! ; stp x19, x20, [sp, #-16]! -; sub sp, sp, #1152 +; sub sp, sp, #1216 ; block0: ; str x0, [sp, #1000] -; movz x6, #2 -; add x9, x6, #1 -; str x9, [sp, #1136] -; movz x6, #4 -; add x10, x6, #3 -; str x10, [sp, #1128] -; movz x6, #6 -; add x11, x6, #5 -; str x11, [sp, #1120] -; movz x6, #8 -; add x12, x6, #7 -; str x12, [sp, #1112] -; movz x6, #10 -; add x13, x6, #9 -; str x13, [sp, #1104] -; movz x6, #12 -; add x14, x6, #11 -; str x14, [sp, #1096] -; movz x6, #14 -; add x15, x6, #13 -; str x15, [sp, #1088] -; movz x6, #16 -; add x1, x6, #15 -; str x1, [sp, #1080] -; movz x6, #18 -; add x2, x6, #17 -; str x2, [sp, #1072] -; movz x6, #20 -; add x3, x6, #19 -; str x3, [sp, #1064] -; movz x6, #22 -; add x4, x6, #21 -; str x4, [sp, #1056] -; movz x6, #24 -; add x5, x6, #23 -; str x5, [sp, #1048] -; movz x6, #26 -; add x6, x6, #25 -; str x6, [sp, #1040] -; movz x6, #28 -; add x7, x6, #27 -; str x7, [sp, #1032] -; movz x6, #30 -; add x24, x6, #29 -; str x24, [sp, #1024] -; movz x6, #32 -; add x25, x6, #31 -; str x25, [sp, #1016] -; movz x6, #34 -; add x26, x6, #33 -; movz x6, #36 -; add x27, x6, #35 -; str x27, [sp, #1008] -; movz x6, #38 -; add x27, x6, #37 -; movz x6, #30 -; add x28, x6, #39 -; movz x6, #32 -; add x21, x6, #31 -; movz x6, #34 -; add x19, x6, #33 -; movz x6, #36 -; add x20, x6, #35 -; movz x6, #38 -; add x22, x6, #37 -; movz x6, #30 -; add x23, x6, #39 -; movz x6, #32 -; add x0, x6, #31 -; movz x6, #34 -; add x8, x6, #33 -; movz x6, #36 -; add x9, x6, #35 -; movz x6, #38 -; add x10, x6, #37 +; movz x8, #2 +; str x8, [sp, #1008] +; movz x8, #4 +; movz x9, #6 +; movz x10, #8 +; movz x11, #10 +; movz x12, #12 +; movz x13, #14 +; movz x14, #16 +; movz x15, #18 +; movz x1, #20 +; movz x2, #22 +; movz x3, #24 +; movz x4, #26 +; movz x5, #28 ; movz x6, #30 -; add x11, x6, #39 -; movz x6, #32 -; add x12, x6, #31 -; movz x6, #34 -; add x13, x6, #33 -; movz x6, #36 -; add x14, x6, #35 -; movz x6, #38 -; add x15, x6, #37 +; movz x23, #32 +; movz x24, #34 +; movz x25, #36 +; movz x26, #38 +; movz x27, #30 +; movz x28, #32 +; movz x21, #34 +; movz x19, #36 +; movz x20, #38 +; movz x22, #30 +; movz x0, #32 +; movz x7, #34 +; str x7, [sp, #1208] +; movz x7, #36 +; str x7, [sp, #1200] +; movz x7, #38 +; str x7, [sp, #1192] +; movz x7, #30 +; str x7, [sp, #1184] +; movz x7, #32 +; str x7, [sp, #1176] +; movz x7, #34 +; str x7, [sp, #1168] +; movz x7, #36 +; str x7, [sp, #1160] +; movz x7, #38 +; str x7, [sp, #1152] +; ldr x7, [sp, #1008] +; add x7, x7, #1 +; str x7, [sp, #1144] +; add x7, x8, #3 +; str x7, [sp, #1136] +; add x7, x9, #5 +; str x7, [sp, #1128] +; add x7, x10, #7 +; str x7, [sp, #1120] +; add x7, x11, #9 +; str x7, [sp, #1112] +; add x7, x12, #11 +; str x7, [sp, #1104] +; add x7, x13, #13 +; str x7, [sp, #1096] +; add x7, x14, #15 +; str x7, [sp, #1088] +; add x7, x15, #17 +; str x7, [sp, #1080] +; add x7, x1, #19 +; str x7, [sp, #1072] +; add x7, x2, #21 +; str x7, [sp, #1064] +; add x7, x3, #23 +; str x7, [sp, #1056] +; add x7, x4, #25 +; str x7, [sp, #1048] +; add x7, x5, #27 +; str x7, [sp, #1040] +; add x7, x6, #29 +; str x7, [sp, #1032] +; add x7, x23, #31 +; str x7, [sp, #1024] +; add x7, x24, #33 +; str x7, [sp, #1016] +; add x7, x25, #35 +; str x7, [sp, #1008] +; add x26, x26, #37 +; add x27, x27, #39 +; add x28, x28, #31 +; add x21, x21, #33 +; add x19, x19, #35 +; add x20, x20, #37 +; add x22, x22, #39 +; add x0, x0, #31 +; ldr x7, [sp, #1208] +; add x7, x7, #33 +; ldr x9, [sp, #1200] +; add x8, x9, #35 +; ldr x12, [sp, #1192] +; add x9, x12, #37 +; ldr x15, [sp, #1184] +; add x10, x15, #39 +; ldr x2, [sp, #1176] +; add x11, x2, #31 +; ldr x5, [sp, #1168] +; add x12, x5, #33 +; ldr x13, [sp, #1160] +; add x13, x13, #35 +; ldr x14, [sp, #1152] +; add x14, x14, #37 +; ldr x15, [sp, #1144] +; add x15, x15, #39 +; ldr x3, [sp, #1128] ; ldr x1, [sp, #1136] -; add x1, x1, #39 -; ldr x3, [sp, #1120] -; ldr x2, [sp, #1128] -; add x2, x2, x3 -; ldr x3, [sp, #1104] -; ldr x6, [sp, #1112] -; add x3, x6, x3 -; ldr x4, [sp, #1088] -; ldr x5, [sp, #1096] +; add x1, x1, x3 +; ldr x2, [sp, #1112] +; ldr x6, [sp, #1120] +; add x2, x6, x2 +; ldr x3, [sp, #1096] +; ldr x4, [sp, #1104] +; add x3, x4, x3 +; ldr x4, [sp, #1080] +; ldr x5, [sp, #1088] ; add x4, x5, x4 -; ldr x5, [sp, #1072] -; ldr x6, [sp, #1080] +; ldr x5, [sp, #1064] +; ldr x6, [sp, #1072] ; add x5, x6, x5 -; ldr x7, [sp, #1056] -; ldr x6, [sp, #1064] -; add x6, x6, x7 -; ldr x7, [sp, #1040] -; ldr x24, [sp, #1048] -; add x7, x24, x7 -; ldr x24, [sp, #1024] -; ldr x25, [sp, #1032] -; add x24, x25, x24 +; ldr x6, [sp, #1048] +; ldr x23, [sp, #1056] +; add x6, x23, x6 +; ldr x23, [sp, #1032] +; ldr x24, [sp, #1040] +; add x23, x24, x23 ; ldr x25, [sp, #1016] +; ldr x24, [sp, #1024] +; add x24, x24, x25 +; ldr x25, [sp, #1008] ; add x25, x25, x26 -; ldr x26, [sp, #1008] -; add x26, x26, x27 -; add x27, x28, x21 -; add x28, x19, x20 -; add x23, x22, x23 -; add x8, x0, x8 -; add x9, x9, x10 -; add x10, x11, x12 -; add x11, x13, x14 -; add x12, x15, x1 -; add x13, x2, x3 -; add x14, x4, x5 -; add x7, x6, x7 -; add x15, x24, x25 -; add x0, x26, x27 -; add x1, x28, x23 +; add x26, x27, x28 +; add x27, x21, x19 +; add x28, x20, x22 +; add x7, x0, x7 ; add x8, x8, x9 ; add x9, x10, x11 ; add x10, x12, x13 -; add x7, x14, x7 +; add x11, x14, x15 +; add x12, x1, x2 +; add x13, x3, x4 +; add x14, x5, x6 +; add x15, x23, x24 +; add x0, x25, x26 +; add x1, x27, x28 +; add x7, x7, x8 +; add x8, x9, x10 +; add x9, x11, x12 +; add x10, x13, x14 ; add x11, x15, x0 -; add x8, x1, x8 -; add x9, x9, x10 -; add x7, x7, x11 +; add x7, x1, x7 ; add x8, x8, x9 -; add x1, x7, x8 +; add x9, x10, x11 +; add x7, x7, x8 +; add x1, x9, x7 ; ldr x0, [sp, #1000] -; add sp, sp, #1152 +; add sp, sp, #1216 ; ldp x19, x20, [sp], #16 ; ldp x21, x22, [sp], #16 ; ldp x23, x24, [sp], #16 @@ -528,147 +548,167 @@ block0(v0: i8): ; stp x23, x24, [sp, #-0x10]! ; stp x21, x22, [sp, #-0x10]! ; stp x19, x20, [sp, #-0x10]! -; sub sp, sp, #0x480 +; sub sp, sp, #0x4c0 ; block1: ; offset 0x20 ; str x0, [sp, #0x3e8] -; mov x6, #2 -; add x9, x6, #1 -; str x9, [sp, #0x470] -; mov x6, #4 -; add x10, x6, #3 -; str x10, [sp, #0x468] -; mov x6, #6 -; add x11, x6, #5 -; str x11, [sp, #0x460] -; mov x6, #8 -; add x12, x6, #7 -; str x12, [sp, #0x458] -; mov x6, #0xa -; add x13, x6, #9 -; str x13, [sp, #0x450] -; mov x6, #0xc -; add x14, x6, #0xb -; str x14, [sp, #0x448] -; mov x6, #0xe -; add x15, x6, #0xd -; str x15, [sp, #0x440] -; mov x6, #0x10 -; add x1, x6, #0xf -; str x1, [sp, #0x438] -; mov x6, #0x12 -; add x2, x6, #0x11 -; str x2, [sp, #0x430] -; mov x6, #0x14 -; add x3, x6, #0x13 -; str x3, [sp, #0x428] -; mov x6, #0x16 -; add x4, x6, #0x15 -; str x4, [sp, #0x420] -; mov x6, #0x18 -; add x5, x6, #0x17 -; str x5, [sp, #0x418] -; mov x6, #0x1a -; add x6, x6, #0x19 -; str x6, [sp, #0x410] -; mov x6, #0x1c -; add x7, x6, #0x1b -; str x7, [sp, #0x408] -; mov x6, #0x1e -; add x24, x6, #0x1d -; str x24, [sp, #0x400] -; mov x6, #0x20 -; add x25, x6, #0x1f -; str x25, [sp, #0x3f8] -; mov x6, #0x22 -; add x26, x6, #0x21 -; mov x6, #0x24 -; add x27, x6, #0x23 -; str x27, [sp, #0x3f0] -; mov x6, #0x26 -; add x27, x6, #0x25 -; mov x6, #0x1e -; add x28, x6, #0x27 -; mov x6, #0x20 -; add x21, x6, #0x1f -; mov x6, #0x22 -; add x19, x6, #0x21 -; mov x6, #0x24 -; add x20, x6, #0x23 -; mov x6, #0x26 -; add x22, x6, #0x25 -; mov x6, #0x1e -; add x23, x6, #0x27 -; mov x6, #0x20 -; add x0, x6, #0x1f -; mov x6, #0x22 -; add x8, x6, #0x21 -; mov x6, #0x24 -; add x9, x6, #0x23 -; mov x6, #0x26 -; add x10, x6, #0x25 +; mov x8, #2 +; str x8, [sp, #0x3f0] +; mov x8, #4 +; mov x9, #6 +; mov x10, #8 +; mov x11, #0xa +; mov x12, #0xc +; mov x13, #0xe +; mov x14, #0x10 +; mov x15, #0x12 +; mov x1, #0x14 +; mov x2, #0x16 +; mov x3, #0x18 +; mov x4, #0x1a +; mov x5, #0x1c ; mov x6, #0x1e -; add x11, x6, #0x27 -; mov x6, #0x20 -; add x12, x6, #0x1f -; mov x6, #0x22 -; add x13, x6, #0x21 -; mov x6, #0x24 -; add x14, x6, #0x23 -; mov x6, #0x26 -; add x15, x6, #0x25 +; mov x23, #0x20 +; mov x24, #0x22 +; mov x25, #0x24 +; mov x26, #0x26 +; mov x27, #0x1e +; mov x28, #0x20 +; mov x21, #0x22 +; mov x19, #0x24 +; mov x20, #0x26 +; mov x22, #0x1e +; mov x0, #0x20 +; mov x7, #0x22 +; str x7, [sp, #0x4b8] +; mov x7, #0x24 +; str x7, [sp, #0x4b0] +; mov x7, #0x26 +; str x7, [sp, #0x4a8] +; mov x7, #0x1e +; str x7, [sp, #0x4a0] +; mov x7, #0x20 +; str x7, [sp, #0x498] +; mov x7, #0x22 +; str x7, [sp, #0x490] +; mov x7, #0x24 +; str x7, [sp, #0x488] +; mov x7, #0x26 +; str x7, [sp, #0x480] +; ldr x7, [sp, #0x3f0] +; add x7, x7, #1 +; str x7, [sp, #0x478] +; add x7, x8, #3 +; str x7, [sp, #0x470] +; add x7, x9, #5 +; str x7, [sp, #0x468] +; add x7, x10, #7 +; str x7, [sp, #0x460] +; add x7, x11, #9 +; str x7, [sp, #0x458] +; add x7, x12, #0xb +; str x7, [sp, #0x450] +; add x7, x13, #0xd +; str x7, [sp, #0x448] +; add x7, x14, #0xf +; str x7, [sp, #0x440] +; add x7, x15, #0x11 +; str x7, [sp, #0x438] +; add x7, x1, #0x13 +; str x7, [sp, #0x430] +; add x7, x2, #0x15 +; str x7, [sp, #0x428] +; add x7, x3, #0x17 +; str x7, [sp, #0x420] +; add x7, x4, #0x19 +; str x7, [sp, #0x418] +; add x7, x5, #0x1b +; str x7, [sp, #0x410] +; add x7, x6, #0x1d +; str x7, [sp, #0x408] +; add x7, x23, #0x1f +; str x7, [sp, #0x400] +; add x7, x24, #0x21 +; str x7, [sp, #0x3f8] +; add x7, x25, #0x23 +; str x7, [sp, #0x3f0] +; add x26, x26, #0x25 +; add x27, x27, #0x27 +; add x28, x28, #0x1f +; add x21, x21, #0x21 +; add x19, x19, #0x23 +; add x20, x20, #0x25 +; add x22, x22, #0x27 +; add x0, x0, #0x1f +; ldr x7, [sp, #0x4b8] +; add x7, x7, #0x21 +; ldr x9, [sp, #0x4b0] +; add x8, x9, #0x23 +; ldr x12, [sp, #0x4a8] +; add x9, x12, #0x25 +; ldr x15, [sp, #0x4a0] +; add x10, x15, #0x27 +; ldr x2, [sp, #0x498] +; add x11, x2, #0x1f +; ldr x5, [sp, #0x490] +; add x12, x5, #0x21 +; ldr x13, [sp, #0x488] +; add x13, x13, #0x23 +; ldr x14, [sp, #0x480] +; add x14, x14, #0x25 +; ldr x15, [sp, #0x478] +; add x15, x15, #0x27 +; ldr x3, [sp, #0x468] ; ldr x1, [sp, #0x470] -; add x1, x1, #0x27 -; ldr x3, [sp, #0x460] -; ldr x2, [sp, #0x468] -; add x2, x2, x3 -; ldr x3, [sp, #0x450] -; ldr x6, [sp, #0x458] -; add x3, x6, x3 -; ldr x4, [sp, #0x440] -; ldr x5, [sp, #0x448] +; add x1, x1, x3 +; ldr x2, [sp, #0x458] +; ldr x6, [sp, #0x460] +; add x2, x6, x2 +; ldr x3, [sp, #0x448] +; ldr x4, [sp, #0x450] +; add x3, x4, x3 +; ldr x4, [sp, #0x438] +; ldr x5, [sp, #0x440] ; add x4, x5, x4 -; ldr x5, [sp, #0x430] -; ldr x6, [sp, #0x438] +; ldr x5, [sp, #0x428] +; ldr x6, [sp, #0x430] ; add x5, x6, x5 -; ldr x7, [sp, #0x420] -; ldr x6, [sp, #0x428] -; add x6, x6, x7 -; ldr x7, [sp, #0x410] -; ldr x24, [sp, #0x418] -; add x7, x24, x7 -; ldr x24, [sp, #0x400] -; ldr x25, [sp, #0x408] -; add x24, x25, x24 +; ldr x6, [sp, #0x418] +; ldr x23, [sp, #0x420] +; add x6, x23, x6 +; ldr x23, [sp, #0x408] +; ldr x24, [sp, #0x410] +; add x23, x24, x23 ; ldr x25, [sp, #0x3f8] +; ldr x24, [sp, #0x400] +; add x24, x24, x25 +; ldr x25, [sp, #0x3f0] ; add x25, x25, x26 -; ldr x26, [sp, #0x3f0] -; add x26, x26, x27 -; add x27, x28, x21 -; add x28, x19, x20 -; add x23, x22, x23 -; add x8, x0, x8 -; add x9, x9, x10 -; add x10, x11, x12 -; add x11, x13, x14 -; add x12, x15, x1 -; add x13, x2, x3 -; add x14, x4, x5 -; add x7, x6, x7 -; add x15, x24, x25 -; add x0, x26, x27 -; add x1, x28, x23 +; add x26, x27, x28 +; add x27, x21, x19 +; add x28, x20, x22 +; add x7, x0, x7 ; add x8, x8, x9 ; add x9, x10, x11 ; add x10, x12, x13 -; add x7, x14, x7 +; add x11, x14, x15 +; add x12, x1, x2 +; add x13, x3, x4 +; add x14, x5, x6 +; add x15, x23, x24 +; add x0, x25, x26 +; add x1, x27, x28 +; add x7, x7, x8 +; add x8, x9, x10 +; add x9, x11, x12 +; add x10, x13, x14 ; add x11, x15, x0 -; add x8, x1, x8 -; add x9, x9, x10 -; add x7, x7, x11 +; add x7, x1, x7 ; add x8, x8, x9 -; add x1, x7, x8 +; add x9, x10, x11 +; add x7, x7, x8 +; add x1, x9, x7 ; ldr x0, [sp, #0x3e8] -; add sp, sp, #0x480 +; add sp, sp, #0x4c0 ; ldp x19, x20, [sp], #0x10 ; ldp x21, x22, [sp], #0x10 ; ldp x23, x24, [sp], #0x10 diff --git a/cranelift/filetests/filetests/isa/aarch64/uadd_overflow_trap.clif b/cranelift/filetests/filetests/isa/aarch64/uadd_overflow_trap.clif index 85f939f7cddf..175d89f88b7b 100644 --- a/cranelift/filetests/filetests/isa/aarch64/uadd_overflow_trap.clif +++ b/cranelift/filetests/filetests/isa/aarch64/uadd_overflow_trap.clif @@ -10,15 +10,15 @@ block0(v0: i32): ; VCode: ; block0: -; movz w2, #127 -; adds w0, w0, w2 +; movz w3, #127 +; adds w0, w0, w3 ; b.hs #trap=user0 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov w2, #0x7f -; adds w0, w0, w2 +; mov w3, #0x7f +; adds w0, w0, w3 ; b.hs #0x10 ; ret ; .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: user0 @@ -32,15 +32,15 @@ block0(v0: i32): ; VCode: ; block0: -; movz w2, #127 -; adds w0, w2, w0 +; movz w3, #127 +; adds w0, w3, w0 ; b.hs #trap=user0 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov w2, #0x7f -; adds w0, w2, w0 +; mov w3, #0x7f +; adds w0, w3, w0 ; b.hs #0x10 ; ret ; .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: user0 @@ -73,15 +73,15 @@ block0(v0: i64): ; VCode: ; block0: -; movz x2, #127 -; adds x0, x0, x2 +; movz x3, #127 +; adds x0, x0, x3 ; b.hs #trap=user0 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov x2, #0x7f -; adds x0, x0, x2 +; mov x3, #0x7f +; adds x0, x0, x3 ; b.hs #0x10 ; ret ; .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: user0 @@ -95,15 +95,15 @@ block0(v0: i64): ; VCode: ; block0: -; movz x2, #127 -; adds x0, x2, x0 +; movz x3, #127 +; adds x0, x3, x0 ; b.hs #trap=user0 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mov x2, #0x7f -; adds x0, x2, x0 +; mov x3, #0x7f +; adds x0, x3, x0 ; b.hs #0x10 ; ret ; .byte 0x1f, 0xc1, 0x00, 0x00 ; trap: user0 diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index dc779b912304..154b1ce23d16 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -43,8 +43,8 @@ ;; block0: ;; mov w9, w0 ;; ldr x10, [x2, #8] -;; movn x8, #4099 -;; add x10, x10, x8 +;; movn x11, #4099 +;; add x10, x10, x11 ;; subs xzr, x9, x10 ;; b.hi label3 ; b label1 ;; block1: @@ -61,8 +61,8 @@ ;; block0: ;; mov w9, w0 ;; ldr x10, [x1, #8] -;; movn x8, #4099 -;; add x10, x10, x8 +;; movn x11, #4099 +;; add x10, x10, x11 ;; subs xzr, x9, x10 ;; b.hi label3 ; b label1 ;; block1: diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 5a0896f0667a..d17c797d022b 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -42,11 +42,11 @@ ;; function u0:0: ;; block0: ;; mov w10, w0 -;; movn w9, #65531 -;; adds x11, x10, x9 +;; movn w11, #65531 +;; adds x10, x10, x11 ;; b.hs #trap=heap_oob -;; ldr x12, [x2, #8] -;; subs xzr, x11, x12 +;; ldr x11, [x2, #8] +;; subs xzr, x10, x11 ;; b.hi label3 ; b label1 ;; block1: ;; ldr x13, [x2] @@ -62,11 +62,11 @@ ;; function u0:1: ;; block0: ;; mov w10, w0 -;; movn w9, #65531 -;; adds x11, x10, x9 +;; movn w11, #65531 +;; adds x10, x10, x11 ;; b.hs #trap=heap_oob -;; ldr x12, [x1, #8] -;; subs xzr, x11, x12 +;; ldr x11, [x1, #8] +;; subs xzr, x10, x11 ;; b.hi label3 ; b label1 ;; block1: ;; ldr x13, [x1] diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index 1062f31955ea..1b255cb20419 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -43,8 +43,8 @@ ;; block0: ;; mov w9, w0 ;; ldr x10, [x2, #8] -;; movn x8, #4096 -;; add x10, x10, x8 +;; movn x11, #4096 +;; add x10, x10, x11 ;; subs xzr, x9, x10 ;; b.hi label3 ; b label1 ;; block1: @@ -61,8 +61,8 @@ ;; block0: ;; mov w9, w0 ;; ldr x10, [x1, #8] -;; movn x8, #4096 -;; add x10, x10, x8 +;; movn x11, #4096 +;; add x10, x10, x11 ;; subs xzr, x9, x10 ;; b.hi label3 ; b label1 ;; block1: diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index aae035a788cc..50e8749f752b 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -42,11 +42,11 @@ ;; function u0:0: ;; block0: ;; mov w10, w0 -;; movn w9, #65534 -;; adds x11, x10, x9 +;; movn w11, #65534 +;; adds x10, x10, x11 ;; b.hs #trap=heap_oob -;; ldr x12, [x2, #8] -;; subs xzr, x11, x12 +;; ldr x11, [x2, #8] +;; subs xzr, x10, x11 ;; b.hi label3 ; b label1 ;; block1: ;; ldr x13, [x2] @@ -62,11 +62,11 @@ ;; function u0:1: ;; block0: ;; mov w10, w0 -;; movn w9, #65534 -;; adds x11, x10, x9 +;; movn w11, #65534 +;; adds x10, x10, x11 ;; b.hs #trap=heap_oob -;; ldr x12, [x1, #8] -;; subs xzr, x11, x12 +;; ldr x11, [x1, #8] +;; subs xzr, x10, x11 ;; b.hi label3 ; b label1 ;; block1: ;; ldr x13, [x1] diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat index c82e67afa983..c1a0052ad19c 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -46,11 +46,11 @@ ;; sub x11, x11, #4 ;; ldr x12, [x2] ;; add x12, x12, x0, UXTW -;; movz x9, #0 +;; movz x13, #0 ;; subs xzr, x10, x11 -;; csel x12, x9, x12, hi +;; csel x11, x13, x12, hi ;; csdb -;; str w1, [x12] +;; str w1, [x11] ;; b label1 ;; block1: ;; ret @@ -62,11 +62,11 @@ ;; sub x11, x11, #4 ;; ldr x12, [x1] ;; add x12, x12, x0, UXTW -;; movz x9, #0 +;; movz x13, #0 ;; subs xzr, x10, x11 -;; csel x12, x9, x12, hi +;; csel x11, x13, x12, hi ;; csdb -;; ldr w0, [x12] +;; ldr w0, [x11] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index fa26d1cf9c1b..c917cceeaeeb 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -43,16 +43,16 @@ ;; block0: ;; mov w12, w0 ;; ldr x13, [x2, #8] -;; movn x11, #4099 -;; add x13, x13, x11 +;; movn x14, #4099 +;; add x13, x13, x14 ;; ldr x14, [x2] ;; add x14, x14, x0, UXTW ;; add x14, x14, #4096 -;; movz x11, #0 +;; movz x15, #0 ;; subs xzr, x12, x13 -;; csel x14, x11, x14, hi +;; csel x13, x15, x14, hi ;; csdb -;; str w1, [x14] +;; str w1, [x13] ;; b label1 ;; block1: ;; ret @@ -61,16 +61,16 @@ ;; block0: ;; mov w12, w0 ;; ldr x13, [x1, #8] -;; movn x11, #4099 -;; add x13, x13, x11 +;; movn x14, #4099 +;; add x13, x13, x14 ;; ldr x14, [x1] ;; add x14, x14, x0, UXTW ;; add x14, x14, #4096 -;; movz x11, #0 +;; movz x15, #0 ;; subs xzr, x12, x13 -;; csel x14, x11, x14, hi +;; csel x13, x15, x14, hi ;; csdb -;; ldr w0, [x14] +;; ldr w0, [x13] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index b3cf735041c4..4de99642b576 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -42,19 +42,19 @@ ;; function u0:0: ;; block0: ;; mov w13, w0 -;; movn w12, #65531 -;; adds x14, x13, x12 +;; movn w14, #65531 +;; adds x13, x13, x14 ;; b.hs #trap=heap_oob -;; ldr x15, [x2, #8] -;; ldr x2, [x2] -;; add x0, x2, x0, UXTW -;; movz x13, #65535, LSL #16 -;; add x0, x0, x13 -;; movz x13, #0 -;; subs xzr, x14, x15 -;; csel x0, x13, x0, hi +;; ldr x14, [x2, #8] +;; ldr x15, [x2] +;; add x15, x15, x0, UXTW +;; movz x0, #65535, LSL #16 +;; add x15, x15, x0 +;; movz x0, #0 +;; subs xzr, x13, x14 +;; csel x15, x0, x15, hi ;; csdb -;; str w1, [x0] +;; str w1, [x15] ;; b label1 ;; block1: ;; ret @@ -62,19 +62,19 @@ ;; function u0:1: ;; block0: ;; mov w13, w0 -;; movn w12, #65531 -;; adds x14, x13, x12 +;; movn w14, #65531 +;; adds x13, x13, x14 ;; b.hs #trap=heap_oob -;; ldr x15, [x1, #8] -;; ldr x1, [x1] -;; add x0, x1, x0, UXTW -;; movz x13, #65535, LSL #16 -;; add x0, x0, x13 -;; movz x13, #0 -;; subs xzr, x14, x15 -;; csel x0, x13, x0, hi +;; ldr x14, [x1, #8] +;; ldr x15, [x1] +;; add x15, x15, x0, UXTW +;; movz x0, #65535, LSL #16 +;; add x15, x15, x0 +;; movz x0, #0 +;; subs xzr, x13, x14 +;; csel x15, x0, x15, hi ;; csdb -;; ldr w0, [x0] +;; ldr w0, [x15] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat index 2c7966fd53dc..e066c1e8b6c9 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -45,11 +45,11 @@ ;; ldr x10, [x2, #8] ;; ldr x11, [x2] ;; add x11, x11, x0, UXTW -;; movz x8, #0 +;; movz x12, #0 ;; subs xzr, x9, x10 -;; csel x11, x8, x11, hs +;; csel x10, x12, x11, hs ;; csdb -;; strb w1, [x11] +;; strb w1, [x10] ;; b label1 ;; block1: ;; ret @@ -60,11 +60,11 @@ ;; ldr x10, [x1, #8] ;; ldr x11, [x1] ;; add x11, x11, x0, UXTW -;; movz x8, #0 +;; movz x12, #0 ;; subs xzr, x9, x10 -;; csel x11, x8, x11, hs +;; csel x10, x12, x11, hs ;; csdb -;; ldrb w0, [x11] +;; ldrb w0, [x10] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 879af7e76b03..14ef6fdd8d42 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -43,16 +43,16 @@ ;; block0: ;; mov w12, w0 ;; ldr x13, [x2, #8] -;; movn x11, #4096 -;; add x13, x13, x11 +;; movn x14, #4096 +;; add x13, x13, x14 ;; ldr x14, [x2] ;; add x14, x14, x0, UXTW ;; add x14, x14, #4096 -;; movz x11, #0 +;; movz x15, #0 ;; subs xzr, x12, x13 -;; csel x14, x11, x14, hi +;; csel x13, x15, x14, hi ;; csdb -;; strb w1, [x14] +;; strb w1, [x13] ;; b label1 ;; block1: ;; ret @@ -61,16 +61,16 @@ ;; block0: ;; mov w12, w0 ;; ldr x13, [x1, #8] -;; movn x11, #4096 -;; add x13, x13, x11 +;; movn x14, #4096 +;; add x13, x13, x14 ;; ldr x14, [x1] ;; add x14, x14, x0, UXTW ;; add x14, x14, #4096 -;; movz x11, #0 +;; movz x15, #0 ;; subs xzr, x12, x13 -;; csel x14, x11, x14, hi +;; csel x13, x15, x14, hi ;; csdb -;; ldrb w0, [x14] +;; ldrb w0, [x13] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 830f9c4c95ff..f4b29bfe8fce 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -42,19 +42,19 @@ ;; function u0:0: ;; block0: ;; mov w13, w0 -;; movn w12, #65534 -;; adds x14, x13, x12 +;; movn w14, #65534 +;; adds x13, x13, x14 ;; b.hs #trap=heap_oob -;; ldr x15, [x2, #8] -;; ldr x2, [x2] -;; add x0, x2, x0, UXTW -;; movz x13, #65535, LSL #16 -;; add x0, x0, x13 -;; movz x13, #0 -;; subs xzr, x14, x15 -;; csel x0, x13, x0, hi +;; ldr x14, [x2, #8] +;; ldr x15, [x2] +;; add x15, x15, x0, UXTW +;; movz x0, #65535, LSL #16 +;; add x15, x15, x0 +;; movz x0, #0 +;; subs xzr, x13, x14 +;; csel x15, x0, x15, hi ;; csdb -;; strb w1, [x0] +;; strb w1, [x15] ;; b label1 ;; block1: ;; ret @@ -62,19 +62,19 @@ ;; function u0:1: ;; block0: ;; mov w13, w0 -;; movn w12, #65534 -;; adds x14, x13, x12 +;; movn w14, #65534 +;; adds x13, x13, x14 ;; b.hs #trap=heap_oob -;; ldr x15, [x1, #8] -;; ldr x1, [x1] -;; add x0, x1, x0, UXTW -;; movz x13, #65535, LSL #16 -;; add x0, x0, x13 -;; movz x13, #0 -;; subs xzr, x14, x15 -;; csel x0, x13, x0, hi +;; ldr x14, [x1, #8] +;; ldr x15, [x1] +;; add x15, x15, x0, UXTW +;; movz x0, #65535, LSL #16 +;; add x15, x15, x0 +;; movz x0, #0 +;; subs xzr, x13, x14 +;; csel x15, x0, x15, hi ;; csdb -;; ldrb w0, [x0] +;; ldrb w0, [x15] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index 9add0d45dc83..2fd45db6f999 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -45,11 +45,11 @@ ;; ldr x10, [x2, #8] ;; ldr x11, [x2] ;; add x11, x11, x0, UXTW -;; movz x8, #0 +;; movz x12, #0 ;; subs xzr, x9, x10 -;; csel x11, x8, x11, hi +;; csel x10, x12, x11, hi ;; csdb -;; str w1, [x11] +;; str w1, [x10] ;; b label1 ;; block1: ;; ret @@ -60,11 +60,11 @@ ;; ldr x10, [x1, #8] ;; ldr x11, [x1] ;; add x11, x11, x0, UXTW -;; movz x8, #0 +;; movz x12, #0 ;; subs xzr, x9, x10 -;; csel x11, x8, x11, hi +;; csel x10, x12, x11, hi ;; csdb -;; ldr w0, [x11] +;; ldr w0, [x10] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index 22bf50fcf384..caaa5c7422ec 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -46,11 +46,11 @@ ;; ldr x12, [x2] ;; add x12, x12, x0, UXTW ;; add x12, x12, #4096 -;; movz x9, #0 +;; movz x13, #0 ;; subs xzr, x10, x11 -;; csel x12, x9, x12, hi +;; csel x11, x13, x12, hi ;; csdb -;; str w1, [x12] +;; str w1, [x11] ;; b label1 ;; block1: ;; ret @@ -62,11 +62,11 @@ ;; ldr x12, [x1] ;; add x12, x12, x0, UXTW ;; add x12, x12, #4096 -;; movz x9, #0 +;; movz x13, #0 ;; subs xzr, x10, x11 -;; csel x12, x9, x12, hi +;; csel x11, x13, x12, hi ;; csdb -;; ldr w0, [x12] +;; ldr w0, [x11] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 14a401df7513..7cf6b60eb634 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -45,13 +45,13 @@ ;; ldr x12, [x2, #8] ;; ldr x13, [x2] ;; add x13, x13, x0, UXTW -;; movz x10, #65535, LSL #16 -;; add x13, x13, x10 -;; movz x10, #0 +;; movz x14, #65535, LSL #16 +;; add x13, x13, x14 +;; movz x14, #0 ;; subs xzr, x11, x12 -;; csel x13, x10, x13, hi +;; csel x12, x14, x13, hi ;; csdb -;; str w1, [x13] +;; str w1, [x12] ;; b label1 ;; block1: ;; ret @@ -62,13 +62,13 @@ ;; ldr x12, [x1, #8] ;; ldr x13, [x1] ;; add x13, x13, x0, UXTW -;; movz x10, #65535, LSL #16 -;; add x13, x13, x10 -;; movz x10, #0 +;; movz x14, #65535, LSL #16 +;; add x13, x13, x14 +;; movz x14, #0 ;; subs xzr, x11, x12 -;; csel x13, x10, x13, hi +;; csel x12, x14, x13, hi ;; csdb -;; ldr w0, [x13] +;; ldr w0, [x12] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index 65f07f50c01b..67990cf28ffd 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -45,11 +45,11 @@ ;; ldr x10, [x2, #8] ;; ldr x11, [x2] ;; add x11, x11, x0, UXTW -;; movz x8, #0 +;; movz x12, #0 ;; subs xzr, x9, x10 -;; csel x11, x8, x11, hs +;; csel x10, x12, x11, hs ;; csdb -;; strb w1, [x11] +;; strb w1, [x10] ;; b label1 ;; block1: ;; ret @@ -60,11 +60,11 @@ ;; ldr x10, [x1, #8] ;; ldr x11, [x1] ;; add x11, x11, x0, UXTW -;; movz x8, #0 +;; movz x12, #0 ;; subs xzr, x9, x10 -;; csel x11, x8, x11, hs +;; csel x10, x12, x11, hs ;; csdb -;; ldrb w0, [x11] +;; ldrb w0, [x10] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index d9ea12739b39..8a818ff9a992 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -46,11 +46,11 @@ ;; ldr x12, [x2] ;; add x12, x12, x0, UXTW ;; add x12, x12, #4096 -;; movz x9, #0 +;; movz x13, #0 ;; subs xzr, x10, x11 -;; csel x12, x9, x12, hi +;; csel x11, x13, x12, hi ;; csdb -;; strb w1, [x12] +;; strb w1, [x11] ;; b label1 ;; block1: ;; ret @@ -62,11 +62,11 @@ ;; ldr x12, [x1] ;; add x12, x12, x0, UXTW ;; add x12, x12, #4096 -;; movz x9, #0 +;; movz x13, #0 ;; subs xzr, x10, x11 -;; csel x12, x9, x12, hi +;; csel x11, x13, x12, hi ;; csdb -;; ldrb w0, [x12] +;; ldrb w0, [x11] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index e8a0c7635378..b1c0307ed8f6 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -45,13 +45,13 @@ ;; ldr x12, [x2, #8] ;; ldr x13, [x2] ;; add x13, x13, x0, UXTW -;; movz x10, #65535, LSL #16 -;; add x13, x13, x10 -;; movz x10, #0 +;; movz x14, #65535, LSL #16 +;; add x13, x13, x14 +;; movz x14, #0 ;; subs xzr, x11, x12 -;; csel x13, x10, x13, hi +;; csel x12, x14, x13, hi ;; csdb -;; strb w1, [x13] +;; strb w1, [x12] ;; b label1 ;; block1: ;; ret @@ -62,13 +62,13 @@ ;; ldr x12, [x1, #8] ;; ldr x13, [x1] ;; add x13, x13, x0, UXTW -;; movz x10, #65535, LSL #16 -;; add x13, x13, x10 -;; movz x10, #0 +;; movz x14, #65535, LSL #16 +;; add x13, x13, x14 +;; movz x14, #0 ;; subs xzr, x11, x12 -;; csel x13, x10, x13, hi +;; csel x12, x14, x13, hi ;; csdb -;; ldrb w0, [x13] +;; ldrb w0, [x12] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 6084866a13c4..c6cf304ee999 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -42,9 +42,9 @@ ;; function u0:0: ;; block0: ;; ldr x8, [x2, #8] -;; movn x7, #4099 -;; add x9, x8, x7 -;; subs xzr, x0, x9 +;; movn x9, #4099 +;; add x8, x8, x9 +;; subs xzr, x0, x8 ;; b.hi label3 ; b label1 ;; block1: ;; ldr x10, [x2] @@ -59,9 +59,9 @@ ;; function u0:1: ;; block0: ;; ldr x8, [x1, #8] -;; movn x7, #4099 -;; add x9, x8, x7 -;; subs xzr, x0, x9 +;; movn x9, #4099 +;; add x8, x8, x9 +;; subs xzr, x0, x8 ;; b.hi label3 ; b label1 ;; block1: ;; ldr x10, [x1] diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 197800a6ea13..7e17f62ff72a 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -41,11 +41,11 @@ ;; function u0:0: ;; block0: -;; movn w8, #65531 -;; adds x10, x0, x8 +;; movn w9, #65531 +;; adds x9, x0, x9 ;; b.hs #trap=heap_oob -;; ldr x11, [x2, #8] -;; subs xzr, x10, x11 +;; ldr x10, [x2, #8] +;; subs xzr, x9, x10 ;; b.hi label3 ; b label1 ;; block1: ;; ldr x12, [x2] @@ -60,11 +60,11 @@ ;; ;; function u0:1: ;; block0: -;; movn w8, #65531 -;; adds x10, x0, x8 +;; movn w9, #65531 +;; adds x9, x0, x9 ;; b.hs #trap=heap_oob -;; ldr x11, [x1, #8] -;; subs xzr, x10, x11 +;; ldr x10, [x1, #8] +;; subs xzr, x9, x10 ;; b.hi label3 ; b label1 ;; block1: ;; ldr x12, [x1] diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index 3a82117fca8a..f2ab9ee4df52 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -42,9 +42,9 @@ ;; function u0:0: ;; block0: ;; ldr x8, [x2, #8] -;; movn x7, #4096 -;; add x9, x8, x7 -;; subs xzr, x0, x9 +;; movn x9, #4096 +;; add x8, x8, x9 +;; subs xzr, x0, x8 ;; b.hi label3 ; b label1 ;; block1: ;; ldr x10, [x2] @@ -59,9 +59,9 @@ ;; function u0:1: ;; block0: ;; ldr x8, [x1, #8] -;; movn x7, #4096 -;; add x9, x8, x7 -;; subs xzr, x0, x9 +;; movn x9, #4096 +;; add x8, x8, x9 +;; subs xzr, x0, x8 ;; b.hi label3 ; b label1 ;; block1: ;; ldr x10, [x1] diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index 9576e65c5899..1f78f515dff9 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -41,11 +41,11 @@ ;; function u0:0: ;; block0: -;; movn w8, #65534 -;; adds x10, x0, x8 +;; movn w9, #65534 +;; adds x9, x0, x9 ;; b.hs #trap=heap_oob -;; ldr x11, [x2, #8] -;; subs xzr, x10, x11 +;; ldr x10, [x2, #8] +;; subs xzr, x9, x10 ;; b.hi label3 ; b label1 ;; block1: ;; ldr x12, [x2] @@ -60,11 +60,11 @@ ;; ;; function u0:1: ;; block0: -;; movn w8, #65534 -;; adds x10, x0, x8 +;; movn w9, #65534 +;; adds x9, x0, x9 ;; b.hs #trap=heap_oob -;; ldr x11, [x1, #8] -;; subs xzr, x10, x11 +;; ldr x10, [x1, #8] +;; subs xzr, x9, x10 ;; b.hi label3 ; b label1 ;; block1: ;; ldr x12, [x1] diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat index 3349ecc0ac87..f09ae0ad1ec0 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -45,11 +45,11 @@ ;; sub x9, x9, #4 ;; ldr x10, [x2] ;; add x10, x10, x0 -;; movz x8, #0 +;; movz x11, #0 ;; subs xzr, x0, x9 -;; csel x11, x8, x10, hi +;; csel x10, x11, x10, hi ;; csdb -;; str w1, [x11] +;; str w1, [x10] ;; b label1 ;; block1: ;; ret @@ -60,11 +60,11 @@ ;; sub x9, x9, #4 ;; ldr x10, [x1] ;; add x10, x10, x0 -;; movz x8, #0 +;; movz x11, #0 ;; subs xzr, x0, x9 -;; csel x11, x8, x10, hi +;; csel x10, x11, x10, hi ;; csdb -;; ldr w0, [x11] +;; ldr w0, [x10] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 23ed4ef0a0b3..6ac9272ab005 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -42,16 +42,16 @@ ;; function u0:0: ;; block0: ;; ldr x11, [x2, #8] -;; movn x10, #4099 -;; add x12, x11, x10 -;; ldr x11, [x2] -;; add x11, x11, x0 -;; add x11, x11, #4096 -;; movz x10, #0 -;; subs xzr, x0, x12 -;; csel x13, x10, x11, hi +;; movn x12, #4099 +;; add x11, x11, x12 +;; ldr x12, [x2] +;; add x12, x12, x0 +;; add x12, x12, #4096 +;; movz x13, #0 +;; subs xzr, x0, x11 +;; csel x12, x13, x12, hi ;; csdb -;; str w1, [x13] +;; str w1, [x12] ;; b label1 ;; block1: ;; ret @@ -59,16 +59,16 @@ ;; function u0:1: ;; block0: ;; ldr x11, [x1, #8] -;; movn x10, #4099 -;; add x12, x11, x10 -;; ldr x11, [x1] -;; add x11, x11, x0 -;; add x11, x11, #4096 -;; movz x10, #0 -;; subs xzr, x0, x12 -;; csel x13, x10, x11, hi +;; movn x12, #4099 +;; add x11, x11, x12 +;; ldr x12, [x1] +;; add x12, x12, x0 +;; add x12, x12, #4096 +;; movz x13, #0 +;; subs xzr, x0, x11 +;; csel x12, x13, x12, hi ;; csdb -;; ldr w0, [x13] +;; ldr w0, [x12] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 182b5e04520f..a3655408552b 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -41,38 +41,38 @@ ;; function u0:0: ;; block0: -;; movn w11, #65531 -;; adds x13, x0, x11 +;; movn w12, #65531 +;; adds x12, x0, x12 ;; b.hs #trap=heap_oob -;; ldr x14, [x2, #8] -;; ldr x15, [x2] -;; add x15, x15, x0 -;; movz x12, #65535, LSL #16 -;; add x15, x15, x12 -;; movz x12, #0 -;; subs xzr, x13, x14 -;; csel x15, x12, x15, hi +;; ldr x13, [x2, #8] +;; ldr x14, [x2] +;; add x14, x14, x0 +;; movz x15, #65535, LSL #16 +;; add x14, x14, x15 +;; movz x15, #0 +;; subs xzr, x12, x13 +;; csel x14, x15, x14, hi ;; csdb -;; str w1, [x15] +;; str w1, [x14] ;; b label1 ;; block1: ;; ret ;; ;; function u0:1: ;; block0: -;; movn w11, #65531 -;; adds x13, x0, x11 +;; movn w12, #65531 +;; adds x12, x0, x12 ;; b.hs #trap=heap_oob -;; ldr x14, [x1, #8] -;; ldr x15, [x1] -;; add x15, x15, x0 -;; movz x12, #65535, LSL #16 -;; add x15, x15, x12 -;; movz x12, #0 -;; subs xzr, x13, x14 -;; csel x15, x12, x15, hi +;; ldr x13, [x1, #8] +;; ldr x14, [x1] +;; add x14, x14, x0 +;; movz x15, #65535, LSL #16 +;; add x14, x14, x15 +;; movz x15, #0 +;; subs xzr, x12, x13 +;; csel x14, x15, x14, hi ;; csdb -;; ldr w0, [x15] +;; ldr w0, [x14] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat index 7fc77149ab21..4de033d48050 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -44,11 +44,11 @@ ;; ldr x8, [x2, #8] ;; ldr x9, [x2] ;; add x9, x9, x0 -;; movz x7, #0 +;; movz x10, #0 ;; subs xzr, x0, x8 -;; csel x10, x7, x9, hs +;; csel x9, x10, x9, hs ;; csdb -;; strb w1, [x10] +;; strb w1, [x9] ;; b label1 ;; block1: ;; ret @@ -58,11 +58,11 @@ ;; ldr x8, [x1, #8] ;; ldr x9, [x1] ;; add x9, x9, x0 -;; movz x7, #0 +;; movz x10, #0 ;; subs xzr, x0, x8 -;; csel x10, x7, x9, hs +;; csel x9, x10, x9, hs ;; csdb -;; ldrb w0, [x10] +;; ldrb w0, [x9] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 9a16a2fc68cb..72e9ff240a1c 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -42,16 +42,16 @@ ;; function u0:0: ;; block0: ;; ldr x11, [x2, #8] -;; movn x10, #4096 -;; add x12, x11, x10 -;; ldr x11, [x2] -;; add x11, x11, x0 -;; add x11, x11, #4096 -;; movz x10, #0 -;; subs xzr, x0, x12 -;; csel x13, x10, x11, hi +;; movn x12, #4096 +;; add x11, x11, x12 +;; ldr x12, [x2] +;; add x12, x12, x0 +;; add x12, x12, #4096 +;; movz x13, #0 +;; subs xzr, x0, x11 +;; csel x12, x13, x12, hi ;; csdb -;; strb w1, [x13] +;; strb w1, [x12] ;; b label1 ;; block1: ;; ret @@ -59,16 +59,16 @@ ;; function u0:1: ;; block0: ;; ldr x11, [x1, #8] -;; movn x10, #4096 -;; add x12, x11, x10 -;; ldr x11, [x1] -;; add x11, x11, x0 -;; add x11, x11, #4096 -;; movz x10, #0 -;; subs xzr, x0, x12 -;; csel x13, x10, x11, hi +;; movn x12, #4096 +;; add x11, x11, x12 +;; ldr x12, [x1] +;; add x12, x12, x0 +;; add x12, x12, #4096 +;; movz x13, #0 +;; subs xzr, x0, x11 +;; csel x12, x13, x12, hi ;; csdb -;; ldrb w0, [x13] +;; ldrb w0, [x12] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 6798d80bc349..44bba3f36d45 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -41,38 +41,38 @@ ;; function u0:0: ;; block0: -;; movn w11, #65534 -;; adds x13, x0, x11 +;; movn w12, #65534 +;; adds x12, x0, x12 ;; b.hs #trap=heap_oob -;; ldr x14, [x2, #8] -;; ldr x15, [x2] -;; add x15, x15, x0 -;; movz x12, #65535, LSL #16 -;; add x15, x15, x12 -;; movz x12, #0 -;; subs xzr, x13, x14 -;; csel x15, x12, x15, hi +;; ldr x13, [x2, #8] +;; ldr x14, [x2] +;; add x14, x14, x0 +;; movz x15, #65535, LSL #16 +;; add x14, x14, x15 +;; movz x15, #0 +;; subs xzr, x12, x13 +;; csel x14, x15, x14, hi ;; csdb -;; strb w1, [x15] +;; strb w1, [x14] ;; b label1 ;; block1: ;; ret ;; ;; function u0:1: ;; block0: -;; movn w11, #65534 -;; adds x13, x0, x11 +;; movn w12, #65534 +;; adds x12, x0, x12 ;; b.hs #trap=heap_oob -;; ldr x14, [x1, #8] -;; ldr x15, [x1] -;; add x15, x15, x0 -;; movz x12, #65535, LSL #16 -;; add x15, x15, x12 -;; movz x12, #0 -;; subs xzr, x13, x14 -;; csel x15, x12, x15, hi +;; ldr x13, [x1, #8] +;; ldr x14, [x1] +;; add x14, x14, x0 +;; movz x15, #65535, LSL #16 +;; add x14, x14, x15 +;; movz x15, #0 +;; subs xzr, x12, x13 +;; csel x14, x15, x14, hi ;; csdb -;; ldrb w0, [x15] +;; ldrb w0, [x14] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index b5de11150728..13f19a701363 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -44,11 +44,11 @@ ;; ldr x8, [x2, #8] ;; ldr x9, [x2] ;; add x9, x9, x0 -;; movz x7, #0 +;; movz x10, #0 ;; subs xzr, x0, x8 -;; csel x10, x7, x9, hi +;; csel x9, x10, x9, hi ;; csdb -;; str w1, [x10] +;; str w1, [x9] ;; b label1 ;; block1: ;; ret @@ -58,11 +58,11 @@ ;; ldr x8, [x1, #8] ;; ldr x9, [x1] ;; add x9, x9, x0 -;; movz x7, #0 +;; movz x10, #0 ;; subs xzr, x0, x8 -;; csel x10, x7, x9, hi +;; csel x9, x10, x9, hi ;; csdb -;; ldr w0, [x10] +;; ldr w0, [x9] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index 269c3c11e649..0b1c0abab533 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -45,11 +45,11 @@ ;; ldr x10, [x2] ;; add x10, x10, x0 ;; add x10, x10, #4096 -;; movz x8, #0 +;; movz x11, #0 ;; subs xzr, x0, x9 -;; csel x11, x8, x10, hi +;; csel x10, x11, x10, hi ;; csdb -;; str w1, [x11] +;; str w1, [x10] ;; b label1 ;; block1: ;; ret @@ -60,11 +60,11 @@ ;; ldr x10, [x1] ;; add x10, x10, x0 ;; add x10, x10, #4096 -;; movz x8, #0 +;; movz x11, #0 ;; subs xzr, x0, x9 -;; csel x11, x8, x10, hi +;; csel x10, x11, x10, hi ;; csdb -;; ldr w0, [x11] +;; ldr w0, [x10] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 6d594d804999..8de45f0e4920 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -44,13 +44,13 @@ ;; ldr x10, [x2, #8] ;; ldr x11, [x2] ;; add x11, x11, x0 -;; movz x9, #65535, LSL #16 -;; add x11, x11, x9 -;; movz x9, #0 +;; movz x12, #65535, LSL #16 +;; add x11, x11, x12 +;; movz x12, #0 ;; subs xzr, x0, x10 -;; csel x12, x9, x11, hi +;; csel x11, x12, x11, hi ;; csdb -;; str w1, [x12] +;; str w1, [x11] ;; b label1 ;; block1: ;; ret @@ -60,13 +60,13 @@ ;; ldr x10, [x1, #8] ;; ldr x11, [x1] ;; add x11, x11, x0 -;; movz x9, #65535, LSL #16 -;; add x11, x11, x9 -;; movz x9, #0 +;; movz x12, #65535, LSL #16 +;; add x11, x11, x12 +;; movz x12, #0 ;; subs xzr, x0, x10 -;; csel x12, x9, x11, hi +;; csel x11, x12, x11, hi ;; csdb -;; ldr w0, [x12] +;; ldr w0, [x11] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index f5a3cdff1148..79c56568ddc9 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -44,11 +44,11 @@ ;; ldr x8, [x2, #8] ;; ldr x9, [x2] ;; add x9, x9, x0 -;; movz x7, #0 +;; movz x10, #0 ;; subs xzr, x0, x8 -;; csel x10, x7, x9, hs +;; csel x9, x10, x9, hs ;; csdb -;; strb w1, [x10] +;; strb w1, [x9] ;; b label1 ;; block1: ;; ret @@ -58,11 +58,11 @@ ;; ldr x8, [x1, #8] ;; ldr x9, [x1] ;; add x9, x9, x0 -;; movz x7, #0 +;; movz x10, #0 ;; subs xzr, x0, x8 -;; csel x10, x7, x9, hs +;; csel x9, x10, x9, hs ;; csdb -;; ldrb w0, [x10] +;; ldrb w0, [x9] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index 7b02fe28a8cb..04f58c9c670d 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -45,11 +45,11 @@ ;; ldr x10, [x2] ;; add x10, x10, x0 ;; add x10, x10, #4096 -;; movz x8, #0 +;; movz x11, #0 ;; subs xzr, x0, x9 -;; csel x11, x8, x10, hi +;; csel x10, x11, x10, hi ;; csdb -;; strb w1, [x11] +;; strb w1, [x10] ;; b label1 ;; block1: ;; ret @@ -60,11 +60,11 @@ ;; ldr x10, [x1] ;; add x10, x10, x0 ;; add x10, x10, #4096 -;; movz x8, #0 +;; movz x11, #0 ;; subs xzr, x0, x9 -;; csel x11, x8, x10, hi +;; csel x10, x11, x10, hi ;; csdb -;; ldrb w0, [x11] +;; ldrb w0, [x10] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 1ad2a90d2a36..afec49c09cbc 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -44,13 +44,13 @@ ;; ldr x10, [x2, #8] ;; ldr x11, [x2] ;; add x11, x11, x0 -;; movz x9, #65535, LSL #16 -;; add x11, x11, x9 -;; movz x9, #0 +;; movz x12, #65535, LSL #16 +;; add x11, x11, x12 +;; movz x12, #0 ;; subs xzr, x0, x10 -;; csel x12, x9, x11, hi +;; csel x11, x12, x11, hi ;; csdb -;; strb w1, [x12] +;; strb w1, [x11] ;; b label1 ;; block1: ;; ret @@ -60,13 +60,13 @@ ;; ldr x10, [x1, #8] ;; ldr x11, [x1] ;; add x11, x11, x0 -;; movz x9, #65535, LSL #16 -;; add x11, x11, x9 -;; movz x9, #0 +;; movz x12, #65535, LSL #16 +;; add x11, x11, x12 +;; movz x12, #0 ;; subs xzr, x0, x10 -;; csel x12, x9, x11, hi +;; csel x11, x12, x11, hi ;; csdb -;; ldrb w0, [x12] +;; ldrb w0, [x11] ;; b label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat index 0049a0790d92..c2cae883b912 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -42,12 +42,12 @@ ;; mov w9, w0 ;; ldr x10, [x2] ;; add x10, x10, x0, UXTW -;; orr x7, xzr, #268435452 ;; movz x11, #0 -;; subs xzr, x9, x7 -;; csel x12, x11, x10, hi +;; orr x8, xzr, #268435452 +;; subs xzr, x9, x8 +;; csel x11, x11, x10, hi ;; csdb -;; str w1, [x12] +;; str w1, [x11] ;; b label1 ;; block1: ;; ret @@ -57,12 +57,12 @@ ;; mov w9, w0 ;; ldr x10, [x1] ;; add x10, x10, x0, UXTW -;; orr x7, xzr, #268435452 ;; movz x11, #0 -;; subs xzr, x9, x7 -;; csel x12, x11, x10, hi +;; orr x8, xzr, #268435452 +;; subs xzr, x9, x8 +;; csel x11, x11, x10, hi ;; csdb -;; ldr w0, [x12] +;; ldr w0, [x11] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 1f78efa5ebde..f388a44c871d 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -43,13 +43,13 @@ ;; ldr x12, [x2] ;; add x12, x12, x0, UXTW ;; add x12, x12, #4096 -;; movz w9, #61436 -;; movk w9, w9, #4095, LSL #16 ;; movz x13, #0 -;; subs xzr, x11, x9 -;; csel x15, x13, x12, hi +;; movz w10, #61436 +;; movk w10, w10, #4095, LSL #16 +;; subs xzr, x11, x10 +;; csel x14, x13, x12, hi ;; csdb -;; str w1, [x15] +;; str w1, [x14] ;; b label1 ;; block1: ;; ret @@ -60,13 +60,13 @@ ;; ldr x12, [x1] ;; add x12, x12, x0, UXTW ;; add x12, x12, #4096 -;; movz w9, #61436 -;; movk w9, w9, #4095, LSL #16 ;; movz x13, #0 -;; subs xzr, x11, x9 -;; csel x15, x13, x12, hi +;; movz w10, #61436 +;; movk w10, w10, #4095, LSL #16 +;; subs xzr, x11, x10 +;; csel x14, x13, x12, hi ;; csdb -;; ldr w0, [x15] +;; ldr w0, [x14] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat index f03d73c5558a..43e501106918 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -42,12 +42,12 @@ ;; mov w9, w0 ;; ldr x10, [x2] ;; add x10, x10, x0, UXTW -;; orr x7, xzr, #268435455 ;; movz x11, #0 -;; subs xzr, x9, x7 -;; csel x12, x11, x10, hi +;; orr x8, xzr, #268435455 +;; subs xzr, x9, x8 +;; csel x11, x11, x10, hi ;; csdb -;; strb w1, [x12] +;; strb w1, [x11] ;; b label1 ;; block1: ;; ret @@ -57,12 +57,12 @@ ;; mov w9, w0 ;; ldr x10, [x1] ;; add x10, x10, x0, UXTW -;; orr x7, xzr, #268435455 ;; movz x11, #0 -;; subs xzr, x9, x7 -;; csel x12, x11, x10, hi +;; orr x8, xzr, #268435455 +;; subs xzr, x9, x8 +;; csel x11, x11, x10, hi ;; csdb -;; ldrb w0, [x12] +;; ldrb w0, [x11] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index baf6bd3bc659..b1276331847b 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -43,13 +43,13 @@ ;; ldr x12, [x2] ;; add x12, x12, x0, UXTW ;; add x12, x12, #4096 -;; movz w9, #61439 -;; movk w9, w9, #4095, LSL #16 ;; movz x13, #0 -;; subs xzr, x11, x9 -;; csel x15, x13, x12, hi +;; movz w10, #61439 +;; movk w10, w10, #4095, LSL #16 +;; subs xzr, x11, x10 +;; csel x14, x13, x12, hi ;; csdb -;; strb w1, [x15] +;; strb w1, [x14] ;; b label1 ;; block1: ;; ret @@ -60,13 +60,13 @@ ;; ldr x12, [x1] ;; add x12, x12, x0, UXTW ;; add x12, x12, #4096 -;; movz w9, #61439 -;; movk w9, w9, #4095, LSL #16 ;; movz x13, #0 -;; subs xzr, x11, x9 -;; csel x15, x13, x12, hi +;; movz w10, #61439 +;; movk w10, w10, #4095, LSL #16 +;; subs xzr, x11, x10 +;; csel x14, x13, x12, hi ;; csdb -;; ldrb w0, [x15] +;; ldrb w0, [x14] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat index bf4416994020..3eecbc69d549 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -41,12 +41,12 @@ ;; block0: ;; ldr x8, [x2] ;; add x8, x8, x0 -;; orr x6, xzr, #268435452 ;; movz x9, #0 -;; subs xzr, x0, x6 -;; csel x11, x9, x8, hi +;; orr x7, xzr, #268435452 +;; subs xzr, x0, x7 +;; csel x10, x9, x8, hi ;; csdb -;; str w1, [x11] +;; str w1, [x10] ;; b label1 ;; block1: ;; ret @@ -55,12 +55,12 @@ ;; block0: ;; ldr x8, [x1] ;; add x8, x8, x0 -;; orr x6, xzr, #268435452 ;; movz x9, #0 -;; subs xzr, x0, x6 -;; csel x11, x9, x8, hi +;; orr x7, xzr, #268435452 +;; subs xzr, x0, x7 +;; csel x10, x9, x8, hi ;; csdb -;; ldr w0, [x11] +;; ldr w0, [x10] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 3a21ca270220..e62084ec1c2d 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -42,13 +42,13 @@ ;; ldr x10, [x2] ;; add x10, x10, x0 ;; add x10, x10, #4096 -;; movz w8, #61436 -;; movk w8, w8, #4095, LSL #16 ;; movz x11, #0 -;; subs xzr, x0, x8 -;; csel x14, x11, x10, hi +;; movz w9, #61436 +;; movk w9, w9, #4095, LSL #16 +;; subs xzr, x0, x9 +;; csel x13, x11, x10, hi ;; csdb -;; str w1, [x14] +;; str w1, [x13] ;; b label1 ;; block1: ;; ret @@ -58,13 +58,13 @@ ;; ldr x10, [x1] ;; add x10, x10, x0 ;; add x10, x10, #4096 -;; movz w8, #61436 -;; movk w8, w8, #4095, LSL #16 ;; movz x11, #0 -;; subs xzr, x0, x8 -;; csel x14, x11, x10, hi +;; movz w9, #61436 +;; movk w9, w9, #4095, LSL #16 +;; subs xzr, x0, x9 +;; csel x13, x11, x10, hi ;; csdb -;; ldr w0, [x14] +;; ldr w0, [x13] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat index a198194868a3..17ae6b229350 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -41,12 +41,12 @@ ;; block0: ;; ldr x8, [x2] ;; add x8, x8, x0 -;; orr x6, xzr, #268435455 ;; movz x9, #0 -;; subs xzr, x0, x6 -;; csel x11, x9, x8, hi +;; orr x7, xzr, #268435455 +;; subs xzr, x0, x7 +;; csel x10, x9, x8, hi ;; csdb -;; strb w1, [x11] +;; strb w1, [x10] ;; b label1 ;; block1: ;; ret @@ -55,12 +55,12 @@ ;; block0: ;; ldr x8, [x1] ;; add x8, x8, x0 -;; orr x6, xzr, #268435455 ;; movz x9, #0 -;; subs xzr, x0, x6 -;; csel x11, x9, x8, hi +;; orr x7, xzr, #268435455 +;; subs xzr, x0, x7 +;; csel x10, x9, x8, hi ;; csdb -;; ldrb w0, [x11] +;; ldrb w0, [x10] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 89cdcd61b92f..5ef524ba36cd 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -42,13 +42,13 @@ ;; ldr x10, [x2] ;; add x10, x10, x0 ;; add x10, x10, #4096 -;; movz w8, #61439 -;; movk w8, w8, #4095, LSL #16 ;; movz x11, #0 -;; subs xzr, x0, x8 -;; csel x14, x11, x10, hi +;; movz w9, #61439 +;; movk w9, w9, #4095, LSL #16 +;; subs xzr, x0, x9 +;; csel x13, x11, x10, hi ;; csdb -;; strb w1, [x14] +;; strb w1, [x13] ;; b label1 ;; block1: ;; ret @@ -58,13 +58,13 @@ ;; ldr x10, [x1] ;; add x10, x10, x0 ;; add x10, x10, #4096 -;; movz w8, #61439 -;; movk w8, w8, #4095, LSL #16 ;; movz x11, #0 -;; subs xzr, x0, x8 -;; csel x14, x11, x10, hi +;; movz w9, #61439 +;; movk w9, w9, #4095, LSL #16 +;; subs xzr, x0, x9 +;; csel x13, x11, x10, hi ;; csdb -;; ldrb w0, [x14] +;; ldrb w0, [x13] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index a2441e1b725e..d7f7dfd57247 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -41,12 +41,12 @@ ;; block0: ;; ldr x8, [x2] ;; add x8, x8, x0 -;; orr x6, xzr, #268435452 ;; movz x9, #0 -;; subs xzr, x0, x6 -;; csel x11, x9, x8, hi +;; orr x7, xzr, #268435452 +;; subs xzr, x0, x7 +;; csel x10, x9, x8, hi ;; csdb -;; str w1, [x11] +;; str w1, [x10] ;; b label1 ;; block1: ;; ret @@ -55,12 +55,12 @@ ;; block0: ;; ldr x8, [x1] ;; add x8, x8, x0 -;; orr x6, xzr, #268435452 ;; movz x9, #0 -;; subs xzr, x0, x6 -;; csel x11, x9, x8, hi +;; orr x7, xzr, #268435452 +;; subs xzr, x0, x7 +;; csel x10, x9, x8, hi ;; csdb -;; ldr w0, [x11] +;; ldr w0, [x10] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index e3a91edf6601..fe83d58c7a5c 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -42,13 +42,13 @@ ;; ldr x10, [x2] ;; add x10, x10, x0 ;; add x10, x10, #4096 -;; movz w8, #61436 -;; movk w8, w8, #4095, LSL #16 ;; movz x11, #0 -;; subs xzr, x0, x8 -;; csel x14, x11, x10, hi +;; movz w9, #61436 +;; movk w9, w9, #4095, LSL #16 +;; subs xzr, x0, x9 +;; csel x13, x11, x10, hi ;; csdb -;; str w1, [x14] +;; str w1, [x13] ;; b label1 ;; block1: ;; ret @@ -58,13 +58,13 @@ ;; ldr x10, [x1] ;; add x10, x10, x0 ;; add x10, x10, #4096 -;; movz w8, #61436 -;; movk w8, w8, #4095, LSL #16 ;; movz x11, #0 -;; subs xzr, x0, x8 -;; csel x14, x11, x10, hi +;; movz w9, #61436 +;; movk w9, w9, #4095, LSL #16 +;; subs xzr, x0, x9 +;; csel x13, x11, x10, hi ;; csdb -;; ldr w0, [x14] +;; ldr w0, [x13] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index 6ef1108ef370..f57d6cd7f0c0 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -41,12 +41,12 @@ ;; block0: ;; ldr x8, [x2] ;; add x8, x8, x0 -;; orr x6, xzr, #268435455 ;; movz x9, #0 -;; subs xzr, x0, x6 -;; csel x11, x9, x8, hi +;; orr x7, xzr, #268435455 +;; subs xzr, x0, x7 +;; csel x10, x9, x8, hi ;; csdb -;; strb w1, [x11] +;; strb w1, [x10] ;; b label1 ;; block1: ;; ret @@ -55,12 +55,12 @@ ;; block0: ;; ldr x8, [x1] ;; add x8, x8, x0 -;; orr x6, xzr, #268435455 ;; movz x9, #0 -;; subs xzr, x0, x6 -;; csel x11, x9, x8, hi +;; orr x7, xzr, #268435455 +;; subs xzr, x0, x7 +;; csel x10, x9, x8, hi ;; csdb -;; ldrb w0, [x11] +;; ldrb w0, [x10] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index 3f60bb8bd978..90bec6b250e4 100644 --- a/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/aarch64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -42,13 +42,13 @@ ;; ldr x10, [x2] ;; add x10, x10, x0 ;; add x10, x10, #4096 -;; movz w8, #61439 -;; movk w8, w8, #4095, LSL #16 ;; movz x11, #0 -;; subs xzr, x0, x8 -;; csel x14, x11, x10, hi +;; movz w9, #61439 +;; movk w9, w9, #4095, LSL #16 +;; subs xzr, x0, x9 +;; csel x13, x11, x10, hi ;; csdb -;; strb w1, [x14] +;; strb w1, [x13] ;; b label1 ;; block1: ;; ret @@ -58,13 +58,13 @@ ;; ldr x10, [x1] ;; add x10, x10, x0 ;; add x10, x10, #4096 -;; movz w8, #61439 -;; movk w8, w8, #4095, LSL #16 ;; movz x11, #0 -;; subs xzr, x0, x8 -;; csel x14, x11, x10, hi +;; movz w9, #61439 +;; movk w9, w9, #4095, LSL #16 +;; subs xzr, x0, x9 +;; csel x13, x11, x10, hi ;; csdb -;; ldrb w0, [x14] +;; ldrb w0, [x13] ;; b label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/amodes.clif b/cranelift/filetests/filetests/isa/riscv64/amodes.clif index 83754b19a23a..a156ef4d9af5 100644 --- a/cranelift/filetests/filetests/isa/riscv64/amodes.clif +++ b/cranelift/filetests/filetests/isa/riscv64/amodes.clif @@ -142,22 +142,22 @@ block0(v0: i64, v1: i64, v2: i64): ; VCode: ; block0: -; add a6,a0,a1 -; add a6,a6,a2 -; lui a5,1 -; addi a5,a5,4 -; add t3,a6,a5 -; lw a0,0(t3) +; lui a6,1 +; addi a6,a6,4 +; add a7,a0,a1 +; add a7,a7,a2 +; add a6,a7,a6 +; lw a0,0(a6) ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; add a6, a0, a1 -; add a6, a6, a2 -; lui a5, 1 -; addi a5, a5, 4 -; add t3, a6, a5 -; lw a0, 0(t3) +; lui a6, 1 +; addi a6, a6, 4 +; add a7, a0, a1 +; add a7, a7, a2 +; add a6, a7, a6 +; lw a0, 0(a6) ; ret function %f10() -> i32 { @@ -169,14 +169,14 @@ block0: ; VCode: ; block0: -; li t0,1234 -; lw a0,0(t0) +; li t1,1234 +; lw a0,0(t1) ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t0, zero, 0x4d2 -; lw a0, 0(t0) +; addi t1, zero, 0x4d2 +; lw a0, 0(t1) ; ret function %f11(i64) -> i32 { @@ -190,15 +190,15 @@ block0(v0: i64): ; VCode: ; block0: ; lui a1,2048 -; add a2,a0,a1 -; lw a0,0(a2) +; add a1,a0,a1 +; lw a0,0(a1) ; ret ; ; Disassembled: ; block0: ; offset 0x0 ; lui a1, 0x800 -; add a2, a0, a1 -; lw a0, 0(a2) +; add a1, a0, a1 +; lw a0, 0(a1) ; ret function %f12(i64) -> i32 { @@ -231,18 +231,18 @@ block0(v0: i64): ; VCode: ; block0: -; lui a1,244141 -; addi a1,a1,2560 -; add a4,a0,a1 -; lw a0,0(a4) +; lui a2,244141 +; addi a2,a2,2560 +; add a2,a0,a2 +; lw a0,0(a2) ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; lui a1, 0x3b9ad -; addi a1, a1, -0x600 -; add a4, a0, a1 -; lw a0, 0(a4) +; lui a2, 0x3b9ad +; addi a2, a2, -0x600 +; add a2, a0, a2 +; lw a0, 0(a2) ; ret function %f14(i32) -> i32 { @@ -299,20 +299,20 @@ block0(v0: i64, v1: i64, v2: i64): ; VCode: ; block0: -; lui a3,1048575 -; addi a3,a3,4094 -; slli a6,a3,32 -; srli t3,a6,32 -; lh a0,0(t3) +; lui a5,1048575 +; addi a5,a5,4094 +; slli a4,a5,32 +; srli a6,a4,32 +; lh a0,0(a6) ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; lui a3, 0xfffff -; addi a3, a3, -2 -; slli a6, a3, 0x20 -; srli t3, a6, 0x20 -; lh a0, 0(t3) +; lui a5, 0xfffff +; addi a5, a5, -2 +; slli a4, a5, 0x20 +; srli a6, a4, 0x20 +; lh a0, 0(a6) ; ret function %f19(i64, i64, i64) -> i32 { @@ -325,20 +325,20 @@ block0(v0: i64, v1: i64, v2: i64): ; VCode: ; block0: -; lui a3,1 -; addi a3,a3,2 -; slli a6,a3,32 -; srli t3,a6,32 -; lh a0,0(t3) +; lui a5,1 +; addi a5,a5,2 +; slli a4,a5,32 +; srli a6,a4,32 +; lh a0,0(a6) ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; lui a3, 1 -; addi a3, a3, 2 -; slli a6, a3, 0x20 -; srli t3, a6, 0x20 -; lh a0, 0(t3) +; lui a5, 1 +; addi a5, a5, 2 +; slli a4, a5, 0x20 +; srli a6, a4, 0x20 +; lh a0, 0(a6) ; ret function %f20(i64, i64, i64) -> i32 { @@ -351,18 +351,18 @@ block0(v0: i64, v1: i64, v2: i64): ; VCode: ; block0: -; lui a3,1048575 -; addi a3,a3,4094 -; sext.w a6,a3 -; lh a0,0(a6) +; lui a4,1048575 +; addi a4,a4,4094 +; sext.w a4,a4 +; lh a0,0(a4) ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; lui a3, 0xfffff -; addi a3, a3, -2 -; sext.w a6, a3 -; lh a0, 0(a6) +; lui a4, 0xfffff +; addi a4, a4, -2 +; sext.w a4, a4 +; lh a0, 0(a4) ; ret function %f21(i64, i64, i64) -> i32 { @@ -375,18 +375,18 @@ block0(v0: i64, v1: i64, v2: i64): ; VCode: ; block0: -; lui a3,1 -; addi a3,a3,2 -; sext.w a6,a3 -; lh a0,0(a6) +; lui a4,1 +; addi a4,a4,2 +; sext.w a4,a4 +; lh a0,0(a4) ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; lui a3, 1 -; addi a3, a3, 2 -; sext.w a6, a3 -; lh a0, 0(a6) +; lui a4, 1 +; addi a4, a4, 2 +; sext.w a4, a4 +; lh a0, 0(a4) ; ret function %i128(i64) -> i128 { diff --git a/cranelift/filetests/filetests/isa/riscv64/arithmetic.clif b/cranelift/filetests/filetests/isa/riscv64/arithmetic.clif index 791c51a8ff17..4952bc7196ec 100644 --- a/cranelift/filetests/filetests/isa/riscv64/arithmetic.clif +++ b/cranelift/filetests/filetests/isa/riscv64/arithmetic.clif @@ -131,42 +131,38 @@ block0(v0: i64): ; VCode: ; block0: -; li t2,2 +; li a6,2 ; li a1,-1 -; li a3,1 -; slli a5,a3,63 -; eq a7,a1,t2##ty=i64 -; eq t4,a5,a0##ty=i64 -; and t1,a7,t4 -; trap_if t1,int_ovf -; li a1,2 -; trap_ifc int_divz##(zero eq a1) -; li a4,2 -; div a0,a0,a4 +; li a2,1 +; slli a4,a2,63 +; eq a7,a1,a6##ty=i64 +; eq t3,a4,a0##ty=i64 +; and t0,a7,t3 +; trap_if t0,int_ovf +; trap_ifc int_divz##(zero eq a6) +; div a0,a0,a6 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, 2 +; addi a6, zero, 2 ; addi a1, zero, -1 -; addi a3, zero, 1 -; slli a5, a3, 0x3f -; bne a1, t2, 0xc +; addi a2, zero, 1 +; slli a4, a2, 0x3f +; bne a1, a6, 0xc ; addi a7, zero, 1 ; j 8 ; mv a7, zero -; bne a5, a0, 0xc -; addi t4, zero, 1 +; bne a4, a0, 0xc +; addi t3, zero, 1 ; j 8 -; mv t4, zero -; and t1, a7, t4 -; beqz t1, 8 +; mv t3, zero +; and t0, a7, t3 +; beqz t0, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf -; addi a1, zero, 2 -; bne zero, a1, 8 +; bne zero, a6, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_divz -; addi a4, zero, 2 -; div a0, a0, a4 +; div a0, a0, a6 ; ret function %f8(i64, i64) -> i64 { @@ -197,19 +193,17 @@ block0(v0: i64): ; VCode: ; block0: -; li t2,2 -; trap_ifc int_divz##(zero eq t2) -; li a2,2 -; divu a0,a0,a2 +; li a1,2 +; trap_ifc int_divz##(zero eq a1) +; divu a0,a0,a1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, 2 -; bne zero, t2, 8 +; addi a1, zero, 2 +; bne zero, a1, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_divz -; addi a2, zero, 2 -; divu a0, a0, a2 +; divu a0, a0, a1 ; ret function %f10(i64, i64) -> i64 { @@ -305,44 +299,44 @@ block0(v0: i32): ; VCode: ; block0: -; sext.w t2,a0 -; li a1,2 -; sext.w a3,a1 -; li a5,-1 -; li a7,1 -; slli t4,a7,63 -; slli t1,t2,32 -; eq a0,a5,a3##ty=i32 -; eq a2,t4,t1##ty=i32 -; and a4,a0,a2 -; trap_if a4,int_ovf -; trap_ifc int_divz##(zero eq a3) -; divw a0,t2,a3 +; li t4,2 +; sext.w a0,a0 +; sext.w a2,t4 +; li a4,-1 +; li a6,1 +; slli t3,a6,63 +; slli t0,a0,32 +; eq t2,a4,a2##ty=i32 +; eq a1,t3,t0##ty=i32 +; and a3,t2,a1 +; trap_if a3,int_ovf +; trap_ifc int_divz##(zero eq a2) +; divw a0,a0,a2 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; sext.w t2, a0 -; addi a1, zero, 2 -; sext.w a3, a1 -; addi a5, zero, -1 -; addi a7, zero, 1 -; slli t4, a7, 0x3f -; slli t1, t2, 0x20 -; bne a5, a3, 0xc -; addi a0, zero, 1 +; addi t4, zero, 2 +; sext.w a0, a0 +; sext.w a2, t4 +; addi a4, zero, -1 +; addi a6, zero, 1 +; slli t3, a6, 0x3f +; slli t0, a0, 0x20 +; bne a4, a2, 0xc +; addi t2, zero, 1 ; j 8 -; mv a0, zero -; bne t4, t1, 0xc -; addi a2, zero, 1 +; mv t2, zero +; bne t3, t0, 0xc +; addi a1, zero, 1 ; j 8 -; mv a2, zero -; and a4, a0, a2 -; beqz a4, 8 +; mv a1, zero +; and a3, t2, a1 +; beqz a3, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf -; bne zero, a3, 8 +; bne zero, a2, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_divz -; divw a0, t2, a3 +; divw a0, a0, a2 ; ret function %f14(i32, i32) -> i32 { @@ -381,25 +375,25 @@ block0(v0: i32): ; VCode: ; block0: -; li t2,2 -; slli a1,t2,32 -; srli a3,a1,32 -; trap_ifc int_divz##(zero eq a3) -; slli a6,a0,32 -; srli t3,a6,32 -; divuw a0,t3,a3 +; li a4,2 +; slli a1,a4,32 +; srli a2,a1,32 +; trap_ifc int_divz##(zero eq a2) +; slli a5,a0,32 +; srli a7,a5,32 +; divuw a0,a7,a2 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, 2 -; slli a1, t2, 0x20 -; srli a3, a1, 0x20 -; bne zero, a3, 8 +; addi a4, zero, 2 +; slli a1, a4, 0x20 +; srli a2, a1, 0x20 +; bne zero, a2, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_divz -; slli a6, a0, 0x20 -; srli t3, a6, 0x20 -; divuw a0, t3, a3 +; slli a5, a0, 0x20 +; srli a7, a5, 0x20 +; divuw a0, a7, a2 ; ret function %f16(i32, i32) -> i32 { @@ -610,14 +604,14 @@ block0(v0: i32): ; VCode: ; block0: -; li t2,-1 -; subw a0,a0,t2 +; li a1,-1 +; subw a0,a0,a1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, -1 -; subw a0, a0, t2 +; addi a1, zero, -1 +; subw a0, a0, a1 ; ret function %f28(i64) -> i64 { @@ -629,14 +623,14 @@ block0(v0: i64): ; VCode: ; block0: -; li t2,-1 -; sub a0,a0,t2 +; li a1,-1 +; sub a0,a0,a1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, -1 -; sub a0, a0, t2 +; addi a1, zero, -1 +; sub a0, a0, a1 ; ret function %f29(i64) -> i64 { @@ -648,14 +642,14 @@ block0(v0: i64): ; VCode: ; block0: -; li t2,1 -; sub a0,zero,t2 +; li a0,1 +; sub a0,zero,a0 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, 1 -; neg a0, t2 +; addi a0, zero, 1 +; neg a0, a0 ; ret function %add_i128(i128, i128) -> i128 { @@ -810,19 +804,17 @@ block0(v0: i64): ; VCode: ; block0: -; li t2,2 -; trap_ifc int_divz##(zero eq t2) -; li a2,2 -; rem a0,a0,a2 +; li a1,2 +; trap_ifc int_divz##(zero eq a1) +; rem a0,a0,a1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, 2 -; bne zero, t2, 8 +; addi a1, zero, 2 +; bne zero, a1, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_divz -; addi a2, zero, 2 -; rem a0, a0, a2 +; rem a0, a0, a1 ; ret function %urem_const (i64) -> i64 { @@ -834,19 +826,17 @@ block0(v0: i64): ; VCode: ; block0: -; li t2,2 -; trap_ifc int_divz##(zero eq t2) -; li a2,2 -; remu a0,a0,a2 +; li a1,2 +; trap_ifc int_divz##(zero eq a1) +; remu a0,a0,a1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, 2 -; bne zero, t2, 8 +; addi a1, zero, 2 +; bne zero, a1, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_divz -; addi a2, zero, 2 -; remu a0, a0, a2 +; remu a0, a0, a1 ; ret function %sdiv_minus_one(i64) -> i64 { @@ -858,41 +848,37 @@ block0(v0: i64): ; VCode: ; block0: -; li t2,-1 +; li a6,-1 ; li a1,-1 -; li a3,1 -; slli a5,a3,63 -; eq a7,a1,t2##ty=i64 -; eq t4,a5,a0##ty=i64 -; and t1,a7,t4 -; trap_if t1,int_ovf -; li a1,-1 -; trap_ifc int_divz##(zero eq a1) -; li a4,-1 -; div a0,a0,a4 +; li a2,1 +; slli a4,a2,63 +; eq a7,a1,a6##ty=i64 +; eq t3,a4,a0##ty=i64 +; and t0,a7,t3 +; trap_if t0,int_ovf +; trap_ifc int_divz##(zero eq a6) +; div a0,a0,a6 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, -1 +; addi a6, zero, -1 ; addi a1, zero, -1 -; addi a3, zero, 1 -; slli a5, a3, 0x3f -; bne a1, t2, 0xc +; addi a2, zero, 1 +; slli a4, a2, 0x3f +; bne a1, a6, 0xc ; addi a7, zero, 1 ; j 8 ; mv a7, zero -; bne a5, a0, 0xc -; addi t4, zero, 1 +; bne a4, a0, 0xc +; addi t3, zero, 1 ; j 8 -; mv t4, zero -; and t1, a7, t4 -; beqz t1, 8 +; mv t3, zero +; and t0, a7, t3 +; beqz t0, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf -; addi a1, zero, -1 -; bne zero, a1, 8 +; bne zero, a6, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_divz -; addi a4, zero, -1 -; div a0, a0, a4 +; div a0, a0, a6 ; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/bitops-float.clif b/cranelift/filetests/filetests/isa/riscv64/bitops-float.clif index ffd36afd07e4..05ef6b7e45ae 100644 --- a/cranelift/filetests/filetests/isa/riscv64/bitops-float.clif +++ b/cranelift/filetests/filetests/isa/riscv64/bitops-float.clif @@ -21,59 +21,53 @@ block1(v4: f32): ; VCode: ; block0: -; li a1,0 -; fmv.w.x ft9,a1 +; li a0,0 ; li t1,0 ; fmv.w.x fa6,t1 -; fmv.x.w a1,fa6 -; not a3,a1 -; fmv.w.x ft1,a3 -; fmv.x.w t1,ft1 -; fmv.x.w a0,ft1 -; or a2,t1,a0 -; fmv.w.x fa2,a2 -; li t2,0 -; br_table t2,[MachLabel(1),MachLabel(2)]##tmp1=a1,tmp2=a2 +; fmv.x.w t4,fa6 +; not t1,t4 +; fmv.w.x ft8,t1 +; fmv.x.w t3,ft8 +; fmv.x.w t0,ft8 +; or t2,t3,t0 +; fmv.w.x fa1,t2 +; br_table a0,[MachLabel(1),MachLabel(2)]##tmp1=t0,tmp2=t1 ; block1: ; j label3 ; block2: -; fmv.d fa2,ft9 +; fmv.d fa1,fa6 ; j label3 ; block3: -; li a0,0 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; mv a1, zero -; fmv.w.x ft9, a1 +; mv a0, zero ; mv t1, zero ; fmv.w.x fa6, t1 -; fmv.x.w a1, fa6 -; not a3, a1 -; fmv.w.x ft1, a3 -; fmv.x.w t1, ft1 -; fmv.x.w a0, ft1 -; or a2, t1, a0 -; fmv.w.x fa2, a2 -; mv t2, zero -; slli t6, t2, 0x20 +; fmv.x.w t4, fa6 +; not t1, t4 +; fmv.w.x ft8, t1 +; fmv.x.w t3, ft8 +; fmv.x.w t0, ft8 +; or t2, t3, t0 +; fmv.w.x fa1, t2 +; slli t6, a0, 0x20 ; srli t6, t6, 0x20 -; addi a2, zero, 1 -; bltu t6, a2, 0xc -; auipc a2, 0 -; jalr zero, a2, 0x28 -; auipc a1, 0 -; slli a2, t6, 3 -; add a1, a1, a2 -; jalr zero, a1, 0x10 -; auipc a2, 0 -; jalr zero, a2, 0xc -; block1: ; offset 0x60 +; addi t1, zero, 1 +; bltu t6, t1, 0xc +; auipc t1, 0 +; jalr zero, t1, 0x28 +; auipc t0, 0 +; slli t1, t6, 3 +; add t0, t0, t1 +; jalr zero, t0, 0x10 +; auipc t1, 0 +; jalr zero, t1, 0xc +; block1: ; offset 0x58 ; j 8 -; block2: ; offset 0x64 -; fmv.d fa2, ft9 -; block3: ; offset 0x68 -; mv a0, zero +; block2: ; offset 0x5c +; fmv.d fa1, fa6 +; block3: ; offset 0x60 ; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/bitops.clif b/cranelift/filetests/filetests/isa/riscv64/bitops.clif index 23aaa6ba51a6..08cd53690215 100644 --- a/cranelift/filetests/filetests/isa/riscv64/bitops.clif +++ b/cranelift/filetests/filetests/isa/riscv64/bitops.clif @@ -1458,15 +1458,15 @@ block0(v0: i64): ; VCode: ; block0: ; li a1,4 -; not a2,a1 -; and a0,a0,a2 +; not a1,a1 +; and a0,a0,a1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 ; addi a1, zero, 4 -; not a2, a1 -; and a0, a0, a2 +; not a1, a1 +; and a0, a0, a1 ; ret function %band_not_i64_constant_shift(i64, i64) -> i64 { @@ -1559,15 +1559,15 @@ block0(v0: i64): ; VCode: ; block0: ; li a1,4 -; not a2,a1 -; or a0,a0,a2 +; not a1,a1 +; or a0,a0,a1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 ; addi a1, zero, 4 -; not a2, a1 -; or a0, a0, a2 +; not a1, a1 +; or a0, a0, a1 ; ret function %bor_not_i64_constant_shift(i64, i64) -> i64 { @@ -1660,15 +1660,15 @@ block0(v0: i64): ; VCode: ; block0: ; li a1,4 -; not a2,a1 -; xor a0,a0,a2 +; not a1,a1 +; xor a0,a0,a1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 ; addi a1, zero, 4 -; not a2, a1 -; xor a0, a0, a2 +; not a1, a1 +; xor a0, a0, a1 ; ret function %bxor_not_i64_constant_shift(i64, i64) -> i64 { diff --git a/cranelift/filetests/filetests/isa/riscv64/call.clif b/cranelift/filetests/filetests/isa/riscv64/call.clif index aaf1133434d8..41e99e292d6b 100644 --- a/cranelift/filetests/filetests/isa/riscv64/call.clif +++ b/cranelift/filetests/filetests/isa/riscv64/call.clif @@ -172,20 +172,19 @@ block0(v0: i8): ; sd fp,0(sp) ; mv fp,sp ; block0: -; mv t3,a0 +; li a7,42 ; add sp,-16 ; virtual_sp_offset_adj +16 -; li a0,42 -; li a1,42 -; li a2,42 -; li a3,42 -; li a4,42 -; li a5,42 -; li a6,42 -; li a7,42 -; slli t3,t3,56; srai t3,t3,56 -; sd t3,0(sp) +; slli a2,a0,56; srai a2,a2,56 +; sd a2,0(sp) ; load_sym t3,%g+0 +; mv a0,a7 +; mv a1,a7 +; mv a2,a7 +; mv a3,a7 +; mv a4,a7 +; mv a5,a7 +; mv a6,a7 ; callind t3 ; add sp,+16 ; virtual_sp_offset_adj -16 @@ -201,24 +200,23 @@ block0(v0: i8): ; sd s0, 0(sp) ; ori s0, sp, 0 ; block1: ; offset 0x10 -; ori t3, a0, 0 -; addi sp, sp, -0x10 -; addi a0, zero, 0x2a -; addi a1, zero, 0x2a -; addi a2, zero, 0x2a -; addi a3, zero, 0x2a -; addi a4, zero, 0x2a -; addi a5, zero, 0x2a -; addi a6, zero, 0x2a ; addi a7, zero, 0x2a -; slli t3, t3, 0x38 -; srai t3, t3, 0x38 -; sd t3, 0(sp) +; addi sp, sp, -0x10 +; slli a2, a0, 0x38 +; srai a2, a2, 0x38 +; sd a2, 0(sp) ; auipc t3, 0 ; ld t3, 0xc(t3) ; j 0xc ; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %g 0 ; .byte 0x00, 0x00, 0x00, 0x00 +; ori a0, a7, 0 +; ori a1, a7, 0 +; ori a2, a7, 0 +; ori a3, a7, 0 +; ori a4, a7, 0 +; ori a5, a7, 0 +; ori a6, a7, 0 ; jalr t3 ; addi sp, sp, 0x10 ; ld ra, 8(sp) @@ -234,51 +232,35 @@ block0(v0: i8): ; VCode: ; block0: -; li a2,42 -; mv t1,a2 -; li a2,42 +; mv a2,a1 +; li a1,42 ; mv a3,a2 -; li a4,42 -; li a6,42 -; li t3,42 -; li t0,42 -; li t2,42 -; li a2,42 -; sw a4,0(a1) -; sw a6,8(a1) -; sw t3,16(a1) -; sw t0,24(a1) -; sw t2,32(a1) -; sw a2,40(a1) -; slli t4,a0,56; srai t4,t4,56 -; sd a0,48(a1) -; mv a0,t1 -; mv a1,a3 +; sw a1,0(a3) +; sw a1,8(a3) +; sw a1,16(a3) +; sw a1,24(a3) +; sw a1,32(a3) +; sw a1,40(a3) +; slli a7,a0,56; srai a7,a7,56 +; sd a0,48(a3) +; mv a0,a1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi a2, zero, 0x2a -; ori t1, a2, 0 -; addi a2, zero, 0x2a +; ori a2, a1, 0 +; addi a1, zero, 0x2a ; ori a3, a2, 0 -; addi a4, zero, 0x2a -; addi a6, zero, 0x2a -; addi t3, zero, 0x2a -; addi t0, zero, 0x2a -; addi t2, zero, 0x2a -; addi a2, zero, 0x2a -; sw a4, 0(a1) -; sw a6, 8(a1) -; sw t3, 0x10(a1) -; sw t0, 0x18(a1) -; sw t2, 0x20(a1) -; sw a2, 0x28(a1) -; slli t4, a0, 0x38 -; srai t4, t4, 0x38 -; sd a0, 0x30(a1) -; ori a0, t1, 0 -; ori a1, a3, 0 +; sw a1, 0(a3) +; sw a1, 8(a3) +; sw a1, 0x10(a3) +; sw a1, 0x18(a3) +; sw a1, 0x20(a3) +; sw a1, 0x28(a3) +; slli a7, a0, 0x38 +; srai a7, a7, 0x38 +; sd a0, 0x30(a3) +; ori a0, a1, 0 ; ret function %f8() { @@ -438,12 +420,12 @@ block0(v0: i64): ; sd fp,0(sp) ; mv fp,sp ; block0: -; mv a5,a0 -; li a0,42 -; mv a1,a5 +; mv a4,a0 ; li a2,42 -; load_sym a5,%f11+0 -; callind a5 +; mv a0,a2 +; mv a1,a4 +; load_sym a3,%f11+0 +; callind a3 ; ld ra,8(sp) ; ld fp,0(sp) ; add sp,+16 @@ -456,16 +438,16 @@ block0(v0: i64): ; sd s0, 0(sp) ; ori s0, sp, 0 ; block1: ; offset 0x10 -; ori a5, a0, 0 -; addi a0, zero, 0x2a -; ori a1, a5, 0 +; ori a4, a0, 0 ; addi a2, zero, 0x2a -; auipc a5, 0 -; ld a5, 0xc(a5) +; ori a0, a2, 0 +; ori a1, a4, 0 +; auipc a3, 0 +; ld a3, 0xc(a3) ; j 0xc ; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f11 0 ; .byte 0x00, 0x00, 0x00, 0x00 -; jalr a5 +; jalr a3 ; ld ra, 8(sp) ; ld s0, 0(sp) ; addi sp, sp, 0x10 @@ -505,11 +487,12 @@ block0(v0: i64): ; sd fp,0(sp) ; mv fp,sp ; block0: -; mv a1,a0 -; li a2,42 +; mv a4,a0 ; li a0,42 -; load_sym a5,%f12+0 -; callind a5 +; mv a1,a4 +; mv a2,a0 +; load_sym a3,%f12+0 +; callind a3 ; ld ra,8(sp) ; ld fp,0(sp) ; add sp,+16 @@ -522,15 +505,16 @@ block0(v0: i64): ; sd s0, 0(sp) ; ori s0, sp, 0 ; block1: ; offset 0x10 -; ori a1, a0, 0 -; addi a2, zero, 0x2a +; ori a4, a0, 0 ; addi a0, zero, 0x2a -; auipc a5, 0 -; ld a5, 0xc(a5) +; ori a1, a4, 0 +; ori a2, a0, 0 +; auipc a3, 0 +; ld a3, 0xc(a3) ; j 0xc ; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f12 0 ; .byte 0x00, 0x00, 0x00, 0x00 -; jalr a5 +; jalr a3 ; ld ra, 8(sp) ; ld s0, 0(sp) ; addi sp, sp, 0x10 @@ -570,11 +554,12 @@ block0(v0: i64): ; sd fp,0(sp) ; mv fp,sp ; block0: -; mv a1,a0 -; li a2,42 +; mv a4,a0 ; li a0,42 -; load_sym a5,%f13+0 -; callind a5 +; mv a1,a4 +; mv a2,a0 +; load_sym a3,%f13+0 +; callind a3 ; ld ra,8(sp) ; ld fp,0(sp) ; add sp,+16 @@ -587,15 +572,16 @@ block0(v0: i64): ; sd s0, 0(sp) ; ori s0, sp, 0 ; block1: ; offset 0x10 -; ori a1, a0, 0 -; addi a2, zero, 0x2a +; ori a4, a0, 0 ; addi a0, zero, 0x2a -; auipc a5, 0 -; ld a5, 0xc(a5) +; ori a1, a4, 0 +; ori a2, a0, 0 +; auipc a3, 0 +; ld a3, 0xc(a3) ; j 0xc ; .byte 0x00, 0x00, 0x00, 0x00 ; reloc_external Abs8 %f13 0 ; .byte 0x00, 0x00, 0x00, 0x00 -; jalr a5 +; jalr a3 ; ld ra, 8(sp) ; ld s0, 0(sp) ; addi sp, sp, 0x10 diff --git a/cranelift/filetests/filetests/isa/riscv64/condops.clif b/cranelift/filetests/filetests/isa/riscv64/condops.clif index c2c1334efea9..2ac8dd6af5ca 100644 --- a/cranelift/filetests/filetests/isa/riscv64/condops.clif +++ b/cranelift/filetests/filetests/isa/riscv64/condops.clif @@ -12,18 +12,18 @@ block0(v0: i8, v1: i64, v2: i64): ; VCode: ; block0: -; andi a3,a0,255 ; li a4,42 -; andi a5,a4,255 -; select_reg a0,a1,a2##condition=(a3 eq a5) +; andi a3,a0,255 +; andi a4,a4,255 +; select_reg a0,a1,a2##condition=(a3 eq a4) ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; andi a3, a0, 0xff ; addi a4, zero, 0x2a -; andi a5, a4, 0xff -; beq a3, a5, 0xc +; andi a3, a0, 0xff +; andi a4, a4, 0xff +; beq a3, a4, 0xc ; ori a0, a2, 0 ; j 8 ; ori a0, a1, 0 @@ -38,18 +38,18 @@ block0(v0: i8): ; VCode: ; block0: -; li t2,42 -; andi a1,a0,255 -; andi a3,t2,255 -; eq a0,a1,a3##ty=i8 +; li a2,42 +; andi a0,a0,255 +; andi a2,a2,255 +; eq a0,a0,a2##ty=i8 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, 0x2a -; andi a1, a0, 0xff -; andi a3, t2, 0xff -; bne a1, a3, 0xc +; addi a2, zero, 0x2a +; andi a0, a0, 0xff +; andi a2, a2, 0xff +; bne a0, a2, 0xc ; addi a0, zero, 1 ; j 8 ; mv a0, zero @@ -108,22 +108,22 @@ block0(v0: i32, v1: i8, v2: i8): ; VCode: ; block0: +; li a6,42 ; slli a3,a0,32 -; srli a3,a3,32 -; li a5,42 -; slli a7,a5,32 -; srli t4,a7,32 -; select_reg a0,a1,a2##condition=(a3 eq t4) +; srli a4,a3,32 +; slli a6,a6,32 +; srli t3,a6,32 +; select_reg a0,a1,a2##condition=(a4 eq t3) ; ret ; ; Disassembled: ; block0: ; offset 0x0 +; addi a6, zero, 0x2a ; slli a3, a0, 0x20 -; srli a3, a3, 0x20 -; addi a5, zero, 0x2a -; slli a7, a5, 0x20 -; srli t4, a7, 0x20 -; beq a3, t4, 0xc +; srli a4, a3, 0x20 +; slli a6, a6, 0x20 +; srli t3, a6, 0x20 +; beq a4, t3, 0xc ; ori a0, a2, 0 ; j 8 ; ori a0, a1, 0 diff --git a/cranelift/filetests/filetests/isa/riscv64/fcmp.clif b/cranelift/filetests/filetests/isa/riscv64/fcmp.clif index 769f54591d20..e29e7b277956 100644 --- a/cranelift/filetests/filetests/isa/riscv64/fcmp.clif +++ b/cranelift/filetests/filetests/isa/riscv64/fcmp.clif @@ -14,12 +14,10 @@ block1: ; VCode: ; block0: -; li t1,0 -; fmv.d.x ft1,t1 -; li a2,0 -; fmv.d.x ft5,a2 -; fle.d a5,ft5,ft1 -; bne a5,zero,taken(label2),not_taken(label1) +; li t2,0 +; fmv.d.x ft2,t2 +; fle.d t2,ft2,ft2 +; bne t2,zero,taken(label2),not_taken(label1) ; block1: ; j label3 ; block2: @@ -29,12 +27,10 @@ block1: ; ; Disassembled: ; block0: ; offset 0x0 -; mv t1, zero -; fmv.d.x ft1, t1 -; mv a2, zero -; fmv.d.x ft5, a2 -; fle.d a5, ft5, ft1 -; block1: ; offset 0x14 +; mv t2, zero +; fmv.d.x ft2, t2 +; fle.d t2, ft2, ft2 +; block1: ; offset 0xc ; ret function %f1() { @@ -49,12 +45,10 @@ block1: ; VCode: ; block0: -; li t1,0 -; fmv.d.x ft1,t1 -; li a2,0 -; fmv.d.x ft5,a2 -; fle.d a5,ft5,ft1 -; bne a5,zero,taken(label2),not_taken(label1) +; li t2,0 +; fmv.d.x ft2,t2 +; fle.d t2,ft2,ft2 +; bne t2,zero,taken(label2),not_taken(label1) ; block1: ; j label3 ; block2: @@ -64,11 +58,9 @@ block1: ; ; Disassembled: ; block0: ; offset 0x0 -; mv t1, zero -; fmv.d.x ft1, t1 -; mv a2, zero -; fmv.d.x ft5, a2 -; fle.d a5, ft5, ft1 -; block1: ; offset 0x14 +; mv t2, zero +; fmv.d.x ft2, t2 +; fle.d t2, ft2, ft2 +; block1: ; offset 0xc ; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/iconst-icmp-small.clif b/cranelift/filetests/filetests/isa/riscv64/iconst-icmp-small.clif index 857ed32824fc..4b259c88f1c2 100644 --- a/cranelift/filetests/filetests/isa/riscv64/iconst-icmp-small.clif +++ b/cranelift/filetests/filetests/isa/riscv64/iconst-icmp-small.clif @@ -12,28 +12,24 @@ block0: ; VCode: ; block0: -; lui t1,14 -; addi t1,t1,3532 -; lui a2,14 -; addi a2,a2,3532 -; slli a5,t1,48 -; srli a7,a5,48 -; slli t4,a2,48 -; srli t1,t4,48 -; ne a0,a7,t1##ty=i16 +; lui a3,14 +; addi a3,a3,3532 +; slli t2,a3,48 +; srli a1,t2,48 +; slli a3,a3,48 +; srli a5,a3,48 +; ne a0,a1,a5##ty=i16 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; lui t1, 0xe -; addi t1, t1, -0x234 -; lui a2, 0xe -; addi a2, a2, -0x234 -; slli a5, t1, 0x30 -; srli a7, a5, 0x30 -; slli t4, a2, 0x30 -; srli t1, t4, 0x30 -; beq a7, t1, 0xc +; lui a3, 0xe +; addi a3, a3, -0x234 +; slli t2, a3, 0x30 +; srli a1, t2, 0x30 +; slli a3, a3, 0x30 +; srli a5, a3, 0x30 +; beq a1, a5, 0xc ; addi a0, zero, 1 ; j 8 ; mv a0, zero diff --git a/cranelift/filetests/filetests/isa/riscv64/shift-rotate.clif b/cranelift/filetests/filetests/isa/riscv64/shift-rotate.clif index c9deddba4bb3..30bdc702773e 100644 --- a/cranelift/filetests/filetests/isa/riscv64/shift-rotate.clif +++ b/cranelift/filetests/filetests/isa/riscv64/shift-rotate.clif @@ -621,29 +621,29 @@ block0(v0: i64): ; VCode: ; block0: -; li t2,17 -; andi a1,t2,63 -; li a3,64 -; sub a5,a3,a1 -; srl a7,a0,a1 -; sll t4,a0,a5 -; select_reg t1,zero,t4##condition=(a1 eq zero) -; or a0,a7,t1 +; li a6,17 +; andi a1,a6,63 +; li a2,64 +; sub a4,a2,a1 +; srl a6,a0,a1 +; sll t3,a0,a4 +; select_reg t0,zero,t3##condition=(a1 eq zero) +; or a0,a6,t0 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, 0x11 -; andi a1, t2, 0x3f -; addi a3, zero, 0x40 -; sub a5, a3, a1 -; srl a7, a0, a1 -; sll t4, a0, a5 +; addi a6, zero, 0x11 +; andi a1, a6, 0x3f +; addi a2, zero, 0x40 +; sub a4, a2, a1 +; srl a6, a0, a1 +; sll t3, a0, a4 ; beqz a1, 0xc -; ori t1, t4, 0 +; ori t0, t3, 0 ; j 8 -; ori t1, zero, 0 -; or a0, a7, t1 +; ori t0, zero, 0 +; or a0, a6, t0 ; ret function %f21(i64) -> i64 { @@ -655,29 +655,29 @@ block0(v0: i64): ; VCode: ; block0: -; li t2,17 -; andi a1,t2,63 -; li a3,64 -; sub a5,a3,a1 -; sll a7,a0,a1 -; srl t4,a0,a5 -; select_reg t1,zero,t4##condition=(a1 eq zero) -; or a0,a7,t1 +; li a6,17 +; andi a1,a6,63 +; li a2,64 +; sub a4,a2,a1 +; sll a6,a0,a1 +; srl t3,a0,a4 +; select_reg t0,zero,t3##condition=(a1 eq zero) +; or a0,a6,t0 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, 0x11 -; andi a1, t2, 0x3f -; addi a3, zero, 0x40 -; sub a5, a3, a1 -; sll a7, a0, a1 -; srl t4, a0, a5 +; addi a6, zero, 0x11 +; andi a1, a6, 0x3f +; addi a2, zero, 0x40 +; sub a4, a2, a1 +; sll a6, a0, a1 +; srl t3, a0, a4 ; beqz a1, 0xc -; ori t1, t4, 0 +; ori t0, t3, 0 ; j 8 -; ori t1, zero, 0 -; or a0, a7, t1 +; ori t0, zero, 0 +; or a0, a6, t0 ; ret function %f22(i32) -> i32 { @@ -689,33 +689,33 @@ block0(v0: i32): ; VCode: ; block0: -; slli t2,a0,32 -; srli a1,t2,32 -; li a3,17 -; andi a5,a3,31 -; li a7,32 -; sub t4,a7,a5 -; sll t1,a1,a5 -; srl a0,a1,t4 -; select_reg a2,zero,a0##condition=(a5 eq zero) -; or a0,t1,a2 +; li t3,17 +; slli a0,a0,32 +; srli a2,a0,32 +; andi a4,t3,31 +; li a6,32 +; sub t3,a6,a4 +; sll t0,a2,a4 +; srl t2,a2,t3 +; select_reg a1,zero,t2##condition=(a4 eq zero) +; or a0,t0,a1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; slli t2, a0, 0x20 -; srli a1, t2, 0x20 -; addi a3, zero, 0x11 -; andi a5, a3, 0x1f -; addi a7, zero, 0x20 -; sub t4, a7, a5 -; sll t1, a1, a5 -; srl a0, a1, t4 -; beqz a5, 0xc -; ori a2, a0, 0 +; addi t3, zero, 0x11 +; slli a0, a0, 0x20 +; srli a2, a0, 0x20 +; andi a4, t3, 0x1f +; addi a6, zero, 0x20 +; sub t3, a6, a4 +; sll t0, a2, a4 +; srl t2, a2, t3 +; beqz a4, 0xc +; ori a1, t2, 0 ; j 8 -; ori a2, zero, 0 -; or a0, t1, a2 +; ori a1, zero, 0 +; or a0, t0, a1 ; ret function %f23(i16) -> i16 { @@ -727,33 +727,33 @@ block0(v0: i16): ; VCode: ; block0: -; slli t2,a0,48 -; srli a1,t2,48 -; li a3,10 -; andi a5,a3,15 -; li a7,16 -; sub t4,a7,a5 -; sll t1,a1,a5 -; srl a0,a1,t4 -; select_reg a2,zero,a0##condition=(a5 eq zero) -; or a0,t1,a2 +; li t3,10 +; slli a0,a0,48 +; srli a2,a0,48 +; andi a4,t3,15 +; li a6,16 +; sub t3,a6,a4 +; sll t0,a2,a4 +; srl t2,a2,t3 +; select_reg a1,zero,t2##condition=(a4 eq zero) +; or a0,t0,a1 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; slli t2, a0, 0x30 -; srli a1, t2, 0x30 -; addi a3, zero, 0xa -; andi a5, a3, 0xf -; addi a7, zero, 0x10 -; sub t4, a7, a5 -; sll t1, a1, a5 -; srl a0, a1, t4 -; beqz a5, 0xc -; ori a2, a0, 0 +; addi t3, zero, 0xa +; slli a0, a0, 0x30 +; srli a2, a0, 0x30 +; andi a4, t3, 0xf +; addi a6, zero, 0x10 +; sub t3, a6, a4 +; sll t0, a2, a4 +; srl t2, a2, t3 +; beqz a4, 0xc +; ori a1, t2, 0 ; j 8 -; ori a2, zero, 0 -; or a0, t1, a2 +; ori a1, zero, 0 +; or a0, t0, a1 ; ret function %f24(i8) -> i8 { @@ -765,31 +765,31 @@ block0(v0: i8): ; VCode: ; block0: -; andi t2,a0,255 -; li a1,3 -; andi a3,a1,7 -; li a5,8 -; sub a7,a5,a3 -; sll t4,t2,a3 -; srl t1,t2,a7 -; select_reg a0,zero,t1##condition=(a3 eq zero) -; or a0,t4,a0 +; li a7,3 +; andi a0,a0,255 +; andi a2,a7,7 +; li a4,8 +; sub a6,a4,a2 +; sll t3,a0,a2 +; srl t0,a0,a6 +; select_reg t2,zero,t0##condition=(a2 eq zero) +; or a0,t3,t2 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; andi t2, a0, 0xff -; addi a1, zero, 3 -; andi a3, a1, 7 -; addi a5, zero, 8 -; sub a7, a5, a3 -; sll t4, t2, a3 -; srl t1, t2, a7 -; beqz a3, 0xc -; ori a0, t1, 0 +; addi a7, zero, 3 +; andi a0, a0, 0xff +; andi a2, a7, 7 +; addi a4, zero, 8 +; sub a6, a4, a2 +; sll t3, a0, a2 +; srl t0, a0, a6 +; beqz a2, 0xc +; ori t2, t0, 0 ; j 8 -; ori a0, zero, 0 -; or a0, t4, a0 +; ori t2, zero, 0 +; or a0, t3, t2 ; ret function %f25(i64) -> i64 { diff --git a/cranelift/filetests/filetests/isa/riscv64/stack.clif b/cranelift/filetests/filetests/isa/riscv64/stack.clif index 6ad38bb1ec24..06458298b98a 100644 --- a/cranelift/filetests/filetests/isa/riscv64/stack.clif +++ b/cranelift/filetests/filetests/isa/riscv64/stack.clif @@ -448,157 +448,179 @@ block0(v0: i8): ; sd s9,-72(sp) ; sd s10,-80(sp) ; sd s11,-88(sp) -; add sp,-1280 +; add sp,-1360 ; block0: ; sd a0,1000(nominal_sp) -; li t3,2 -; addi t1,t3,1 -; sd t1,1176(nominal_sp) -; li t3,4 -; addi t2,t3,3 -; sd t2,1168(nominal_sp) -; li t3,6 -; addi a1,t3,5 -; sd a1,1160(nominal_sp) -; li t3,8 -; addi a2,t3,7 -; sd a2,1152(nominal_sp) -; li t3,10 -; addi a3,t3,9 -; sd a3,1144(nominal_sp) -; li t3,12 -; addi a4,t3,11 -; sd a4,1136(nominal_sp) -; li t3,14 -; addi a5,t3,13 -; sd a5,1128(nominal_sp) -; li t3,16 -; addi a6,t3,15 -; sd a6,1120(nominal_sp) -; li t3,18 -; addi a7,t3,17 -; sd a7,1112(nominal_sp) -; li t3,20 -; addi t3,t3,19 -; sd t3,1104(nominal_sp) -; li t3,22 -; addi t4,t3,21 -; sd t4,1096(nominal_sp) +; li t0,2 +; sd t0,1008(nominal_sp) +; li t0,4 +; li t1,6 +; li t2,8 +; li a1,10 +; li a2,12 +; li a3,14 +; li a4,16 +; li a5,18 +; li a6,20 +; li a7,22 ; li t3,24 -; addi s6,t3,23 -; sd s6,1088(nominal_sp) -; li t3,26 -; addi s7,t3,25 -; sd s7,1080(nominal_sp) -; li t3,28 -; addi s8,t3,27 -; sd s8,1072(nominal_sp) -; li t3,30 -; addi s9,t3,29 -; sd s9,1064(nominal_sp) -; li t3,32 -; addi s10,t3,31 -; sd s10,1056(nominal_sp) -; li t3,34 -; addi s11,t3,33 -; sd s11,1048(nominal_sp) -; li t3,36 -; addi s1,t3,35 -; sd s1,1040(nominal_sp) -; li t3,38 -; addi s2,t3,37 -; sd s2,1032(nominal_sp) -; li t3,30 -; addi s3,t3,39 -; sd s3,1024(nominal_sp) -; li t3,32 -; addi s4,t3,31 -; sd s4,1016(nominal_sp) -; li t3,34 -; addi s5,t3,33 -; sd s5,1008(nominal_sp) -; li t3,36 -; addi s5,t3,35 -; li t3,38 -; addi a0,t3,37 -; li t3,30 -; addi t0,t3,39 -; li t3,32 -; addi t1,t3,31 -; li t3,34 -; addi t2,t3,33 -; li t3,36 -; addi a1,t3,35 -; li t3,38 -; addi a2,t3,37 -; li t3,30 -; addi a3,t3,39 -; li t3,32 -; addi a4,t3,31 -; li t3,34 -; addi a5,t3,33 -; li t3,36 -; addi a6,t3,35 -; li t3,38 -; addi a7,t3,37 -; ld t3,1176(nominal_sp) -; addi t3,t3,39 -; ld t4,1160(nominal_sp) -; ld s2,1168(nominal_sp) -; add t4,s2,t4 -; ld s9,1144(nominal_sp) -; ld s7,1152(nominal_sp) -; add s6,s7,s9 -; ld s3,1128(nominal_sp) -; ld s1,1136(nominal_sp) -; add s7,s1,s3 -; ld s8,1112(nominal_sp) -; ld s9,1120(nominal_sp) -; add s8,s9,s8 -; ld s2,1096(nominal_sp) -; ld s11,1104(nominal_sp) -; add s9,s11,s2 -; ld s10,1080(nominal_sp) -; ld s11,1088(nominal_sp) -; add s10,s11,s10 -; ld s1,1064(nominal_sp) +; li s5,26 +; li s6,28 +; li s7,30 +; li s8,32 +; li s9,34 +; li s10,36 +; li s11,38 +; li s1,30 +; li s2,32 +; li s3,34 +; li s4,36 +; li a0,38 +; li t4,30 +; sd t4,1256(nominal_sp) +; li t4,32 +; sd t4,1248(nominal_sp) +; li t4,34 +; sd t4,1240(nominal_sp) +; li t4,36 +; sd t4,1232(nominal_sp) +; li t4,38 +; sd t4,1224(nominal_sp) +; li t4,30 +; sd t4,1216(nominal_sp) +; li t4,32 +; sd t4,1208(nominal_sp) +; li t4,34 +; sd t4,1200(nominal_sp) +; li t4,36 +; sd t4,1192(nominal_sp) +; li t4,38 +; sd t4,1184(nominal_sp) +; ld t4,1008(nominal_sp) +; addi t4,t4,1 +; sd t4,1176(nominal_sp) +; addi t4,t0,3 +; sd t4,1168(nominal_sp) +; addi t4,t1,5 +; sd t4,1160(nominal_sp) +; addi t4,t2,7 +; sd t4,1152(nominal_sp) +; addi t4,a1,9 +; sd t4,1144(nominal_sp) +; addi t4,a2,11 +; sd t4,1136(nominal_sp) +; addi t4,a3,13 +; sd t4,1128(nominal_sp) +; addi t4,a4,15 +; sd t4,1120(nominal_sp) +; addi t4,a5,17 +; sd t4,1112(nominal_sp) +; addi t4,a6,19 +; sd t4,1104(nominal_sp) +; addi t4,a7,21 +; sd t4,1096(nominal_sp) +; addi t4,t3,23 +; sd t4,1088(nominal_sp) +; addi t4,s5,25 +; sd t4,1080(nominal_sp) +; addi t4,s6,27 +; sd t4,1072(nominal_sp) +; addi t4,s7,29 +; sd t4,1064(nominal_sp) +; addi t4,s8,31 +; sd t4,1056(nominal_sp) +; addi t4,s9,33 +; sd t4,1048(nominal_sp) +; addi t4,s10,35 +; sd t4,1040(nominal_sp) +; addi t4,s11,37 +; sd t4,1032(nominal_sp) +; addi t4,s1,39 +; sd t4,1024(nominal_sp) +; addi t4,s2,31 +; sd t4,1016(nominal_sp) +; addi t4,s3,33 +; sd t4,1008(nominal_sp) +; addi s4,s4,35 +; addi a0,a0,37 +; ld t4,1256(nominal_sp) +; addi t4,t4,39 +; ld t3,1248(nominal_sp) +; addi t0,t3,31 +; ld t1,1240(nominal_sp) +; addi t1,t1,33 +; ld a1,1232(nominal_sp) +; addi t2,a1,35 +; ld a4,1224(nominal_sp) +; addi a1,a4,37 +; ld a7,1216(nominal_sp) +; addi a2,a7,39 +; ld a3,1208(nominal_sp) +; addi a3,a3,31 +; ld a4,1200(nominal_sp) +; addi a4,a4,33 +; ld a5,1192(nominal_sp) +; addi a5,a5,35 +; ld a6,1184(nominal_sp) +; addi a6,a6,37 +; ld a7,1176(nominal_sp) +; addi a7,a7,39 +; ld t3,1160(nominal_sp) +; ld s11,1168(nominal_sp) +; add t3,s11,t3 +; ld s7,1144(nominal_sp) +; ld s5,1152(nominal_sp) +; add s5,s5,s7 +; ld s1,1128(nominal_sp) +; ld s10,1136(nominal_sp) +; add s6,s10,s1 +; ld s7,1112(nominal_sp) +; ld s8,1120(nominal_sp) +; add s7,s8,s7 +; ld s11,1096(nominal_sp) +; ld s9,1104(nominal_sp) +; add s8,s9,s11 +; ld s9,1080(nominal_sp) +; ld s3,1088(nominal_sp) +; add s9,s3,s9 +; ld s10,1064(nominal_sp) ; ld s11,1072(nominal_sp) -; add s11,s11,s1 -; ld s1,1048(nominal_sp) -; ld s4,1056(nominal_sp) -; add s1,s4,s1 -; ld s2,1032(nominal_sp) -; ld s3,1040(nominal_sp) -; add s2,s3,s2 -; ld s4,1016(nominal_sp) -; ld s3,1024(nominal_sp) +; add s10,s11,s10 +; ld s11,1048(nominal_sp) +; ld s2,1056(nominal_sp) +; add s11,s2,s11 +; ld s1,1032(nominal_sp) +; ld s2,1040(nominal_sp) +; add s1,s2,s1 +; ld s3,1016(nominal_sp) +; ld s2,1024(nominal_sp) +; add s2,s2,s3 +; ld s3,1008(nominal_sp) ; add s3,s3,s4 -; ld s4,1008(nominal_sp) -; add s5,s4,s5 -; add t0,a0,t0 -; add t1,t1,t2 +; add t4,a0,t4 +; add t0,t0,t1 +; add t1,t2,a1 +; add t2,a2,a3 +; add a0,a4,a5 +; add a1,a6,a7 +; add a2,t3,s5 +; add a3,s6,s7 +; add a4,s8,s9 +; add a5,s10,s11 +; add a6,s1,s2 +; add t4,s3,t4 +; add t0,t0,t1 +; add t1,t2,a0 ; add t2,a1,a2 ; add a0,a3,a4 ; add a1,a5,a6 -; add a2,a7,t3 -; add t4,t4,s6 -; add a3,s7,s8 -; add a4,s9,s10 -; add a5,s11,s1 -; add a6,s2,s3 -; add t0,s5,t0 -; add t1,t1,t2 -; add t2,a0,a1 -; add t4,a2,t4 -; add a0,a3,a4 -; add a1,a5,a6 -; add t0,t0,t1 -; add t4,t2,t4 +; add t4,t4,t0 +; add t0,t1,t2 ; add t1,a0,a1 -; add t4,t0,t4 +; add t4,t4,t0 ; add a1,t1,t4 ; ld a0,1000(nominal_sp) -; add sp,+1280 +; add sp,+1360 ; ld s1,-8(sp) ; ld s2,-16(sp) ; ld s3,-24(sp) @@ -632,157 +654,179 @@ block0(v0: i8): ; sd s9, -0x48(sp) ; sd s10, -0x50(sp) ; sd s11, -0x58(sp) -; addi sp, sp, -0x500 +; addi sp, sp, -0x550 ; block1: ; offset 0x40 ; sd a0, 0x3e8(sp) -; addi t3, zero, 2 -; addi t1, t3, 1 -; sd t1, 0x498(sp) -; addi t3, zero, 4 -; addi t2, t3, 3 -; sd t2, 0x490(sp) -; addi t3, zero, 6 -; addi a1, t3, 5 -; sd a1, 0x488(sp) -; addi t3, zero, 8 -; addi a2, t3, 7 -; sd a2, 0x480(sp) -; addi t3, zero, 0xa -; addi a3, t3, 9 -; sd a3, 0x478(sp) -; addi t3, zero, 0xc -; addi a4, t3, 0xb -; sd a4, 0x470(sp) -; addi t3, zero, 0xe -; addi a5, t3, 0xd -; sd a5, 0x468(sp) -; addi t3, zero, 0x10 -; addi a6, t3, 0xf -; sd a6, 0x460(sp) -; addi t3, zero, 0x12 -; addi a7, t3, 0x11 -; sd a7, 0x458(sp) -; addi t3, zero, 0x14 -; addi t3, t3, 0x13 -; sd t3, 0x450(sp) -; addi t3, zero, 0x16 -; addi t4, t3, 0x15 -; sd t4, 0x448(sp) +; addi t0, zero, 2 +; sd t0, 0x3f0(sp) +; addi t0, zero, 4 +; addi t1, zero, 6 +; addi t2, zero, 8 +; addi a1, zero, 0xa +; addi a2, zero, 0xc +; addi a3, zero, 0xe +; addi a4, zero, 0x10 +; addi a5, zero, 0x12 +; addi a6, zero, 0x14 +; addi a7, zero, 0x16 ; addi t3, zero, 0x18 -; addi s6, t3, 0x17 -; sd s6, 0x440(sp) -; addi t3, zero, 0x1a -; addi s7, t3, 0x19 -; sd s7, 0x438(sp) -; addi t3, zero, 0x1c -; addi s8, t3, 0x1b -; sd s8, 0x430(sp) -; addi t3, zero, 0x1e -; addi s9, t3, 0x1d -; sd s9, 0x428(sp) -; addi t3, zero, 0x20 -; addi s10, t3, 0x1f -; sd s10, 0x420(sp) -; addi t3, zero, 0x22 -; addi s11, t3, 0x21 -; sd s11, 0x418(sp) -; addi t3, zero, 0x24 -; addi s1, t3, 0x23 -; sd s1, 0x410(sp) -; addi t3, zero, 0x26 -; addi s2, t3, 0x25 -; sd s2, 0x408(sp) -; addi t3, zero, 0x1e -; addi s3, t3, 0x27 -; sd s3, 0x400(sp) -; addi t3, zero, 0x20 -; addi s4, t3, 0x1f -; sd s4, 0x3f8(sp) -; addi t3, zero, 0x22 -; addi s5, t3, 0x21 -; sd s5, 0x3f0(sp) -; addi t3, zero, 0x24 -; addi s5, t3, 0x23 -; addi t3, zero, 0x26 -; addi a0, t3, 0x25 -; addi t3, zero, 0x1e -; addi t0, t3, 0x27 -; addi t3, zero, 0x20 -; addi t1, t3, 0x1f -; addi t3, zero, 0x22 -; addi t2, t3, 0x21 -; addi t3, zero, 0x24 -; addi a1, t3, 0x23 -; addi t3, zero, 0x26 -; addi a2, t3, 0x25 -; addi t3, zero, 0x1e -; addi a3, t3, 0x27 -; addi t3, zero, 0x20 -; addi a4, t3, 0x1f -; addi t3, zero, 0x22 -; addi a5, t3, 0x21 -; addi t3, zero, 0x24 -; addi a6, t3, 0x23 -; addi t3, zero, 0x26 -; addi a7, t3, 0x25 -; ld t3, 0x498(sp) -; addi t3, t3, 0x27 -; ld t4, 0x488(sp) -; ld s2, 0x490(sp) -; add t4, s2, t4 -; ld s9, 0x478(sp) -; ld s7, 0x480(sp) -; add s6, s7, s9 -; ld s3, 0x468(sp) -; ld s1, 0x470(sp) -; add s7, s1, s3 -; ld s8, 0x458(sp) -; ld s9, 0x460(sp) -; add s8, s9, s8 -; ld s2, 0x448(sp) -; ld s11, 0x450(sp) -; add s9, s11, s2 -; ld s10, 0x438(sp) -; ld s11, 0x440(sp) -; add s10, s11, s10 -; ld s1, 0x428(sp) +; addi s5, zero, 0x1a +; addi s6, zero, 0x1c +; addi s7, zero, 0x1e +; addi s8, zero, 0x20 +; addi s9, zero, 0x22 +; addi s10, zero, 0x24 +; addi s11, zero, 0x26 +; addi s1, zero, 0x1e +; addi s2, zero, 0x20 +; addi s3, zero, 0x22 +; addi s4, zero, 0x24 +; addi a0, zero, 0x26 +; addi t4, zero, 0x1e +; sd t4, 0x4e8(sp) +; addi t4, zero, 0x20 +; sd t4, 0x4e0(sp) +; addi t4, zero, 0x22 +; sd t4, 0x4d8(sp) +; addi t4, zero, 0x24 +; sd t4, 0x4d0(sp) +; addi t4, zero, 0x26 +; sd t4, 0x4c8(sp) +; addi t4, zero, 0x1e +; sd t4, 0x4c0(sp) +; addi t4, zero, 0x20 +; sd t4, 0x4b8(sp) +; addi t4, zero, 0x22 +; sd t4, 0x4b0(sp) +; addi t4, zero, 0x24 +; sd t4, 0x4a8(sp) +; addi t4, zero, 0x26 +; sd t4, 0x4a0(sp) +; ld t4, 0x3f0(sp) +; addi t4, t4, 1 +; sd t4, 0x498(sp) +; addi t4, t0, 3 +; sd t4, 0x490(sp) +; addi t4, t1, 5 +; sd t4, 0x488(sp) +; addi t4, t2, 7 +; sd t4, 0x480(sp) +; addi t4, a1, 9 +; sd t4, 0x478(sp) +; addi t4, a2, 0xb +; sd t4, 0x470(sp) +; addi t4, a3, 0xd +; sd t4, 0x468(sp) +; addi t4, a4, 0xf +; sd t4, 0x460(sp) +; addi t4, a5, 0x11 +; sd t4, 0x458(sp) +; addi t4, a6, 0x13 +; sd t4, 0x450(sp) +; addi t4, a7, 0x15 +; sd t4, 0x448(sp) +; addi t4, t3, 0x17 +; sd t4, 0x440(sp) +; addi t4, s5, 0x19 +; sd t4, 0x438(sp) +; addi t4, s6, 0x1b +; sd t4, 0x430(sp) +; addi t4, s7, 0x1d +; sd t4, 0x428(sp) +; addi t4, s8, 0x1f +; sd t4, 0x420(sp) +; addi t4, s9, 0x21 +; sd t4, 0x418(sp) +; addi t4, s10, 0x23 +; sd t4, 0x410(sp) +; addi t4, s11, 0x25 +; sd t4, 0x408(sp) +; addi t4, s1, 0x27 +; sd t4, 0x400(sp) +; addi t4, s2, 0x1f +; sd t4, 0x3f8(sp) +; addi t4, s3, 0x21 +; sd t4, 0x3f0(sp) +; addi s4, s4, 0x23 +; addi a0, a0, 0x25 +; ld t4, 0x4e8(sp) +; addi t4, t4, 0x27 +; ld t3, 0x4e0(sp) +; addi t0, t3, 0x1f +; ld t1, 0x4d8(sp) +; addi t1, t1, 0x21 +; ld a1, 0x4d0(sp) +; addi t2, a1, 0x23 +; ld a4, 0x4c8(sp) +; addi a1, a4, 0x25 +; ld a7, 0x4c0(sp) +; addi a2, a7, 0x27 +; ld a3, 0x4b8(sp) +; addi a3, a3, 0x1f +; ld a4, 0x4b0(sp) +; addi a4, a4, 0x21 +; ld a5, 0x4a8(sp) +; addi a5, a5, 0x23 +; ld a6, 0x4a0(sp) +; addi a6, a6, 0x25 +; ld a7, 0x498(sp) +; addi a7, a7, 0x27 +; ld t3, 0x488(sp) +; ld s11, 0x490(sp) +; add t3, s11, t3 +; ld s7, 0x478(sp) +; ld s5, 0x480(sp) +; add s5, s5, s7 +; ld s1, 0x468(sp) +; ld s10, 0x470(sp) +; add s6, s10, s1 +; ld s7, 0x458(sp) +; ld s8, 0x460(sp) +; add s7, s8, s7 +; ld s11, 0x448(sp) +; ld s9, 0x450(sp) +; add s8, s9, s11 +; ld s9, 0x438(sp) +; ld s3, 0x440(sp) +; add s9, s3, s9 +; ld s10, 0x428(sp) ; ld s11, 0x430(sp) -; add s11, s11, s1 -; ld s1, 0x418(sp) -; ld s4, 0x420(sp) -; add s1, s4, s1 -; ld s2, 0x408(sp) -; ld s3, 0x410(sp) -; add s2, s3, s2 -; ld s4, 0x3f8(sp) -; ld s3, 0x400(sp) +; add s10, s11, s10 +; ld s11, 0x418(sp) +; ld s2, 0x420(sp) +; add s11, s2, s11 +; ld s1, 0x408(sp) +; ld s2, 0x410(sp) +; add s1, s2, s1 +; ld s3, 0x3f8(sp) +; ld s2, 0x400(sp) +; add s2, s2, s3 +; ld s3, 0x3f0(sp) ; add s3, s3, s4 -; ld s4, 0x3f0(sp) -; add s5, s4, s5 -; add t0, a0, t0 -; add t1, t1, t2 +; add t4, a0, t4 +; add t0, t0, t1 +; add t1, t2, a1 +; add t2, a2, a3 +; add a0, a4, a5 +; add a1, a6, a7 +; add a2, t3, s5 +; add a3, s6, s7 +; add a4, s8, s9 +; add a5, s10, s11 +; add a6, s1, s2 +; add t4, s3, t4 +; add t0, t0, t1 +; add t1, t2, a0 ; add t2, a1, a2 ; add a0, a3, a4 ; add a1, a5, a6 -; add a2, a7, t3 -; add t4, t4, s6 -; add a3, s7, s8 -; add a4, s9, s10 -; add a5, s11, s1 -; add a6, s2, s3 -; add t0, s5, t0 -; add t1, t1, t2 -; add t2, a0, a1 -; add t4, a2, t4 -; add a0, a3, a4 -; add a1, a5, a6 -; add t0, t0, t1 -; add t4, t2, t4 +; add t4, t4, t0 +; add t0, t1, t2 ; add t1, a0, a1 -; add t4, t0, t4 +; add t4, t4, t0 ; add a1, t1, t4 ; ld a0, 0x3e8(sp) -; addi sp, sp, 0x500 +; addi sp, sp, 0x550 ; ld s1, -8(sp) ; ld s2, -0x10(sp) ; ld s3, -0x18(sp) diff --git a/cranelift/filetests/filetests/isa/riscv64/traps.clif b/cranelift/filetests/filetests/isa/riscv64/traps.clif index 8333d2169395..bdd6ede18a5f 100644 --- a/cranelift/filetests/filetests/isa/riscv64/traps.clif +++ b/cranelift/filetests/filetests/isa/riscv64/traps.clif @@ -25,9 +25,9 @@ block0(v0: i64): ; VCode: ; block0: -; li t2,42 -; eq a1,a0,t2##ty=i64 -; bne a1,zero,taken(label2),not_taken(label1) +; li a1,42 +; eq a0,a0,a1##ty=i64 +; bne a0,zero,taken(label2),not_taken(label1) ; block1: ; ret ; block2: @@ -35,12 +35,12 @@ block0(v0: i64): ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, 0x2a -; bne a0, t2, 0xc -; addi a1, zero, 1 +; addi a1, zero, 0x2a +; bne a0, a1, 0xc +; addi a0, zero, 1 ; j 8 -; mv a1, zero -; bnez a1, 8 +; mv a0, zero +; bnez a0, 8 ; block1: ; offset 0x18 ; ret ; block2: ; offset 0x1c diff --git a/cranelift/filetests/filetests/isa/riscv64/uadd_overflow_trap.clif b/cranelift/filetests/filetests/isa/riscv64/uadd_overflow_trap.clif index a38449e264a6..d1ba180c4628 100644 --- a/cranelift/filetests/filetests/isa/riscv64/uadd_overflow_trap.clif +++ b/cranelift/filetests/filetests/isa/riscv64/uadd_overflow_trap.clif @@ -10,26 +10,26 @@ block0(v0: i32): ; VCode: ; block0: -; li t2,127 -; slli a1,a0,32 -; srli a3,a1,32 -; slli a5,t2,32 -; srli a7,a5,32 -; add a0,a3,a7 -; srli t1,a0,32 -; trap_if t1,user0 +; li a5,127 +; slli a0,a0,32 +; srli a2,a0,32 +; slli a4,a5,32 +; srli a6,a4,32 +; add a0,a2,a6 +; srli t0,a0,32 +; trap_if t0,user0 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, 0x7f -; slli a1, a0, 0x20 -; srli a3, a1, 0x20 -; slli a5, t2, 0x20 -; srli a7, a5, 0x20 -; add a0, a3, a7 -; srli t1, a0, 0x20 -; beqz t1, 8 +; addi a5, zero, 0x7f +; slli a0, a0, 0x20 +; srli a2, a0, 0x20 +; slli a4, a5, 0x20 +; srli a6, a4, 0x20 +; add a0, a2, a6 +; srli t0, a0, 0x20 +; beqz t0, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: user0 ; ret @@ -42,26 +42,26 @@ block0(v0: i32): ; VCode: ; block0: -; li t2,127 -; slli a1,t2,32 -; srli a3,a1,32 -; slli a5,a0,32 -; srli a7,a5,32 -; add a0,a3,a7 -; srli t1,a0,32 -; trap_if t1,user0 +; li a5,127 +; slli a1,a5,32 +; srli a2,a1,32 +; slli a4,a0,32 +; srli a6,a4,32 +; add a0,a2,a6 +; srli t0,a0,32 +; trap_if t0,user0 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, 0x7f -; slli a1, t2, 0x20 -; srli a3, a1, 0x20 -; slli a5, a0, 0x20 -; srli a7, a5, 0x20 -; add a0, a3, a7 -; srli t1, a0, 0x20 -; beqz t1, 8 +; addi a5, zero, 0x7f +; slli a1, a5, 0x20 +; srli a2, a1, 0x20 +; slli a4, a0, 0x20 +; srli a6, a4, 0x20 +; add a0, a2, a6 +; srli t0, a0, 0x20 +; beqz t0, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: user0 ; ret @@ -104,22 +104,22 @@ block0(v0: i64): ; VCode: ; block0: ; mv a4,a0 -; li t2,127 -; add a0,a4,t2 -; ult a3,a0,a4##ty=i64 -; trap_if a3,user0 +; li a1,127 +; add a0,a4,a1 +; ult a2,a0,a4##ty=i64 +; trap_if a2,user0 ; ret ; ; Disassembled: ; block0: ; offset 0x0 ; ori a4, a0, 0 -; addi t2, zero, 0x7f -; add a0, a4, t2 +; addi a1, zero, 0x7f +; add a0, a4, a1 ; bgeu a0, a4, 0xc -; addi a3, zero, 1 +; addi a2, zero, 1 ; j 8 -; mv a3, zero -; beqz a3, 8 +; mv a2, zero +; beqz a2, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: user0 ; ret @@ -132,21 +132,21 @@ block0(v0: i64): ; VCode: ; block0: -; li t2,127 -; add a0,t2,a0 -; ult a3,a0,t2##ty=i64 -; trap_if a3,user0 +; li a1,127 +; add a0,a1,a0 +; ult a2,a0,a1##ty=i64 +; trap_if a2,user0 ; ret ; ; Disassembled: ; block0: ; offset 0x0 -; addi t2, zero, 0x7f -; add a0, t2, a0 -; bgeu a0, t2, 0xc -; addi a3, zero, 1 +; addi a1, zero, 0x7f +; add a0, a1, a0 +; bgeu a0, a1, 0xc +; addi a2, zero, 1 ; j 8 -; mv a3, zero -; beqz a3, 8 +; mv a2, zero +; beqz a2, 8 ; .byte 0x00, 0x00, 0x00, 0x00 ; trap: user0 ; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 57e9f1583e21..74495be63ed0 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -44,17 +44,17 @@ ;; slli t0,a0,32 ;; srli t2,t0,32 ;; ld t1,8(a2) -;; lui t0,1048575 -;; addi t0,t0,4092 -;; add a0,t1,t0 -;; ugt t1,t2,a0##ty=i64 +;; lui a0,1048575 +;; addi a0,a0,4092 +;; add t1,t1,a0 +;; ugt t1,t2,t1##ty=i64 ;; bne t1,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a0,0(a2) ;; add t2,a0,t2 -;; lui t1,1 -;; add a0,t2,t1 -;; sw a1,0(a0) +;; lui a0,1 +;; add t2,t2,a0 +;; sw a1,0(t2) ;; j label2 ;; block2: ;; ret @@ -66,17 +66,17 @@ ;; slli t0,a0,32 ;; srli t2,t0,32 ;; ld t1,8(a1) -;; lui t0,1048575 -;; addi t0,t0,4092 -;; add a0,t1,t0 -;; ugt t1,t2,a0##ty=i64 +;; lui a0,1048575 +;; addi a0,a0,4092 +;; add t1,t1,a0 +;; ugt t1,t2,t1##ty=i64 ;; bne t1,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a0,0(a1) ;; add t2,a0,t2 -;; lui t1,1 -;; add a0,t2,t1 -;; lw a0,0(a0) +;; lui a0,1 +;; add t2,t2,a0 +;; lw a0,0(t2) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 80212f3e5a00..820e72762fd6 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -43,19 +43,19 @@ ;; block0: ;; slli t0,a0,32 ;; srli t2,t0,32 -;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0004 -;; add t1,t2,t4 -;; ult a0,t1,t2##ty=i64 +;; auipc t1,0; ld t1,12(t1); j 12; .8byte 0xffff0004 +;; add t0,t2,t1 +;; ult a0,t0,t2##ty=i64 ;; trap_if a0,heap_oob ;; ld a0,8(a2) -;; ugt a0,t1,a0##ty=i64 +;; ugt a0,t0,a0##ty=i64 ;; bne a0,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a0,0(a2) ;; add a0,a0,t2 -;; auipc t2,0; ld t2,12(t2); j 12; .8byte 0xffff0000 -;; add a2,a0,t2 -;; sw a1,0(a2) +;; auipc a2,0; ld a2,12(a2); j 12; .8byte 0xffff0000 +;; add a0,a0,a2 +;; sw a1,0(a0) ;; j label2 ;; block2: ;; ret @@ -66,19 +66,19 @@ ;; block0: ;; slli t0,a0,32 ;; srli t2,t0,32 -;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0004 -;; add t1,t2,t4 -;; ult a0,t1,t2##ty=i64 +;; auipc t1,0; ld t1,12(t1); j 12; .8byte 0xffff0004 +;; add t0,t2,t1 +;; ult a0,t0,t2##ty=i64 ;; trap_if a0,heap_oob ;; ld a0,8(a1) -;; ugt a0,t1,a0##ty=i64 +;; ugt a0,t0,a0##ty=i64 ;; bne a0,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a0,0(a1) ;; add a0,a0,t2 -;; auipc t2,0; ld t2,12(t2); j 12; .8byte 0xffff0000 -;; add a1,a0,t2 -;; lw a0,0(a1) +;; auipc a1,0; ld a1,12(a1); j 12; .8byte 0xffff0000 +;; add a0,a0,a1 +;; lw a0,0(a0) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index 9b4bd0f79eac..3cd1a6b88803 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -44,17 +44,17 @@ ;; slli t0,a0,32 ;; srli t2,t0,32 ;; ld t1,8(a2) -;; lui t0,1048575 -;; addi t0,t0,4095 -;; add a0,t1,t0 -;; ugt t1,t2,a0##ty=i64 +;; lui a0,1048575 +;; addi a0,a0,4095 +;; add t1,t1,a0 +;; ugt t1,t2,t1##ty=i64 ;; bne t1,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a0,0(a2) ;; add t2,a0,t2 -;; lui t1,1 -;; add a0,t2,t1 -;; sb a1,0(a0) +;; lui a0,1 +;; add t2,t2,a0 +;; sb a1,0(t2) ;; j label2 ;; block2: ;; ret @@ -66,17 +66,17 @@ ;; slli t0,a0,32 ;; srli t2,t0,32 ;; ld t1,8(a1) -;; lui t0,1048575 -;; addi t0,t0,4095 -;; add a0,t1,t0 -;; ugt t1,t2,a0##ty=i64 +;; lui a0,1048575 +;; addi a0,a0,4095 +;; add t1,t1,a0 +;; ugt t1,t2,t1##ty=i64 ;; bne t1,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a0,0(a1) ;; add t2,a0,t2 -;; lui t1,1 -;; add a0,t2,t1 -;; lbu a0,0(a0) +;; lui a0,1 +;; add t2,t2,a0 +;; lbu a0,0(t2) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index dfabd0aad63f..3318a9b1d6a1 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -43,19 +43,19 @@ ;; block0: ;; slli t0,a0,32 ;; srli t2,t0,32 -;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0001 -;; add t1,t2,t4 -;; ult a0,t1,t2##ty=i64 +;; auipc t1,0; ld t1,12(t1); j 12; .8byte 0xffff0001 +;; add t0,t2,t1 +;; ult a0,t0,t2##ty=i64 ;; trap_if a0,heap_oob ;; ld a0,8(a2) -;; ugt a0,t1,a0##ty=i64 +;; ugt a0,t0,a0##ty=i64 ;; bne a0,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a0,0(a2) ;; add a0,a0,t2 -;; auipc t2,0; ld t2,12(t2); j 12; .8byte 0xffff0000 -;; add a2,a0,t2 -;; sb a1,0(a2) +;; auipc a2,0; ld a2,12(a2); j 12; .8byte 0xffff0000 +;; add a0,a0,a2 +;; sb a1,0(a0) ;; j label2 ;; block2: ;; ret @@ -66,19 +66,19 @@ ;; block0: ;; slli t0,a0,32 ;; srli t2,t0,32 -;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0001 -;; add t1,t2,t4 -;; ult a0,t1,t2##ty=i64 +;; auipc t1,0; ld t1,12(t1); j 12; .8byte 0xffff0001 +;; add t0,t2,t1 +;; ult a0,t0,t2##ty=i64 ;; trap_if a0,heap_oob ;; ld a0,8(a1) -;; ugt a0,t1,a0##ty=i64 +;; ugt a0,t0,a0##ty=i64 ;; bne a0,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a0,0(a1) ;; add a0,a0,t2 -;; auipc t2,0; ld t2,12(t2); j 12; .8byte 0xffff0000 -;; add a1,a0,t2 -;; lbu a0,0(a1) +;; auipc a1,0; ld a1,12(a1); j 12; .8byte 0xffff0000 +;; add a0,a0,a1 +;; lbu a0,0(a0) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat index 33145c676509..3e5fda406a2f 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -47,10 +47,10 @@ ;; addi t4,t4,-4 ;; ld t1,0(a2) ;; add t1,t1,t0 -;; ugt t3,t0,t4##ty=i64 -;; li t0,0 -;; selectif_spectre_guard t4,t0,t1##test=t3 -;; sw a1,0(t4) +;; li t2,0 +;; ugt t4,t0,t4##ty=i64 +;; selectif_spectre_guard t0,t2,t1##test=t4 +;; sw a1,0(t0) ;; j label1 ;; block1: ;; ret @@ -63,10 +63,10 @@ ;; addi t4,t4,-4 ;; ld t1,0(a1) ;; add t1,t1,t0 -;; ugt t3,t0,t4##ty=i64 -;; li t0,0 -;; selectif_spectre_guard t4,t0,t1##test=t3 -;; lw a0,0(t4) +;; li t2,0 +;; ugt t4,t0,t4##ty=i64 +;; selectif_spectre_guard t0,t2,t1##test=t4 +;; lw a0,0(t0) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index b0577f4e0827..79bda6806405 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -44,17 +44,17 @@ ;; slli t2,a0,32 ;; srli a3,t2,32 ;; ld a0,8(a2) -;; lui t2,1048575 -;; addi t2,t2,4092 -;; add a4,a0,t2 -;; ld a0,0(a2) -;; add a0,a0,a3 -;; lui t2,1 -;; add a2,a0,t2 -;; ugt t2,a3,a4##ty=i64 -;; li a3,0 -;; selectif_spectre_guard a0,a3,a2##test=t2 -;; sw a1,0(a0) +;; lui a4,1048575 +;; addi a4,a4,4092 +;; add a0,a0,a4 +;; ld a2,0(a2) +;; add a2,a2,a3 +;; lui a4,1 +;; add a2,a2,a4 +;; li a4,0 +;; ugt a0,a3,a0##ty=i64 +;; selectif_spectre_guard a3,a4,a2##test=a0 +;; sw a1,0(a3) ;; j label1 ;; block1: ;; ret @@ -64,17 +64,17 @@ ;; slli t2,a0,32 ;; srli a2,t2,32 ;; ld a0,8(a1) -;; lui t2,1048575 -;; addi t2,t2,4092 -;; add a3,a0,t2 -;; ld a0,0(a1) -;; add a0,a0,a2 -;; lui t2,1 -;; add a1,a0,t2 -;; ugt t2,a2,a3##ty=i64 -;; li a2,0 -;; selectif_spectre_guard a0,a2,a1##test=t2 -;; lw a0,0(a0) +;; lui a3,1048575 +;; addi a3,a3,4092 +;; add a0,a0,a3 +;; ld a1,0(a1) +;; add a1,a1,a2 +;; lui a3,1 +;; add a1,a1,a3 +;; li a3,0 +;; ugt a0,a2,a0##ty=i64 +;; selectif_spectre_guard a2,a3,a1##test=a0 +;; lw a0,0(a2) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index edfaf3150164..c6e94565290f 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -43,19 +43,19 @@ ;; block0: ;; slli t2,a0,32 ;; srli a3,t2,32 -;; auipc t1,0; ld t1,12(t1); j 12; .8byte 0xffff0004 -;; add a0,a3,t1 -;; ult a4,a0,a3##ty=i64 +;; auipc a0,0; ld a0,12(a0); j 12; .8byte 0xffff0004 +;; add t2,a3,a0 +;; ult a4,t2,a3##ty=i64 ;; trap_if a4,heap_oob ;; ld a4,8(a2) ;; ld a2,0(a2) ;; add a2,a2,a3 ;; auipc a3,0; ld a3,12(a3); j 12; .8byte 0xffff0000 ;; add a2,a2,a3 -;; ugt a0,a0,a4##ty=i64 ;; li a3,0 -;; selectif_spectre_guard a4,a3,a2##test=a0 -;; sw a1,0(a4) +;; ugt a4,t2,a4##ty=i64 +;; selectif_spectre_guard a5,a3,a2##test=a4 +;; sw a1,0(a5) ;; j label1 ;; block1: ;; ret @@ -64,19 +64,19 @@ ;; block0: ;; slli t2,a0,32 ;; srli a2,t2,32 -;; auipc t1,0; ld t1,12(t1); j 12; .8byte 0xffff0004 -;; add a0,a2,t1 -;; ult a3,a0,a2##ty=i64 +;; auipc a0,0; ld a0,12(a0); j 12; .8byte 0xffff0004 +;; add t2,a2,a0 +;; ult a3,t2,a2##ty=i64 ;; trap_if a3,heap_oob ;; ld a3,8(a1) ;; ld a1,0(a1) ;; add a1,a1,a2 ;; auipc a2,0; ld a2,12(a2); j 12; .8byte 0xffff0000 -;; add a2,a1,a2 -;; ugt a0,a0,a3##ty=i64 -;; li a3,0 -;; selectif_spectre_guard a1,a3,a2##test=a0 -;; lw a0,0(a1) +;; add a1,a1,a2 +;; li a2,0 +;; ugt a3,t2,a3##ty=i64 +;; selectif_spectre_guard a4,a2,a1##test=a3 +;; lw a0,0(a4) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat index 3b74cdf970ad..2f91d75f152f 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -46,10 +46,10 @@ ;; ld t3,8(a2) ;; ld t0,0(a2) ;; add t0,t0,t4 -;; uge a7,t4,t3##ty=i64 -;; li t4,0 -;; selectif_spectre_guard t3,t4,t0##test=a7 -;; sb a1,0(t3) +;; li t1,0 +;; uge t3,t4,t3##ty=i64 +;; selectif_spectre_guard t4,t1,t0##test=t3 +;; sb a1,0(t4) ;; j label1 ;; block1: ;; ret @@ -61,10 +61,10 @@ ;; ld t3,8(a1) ;; ld t0,0(a1) ;; add t0,t0,t4 -;; uge a7,t4,t3##ty=i64 -;; li t4,0 -;; selectif_spectre_guard t3,t4,t0##test=a7 -;; lbu a0,0(t3) +;; li t1,0 +;; uge t3,t4,t3##ty=i64 +;; selectif_spectre_guard t4,t1,t0##test=t3 +;; lbu a0,0(t4) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 8857e87807b7..06f9bb58ccce 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -44,17 +44,17 @@ ;; slli t2,a0,32 ;; srli a3,t2,32 ;; ld a0,8(a2) -;; lui t2,1048575 -;; addi t2,t2,4095 -;; add a4,a0,t2 -;; ld a0,0(a2) -;; add a0,a0,a3 -;; lui t2,1 -;; add a2,a0,t2 -;; ugt t2,a3,a4##ty=i64 -;; li a3,0 -;; selectif_spectre_guard a0,a3,a2##test=t2 -;; sb a1,0(a0) +;; lui a4,1048575 +;; addi a4,a4,4095 +;; add a0,a0,a4 +;; ld a2,0(a2) +;; add a2,a2,a3 +;; lui a4,1 +;; add a2,a2,a4 +;; li a4,0 +;; ugt a0,a3,a0##ty=i64 +;; selectif_spectre_guard a3,a4,a2##test=a0 +;; sb a1,0(a3) ;; j label1 ;; block1: ;; ret @@ -64,17 +64,17 @@ ;; slli t2,a0,32 ;; srli a2,t2,32 ;; ld a0,8(a1) -;; lui t2,1048575 -;; addi t2,t2,4095 -;; add a3,a0,t2 -;; ld a0,0(a1) -;; add a0,a0,a2 -;; lui t2,1 -;; add a1,a0,t2 -;; ugt t2,a2,a3##ty=i64 -;; li a2,0 -;; selectif_spectre_guard a0,a2,a1##test=t2 -;; lbu a0,0(a0) +;; lui a3,1048575 +;; addi a3,a3,4095 +;; add a0,a0,a3 +;; ld a1,0(a1) +;; add a1,a1,a2 +;; lui a3,1 +;; add a1,a1,a3 +;; li a3,0 +;; ugt a0,a2,a0##ty=i64 +;; selectif_spectre_guard a2,a3,a1##test=a0 +;; lbu a0,0(a2) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 6d80b845b1c0..e9abd3009e39 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -43,19 +43,19 @@ ;; block0: ;; slli t2,a0,32 ;; srli a3,t2,32 -;; auipc t1,0; ld t1,12(t1); j 12; .8byte 0xffff0001 -;; add a0,a3,t1 -;; ult a4,a0,a3##ty=i64 +;; auipc a0,0; ld a0,12(a0); j 12; .8byte 0xffff0001 +;; add t2,a3,a0 +;; ult a4,t2,a3##ty=i64 ;; trap_if a4,heap_oob ;; ld a4,8(a2) ;; ld a2,0(a2) ;; add a2,a2,a3 ;; auipc a3,0; ld a3,12(a3); j 12; .8byte 0xffff0000 ;; add a2,a2,a3 -;; ugt a0,a0,a4##ty=i64 ;; li a3,0 -;; selectif_spectre_guard a4,a3,a2##test=a0 -;; sb a1,0(a4) +;; ugt a4,t2,a4##ty=i64 +;; selectif_spectre_guard a5,a3,a2##test=a4 +;; sb a1,0(a5) ;; j label1 ;; block1: ;; ret @@ -64,19 +64,19 @@ ;; block0: ;; slli t2,a0,32 ;; srli a2,t2,32 -;; auipc t1,0; ld t1,12(t1); j 12; .8byte 0xffff0001 -;; add a0,a2,t1 -;; ult a3,a0,a2##ty=i64 +;; auipc a0,0; ld a0,12(a0); j 12; .8byte 0xffff0001 +;; add t2,a2,a0 +;; ult a3,t2,a2##ty=i64 ;; trap_if a3,heap_oob ;; ld a3,8(a1) ;; ld a1,0(a1) ;; add a1,a1,a2 ;; auipc a2,0; ld a2,12(a2); j 12; .8byte 0xffff0000 -;; add a2,a1,a2 -;; ugt a0,a0,a3##ty=i64 -;; li a3,0 -;; selectif_spectre_guard a1,a3,a2##test=a0 -;; lbu a0,0(a1) +;; add a1,a1,a2 +;; li a2,0 +;; ugt a3,t2,a3##ty=i64 +;; selectif_spectre_guard a4,a2,a1##test=a3 +;; lbu a0,0(a4) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index 5b67925431df..d4ccae50837b 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -49,9 +49,9 @@ ;; block1: ;; ld t0,0(a2) ;; add t4,t0,t4 -;; lui t3,1 -;; add t0,t4,t3 -;; sw a1,0(t0) +;; lui t0,1 +;; add t4,t4,t0 +;; sw a1,0(t4) ;; j label2 ;; block2: ;; ret @@ -68,9 +68,9 @@ ;; block1: ;; ld t0,0(a1) ;; add t4,t0,t4 -;; lui t3,1 -;; add t0,t4,t3 -;; lw a0,0(t0) +;; lui t0,1 +;; add t4,t4,t0 +;; lw a0,0(t4) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index 945c90f8c1cd..39dda859af1e 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -49,9 +49,9 @@ ;; block1: ;; ld t0,0(a2) ;; add t4,t0,t4 -;; auipc t3,0; ld t3,12(t3); j 12; .8byte 0xffff0000 -;; add t0,t4,t3 -;; sw a1,0(t0) +;; auipc t0,0; ld t0,12(t0); j 12; .8byte 0xffff0000 +;; add t4,t4,t0 +;; sw a1,0(t4) ;; j label2 ;; block2: ;; ret @@ -68,9 +68,9 @@ ;; block1: ;; ld t0,0(a1) ;; add t4,t0,t4 -;; auipc t3,0; ld t3,12(t3); j 12; .8byte 0xffff0000 -;; add t0,t4,t3 -;; lw a0,0(t0) +;; auipc t0,0; ld t0,12(t0); j 12; .8byte 0xffff0000 +;; add t4,t4,t0 +;; lw a0,0(t4) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index 96ff7fa66a75..28c20d7931f2 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -49,9 +49,9 @@ ;; block1: ;; ld t0,0(a2) ;; add t4,t0,t4 -;; lui t3,1 -;; add t0,t4,t3 -;; sb a1,0(t0) +;; lui t0,1 +;; add t4,t4,t0 +;; sb a1,0(t4) ;; j label2 ;; block2: ;; ret @@ -68,9 +68,9 @@ ;; block1: ;; ld t0,0(a1) ;; add t4,t0,t4 -;; lui t3,1 -;; add t0,t4,t3 -;; lbu a0,0(t0) +;; lui t0,1 +;; add t4,t4,t0 +;; lbu a0,0(t4) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index 7ebe368445d0..6caf11f388fd 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -49,9 +49,9 @@ ;; block1: ;; ld t0,0(a2) ;; add t4,t0,t4 -;; auipc t3,0; ld t3,12(t3); j 12; .8byte 0xffff0000 -;; add t0,t4,t3 -;; sb a1,0(t0) +;; auipc t0,0; ld t0,12(t0); j 12; .8byte 0xffff0000 +;; add t4,t4,t0 +;; sb a1,0(t4) ;; j label2 ;; block2: ;; ret @@ -68,9 +68,9 @@ ;; block1: ;; ld t0,0(a1) ;; add t4,t0,t4 -;; auipc t3,0; ld t3,12(t3); j 12; .8byte 0xffff0000 -;; add t0,t4,t3 -;; lbu a0,0(t0) +;; auipc t0,0; ld t0,12(t0); j 12; .8byte 0xffff0000 +;; add t4,t4,t0 +;; lbu a0,0(t4) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index aad2ea2143aa..9ead89e2b704 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -46,10 +46,10 @@ ;; ld t3,8(a2) ;; ld t0,0(a2) ;; add t0,t0,t4 -;; ugt a7,t4,t3##ty=i64 -;; li t4,0 -;; selectif_spectre_guard t3,t4,t0##test=a7 -;; sw a1,0(t3) +;; li t1,0 +;; ugt t3,t4,t3##ty=i64 +;; selectif_spectre_guard t4,t1,t0##test=t3 +;; sw a1,0(t4) ;; j label1 ;; block1: ;; ret @@ -61,10 +61,10 @@ ;; ld t3,8(a1) ;; ld t0,0(a1) ;; add t0,t0,t4 -;; ugt a7,t4,t3##ty=i64 -;; li t4,0 -;; selectif_spectre_guard t3,t4,t0##test=a7 -;; lw a0,0(t3) +;; li t1,0 +;; ugt t3,t4,t3##ty=i64 +;; selectif_spectre_guard t4,t1,t0##test=t3 +;; lw a0,0(t4) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index 9839c99a95ab..68ef87bca359 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -46,12 +46,12 @@ ;; ld t0,8(a2) ;; ld t2,0(a2) ;; add t2,t2,t1 -;; lui t4,1 -;; add t2,t2,t4 -;; ugt t4,t1,t0##ty=i64 -;; li t1,0 -;; selectif_spectre_guard t0,t1,t2##test=t4 -;; sw a1,0(t0) +;; lui a0,1 +;; add t2,t2,a0 +;; li a0,0 +;; ugt t0,t1,t0##ty=i64 +;; selectif_spectre_guard t1,a0,t2##test=t0 +;; sw a1,0(t1) ;; j label1 ;; block1: ;; ret @@ -63,12 +63,12 @@ ;; ld t0,8(a1) ;; ld t2,0(a1) ;; add t2,t2,t1 -;; lui t4,1 -;; add t2,t2,t4 -;; ugt t4,t1,t0##ty=i64 -;; li t1,0 -;; selectif_spectre_guard t0,t1,t2##test=t4 -;; lw a0,0(t0) +;; lui a0,1 +;; add t2,t2,a0 +;; li a0,0 +;; ugt t0,t1,t0##ty=i64 +;; selectif_spectre_guard t1,a0,t2##test=t0 +;; lw a0,0(t1) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index d1cee5b0786d..dbcfffdb0ef6 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -46,12 +46,12 @@ ;; ld t0,8(a2) ;; ld t2,0(a2) ;; add t2,t2,t1 -;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0000 -;; add t2,t2,t4 -;; ugt t4,t1,t0##ty=i64 -;; li t1,0 -;; selectif_spectre_guard t0,t1,t2##test=t4 -;; sw a1,0(t0) +;; auipc a0,0; ld a0,12(a0); j 12; .8byte 0xffff0000 +;; add t2,t2,a0 +;; li a0,0 +;; ugt t0,t1,t0##ty=i64 +;; selectif_spectre_guard t1,a0,t2##test=t0 +;; sw a1,0(t1) ;; j label1 ;; block1: ;; ret @@ -63,12 +63,12 @@ ;; ld t0,8(a1) ;; ld t2,0(a1) ;; add t2,t2,t1 -;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0000 -;; add t2,t2,t4 -;; ugt t4,t1,t0##ty=i64 -;; li t1,0 -;; selectif_spectre_guard t0,t1,t2##test=t4 -;; lw a0,0(t0) +;; auipc a0,0; ld a0,12(a0); j 12; .8byte 0xffff0000 +;; add t2,t2,a0 +;; li a0,0 +;; ugt t0,t1,t0##ty=i64 +;; selectif_spectre_guard t1,a0,t2##test=t0 +;; lw a0,0(t1) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index b19fe3066c16..bc1e6cc71932 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -46,10 +46,10 @@ ;; ld t3,8(a2) ;; ld t0,0(a2) ;; add t0,t0,t4 -;; uge a7,t4,t3##ty=i64 -;; li t4,0 -;; selectif_spectre_guard t3,t4,t0##test=a7 -;; sb a1,0(t3) +;; li t1,0 +;; uge t3,t4,t3##ty=i64 +;; selectif_spectre_guard t4,t1,t0##test=t3 +;; sb a1,0(t4) ;; j label1 ;; block1: ;; ret @@ -61,10 +61,10 @@ ;; ld t3,8(a1) ;; ld t0,0(a1) ;; add t0,t0,t4 -;; uge a7,t4,t3##ty=i64 -;; li t4,0 -;; selectif_spectre_guard t3,t4,t0##test=a7 -;; lbu a0,0(t3) +;; li t1,0 +;; uge t3,t4,t3##ty=i64 +;; selectif_spectre_guard t4,t1,t0##test=t3 +;; lbu a0,0(t4) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index 238f25870a49..9aabb5223de5 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -46,12 +46,12 @@ ;; ld t0,8(a2) ;; ld t2,0(a2) ;; add t2,t2,t1 -;; lui t4,1 -;; add t2,t2,t4 -;; ugt t4,t1,t0##ty=i64 -;; li t1,0 -;; selectif_spectre_guard t0,t1,t2##test=t4 -;; sb a1,0(t0) +;; lui a0,1 +;; add t2,t2,a0 +;; li a0,0 +;; ugt t0,t1,t0##ty=i64 +;; selectif_spectre_guard t1,a0,t2##test=t0 +;; sb a1,0(t1) ;; j label1 ;; block1: ;; ret @@ -63,12 +63,12 @@ ;; ld t0,8(a1) ;; ld t2,0(a1) ;; add t2,t2,t1 -;; lui t4,1 -;; add t2,t2,t4 -;; ugt t4,t1,t0##ty=i64 -;; li t1,0 -;; selectif_spectre_guard t0,t1,t2##test=t4 -;; lbu a0,0(t0) +;; lui a0,1 +;; add t2,t2,a0 +;; li a0,0 +;; ugt t0,t1,t0##ty=i64 +;; selectif_spectre_guard t1,a0,t2##test=t0 +;; lbu a0,0(t1) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 334bd2166ba6..28643b096e06 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -46,12 +46,12 @@ ;; ld t0,8(a2) ;; ld t2,0(a2) ;; add t2,t2,t1 -;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0000 -;; add t2,t2,t4 -;; ugt t4,t1,t0##ty=i64 -;; li t1,0 -;; selectif_spectre_guard t0,t1,t2##test=t4 -;; sb a1,0(t0) +;; auipc a0,0; ld a0,12(a0); j 12; .8byte 0xffff0000 +;; add t2,t2,a0 +;; li a0,0 +;; ugt t0,t1,t0##ty=i64 +;; selectif_spectre_guard t1,a0,t2##test=t0 +;; sb a1,0(t1) ;; j label1 ;; block1: ;; ret @@ -63,12 +63,12 @@ ;; ld t0,8(a1) ;; ld t2,0(a1) ;; add t2,t2,t1 -;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0000 -;; add t2,t2,t4 -;; ugt t4,t1,t0##ty=i64 -;; li t1,0 -;; selectif_spectre_guard t0,t1,t2##test=t4 -;; lbu a0,0(t0) +;; auipc a0,0; ld a0,12(a0); j 12; .8byte 0xffff0000 +;; add t2,t2,a0 +;; li a0,0 +;; ugt t0,t1,t0##ty=i64 +;; selectif_spectre_guard t1,a0,t2##test=t0 +;; lbu a0,0(t1) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 3b434e6fce19..878602f6572c 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -42,17 +42,17 @@ ;; function u0:0: ;; block0: ;; ld t4,8(a2) -;; lui t3,1048575 -;; addi t3,t3,4092 -;; add t1,t4,t3 -;; ugt t4,a0,t1##ty=i64 +;; lui t0,1048575 +;; addi t0,t0,4092 +;; add t4,t4,t0 +;; ugt t4,a0,t4##ty=i64 ;; bne t4,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t0,0(a2) ;; add t0,t0,a0 -;; lui t4,1 -;; add t1,t0,t4 -;; sw a1,0(t1) +;; lui t1,1 +;; add t0,t0,t1 +;; sw a1,0(t0) ;; j label2 ;; block2: ;; ret @@ -62,17 +62,17 @@ ;; function u0:1: ;; block0: ;; ld t4,8(a1) -;; lui t3,1048575 -;; addi t3,t3,4092 -;; add t1,t4,t3 -;; ugt t4,a0,t1##ty=i64 +;; lui t0,1048575 +;; addi t0,t0,4092 +;; add t4,t4,t0 +;; ugt t4,a0,t4##ty=i64 ;; bne t4,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t0,0(a1) ;; add t0,t0,a0 -;; lui t4,1 -;; add t1,t0,t4 -;; lw a0,0(t1) +;; lui t1,1 +;; add t0,t0,t1 +;; lw a0,0(t0) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 9dae768616b8..e4ad3ee89014 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -41,19 +41,19 @@ ;; function u0:0: ;; block0: -;; auipc a7,0; ld a7,12(a7); j 12; .8byte 0xffff0004 -;; add t4,a0,a7 -;; ult t1,t4,a0##ty=i64 -;; trap_if t1,heap_oob +;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0004 +;; add t3,a0,t4 +;; ult t0,t3,a0##ty=i64 +;; trap_if t0,heap_oob ;; ld t0,8(a2) -;; ugt t0,t4,t0##ty=i64 +;; ugt t0,t3,t0##ty=i64 ;; bne t0,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t1,0(a2) ;; add t1,t1,a0 -;; auipc t0,0; ld t0,12(t0); j 12; .8byte 0xffff0000 -;; add t2,t1,t0 -;; sw a1,0(t2) +;; auipc t2,0; ld t2,12(t2); j 12; .8byte 0xffff0000 +;; add t1,t1,t2 +;; sw a1,0(t1) ;; j label2 ;; block2: ;; ret @@ -62,19 +62,19 @@ ;; ;; function u0:1: ;; block0: -;; auipc a7,0; ld a7,12(a7); j 12; .8byte 0xffff0004 -;; add t4,a0,a7 -;; ult t1,t4,a0##ty=i64 -;; trap_if t1,heap_oob +;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0004 +;; add t3,a0,t4 +;; ult t0,t3,a0##ty=i64 +;; trap_if t0,heap_oob ;; ld t0,8(a1) -;; ugt t0,t4,t0##ty=i64 +;; ugt t0,t3,t0##ty=i64 ;; bne t0,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t1,0(a1) ;; add t1,t1,a0 -;; auipc t0,0; ld t0,12(t0); j 12; .8byte 0xffff0000 -;; add t2,t1,t0 -;; lw a0,0(t2) +;; auipc t2,0; ld t2,12(t2); j 12; .8byte 0xffff0000 +;; add t1,t1,t2 +;; lw a0,0(t1) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index e86a2e757ff5..111316126ff1 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -42,17 +42,17 @@ ;; function u0:0: ;; block0: ;; ld t4,8(a2) -;; lui t3,1048575 -;; addi t3,t3,4095 -;; add t1,t4,t3 -;; ugt t4,a0,t1##ty=i64 +;; lui t0,1048575 +;; addi t0,t0,4095 +;; add t4,t4,t0 +;; ugt t4,a0,t4##ty=i64 ;; bne t4,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t0,0(a2) ;; add t0,t0,a0 -;; lui t4,1 -;; add t1,t0,t4 -;; sb a1,0(t1) +;; lui t1,1 +;; add t0,t0,t1 +;; sb a1,0(t0) ;; j label2 ;; block2: ;; ret @@ -62,17 +62,17 @@ ;; function u0:1: ;; block0: ;; ld t4,8(a1) -;; lui t3,1048575 -;; addi t3,t3,4095 -;; add t1,t4,t3 -;; ugt t4,a0,t1##ty=i64 +;; lui t0,1048575 +;; addi t0,t0,4095 +;; add t4,t4,t0 +;; ugt t4,a0,t4##ty=i64 ;; bne t4,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t0,0(a1) ;; add t0,t0,a0 -;; lui t4,1 -;; add t1,t0,t4 -;; lbu a0,0(t1) +;; lui t1,1 +;; add t0,t0,t1 +;; lbu a0,0(t0) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index ca48fc3e4795..6bb92fd9cb46 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -41,19 +41,19 @@ ;; function u0:0: ;; block0: -;; auipc a7,0; ld a7,12(a7); j 12; .8byte 0xffff0001 -;; add t4,a0,a7 -;; ult t1,t4,a0##ty=i64 -;; trap_if t1,heap_oob +;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0001 +;; add t3,a0,t4 +;; ult t0,t3,a0##ty=i64 +;; trap_if t0,heap_oob ;; ld t0,8(a2) -;; ugt t0,t4,t0##ty=i64 +;; ugt t0,t3,t0##ty=i64 ;; bne t0,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t1,0(a2) ;; add t1,t1,a0 -;; auipc t0,0; ld t0,12(t0); j 12; .8byte 0xffff0000 -;; add t2,t1,t0 -;; sb a1,0(t2) +;; auipc t2,0; ld t2,12(t2); j 12; .8byte 0xffff0000 +;; add t1,t1,t2 +;; sb a1,0(t1) ;; j label2 ;; block2: ;; ret @@ -62,19 +62,19 @@ ;; ;; function u0:1: ;; block0: -;; auipc a7,0; ld a7,12(a7); j 12; .8byte 0xffff0001 -;; add t4,a0,a7 -;; ult t1,t4,a0##ty=i64 -;; trap_if t1,heap_oob +;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0001 +;; add t3,a0,t4 +;; ult t0,t3,a0##ty=i64 +;; trap_if t0,heap_oob ;; ld t0,8(a1) -;; ugt t0,t4,t0##ty=i64 +;; ugt t0,t3,t0##ty=i64 ;; bne t0,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t1,0(a1) ;; add t1,t1,a0 -;; auipc t0,0; ld t0,12(t0); j 12; .8byte 0xffff0000 -;; add t2,t1,t0 -;; lbu a0,0(t2) +;; auipc t2,0; ld t2,12(t2); j 12; .8byte 0xffff0000 +;; add t1,t1,t2 +;; lbu a0,0(t1) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat index f8c8987729cd..77973fef2c22 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -45,10 +45,10 @@ ;; addi a7,a7,-4 ;; ld t3,0(a2) ;; add t3,t3,a0 -;; ugt a6,a0,a7##ty=i64 ;; li t4,0 -;; selectif_spectre_guard a7,t4,t3##test=a6 -;; sw a1,0(a7) +;; ugt a7,a0,a7##ty=i64 +;; selectif_spectre_guard t0,t4,t3##test=a7 +;; sw a1,0(t0) ;; j label1 ;; block1: ;; ret @@ -59,10 +59,10 @@ ;; addi a7,a7,-4 ;; ld t3,0(a1) ;; add t3,t3,a0 -;; ugt a6,a0,a7##ty=i64 ;; li t4,0 -;; selectif_spectre_guard a7,t4,t3##test=a6 -;; lw a0,0(a7) +;; ugt a7,a0,a7##ty=i64 +;; selectif_spectre_guard t0,t4,t3##test=a7 +;; lw a0,0(t0) ;; j label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 0c7024c3f85f..0fdb92005289 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -42,17 +42,17 @@ ;; function u0:0: ;; block0: ;; ld t1,8(a2) -;; lui t0,1048575 -;; addi t0,t0,4092 -;; add a3,t1,t0 -;; ld t1,0(a2) -;; add t1,t1,a0 -;; lui t0,1 -;; add t2,t1,t0 -;; ugt t0,a0,a3##ty=i64 -;; li a0,0 -;; selectif_spectre_guard t1,a0,t2##test=t0 -;; sw a1,0(t1) +;; lui t2,1048575 +;; addi t2,t2,4092 +;; add t1,t1,t2 +;; ld t2,0(a2) +;; add t2,t2,a0 +;; lui a2,1 +;; add t2,t2,a2 +;; li a2,0 +;; ugt t1,a0,t1##ty=i64 +;; selectif_spectre_guard a0,a2,t2##test=t1 +;; sw a1,0(a0) ;; j label1 ;; block1: ;; ret @@ -60,17 +60,17 @@ ;; function u0:1: ;; block0: ;; ld t1,8(a1) -;; lui t0,1048575 -;; addi t0,t0,4092 -;; add a2,t1,t0 -;; ld t1,0(a1) -;; add t1,t1,a0 -;; lui t0,1 -;; add t2,t1,t0 -;; ugt t0,a0,a2##ty=i64 -;; li a0,0 -;; selectif_spectre_guard t1,a0,t2##test=t0 -;; lw a0,0(t1) +;; lui t2,1048575 +;; addi t2,t2,4092 +;; add t1,t1,t2 +;; ld t2,0(a1) +;; add t2,t2,a0 +;; lui a1,1 +;; add t2,t2,a1 +;; li a1,0 +;; ugt t1,a0,t1##ty=i64 +;; selectif_spectre_guard a0,a1,t2##test=t1 +;; lw a0,0(a0) ;; j label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index bf692814dba6..7be7b3cbebfc 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -41,38 +41,38 @@ ;; function u0:0: ;; block0: -;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0004 -;; add t1,a0,t4 -;; ult a3,t1,a0##ty=i64 -;; trap_if a3,heap_oob +;; auipc t1,0; ld t1,12(t1); j 12; .8byte 0xffff0004 +;; add t0,a0,t1 +;; ult t2,t0,a0##ty=i64 +;; trap_if t2,heap_oob ;; ld t2,8(a2) ;; ld a2,0(a2) ;; add a0,a2,a0 ;; auipc a2,0; ld a2,12(a2); j 12; .8byte 0xffff0000 ;; add a0,a0,a2 -;; ugt t1,t1,t2##ty=i64 ;; li a2,0 -;; selectif_spectre_guard t2,a2,a0##test=t1 -;; sw a1,0(t2) +;; ugt t2,t0,t2##ty=i64 +;; selectif_spectre_guard a3,a2,a0##test=t2 +;; sw a1,0(a3) ;; j label1 ;; block1: ;; ret ;; ;; function u0:1: ;; block0: -;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0004 -;; add t1,a0,t4 -;; ult a2,t1,a0##ty=i64 -;; trap_if a2,heap_oob +;; auipc t1,0; ld t1,12(t1); j 12; .8byte 0xffff0004 +;; add t0,a0,t1 +;; ult t2,t0,a0##ty=i64 +;; trap_if t2,heap_oob ;; ld t2,8(a1) ;; ld a1,0(a1) ;; add a0,a1,a0 ;; auipc a1,0; ld a1,12(a1); j 12; .8byte 0xffff0000 ;; add a0,a0,a1 -;; ugt t1,t1,t2##ty=i64 ;; li a1,0 -;; selectif_spectre_guard t2,a1,a0##test=t1 -;; lw a0,0(t2) +;; ugt t2,t0,t2##ty=i64 +;; selectif_spectre_guard a2,a1,a0##test=t2 +;; lw a0,0(a2) ;; j label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat index b2658aa514d1..460e46f3ca53 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -44,10 +44,10 @@ ;; ld a6,8(a2) ;; ld a7,0(a2) ;; add a7,a7,a0 -;; uge a5,a0,a6##ty=i64 ;; li t3,0 -;; selectif_spectre_guard a6,t3,a7##test=a5 -;; sb a1,0(a6) +;; uge a6,a0,a6##ty=i64 +;; selectif_spectre_guard t4,t3,a7##test=a6 +;; sb a1,0(t4) ;; j label1 ;; block1: ;; ret @@ -57,10 +57,10 @@ ;; ld a6,8(a1) ;; ld a7,0(a1) ;; add a7,a7,a0 -;; uge a5,a0,a6##ty=i64 ;; li t3,0 -;; selectif_spectre_guard a6,t3,a7##test=a5 -;; lbu a0,0(a6) +;; uge a6,a0,a6##ty=i64 +;; selectif_spectre_guard t4,t3,a7##test=a6 +;; lbu a0,0(t4) ;; j label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index ec69de30c668..b3b6723fbe95 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -42,17 +42,17 @@ ;; function u0:0: ;; block0: ;; ld t1,8(a2) -;; lui t0,1048575 -;; addi t0,t0,4095 -;; add a3,t1,t0 -;; ld t1,0(a2) -;; add t1,t1,a0 -;; lui t0,1 -;; add t2,t1,t0 -;; ugt t0,a0,a3##ty=i64 -;; li a0,0 -;; selectif_spectre_guard t1,a0,t2##test=t0 -;; sb a1,0(t1) +;; lui t2,1048575 +;; addi t2,t2,4095 +;; add t1,t1,t2 +;; ld t2,0(a2) +;; add t2,t2,a0 +;; lui a2,1 +;; add t2,t2,a2 +;; li a2,0 +;; ugt t1,a0,t1##ty=i64 +;; selectif_spectre_guard a0,a2,t2##test=t1 +;; sb a1,0(a0) ;; j label1 ;; block1: ;; ret @@ -60,17 +60,17 @@ ;; function u0:1: ;; block0: ;; ld t1,8(a1) -;; lui t0,1048575 -;; addi t0,t0,4095 -;; add a2,t1,t0 -;; ld t1,0(a1) -;; add t1,t1,a0 -;; lui t0,1 -;; add t2,t1,t0 -;; ugt t0,a0,a2##ty=i64 -;; li a0,0 -;; selectif_spectre_guard t1,a0,t2##test=t0 -;; lbu a0,0(t1) +;; lui t2,1048575 +;; addi t2,t2,4095 +;; add t1,t1,t2 +;; ld t2,0(a1) +;; add t2,t2,a0 +;; lui a1,1 +;; add t2,t2,a1 +;; li a1,0 +;; ugt t1,a0,t1##ty=i64 +;; selectif_spectre_guard a0,a1,t2##test=t1 +;; lbu a0,0(a0) ;; j label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index c0de90c2709f..5bd731dbf01a 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -41,38 +41,38 @@ ;; function u0:0: ;; block0: -;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0001 -;; add t1,a0,t4 -;; ult a3,t1,a0##ty=i64 -;; trap_if a3,heap_oob +;; auipc t1,0; ld t1,12(t1); j 12; .8byte 0xffff0001 +;; add t0,a0,t1 +;; ult t2,t0,a0##ty=i64 +;; trap_if t2,heap_oob ;; ld t2,8(a2) ;; ld a2,0(a2) ;; add a0,a2,a0 ;; auipc a2,0; ld a2,12(a2); j 12; .8byte 0xffff0000 ;; add a0,a0,a2 -;; ugt t1,t1,t2##ty=i64 ;; li a2,0 -;; selectif_spectre_guard t2,a2,a0##test=t1 -;; sb a1,0(t2) +;; ugt t2,t0,t2##ty=i64 +;; selectif_spectre_guard a3,a2,a0##test=t2 +;; sb a1,0(a3) ;; j label1 ;; block1: ;; ret ;; ;; function u0:1: ;; block0: -;; auipc t4,0; ld t4,12(t4); j 12; .8byte 0xffff0001 -;; add t1,a0,t4 -;; ult a2,t1,a0##ty=i64 -;; trap_if a2,heap_oob +;; auipc t1,0; ld t1,12(t1); j 12; .8byte 0xffff0001 +;; add t0,a0,t1 +;; ult t2,t0,a0##ty=i64 +;; trap_if t2,heap_oob ;; ld t2,8(a1) ;; ld a1,0(a1) ;; add a0,a1,a0 ;; auipc a1,0; ld a1,12(a1); j 12; .8byte 0xffff0000 ;; add a0,a0,a1 -;; ugt t1,t1,t2##ty=i64 ;; li a1,0 -;; selectif_spectre_guard t2,a1,a0##test=t1 -;; lbu a0,0(t2) +;; ugt t2,t0,t2##ty=i64 +;; selectif_spectre_guard a2,a1,a0##test=t2 +;; lbu a0,0(a2) ;; j label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index 9cb33c5e1027..7fc16caef684 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -47,9 +47,9 @@ ;; block1: ;; ld a7,0(a2) ;; add a7,a7,a0 -;; lui a6,1 -;; add t3,a7,a6 -;; sw a1,0(t3) +;; lui t3,1 +;; add a7,a7,t3 +;; sw a1,0(a7) ;; j label2 ;; block2: ;; ret @@ -64,9 +64,9 @@ ;; block1: ;; ld a7,0(a1) ;; add a7,a7,a0 -;; lui a6,1 -;; add t3,a7,a6 -;; lw a0,0(t3) +;; lui t3,1 +;; add a7,a7,t3 +;; lw a0,0(a7) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index 455abbfed511..b76521a575eb 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -47,9 +47,9 @@ ;; block1: ;; ld a7,0(a2) ;; add a7,a7,a0 -;; auipc a6,0; ld a6,12(a6); j 12; .8byte 0xffff0000 -;; add t3,a7,a6 -;; sw a1,0(t3) +;; auipc t3,0; ld t3,12(t3); j 12; .8byte 0xffff0000 +;; add a7,a7,t3 +;; sw a1,0(a7) ;; j label2 ;; block2: ;; ret @@ -64,9 +64,9 @@ ;; block1: ;; ld a7,0(a1) ;; add a7,a7,a0 -;; auipc a6,0; ld a6,12(a6); j 12; .8byte 0xffff0000 -;; add t3,a7,a6 -;; lw a0,0(t3) +;; auipc t3,0; ld t3,12(t3); j 12; .8byte 0xffff0000 +;; add a7,a7,t3 +;; lw a0,0(a7) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index b692ae637f4e..41435f04a907 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -47,9 +47,9 @@ ;; block1: ;; ld a7,0(a2) ;; add a7,a7,a0 -;; lui a6,1 -;; add t3,a7,a6 -;; sb a1,0(t3) +;; lui t3,1 +;; add a7,a7,t3 +;; sb a1,0(a7) ;; j label2 ;; block2: ;; ret @@ -64,9 +64,9 @@ ;; block1: ;; ld a7,0(a1) ;; add a7,a7,a0 -;; lui a6,1 -;; add t3,a7,a6 -;; lbu a0,0(t3) +;; lui t3,1 +;; add a7,a7,t3 +;; lbu a0,0(a7) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index ca05882cad2e..08213f990617 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -47,9 +47,9 @@ ;; block1: ;; ld a7,0(a2) ;; add a7,a7,a0 -;; auipc a6,0; ld a6,12(a6); j 12; .8byte 0xffff0000 -;; add t3,a7,a6 -;; sb a1,0(t3) +;; auipc t3,0; ld t3,12(t3); j 12; .8byte 0xffff0000 +;; add a7,a7,t3 +;; sb a1,0(a7) ;; j label2 ;; block2: ;; ret @@ -64,9 +64,9 @@ ;; block1: ;; ld a7,0(a1) ;; add a7,a7,a0 -;; auipc a6,0; ld a6,12(a6); j 12; .8byte 0xffff0000 -;; add t3,a7,a6 -;; lbu a0,0(t3) +;; auipc t3,0; ld t3,12(t3); j 12; .8byte 0xffff0000 +;; add a7,a7,t3 +;; lbu a0,0(a7) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index 28c262ddc780..17d9858dfb78 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -44,10 +44,10 @@ ;; ld a6,8(a2) ;; ld a7,0(a2) ;; add a7,a7,a0 -;; ugt a5,a0,a6##ty=i64 ;; li t3,0 -;; selectif_spectre_guard a6,t3,a7##test=a5 -;; sw a1,0(a6) +;; ugt a6,a0,a6##ty=i64 +;; selectif_spectre_guard t4,t3,a7##test=a6 +;; sw a1,0(t4) ;; j label1 ;; block1: ;; ret @@ -57,10 +57,10 @@ ;; ld a6,8(a1) ;; ld a7,0(a1) ;; add a7,a7,a0 -;; ugt a5,a0,a6##ty=i64 ;; li t3,0 -;; selectif_spectre_guard a6,t3,a7##test=a5 -;; lw a0,0(a6) +;; ugt a6,a0,a6##ty=i64 +;; selectif_spectre_guard t4,t3,a7##test=a6 +;; lw a0,0(t4) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index 878086222331..9f274425eb1c 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -44,12 +44,12 @@ ;; ld t3,8(a2) ;; ld t4,0(a2) ;; add t4,t4,a0 -;; lui a7,1 -;; add t4,t4,a7 -;; ugt a7,a0,t3##ty=i64 +;; lui t0,1 +;; add t4,t4,t0 ;; li t0,0 -;; selectif_spectre_guard t3,t0,t4##test=a7 -;; sw a1,0(t3) +;; ugt t3,a0,t3##ty=i64 +;; selectif_spectre_guard t1,t0,t4##test=t3 +;; sw a1,0(t1) ;; j label1 ;; block1: ;; ret @@ -59,12 +59,12 @@ ;; ld t3,8(a1) ;; ld t4,0(a1) ;; add t4,t4,a0 -;; lui a7,1 -;; add t4,t4,a7 -;; ugt a7,a0,t3##ty=i64 +;; lui t0,1 +;; add t4,t4,t0 ;; li t0,0 -;; selectif_spectre_guard t3,t0,t4##test=a7 -;; lw a0,0(t3) +;; ugt t3,a0,t3##ty=i64 +;; selectif_spectre_guard t1,t0,t4##test=t3 +;; lw a0,0(t1) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 483ad66ca70f..b310f6a8f500 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -44,12 +44,12 @@ ;; ld t3,8(a2) ;; ld t4,0(a2) ;; add t4,t4,a0 -;; auipc a7,0; ld a7,12(a7); j 12; .8byte 0xffff0000 -;; add t4,t4,a7 -;; ugt a7,a0,t3##ty=i64 +;; auipc t0,0; ld t0,12(t0); j 12; .8byte 0xffff0000 +;; add t4,t4,t0 ;; li t0,0 -;; selectif_spectre_guard t3,t0,t4##test=a7 -;; sw a1,0(t3) +;; ugt t3,a0,t3##ty=i64 +;; selectif_spectre_guard t1,t0,t4##test=t3 +;; sw a1,0(t1) ;; j label1 ;; block1: ;; ret @@ -59,12 +59,12 @@ ;; ld t3,8(a1) ;; ld t4,0(a1) ;; add t4,t4,a0 -;; auipc a7,0; ld a7,12(a7); j 12; .8byte 0xffff0000 -;; add t4,t4,a7 -;; ugt a7,a0,t3##ty=i64 +;; auipc t0,0; ld t0,12(t0); j 12; .8byte 0xffff0000 +;; add t4,t4,t0 ;; li t0,0 -;; selectif_spectre_guard t3,t0,t4##test=a7 -;; lw a0,0(t3) +;; ugt t3,a0,t3##ty=i64 +;; selectif_spectre_guard t1,t0,t4##test=t3 +;; lw a0,0(t1) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index 0818bc6b2fa4..e7effd2d9852 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -44,10 +44,10 @@ ;; ld a6,8(a2) ;; ld a7,0(a2) ;; add a7,a7,a0 -;; uge a5,a0,a6##ty=i64 ;; li t3,0 -;; selectif_spectre_guard a6,t3,a7##test=a5 -;; sb a1,0(a6) +;; uge a6,a0,a6##ty=i64 +;; selectif_spectre_guard t4,t3,a7##test=a6 +;; sb a1,0(t4) ;; j label1 ;; block1: ;; ret @@ -57,10 +57,10 @@ ;; ld a6,8(a1) ;; ld a7,0(a1) ;; add a7,a7,a0 -;; uge a5,a0,a6##ty=i64 ;; li t3,0 -;; selectif_spectre_guard a6,t3,a7##test=a5 -;; lbu a0,0(a6) +;; uge a6,a0,a6##ty=i64 +;; selectif_spectre_guard t4,t3,a7##test=a6 +;; lbu a0,0(t4) ;; j label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index b11fadba5a89..ab687a762d49 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -44,12 +44,12 @@ ;; ld t3,8(a2) ;; ld t4,0(a2) ;; add t4,t4,a0 -;; lui a7,1 -;; add t4,t4,a7 -;; ugt a7,a0,t3##ty=i64 +;; lui t0,1 +;; add t4,t4,t0 ;; li t0,0 -;; selectif_spectre_guard t3,t0,t4##test=a7 -;; sb a1,0(t3) +;; ugt t3,a0,t3##ty=i64 +;; selectif_spectre_guard t1,t0,t4##test=t3 +;; sb a1,0(t1) ;; j label1 ;; block1: ;; ret @@ -59,12 +59,12 @@ ;; ld t3,8(a1) ;; ld t4,0(a1) ;; add t4,t4,a0 -;; lui a7,1 -;; add t4,t4,a7 -;; ugt a7,a0,t3##ty=i64 +;; lui t0,1 +;; add t4,t4,t0 ;; li t0,0 -;; selectif_spectre_guard t3,t0,t4##test=a7 -;; lbu a0,0(t3) +;; ugt t3,a0,t3##ty=i64 +;; selectif_spectre_guard t1,t0,t4##test=t3 +;; lbu a0,0(t1) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 2630ec2e65b6..c2ad22aaae60 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -44,12 +44,12 @@ ;; ld t3,8(a2) ;; ld t4,0(a2) ;; add t4,t4,a0 -;; auipc a7,0; ld a7,12(a7); j 12; .8byte 0xffff0000 -;; add t4,t4,a7 -;; ugt a7,a0,t3##ty=i64 +;; auipc t0,0; ld t0,12(t0); j 12; .8byte 0xffff0000 +;; add t4,t4,t0 ;; li t0,0 -;; selectif_spectre_guard t3,t0,t4##test=a7 -;; sb a1,0(t3) +;; ugt t3,a0,t3##ty=i64 +;; selectif_spectre_guard t1,t0,t4##test=t3 +;; sb a1,0(t1) ;; j label1 ;; block1: ;; ret @@ -59,12 +59,12 @@ ;; ld t3,8(a1) ;; ld t4,0(a1) ;; add t4,t4,a0 -;; auipc a7,0; ld a7,12(a7); j 12; .8byte 0xffff0000 -;; add t4,t4,a7 -;; ugt a7,a0,t3##ty=i64 +;; auipc t0,0; ld t0,12(t0); j 12; .8byte 0xffff0000 +;; add t4,t4,t0 ;; li t0,0 -;; selectif_spectre_guard t3,t0,t4##test=a7 -;; lbu a0,0(t3) +;; ugt t3,a0,t3##ty=i64 +;; selectif_spectre_guard t1,t0,t4##test=t3 +;; lbu a0,0(t1) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat index 62e1baf34f55..f4a7174a6e9b 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat @@ -41,10 +41,10 @@ ;; block0: ;; slli a6,a0,32 ;; srli t3,a6,32 -;; lui a6,65536 -;; addi a6,a6,4092 -;; ugt t4,t3,a6##ty=i64 -;; bne t4,zero,taken(label3),not_taken(label1) +;; lui a7,65536 +;; addi a7,a7,4092 +;; ugt a7,t3,a7##ty=i64 +;; bne a7,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t4,0(a2) ;; add t3,t4,t3 @@ -59,10 +59,10 @@ ;; block0: ;; slli a6,a0,32 ;; srli t3,a6,32 -;; lui a6,65536 -;; addi a6,a6,4092 -;; ugt t4,t3,a6##ty=i64 -;; bne t4,zero,taken(label3),not_taken(label1) +;; lui a7,65536 +;; addi a7,a7,4092 +;; ugt a7,t3,a7##ty=i64 +;; bne a7,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t4,0(a1) ;; add t3,t4,t3 diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 95701778bd5a..af003621a851 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -41,16 +41,16 @@ ;; block0: ;; slli t3,a0,32 ;; srli t0,t3,32 -;; lui t3,65535 -;; addi t3,t3,4092 -;; ugt t1,t0,t3##ty=i64 -;; bne t1,zero,taken(label3),not_taken(label1) +;; lui t4,65535 +;; addi t4,t4,4092 +;; ugt t4,t0,t4##ty=i64 +;; bne t4,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t1,0(a2) ;; add t0,t1,t0 -;; lui t4,1 -;; add t1,t0,t4 -;; sw a1,0(t1) +;; lui t1,1 +;; add t0,t0,t1 +;; sw a1,0(t0) ;; j label2 ;; block2: ;; ret @@ -61,16 +61,16 @@ ;; block0: ;; slli t3,a0,32 ;; srli t0,t3,32 -;; lui t3,65535 -;; addi t3,t3,4092 -;; ugt t1,t0,t3##ty=i64 -;; bne t1,zero,taken(label3),not_taken(label1) +;; lui t4,65535 +;; addi t4,t4,4092 +;; ugt t4,t0,t4##ty=i64 +;; bne t4,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t1,0(a1) ;; add t0,t1,t0 -;; lui t4,1 -;; add t1,t0,t4 -;; lw a0,0(t1) +;; lui t1,1 +;; add t0,t0,t1 +;; lw a0,0(t0) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat index 2320d9e27f63..6a6ccb51e9a2 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0_offset.wat @@ -41,10 +41,10 @@ ;; block0: ;; slli a6,a0,32 ;; srli t3,a6,32 -;; lui a6,65536 -;; addi a6,a6,4095 -;; ugt t4,t3,a6##ty=i64 -;; bne t4,zero,taken(label3),not_taken(label1) +;; lui a7,65536 +;; addi a7,a7,4095 +;; ugt a7,t3,a7##ty=i64 +;; bne a7,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t4,0(a2) ;; add t3,t4,t3 @@ -59,10 +59,10 @@ ;; block0: ;; slli a6,a0,32 ;; srli t3,a6,32 -;; lui a6,65536 -;; addi a6,a6,4095 -;; ugt t4,t3,a6##ty=i64 -;; bne t4,zero,taken(label3),not_taken(label1) +;; lui a7,65536 +;; addi a7,a7,4095 +;; ugt a7,t3,a7##ty=i64 +;; bne a7,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t4,0(a1) ;; add t3,t4,t3 diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index 140d17dd6212..5a8fbbc128a4 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -41,16 +41,16 @@ ;; block0: ;; slli t3,a0,32 ;; srli t0,t3,32 -;; lui t3,65535 -;; addi t3,t3,4095 -;; ugt t1,t0,t3##ty=i64 -;; bne t1,zero,taken(label3),not_taken(label1) +;; lui t4,65535 +;; addi t4,t4,4095 +;; ugt t4,t0,t4##ty=i64 +;; bne t4,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t1,0(a2) ;; add t0,t1,t0 -;; lui t4,1 -;; add t1,t0,t4 -;; sb a1,0(t1) +;; lui t1,1 +;; add t0,t0,t1 +;; sb a1,0(t0) ;; j label2 ;; block2: ;; ret @@ -61,16 +61,16 @@ ;; block0: ;; slli t3,a0,32 ;; srli t0,t3,32 -;; lui t3,65535 -;; addi t3,t3,4095 -;; ugt t1,t0,t3##ty=i64 -;; bne t1,zero,taken(label3),not_taken(label1) +;; lui t4,65535 +;; addi t4,t4,4095 +;; ugt t4,t0,t4##ty=i64 +;; bne t4,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t1,0(a1) ;; add t0,t1,t0 -;; lui t4,1 -;; add t1,t0,t4 -;; lbu a0,0(t1) +;; lui t1,1 +;; add t0,t0,t1 +;; lbu a0,0(t0) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat index 0b9b6058ef6d..be47a58633e3 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -41,14 +41,14 @@ ;; block0: ;; slli t3,a0,32 ;; srli t0,t3,32 -;; ld t4,0(a2) -;; add t4,t4,t0 -;; lui a7,65536 -;; addi a7,a7,4092 -;; ugt t0,t0,a7##ty=i64 +;; lui t4,65536 +;; addi t4,t4,4092 +;; ld t1,0(a2) +;; add t1,t1,t0 ;; li t2,0 -;; selectif_spectre_guard t1,t2,t4##test=t0 -;; sw a1,0(t1) +;; ugt t4,t0,t4##ty=i64 +;; selectif_spectre_guard t0,t2,t1##test=t4 +;; sw a1,0(t0) ;; j label1 ;; block1: ;; ret @@ -57,14 +57,14 @@ ;; block0: ;; slli t3,a0,32 ;; srli t0,t3,32 -;; ld t4,0(a1) -;; add t4,t4,t0 -;; lui a7,65536 -;; addi a7,a7,4092 -;; ugt t0,t0,a7##ty=i64 +;; lui t4,65536 +;; addi t4,t4,4092 +;; ld t1,0(a1) +;; add t1,t1,t0 ;; li t2,0 -;; selectif_spectre_guard t1,t2,t4##test=t0 -;; lw a0,0(t1) +;; ugt t4,t0,t4##ty=i64 +;; selectif_spectre_guard t0,t2,t1##test=t4 +;; lw a0,0(t0) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 20c8f898b3af..70bc1ff324c8 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -41,16 +41,16 @@ ;; block0: ;; slli t0,a0,32 ;; srli t2,t0,32 -;; ld t1,0(a2) -;; add t1,t1,t2 -;; lui t0,1 -;; add a0,t1,t0 -;; lui t4,65535 -;; addi t4,t4,4092 -;; ugt t2,t2,t4##ty=i64 +;; lui t1,65535 +;; addi t1,t1,4092 +;; ld a0,0(a2) +;; add a0,a0,t2 +;; lui a2,1 +;; add a0,a0,a2 ;; li a2,0 -;; selectif_spectre_guard t1,a2,a0##test=t2 -;; sw a1,0(t1) +;; ugt t1,t2,t1##ty=i64 +;; selectif_spectre_guard t2,a2,a0##test=t1 +;; sw a1,0(t2) ;; j label1 ;; block1: ;; ret @@ -59,16 +59,16 @@ ;; block0: ;; slli t0,a0,32 ;; srli t2,t0,32 -;; ld t1,0(a1) -;; add t1,t1,t2 -;; lui t0,1 -;; add a0,t1,t0 -;; lui t4,65535 -;; addi t4,t4,4092 -;; ugt t2,t2,t4##ty=i64 +;; lui t1,65535 +;; addi t1,t1,4092 +;; ld a0,0(a1) +;; add a0,a0,t2 +;; lui a1,1 +;; add a0,a0,a1 ;; li a1,0 -;; selectif_spectre_guard t1,a1,a0##test=t2 -;; lw a0,0(t1) +;; ugt t1,t2,t1##ty=i64 +;; selectif_spectre_guard t2,a1,a0##test=t1 +;; lw a0,0(t2) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat index 5d97bc8ddb6d..f3271adaf721 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -41,14 +41,14 @@ ;; block0: ;; slli t3,a0,32 ;; srli t0,t3,32 -;; ld t4,0(a2) -;; add t4,t4,t0 -;; lui a7,65536 -;; addi a7,a7,4095 -;; ugt t0,t0,a7##ty=i64 +;; lui t4,65536 +;; addi t4,t4,4095 +;; ld t1,0(a2) +;; add t1,t1,t0 ;; li t2,0 -;; selectif_spectre_guard t1,t2,t4##test=t0 -;; sb a1,0(t1) +;; ugt t4,t0,t4##ty=i64 +;; selectif_spectre_guard t0,t2,t1##test=t4 +;; sb a1,0(t0) ;; j label1 ;; block1: ;; ret @@ -57,14 +57,14 @@ ;; block0: ;; slli t3,a0,32 ;; srli t0,t3,32 -;; ld t4,0(a1) -;; add t4,t4,t0 -;; lui a7,65536 -;; addi a7,a7,4095 -;; ugt t0,t0,a7##ty=i64 +;; lui t4,65536 +;; addi t4,t4,4095 +;; ld t1,0(a1) +;; add t1,t1,t0 ;; li t2,0 -;; selectif_spectre_guard t1,t2,t4##test=t0 -;; lbu a0,0(t1) +;; ugt t4,t0,t4##ty=i64 +;; selectif_spectre_guard t0,t2,t1##test=t4 +;; lbu a0,0(t0) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 835d9194f0c9..decd139e2735 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -41,16 +41,16 @@ ;; block0: ;; slli t0,a0,32 ;; srli t2,t0,32 -;; ld t1,0(a2) -;; add t1,t1,t2 -;; lui t0,1 -;; add a0,t1,t0 -;; lui t4,65535 -;; addi t4,t4,4095 -;; ugt t2,t2,t4##ty=i64 +;; lui t1,65535 +;; addi t1,t1,4095 +;; ld a0,0(a2) +;; add a0,a0,t2 +;; lui a2,1 +;; add a0,a0,a2 ;; li a2,0 -;; selectif_spectre_guard t1,a2,a0##test=t2 -;; sb a1,0(t1) +;; ugt t1,t2,t1##ty=i64 +;; selectif_spectre_guard t2,a2,a0##test=t1 +;; sb a1,0(t2) ;; j label1 ;; block1: ;; ret @@ -59,16 +59,16 @@ ;; block0: ;; slli t0,a0,32 ;; srli t2,t0,32 -;; ld t1,0(a1) -;; add t1,t1,t2 -;; lui t0,1 -;; add a0,t1,t0 -;; lui t4,65535 -;; addi t4,t4,4095 -;; ugt t2,t2,t4##ty=i64 +;; lui t1,65535 +;; addi t1,t1,4095 +;; ld a0,0(a1) +;; add a0,a0,t2 +;; lui a1,1 +;; add a0,a0,a1 ;; li a1,0 -;; selectif_spectre_guard t1,a1,a0##test=t2 -;; lbu a0,0(t1) +;; ugt t1,t2,t1##ty=i64 +;; selectif_spectre_guard t2,a1,a0##test=t1 +;; lbu a0,0(t2) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index 75a28cea5c28..d2390c65b5db 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -43,9 +43,9 @@ ;; srli a7,a5,32 ;; ld a6,0(a2) ;; add a6,a6,a7 -;; lui a5,1 -;; add a7,a6,a5 -;; sw a1,0(a7) +;; lui a7,1 +;; add a6,a6,a7 +;; sw a1,0(a6) ;; j label1 ;; block1: ;; ret @@ -56,9 +56,9 @@ ;; srli a7,a5,32 ;; ld a6,0(a1) ;; add a6,a6,a7 -;; lui a5,1 -;; add a7,a6,a5 -;; lw a0,0(a7) +;; lui a7,1 +;; add a6,a6,a7 +;; lw a0,0(a6) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index d3a36659ddc0..48c30a796b8a 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -43,9 +43,9 @@ ;; srli a7,a5,32 ;; ld a6,0(a2) ;; add a6,a6,a7 -;; lui a5,1 -;; add a7,a6,a5 -;; sb a1,0(a7) +;; lui a7,1 +;; add a6,a6,a7 +;; sb a1,0(a6) ;; j label1 ;; block1: ;; ret @@ -56,9 +56,9 @@ ;; srli a7,a5,32 ;; ld a6,0(a1) ;; add a6,a6,a7 -;; lui a5,1 -;; add a7,a6,a5 -;; lbu a0,0(a7) +;; lui a7,1 +;; add a6,a6,a7 +;; lbu a0,0(a6) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index f8efae67b32d..889889d2f084 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -43,9 +43,9 @@ ;; srli a7,a5,32 ;; ld a6,0(a2) ;; add a6,a6,a7 -;; lui a5,1 -;; add a7,a6,a5 -;; sw a1,0(a7) +;; lui a7,1 +;; add a6,a6,a7 +;; sw a1,0(a6) ;; j label1 ;; block1: ;; ret @@ -56,9 +56,9 @@ ;; srli a7,a5,32 ;; ld a6,0(a1) ;; add a6,a6,a7 -;; lui a5,1 -;; add a7,a6,a5 -;; lw a0,0(a7) +;; lui a7,1 +;; add a6,a6,a7 +;; lw a0,0(a6) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index 00976bf85775..b2b4cee3bdbc 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -43,9 +43,9 @@ ;; srli a7,a5,32 ;; ld a6,0(a2) ;; add a6,a6,a7 -;; lui a5,1 -;; add a7,a6,a5 -;; sb a1,0(a7) +;; lui a7,1 +;; add a6,a6,a7 +;; sb a1,0(a6) ;; j label1 ;; block1: ;; ret @@ -56,9 +56,9 @@ ;; srli a7,a5,32 ;; ld a6,0(a1) ;; add a6,a6,a7 -;; lui a5,1 -;; add a7,a6,a5 -;; lbu a0,0(a7) +;; lui a7,1 +;; add a6,a6,a7 +;; lbu a0,0(a6) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat index 872204358c70..48035981444f 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat @@ -39,10 +39,10 @@ ;; function u0:0: ;; block0: -;; lui a4,65536 -;; addi a4,a4,4092 -;; ugt a7,a0,a4##ty=i64 -;; bne a7,zero,taken(label3),not_taken(label1) +;; lui a5,65536 +;; addi a5,a5,4092 +;; ugt a5,a0,a5##ty=i64 +;; bne a5,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a6,0(a2) ;; add a6,a6,a0 @@ -55,10 +55,10 @@ ;; ;; function u0:1: ;; block0: -;; lui a4,65536 -;; addi a4,a4,4092 -;; ugt a7,a0,a4##ty=i64 -;; bne a7,zero,taken(label3),not_taken(label1) +;; lui a5,65536 +;; addi a5,a5,4092 +;; ugt a5,a0,a5##ty=i64 +;; bne a5,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a6,0(a1) ;; add a6,a6,a0 diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 13cec12685ad..e5dc45b23db4 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -39,16 +39,16 @@ ;; function u0:0: ;; block0: -;; lui a6,65535 -;; addi a6,a6,4092 -;; ugt t4,a0,a6##ty=i64 -;; bne t4,zero,taken(label3),not_taken(label1) +;; lui a7,65535 +;; addi a7,a7,4092 +;; ugt a7,a0,a7##ty=i64 +;; bne a7,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t3,0(a2) ;; add t3,t3,a0 -;; lui a7,1 -;; add t4,t3,a7 -;; sw a1,0(t4) +;; lui t4,1 +;; add t3,t3,t4 +;; sw a1,0(t3) ;; j label2 ;; block2: ;; ret @@ -57,16 +57,16 @@ ;; ;; function u0:1: ;; block0: -;; lui a6,65535 -;; addi a6,a6,4092 -;; ugt t4,a0,a6##ty=i64 -;; bne t4,zero,taken(label3),not_taken(label1) +;; lui a7,65535 +;; addi a7,a7,4092 +;; ugt a7,a0,a7##ty=i64 +;; bne a7,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t3,0(a1) ;; add t3,t3,a0 -;; lui a7,1 -;; add t4,t3,a7 -;; lw a0,0(t4) +;; lui t4,1 +;; add t3,t3,t4 +;; lw a0,0(t3) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat index 64471134fb76..1c3e1fdfc4ce 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0_offset.wat @@ -39,10 +39,10 @@ ;; function u0:0: ;; block0: -;; lui a4,65536 -;; addi a4,a4,4095 -;; ugt a7,a0,a4##ty=i64 -;; bne a7,zero,taken(label3),not_taken(label1) +;; lui a5,65536 +;; addi a5,a5,4095 +;; ugt a5,a0,a5##ty=i64 +;; bne a5,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a6,0(a2) ;; add a6,a6,a0 @@ -55,10 +55,10 @@ ;; ;; function u0:1: ;; block0: -;; lui a4,65536 -;; addi a4,a4,4095 -;; ugt a7,a0,a4##ty=i64 -;; bne a7,zero,taken(label3),not_taken(label1) +;; lui a5,65536 +;; addi a5,a5,4095 +;; ugt a5,a0,a5##ty=i64 +;; bne a5,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a6,0(a1) ;; add a6,a6,a0 diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index ee627755952e..320be4fbcd78 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -39,16 +39,16 @@ ;; function u0:0: ;; block0: -;; lui a6,65535 -;; addi a6,a6,4095 -;; ugt t4,a0,a6##ty=i64 -;; bne t4,zero,taken(label3),not_taken(label1) +;; lui a7,65535 +;; addi a7,a7,4095 +;; ugt a7,a0,a7##ty=i64 +;; bne a7,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t3,0(a2) ;; add t3,t3,a0 -;; lui a7,1 -;; add t4,t3,a7 -;; sb a1,0(t4) +;; lui t4,1 +;; add t3,t3,t4 +;; sb a1,0(t3) ;; j label2 ;; block2: ;; ret @@ -57,16 +57,16 @@ ;; ;; function u0:1: ;; block0: -;; lui a6,65535 -;; addi a6,a6,4095 -;; ugt t4,a0,a6##ty=i64 -;; bne t4,zero,taken(label3),not_taken(label1) +;; lui a7,65535 +;; addi a7,a7,4095 +;; ugt a7,a0,a7##ty=i64 +;; bne a7,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t3,0(a1) ;; add t3,t3,a0 -;; lui a7,1 -;; add t4,t3,a7 -;; lbu a0,0(t4) +;; lui t4,1 +;; add t3,t3,t4 +;; lbu a0,0(t3) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat index fd74f5bae208..f9cf2b3b6300 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -39,28 +39,28 @@ ;; function u0:0: ;; block0: -;; ld a7,0(a2) -;; add a7,a7,a0 -;; lui a5,65536 -;; addi a5,a5,4092 -;; ugt t3,a0,a5##ty=i64 -;; li t0,0 -;; selectif_spectre_guard t4,t0,a7##test=t3 -;; sw a1,0(t4) +;; lui a7,65536 +;; addi a7,a7,4092 +;; ld t3,0(a2) +;; add t3,t3,a0 +;; li t4,0 +;; ugt a7,a0,a7##ty=i64 +;; selectif_spectre_guard t0,t4,t3##test=a7 +;; sw a1,0(t0) ;; j label1 ;; block1: ;; ret ;; ;; function u0:1: ;; block0: -;; ld a7,0(a1) -;; add a7,a7,a0 -;; lui a5,65536 -;; addi a5,a5,4092 -;; ugt t3,a0,a5##ty=i64 -;; li t0,0 -;; selectif_spectre_guard t4,t0,a7##test=t3 -;; lw a0,0(t4) +;; lui a7,65536 +;; addi a7,a7,4092 +;; ld t3,0(a1) +;; add t3,t3,a0 +;; li t4,0 +;; ugt a7,a0,a7##ty=i64 +;; selectif_spectre_guard t0,t4,t3##test=a7 +;; lw a0,0(t0) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 303968648958..338900641c6e 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -39,32 +39,32 @@ ;; function u0:0: ;; block0: -;; ld t4,0(a2) -;; add t4,t4,a0 -;; lui t3,1 -;; add t0,t4,t3 -;; lui a7,65535 -;; addi a7,a7,4092 -;; ugt t1,a0,a7##ty=i64 -;; li t2,0 -;; selectif_spectre_guard t4,t2,t0##test=t1 -;; sw a1,0(t4) +;; lui t4,65535 +;; addi t4,t4,4092 +;; ld t0,0(a2) +;; add t0,t0,a0 +;; lui t1,1 +;; add t0,t0,t1 +;; li t1,0 +;; ugt t4,a0,t4##ty=i64 +;; selectif_spectre_guard t2,t1,t0##test=t4 +;; sw a1,0(t2) ;; j label1 ;; block1: ;; ret ;; ;; function u0:1: ;; block0: -;; ld t4,0(a1) -;; add t4,t4,a0 -;; lui t3,1 -;; add t0,t4,t3 -;; lui a7,65535 -;; addi a7,a7,4092 -;; ugt t1,a0,a7##ty=i64 -;; li t2,0 -;; selectif_spectre_guard t4,t2,t0##test=t1 -;; lw a0,0(t4) +;; lui t4,65535 +;; addi t4,t4,4092 +;; ld t0,0(a1) +;; add t0,t0,a0 +;; lui t1,1 +;; add t0,t0,t1 +;; li t1,0 +;; ugt t4,a0,t4##ty=i64 +;; selectif_spectre_guard t2,t1,t0##test=t4 +;; lw a0,0(t2) ;; j label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat index d98101b5722d..048c78e4144b 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -39,28 +39,28 @@ ;; function u0:0: ;; block0: -;; ld a7,0(a2) -;; add a7,a7,a0 -;; lui a5,65536 -;; addi a5,a5,4095 -;; ugt t3,a0,a5##ty=i64 -;; li t0,0 -;; selectif_spectre_guard t4,t0,a7##test=t3 -;; sb a1,0(t4) +;; lui a7,65536 +;; addi a7,a7,4095 +;; ld t3,0(a2) +;; add t3,t3,a0 +;; li t4,0 +;; ugt a7,a0,a7##ty=i64 +;; selectif_spectre_guard t0,t4,t3##test=a7 +;; sb a1,0(t0) ;; j label1 ;; block1: ;; ret ;; ;; function u0:1: ;; block0: -;; ld a7,0(a1) -;; add a7,a7,a0 -;; lui a5,65536 -;; addi a5,a5,4095 -;; ugt t3,a0,a5##ty=i64 -;; li t0,0 -;; selectif_spectre_guard t4,t0,a7##test=t3 -;; lbu a0,0(t4) +;; lui a7,65536 +;; addi a7,a7,4095 +;; ld t3,0(a1) +;; add t3,t3,a0 +;; li t4,0 +;; ugt a7,a0,a7##ty=i64 +;; selectif_spectre_guard t0,t4,t3##test=a7 +;; lbu a0,0(t0) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 64a1daff3e3c..b12f888e44ad 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -39,32 +39,32 @@ ;; function u0:0: ;; block0: -;; ld t4,0(a2) -;; add t4,t4,a0 -;; lui t3,1 -;; add t0,t4,t3 -;; lui a7,65535 -;; addi a7,a7,4095 -;; ugt t1,a0,a7##ty=i64 -;; li t2,0 -;; selectif_spectre_guard t4,t2,t0##test=t1 -;; sb a1,0(t4) +;; lui t4,65535 +;; addi t4,t4,4095 +;; ld t0,0(a2) +;; add t0,t0,a0 +;; lui t1,1 +;; add t0,t0,t1 +;; li t1,0 +;; ugt t4,a0,t4##ty=i64 +;; selectif_spectre_guard t2,t1,t0##test=t4 +;; sb a1,0(t2) ;; j label1 ;; block1: ;; ret ;; ;; function u0:1: ;; block0: -;; ld t4,0(a1) -;; add t4,t4,a0 -;; lui t3,1 -;; add t0,t4,t3 -;; lui a7,65535 -;; addi a7,a7,4095 -;; ugt t1,a0,a7##ty=i64 -;; li t2,0 -;; selectif_spectre_guard t4,t2,t0##test=t1 -;; lbu a0,0(t4) +;; lui t4,65535 +;; addi t4,t4,4095 +;; ld t0,0(a1) +;; add t0,t0,a0 +;; lui t1,1 +;; add t0,t0,t1 +;; li t1,0 +;; ugt t4,a0,t4##ty=i64 +;; selectif_spectre_guard t2,t1,t0##test=t4 +;; lbu a0,0(t2) ;; j label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat index 7b096f23ee9e..c0f6b6f0d612 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0_offset.wat @@ -39,10 +39,10 @@ ;; function u0:0: ;; block0: -;; lui a4,65536 -;; addi a4,a4,4092 -;; ugt a7,a0,a4##ty=i64 -;; bne a7,zero,taken(label3),not_taken(label1) +;; lui a5,65536 +;; addi a5,a5,4092 +;; ugt a5,a0,a5##ty=i64 +;; bne a5,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a6,0(a2) ;; add a6,a6,a0 @@ -55,10 +55,10 @@ ;; ;; function u0:1: ;; block0: -;; lui a4,65536 -;; addi a4,a4,4092 -;; ugt a7,a0,a4##ty=i64 -;; bne a7,zero,taken(label3),not_taken(label1) +;; lui a5,65536 +;; addi a5,a5,4092 +;; ugt a5,a0,a5##ty=i64 +;; bne a5,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a6,0(a1) ;; add a6,a6,a0 diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index 820c3d3a09e5..b326b7a1c559 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -39,16 +39,16 @@ ;; function u0:0: ;; block0: -;; lui a6,65535 -;; addi a6,a6,4092 -;; ugt t4,a0,a6##ty=i64 -;; bne t4,zero,taken(label3),not_taken(label1) +;; lui a7,65535 +;; addi a7,a7,4092 +;; ugt a7,a0,a7##ty=i64 +;; bne a7,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t3,0(a2) ;; add t3,t3,a0 -;; lui a7,1 -;; add t4,t3,a7 -;; sw a1,0(t4) +;; lui t4,1 +;; add t3,t3,t4 +;; sw a1,0(t3) ;; j label2 ;; block2: ;; ret @@ -57,16 +57,16 @@ ;; ;; function u0:1: ;; block0: -;; lui a6,65535 -;; addi a6,a6,4092 -;; ugt t4,a0,a6##ty=i64 -;; bne t4,zero,taken(label3),not_taken(label1) +;; lui a7,65535 +;; addi a7,a7,4092 +;; ugt a7,a0,a7##ty=i64 +;; bne a7,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t3,0(a1) ;; add t3,t3,a0 -;; lui a7,1 -;; add t4,t3,a7 -;; lw a0,0(t4) +;; lui t4,1 +;; add t3,t3,t4 +;; lw a0,0(t3) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat index f53656b89dbe..05fa839f476a 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0_offset.wat @@ -39,10 +39,10 @@ ;; function u0:0: ;; block0: -;; lui a4,65536 -;; addi a4,a4,4095 -;; ugt a7,a0,a4##ty=i64 -;; bne a7,zero,taken(label3),not_taken(label1) +;; lui a5,65536 +;; addi a5,a5,4095 +;; ugt a5,a0,a5##ty=i64 +;; bne a5,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a6,0(a2) ;; add a6,a6,a0 @@ -55,10 +55,10 @@ ;; ;; function u0:1: ;; block0: -;; lui a4,65536 -;; addi a4,a4,4095 -;; ugt a7,a0,a4##ty=i64 -;; bne a7,zero,taken(label3),not_taken(label1) +;; lui a5,65536 +;; addi a5,a5,4095 +;; ugt a5,a0,a5##ty=i64 +;; bne a5,zero,taken(label3),not_taken(label1) ;; block1: ;; ld a6,0(a1) ;; add a6,a6,a0 diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index e7044351da21..239f0c75c873 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -39,16 +39,16 @@ ;; function u0:0: ;; block0: -;; lui a6,65535 -;; addi a6,a6,4095 -;; ugt t4,a0,a6##ty=i64 -;; bne t4,zero,taken(label3),not_taken(label1) +;; lui a7,65535 +;; addi a7,a7,4095 +;; ugt a7,a0,a7##ty=i64 +;; bne a7,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t3,0(a2) ;; add t3,t3,a0 -;; lui a7,1 -;; add t4,t3,a7 -;; sb a1,0(t4) +;; lui t4,1 +;; add t3,t3,t4 +;; sb a1,0(t3) ;; j label2 ;; block2: ;; ret @@ -57,16 +57,16 @@ ;; ;; function u0:1: ;; block0: -;; lui a6,65535 -;; addi a6,a6,4095 -;; ugt t4,a0,a6##ty=i64 -;; bne t4,zero,taken(label3),not_taken(label1) +;; lui a7,65535 +;; addi a7,a7,4095 +;; ugt a7,a0,a7##ty=i64 +;; bne a7,zero,taken(label3),not_taken(label1) ;; block1: ;; ld t3,0(a1) ;; add t3,t3,a0 -;; lui a7,1 -;; add t4,t3,a7 -;; lbu a0,0(t4) +;; lui t4,1 +;; add t3,t3,t4 +;; lbu a0,0(t3) ;; j label2 ;; block2: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index ba3a1606553b..a7226f095642 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -39,28 +39,28 @@ ;; function u0:0: ;; block0: -;; ld a7,0(a2) -;; add a7,a7,a0 -;; lui a5,65536 -;; addi a5,a5,4092 -;; ugt t3,a0,a5##ty=i64 -;; li t0,0 -;; selectif_spectre_guard t4,t0,a7##test=t3 -;; sw a1,0(t4) +;; lui a7,65536 +;; addi a7,a7,4092 +;; ld t3,0(a2) +;; add t3,t3,a0 +;; li t4,0 +;; ugt a7,a0,a7##ty=i64 +;; selectif_spectre_guard t0,t4,t3##test=a7 +;; sw a1,0(t0) ;; j label1 ;; block1: ;; ret ;; ;; function u0:1: ;; block0: -;; ld a7,0(a1) -;; add a7,a7,a0 -;; lui a5,65536 -;; addi a5,a5,4092 -;; ugt t3,a0,a5##ty=i64 -;; li t0,0 -;; selectif_spectre_guard t4,t0,a7##test=t3 -;; lw a0,0(t4) +;; lui a7,65536 +;; addi a7,a7,4092 +;; ld t3,0(a1) +;; add t3,t3,a0 +;; li t4,0 +;; ugt a7,a0,a7##ty=i64 +;; selectif_spectre_guard t0,t4,t3##test=a7 +;; lw a0,0(t0) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index 0adb37c09d7d..0ef257ed21a8 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -39,32 +39,32 @@ ;; function u0:0: ;; block0: -;; ld t4,0(a2) -;; add t4,t4,a0 -;; lui t3,1 -;; add t0,t4,t3 -;; lui a7,65535 -;; addi a7,a7,4092 -;; ugt t1,a0,a7##ty=i64 -;; li t2,0 -;; selectif_spectre_guard t4,t2,t0##test=t1 -;; sw a1,0(t4) +;; lui t4,65535 +;; addi t4,t4,4092 +;; ld t0,0(a2) +;; add t0,t0,a0 +;; lui t1,1 +;; add t0,t0,t1 +;; li t1,0 +;; ugt t4,a0,t4##ty=i64 +;; selectif_spectre_guard t2,t1,t0##test=t4 +;; sw a1,0(t2) ;; j label1 ;; block1: ;; ret ;; ;; function u0:1: ;; block0: -;; ld t4,0(a1) -;; add t4,t4,a0 -;; lui t3,1 -;; add t0,t4,t3 -;; lui a7,65535 -;; addi a7,a7,4092 -;; ugt t1,a0,a7##ty=i64 -;; li t2,0 -;; selectif_spectre_guard t4,t2,t0##test=t1 -;; lw a0,0(t4) +;; lui t4,65535 +;; addi t4,t4,4092 +;; ld t0,0(a1) +;; add t0,t0,a0 +;; lui t1,1 +;; add t0,t0,t1 +;; li t1,0 +;; ugt t4,a0,t4##ty=i64 +;; selectif_spectre_guard t2,t1,t0##test=t4 +;; lw a0,0(t2) ;; j label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index 82d8bbc052d6..d7cb0c8ecfa6 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -39,28 +39,28 @@ ;; function u0:0: ;; block0: -;; ld a7,0(a2) -;; add a7,a7,a0 -;; lui a5,65536 -;; addi a5,a5,4095 -;; ugt t3,a0,a5##ty=i64 -;; li t0,0 -;; selectif_spectre_guard t4,t0,a7##test=t3 -;; sb a1,0(t4) +;; lui a7,65536 +;; addi a7,a7,4095 +;; ld t3,0(a2) +;; add t3,t3,a0 +;; li t4,0 +;; ugt a7,a0,a7##ty=i64 +;; selectif_spectre_guard t0,t4,t3##test=a7 +;; sb a1,0(t0) ;; j label1 ;; block1: ;; ret ;; ;; function u0:1: ;; block0: -;; ld a7,0(a1) -;; add a7,a7,a0 -;; lui a5,65536 -;; addi a5,a5,4095 -;; ugt t3,a0,a5##ty=i64 -;; li t0,0 -;; selectif_spectre_guard t4,t0,a7##test=t3 -;; lbu a0,0(t4) +;; lui a7,65536 +;; addi a7,a7,4095 +;; ld t3,0(a1) +;; add t3,t3,a0 +;; li t4,0 +;; ugt a7,a0,a7##ty=i64 +;; selectif_spectre_guard t0,t4,t3##test=a7 +;; lbu a0,0(t0) ;; j label1 ;; block1: ;; ret diff --git a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index c593deacf23e..d67afb1fda15 100644 --- a/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/riscv64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -39,32 +39,32 @@ ;; function u0:0: ;; block0: -;; ld t4,0(a2) -;; add t4,t4,a0 -;; lui t3,1 -;; add t0,t4,t3 -;; lui a7,65535 -;; addi a7,a7,4095 -;; ugt t1,a0,a7##ty=i64 -;; li t2,0 -;; selectif_spectre_guard t4,t2,t0##test=t1 -;; sb a1,0(t4) +;; lui t4,65535 +;; addi t4,t4,4095 +;; ld t0,0(a2) +;; add t0,t0,a0 +;; lui t1,1 +;; add t0,t0,t1 +;; li t1,0 +;; ugt t4,a0,t4##ty=i64 +;; selectif_spectre_guard t2,t1,t0##test=t4 +;; sb a1,0(t2) ;; j label1 ;; block1: ;; ret ;; ;; function u0:1: ;; block0: -;; ld t4,0(a1) -;; add t4,t4,a0 -;; lui t3,1 -;; add t0,t4,t3 -;; lui a7,65535 -;; addi a7,a7,4095 -;; ugt t1,a0,a7##ty=i64 -;; li t2,0 -;; selectif_spectre_guard t4,t2,t0##test=t1 -;; lbu a0,0(t4) +;; lui t4,65535 +;; addi t4,t4,4095 +;; ld t0,0(a1) +;; add t0,t0,a0 +;; lui t1,1 +;; add t0,t0,t1 +;; li t1,0 +;; ugt t4,a0,t4##ty=i64 +;; selectif_spectre_guard t2,t1,t0##test=t4 +;; lbu a0,0(t2) ;; j label1 ;; block1: -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/s390x/multivalue-ret.clif b/cranelift/filetests/filetests/isa/s390x/multivalue-ret.clif index 546d60c90ff3..0901101d2bb3 100644 --- a/cranelift/filetests/filetests/isa/s390x/multivalue-ret.clif +++ b/cranelift/filetests/filetests/isa/s390x/multivalue-ret.clif @@ -38,36 +38,36 @@ block1: } ; VCode: -; stmg %r7, %r15, 56(%r15) +; stmg %r6, %r15, 48(%r15) ; block0: -; lghi %r4, 1 -; lgr %r14, %r4 +; lghi %r5, 1 +; lgr %r6, %r5 ; lghi %r3, 2 ; lghi %r4, 3 ; lghi %r5, 4 -; lghi %r7, 5 -; lghi %r9, 6 -; stg %r7, 0(%r2) -; stg %r9, 8(%r2) -; lgr %r2, %r14 -; lmg %r7, %r15, 56(%r15) +; lghi %r13, 5 +; lghi %r14, 6 +; stg %r13, 0(%r2) +; stg %r14, 8(%r2) +; lgr %r2, %r6 +; lmg %r6, %r15, 48(%r15) ; br %r14 ; ; Disassembled: ; block0: ; offset 0x0 -; stmg %r7, %r15, 0x38(%r15) +; stmg %r6, %r15, 0x30(%r15) ; block1: ; offset 0x6 -; lghi %r4, 1 -; lgr %r14, %r4 +; lghi %r5, 1 +; lgr %r6, %r5 ; lghi %r3, 2 ; lghi %r4, 3 ; lghi %r5, 4 -; lghi %r7, 5 -; lghi %r9, 6 -; stg %r7, 0(%r2) -; stg %r9, 8(%r2) -; lgr %r2, %r14 -; lmg %r7, %r15, 0x38(%r15) +; lghi %r13, 5 +; lghi %r14, 6 +; stg %r13, 0(%r2) +; stg %r14, 8(%r2) +; lgr %r2, %r6 +; lmg %r6, %r15, 0x30(%r15) ; br %r14 function %f3() -> f64, f64, f64, f64 { @@ -130,10 +130,10 @@ block1: ; bras %r1, 12 ; data.f64 1 ; ld %f2, 0(%r1) ; bras %r1, 12 ; data.f64 2 ; ld %f4, 0(%r1) ; bras %r1, 12 ; data.f64 3 ; ld %f6, 0(%r1) -; bras %r1, 12 ; data.f64 4 ; vleg %v18, 0(%r1), 0 -; bras %r1, 12 ; data.f64 5 ; vleg %v20, 0(%r1), 0 -; vsteg %v18, 0(%r2), 0 -; vsteg %v20, 8(%r2), 0 +; bras %r1, 12 ; data.f64 4 ; ld %f7, 0(%r1) +; bras %r1, 12 ; data.f64 5 ; vleg %v16, 0(%r1), 0 +; std %f7, 0(%r2) +; vsteg %v16, 8(%r2), 0 ; br %r14 ; ; Disassembled: @@ -164,13 +164,13 @@ block1: ; sth %r1, 0 ; .byte 0x00, 0x00 ; .byte 0x00, 0x00 -; vleg %v18, 0(%r1), 0 -; bras %r1, 0x5e +; ld %f7, 0(%r1) +; bras %r1, 0x5c ; sth %r1, 0(%r4) ; .byte 0x00, 0x00 ; .byte 0x00, 0x00 -; vleg %v20, 0(%r1), 0 -; vsteg %v18, 0(%r2), 0 -; vsteg %v20, 8(%r2), 0 +; vleg %v16, 0(%r1), 0 +; std %f7, 0(%r2) +; vsteg %v16, 8(%r2), 0 ; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat index 58e5f08946ca..bce6ac9ab2c5 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat @@ -62,9 +62,9 @@ ;; unwind StackAlloc { size: 0 } ;; block0: ;; llgfr %r5, %r2 -;; lghi %r2, -4 -;; ag %r2, 8(%r3) -;; clgr %r5, %r2 +;; lghi %r4, -4 +;; ag %r4, 8(%r3) +;; clgr %r5, %r4 ;; jgh label3 ; jg label1 ;; block1: ;; lg %r3, 0(%r3) diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 36dc8ac55039..92de57a3f35a 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -78,18 +78,20 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r4, %r3 +;; lgr %r5, %r3 ;; llgfr %r3, %r2 -;; llilf %r5, 4294901764 -;; algfr %r5, %r2 +;; lgr %r4, %r2 +;; llilf %r2, 4294901764 +;; algfr %r2, %r4 ;; jgnle .+2 # trap=heap_oob -;; lg %r2, 8(%r4) -;; clgr %r5, %r2 +;; lgr %r4, %r5 +;; lg %r5, 8(%r4) +;; clgr %r2, %r5 ;; jgh label3 ; jg label1 ;; block1: ;; ag %r3, 0(%r4) -;; llilh %r5, 65535 -;; lrv %r2, 0(%r5,%r3) +;; llilh %r2, 65535 +;; lrv %r2, 0(%r2,%r3) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index 2c17d1cc0c90..559b03c3e981 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -78,18 +78,20 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r4, %r3 +;; lgr %r5, %r3 ;; llgfr %r3, %r2 -;; llilf %r5, 4294901761 -;; algfr %r5, %r2 +;; lgr %r4, %r2 +;; llilf %r2, 4294901761 +;; algfr %r2, %r4 ;; jgnle .+2 # trap=heap_oob -;; lg %r2, 8(%r4) -;; clgr %r5, %r2 +;; lgr %r4, %r5 +;; lg %r5, 8(%r4) +;; clgr %r2, %r5 ;; jgh label3 ; jg label1 ;; block1: ;; ag %r3, 0(%r4) -;; llilh %r5, 65535 -;; llc %r2, 0(%r5,%r3) +;; llilh %r2, 65535 +;; llc %r2, 0(%r2,%r3) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat index fe721964fb56..43b77d818c52 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -41,7 +41,8 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r7, %r15, 56(%r15) +;; stmg %r6, %r15, 48(%r15) +;; unwind SaveReg { clobber_offset: 48, reg: p6i } ;; unwind SaveReg { clobber_offset: 56, reg: p7i } ;; unwind SaveReg { clobber_offset: 64, reg: p8i } ;; unwind SaveReg { clobber_offset: 72, reg: p9i } @@ -53,36 +54,36 @@ ;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r7, %r4 +;; lgr %r5, %r4 ;; llgfr %r4, %r2 -;; lghi %r5, -4 -;; lgr %r9, %r7 -;; ag %r5, 8(%r9) -;; lgr %r2, %r4 -;; ag %r2, 0(%r9) -;; lghi %r14, 0 -;; clgr %r4, %r5 -;; locgrh %r2, %r14 -;; strv %r3, 0(%r2) +;; lghi %r2, -4 +;; lgr %r9, %r5 +;; ag %r2, 8(%r9) +;; lgr %r5, %r4 +;; ag %r5, 0(%r9) +;; lghi %r6, 0 +;; clgr %r4, %r2 +;; locgrh %r5, %r6 +;; strv %r3, 0(%r5) ;; jg label1 ;; block1: -;; lmg %r7, %r15, 56(%r15) +;; lmg %r6, %r15, 48(%r15) ;; br %r14 ;; ;; function u0:1: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r5, %r3 +;; lgr %r4, %r3 ;; llgfr %r3, %r2 -;; lghi %r4, -4 -;; ag %r4, 8(%r5) -;; lgr %r2, %r3 -;; ag %r2, 0(%r5) -;; lghi %r5, 0 -;; clgr %r3, %r4 -;; locgrh %r2, %r5 -;; lrv %r2, 0(%r2) +;; lghi %r2, -4 +;; ag %r2, 8(%r4) +;; lgr %r5, %r3 +;; ag %r5, 0(%r4) +;; lghi %r4, 0 +;; clgr %r3, %r2 +;; locgrh %r5, %r4 +;; lrv %r2, 0(%r5) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 22e4ea549c50..81e0453db504 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -41,8 +41,7 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r6, %r15, 48(%r15) -;; unwind SaveReg { clobber_offset: 48, reg: p6i } +;; stmg %r7, %r15, 56(%r15) ;; unwind SaveReg { clobber_offset: 56, reg: p7i } ;; unwind SaveReg { clobber_offset: 64, reg: p8i } ;; unwind SaveReg { clobber_offset: 72, reg: p9i } @@ -60,29 +59,30 @@ ;; lgr %r7, %r2 ;; ag %r7, 0(%r4) ;; aghik %r4, %r7, 4096 -;; lghi %r6, 0 +;; lghi %r7, 0 ;; clgr %r2, %r5 -;; locgrh %r4, %r6 +;; locgrh %r4, %r7 ;; strv %r3, 0(%r4) ;; jg label1 ;; block1: -;; lmg %r6, %r15, 48(%r15) +;; lmg %r7, %r15, 56(%r15) ;; br %r14 ;; ;; function u0:1: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } ;; unwind StackAlloc { size: 0 } ;; block0: +;; lgr %r5, %r3 ;; llgfr %r4, %r2 -;; lghi %r5, -4100 -;; ag %r5, 8(%r3) +;; lghi %r3, -4100 +;; ag %r3, 8(%r5) ;; lgr %r2, %r4 -;; ag %r2, 0(%r3) -;; aghik %r3, %r2, 4096 -;; lghi %r2, 0 -;; clgr %r4, %r5 -;; locgrh %r3, %r2 -;; lrv %r2, 0(%r3) +;; ag %r2, 0(%r5) +;; aghi %r2, 4096 +;; lghi %r5, 0 +;; clgr %r4, %r3 +;; locgrh %r2, %r5 +;; lrv %r2, 0(%r2) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index bd864d0c60c1..5d1c7f1916ee 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -41,8 +41,7 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r9, %r15, 72(%r15) -;; unwind SaveReg { clobber_offset: 72, reg: p9i } +;; stmg %r10, %r15, 80(%r15) ;; unwind SaveReg { clobber_offset: 80, reg: p10i } ;; unwind SaveReg { clobber_offset: 88, reg: p11i } ;; unwind SaveReg { clobber_offset: 96, reg: p12i } @@ -51,43 +50,43 @@ ;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r5, %r4 -;; llgfr %r4, %r2 -;; llilf %r9, 4294901764 -;; algfr %r9, %r2 +;; llgfr %r14, %r2 +;; llilf %r5, 4294901764 +;; algfr %r5, %r2 ;; jgnle .+2 # trap=heap_oob -;; lgr %r2, %r5 -;; lg %r5, 8(%r2) -;; ag %r4, 0(%r2) -;; llilh %r2, 65535 -;; agr %r4, %r2 -;; lghi %r2, 0 -;; clgr %r9, %r5 -;; locgrh %r4, %r2 -;; strv %r3, 0(%r4) +;; lg %r10, 8(%r4) +;; ag %r14, 0(%r4) +;; llilh %r4, 65535 +;; agrk %r2, %r14, %r4 +;; lghi %r4, 0 +;; clgr %r5, %r10 +;; locgrh %r2, %r4 +;; strv %r3, 0(%r2) ;; jg label1 ;; block1: -;; lmg %r9, %r15, 72(%r15) +;; lmg %r10, %r15, 80(%r15) ;; br %r14 ;; ;; function u0:1: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } +;; stmg %r14, %r15, 112(%r15) +;; unwind SaveReg { clobber_offset: 112, reg: p14i } +;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r4, %r3 -;; llgfr %r3, %r2 +;; llgfr %r14, %r2 ;; llilf %r5, 4294901764 ;; algfr %r5, %r2 ;; jgnle .+2 # trap=heap_oob -;; lgr %r2, %r4 -;; lg %r4, 8(%r2) -;; ag %r3, 0(%r2) -;; llilh %r2, 65535 -;; agr %r3, %r2 -;; lghi %r2, 0 +;; lg %r4, 8(%r3) +;; ag %r14, 0(%r3) +;; llilh %r3, 65535 +;; agrk %r2, %r14, %r3 +;; lghi %r3, 0 ;; clgr %r5, %r4 -;; locgrh %r3, %r2 -;; lrv %r2, 0(%r3) +;; locgrh %r2, %r3 +;; lrv %r2, 0(%r2) ;; jg label1 ;; block1: +;; lmg %r14, %r15, 112(%r15) ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat index 5e785edee68d..334a42b8eee9 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -41,22 +41,29 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r14, %r15, 112(%r15) +;; stmg %r8, %r15, 64(%r15) +;; unwind SaveReg { clobber_offset: 64, reg: p8i } +;; unwind SaveReg { clobber_offset: 72, reg: p9i } +;; unwind SaveReg { clobber_offset: 80, reg: p10i } +;; unwind SaveReg { clobber_offset: 88, reg: p11i } +;; unwind SaveReg { clobber_offset: 96, reg: p12i } +;; unwind SaveReg { clobber_offset: 104, reg: p13i } ;; unwind SaveReg { clobber_offset: 112, reg: p14i } ;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: ;; llgfr %r2, %r2 -;; lg %r14, 8(%r4) -;; lgr %r5, %r2 -;; ag %r5, 0(%r4) -;; lghi %r4, 0 -;; clgr %r2, %r14 -;; locgrhe %r5, %r4 -;; stc %r3, 0(%r5) +;; lg %r5, 8(%r4) +;; lgr %r8, %r4 +;; lgr %r4, %r2 +;; ag %r4, 0(%r8) +;; lghi %r14, 0 +;; clgr %r2, %r5 +;; locgrhe %r4, %r14 +;; stc %r3, 0(%r4) ;; jg label1 ;; block1: -;; lmg %r14, %r15, 112(%r15) +;; lmg %r8, %r15, 64(%r15) ;; br %r14 ;; ;; function u0:1: @@ -64,13 +71,13 @@ ;; unwind StackAlloc { size: 0 } ;; block0: ;; llgfr %r2, %r2 -;; lg %r4, 8(%r3) -;; lgr %r5, %r2 -;; ag %r5, 0(%r3) +;; lg %r5, 8(%r3) +;; lgr %r4, %r2 +;; ag %r4, 0(%r3) ;; lghi %r3, 0 -;; clgr %r2, %r4 -;; locgrhe %r5, %r3 -;; llc %r2, 0(%r5) +;; clgr %r2, %r5 +;; locgrhe %r4, %r3 +;; llc %r2, 0(%r4) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 56c2fa068799..6b8578881d42 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -41,8 +41,7 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r6, %r15, 48(%r15) -;; unwind SaveReg { clobber_offset: 48, reg: p6i } +;; stmg %r7, %r15, 56(%r15) ;; unwind SaveReg { clobber_offset: 56, reg: p7i } ;; unwind SaveReg { clobber_offset: 64, reg: p8i } ;; unwind SaveReg { clobber_offset: 72, reg: p9i } @@ -60,29 +59,30 @@ ;; lgr %r7, %r2 ;; ag %r7, 0(%r4) ;; aghik %r4, %r7, 4096 -;; lghi %r6, 0 +;; lghi %r7, 0 ;; clgr %r2, %r5 -;; locgrh %r4, %r6 +;; locgrh %r4, %r7 ;; stc %r3, 0(%r4) ;; jg label1 ;; block1: -;; lmg %r6, %r15, 48(%r15) +;; lmg %r7, %r15, 56(%r15) ;; br %r14 ;; ;; function u0:1: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } ;; unwind StackAlloc { size: 0 } ;; block0: +;; lgr %r5, %r3 ;; llgfr %r4, %r2 -;; lghi %r5, -4097 -;; ag %r5, 8(%r3) +;; lghi %r3, -4097 +;; ag %r3, 8(%r5) ;; lgr %r2, %r4 -;; ag %r2, 0(%r3) -;; aghik %r3, %r2, 4096 -;; lghi %r2, 0 -;; clgr %r4, %r5 -;; locgrh %r3, %r2 -;; llc %r2, 0(%r3) +;; ag %r2, 0(%r5) +;; aghi %r2, 4096 +;; lghi %r5, 0 +;; clgr %r4, %r3 +;; locgrh %r2, %r5 +;; llc %r2, 0(%r2) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 9f0e71fb6e5e..93550319358b 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -41,8 +41,7 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r9, %r15, 72(%r15) -;; unwind SaveReg { clobber_offset: 72, reg: p9i } +;; stmg %r10, %r15, 80(%r15) ;; unwind SaveReg { clobber_offset: 80, reg: p10i } ;; unwind SaveReg { clobber_offset: 88, reg: p11i } ;; unwind SaveReg { clobber_offset: 96, reg: p12i } @@ -51,43 +50,43 @@ ;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r5, %r4 -;; llgfr %r4, %r2 -;; llilf %r9, 4294901761 -;; algfr %r9, %r2 +;; llgfr %r14, %r2 +;; llilf %r5, 4294901761 +;; algfr %r5, %r2 ;; jgnle .+2 # trap=heap_oob -;; lgr %r2, %r5 -;; lg %r5, 8(%r2) -;; ag %r4, 0(%r2) -;; llilh %r2, 65535 -;; agr %r4, %r2 -;; lghi %r2, 0 -;; clgr %r9, %r5 -;; locgrh %r4, %r2 -;; stc %r3, 0(%r4) +;; lg %r10, 8(%r4) +;; ag %r14, 0(%r4) +;; llilh %r4, 65535 +;; agrk %r2, %r14, %r4 +;; lghi %r4, 0 +;; clgr %r5, %r10 +;; locgrh %r2, %r4 +;; stc %r3, 0(%r2) ;; jg label1 ;; block1: -;; lmg %r9, %r15, 72(%r15) +;; lmg %r10, %r15, 80(%r15) ;; br %r14 ;; ;; function u0:1: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } +;; stmg %r14, %r15, 112(%r15) +;; unwind SaveReg { clobber_offset: 112, reg: p14i } +;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r4, %r3 -;; llgfr %r3, %r2 +;; llgfr %r14, %r2 ;; llilf %r5, 4294901761 ;; algfr %r5, %r2 ;; jgnle .+2 # trap=heap_oob -;; lgr %r2, %r4 -;; lg %r4, 8(%r2) -;; ag %r3, 0(%r2) -;; llilh %r2, 65535 -;; agr %r3, %r2 -;; lghi %r2, 0 +;; lg %r4, 8(%r3) +;; ag %r14, 0(%r3) +;; llilh %r3, 65535 +;; agrk %r2, %r14, %r3 +;; lghi %r3, 0 ;; clgr %r5, %r4 -;; locgrh %r3, %r2 -;; llc %r2, 0(%r3) +;; locgrh %r2, %r3 +;; llc %r2, 0(%r2) ;; jg label1 ;; block1: +;; lmg %r14, %r15, 112(%r15) ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index d9e07610080d..898fac6ffcc6 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -69,8 +69,8 @@ ;; jgh label3 ; jg label1 ;; block1: ;; ag %r3, 0(%r4) -;; lghi %r2, 4096 -;; lrv %r2, 0(%r2,%r3) +;; lghi %r4, 4096 +;; lrv %r2, 0(%r4,%r3) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index 4be98bd7a195..47d8b57e247f 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -69,8 +69,8 @@ ;; jgh label3 ; jg label1 ;; block1: ;; ag %r3, 0(%r4) -;; llilh %r2, 65535 -;; lrv %r2, 0(%r2,%r3) +;; llilh %r4, 65535 +;; lrv %r2, 0(%r4,%r3) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index fa1828b95c78..d3bac7e16fac 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -69,8 +69,8 @@ ;; jgh label3 ; jg label1 ;; block1: ;; ag %r3, 0(%r4) -;; lghi %r2, 4096 -;; llc %r2, 0(%r2,%r3) +;; lghi %r4, 4096 +;; llc %r2, 0(%r4,%r3) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index 49d92de1a8bb..50469a1d1b84 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -69,8 +69,8 @@ ;; jgh label3 ; jg label1 ;; block1: ;; ag %r3, 0(%r4) -;; llilh %r2, 65535 -;; llc %r2, 0(%r2,%r3) +;; llilh %r4, 65535 +;; llc %r2, 0(%r4,%r3) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index a3076eed2a86..3f0878a849f0 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -41,22 +41,29 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r14, %r15, 112(%r15) +;; stmg %r8, %r15, 64(%r15) +;; unwind SaveReg { clobber_offset: 64, reg: p8i } +;; unwind SaveReg { clobber_offset: 72, reg: p9i } +;; unwind SaveReg { clobber_offset: 80, reg: p10i } +;; unwind SaveReg { clobber_offset: 88, reg: p11i } +;; unwind SaveReg { clobber_offset: 96, reg: p12i } +;; unwind SaveReg { clobber_offset: 104, reg: p13i } ;; unwind SaveReg { clobber_offset: 112, reg: p14i } ;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: ;; llgfr %r2, %r2 -;; lg %r14, 8(%r4) -;; lgr %r5, %r2 -;; ag %r5, 0(%r4) -;; lghi %r4, 0 -;; clgr %r2, %r14 -;; locgrh %r5, %r4 -;; strv %r3, 0(%r5) +;; lg %r5, 8(%r4) +;; lgr %r8, %r4 +;; lgr %r4, %r2 +;; ag %r4, 0(%r8) +;; lghi %r14, 0 +;; clgr %r2, %r5 +;; locgrh %r4, %r14 +;; strv %r3, 0(%r4) ;; jg label1 ;; block1: -;; lmg %r14, %r15, 112(%r15) +;; lmg %r8, %r15, 64(%r15) ;; br %r14 ;; ;; function u0:1: @@ -64,13 +71,13 @@ ;; unwind StackAlloc { size: 0 } ;; block0: ;; llgfr %r2, %r2 -;; lg %r4, 8(%r3) -;; lgr %r5, %r2 -;; ag %r5, 0(%r3) +;; lg %r5, 8(%r3) +;; lgr %r4, %r2 +;; ag %r4, 0(%r3) ;; lghi %r3, 0 -;; clgr %r2, %r4 -;; locgrh %r5, %r3 -;; lrv %r2, 0(%r5) +;; clgr %r2, %r5 +;; locgrh %r4, %r3 +;; lrv %r2, 0(%r4) ;; jg label1 ;; block1: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index e84586b28b67..2d0a997c86de 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -72,15 +72,15 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } ;; unwind StackAlloc { size: 0 } ;; block0: -;; llgfr %r5, %r2 +;; llgfr %r2, %r2 ;; lg %r4, 8(%r3) -;; lgr %r2, %r5 -;; ag %r2, 0(%r3) -;; aghi %r2, 4096 +;; lgr %r5, %r2 +;; ag %r5, 0(%r3) +;; aghi %r5, 4096 ;; lghi %r3, 0 -;; clgr %r5, %r4 -;; locgrh %r2, %r3 -;; lrv %r2, 0(%r2) +;; clgr %r2, %r4 +;; locgrh %r5, %r3 +;; lrv %r2, 0(%r5) ;; jg label1 ;; block1: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 53ce88183184..d013a5d8a469 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -77,11 +77,11 @@ ;; lgr %r2, %r4 ;; ag %r2, 0(%r3) ;; llilh %r3, 65535 -;; agrk %r3, %r2, %r3 -;; lghi %r2, 0 +;; agr %r2, %r3 +;; lghi %r3, 0 ;; clgr %r4, %r5 -;; locgrh %r3, %r2 -;; lrv %r2, 0(%r3) +;; locgrh %r2, %r3 +;; lrv %r2, 0(%r2) ;; jg label1 ;; block1: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index 331874bbf325..47f15780d729 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -41,22 +41,29 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r14, %r15, 112(%r15) +;; stmg %r8, %r15, 64(%r15) +;; unwind SaveReg { clobber_offset: 64, reg: p8i } +;; unwind SaveReg { clobber_offset: 72, reg: p9i } +;; unwind SaveReg { clobber_offset: 80, reg: p10i } +;; unwind SaveReg { clobber_offset: 88, reg: p11i } +;; unwind SaveReg { clobber_offset: 96, reg: p12i } +;; unwind SaveReg { clobber_offset: 104, reg: p13i } ;; unwind SaveReg { clobber_offset: 112, reg: p14i } ;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: ;; llgfr %r2, %r2 -;; lg %r14, 8(%r4) -;; lgr %r5, %r2 -;; ag %r5, 0(%r4) -;; lghi %r4, 0 -;; clgr %r2, %r14 -;; locgrhe %r5, %r4 -;; stc %r3, 0(%r5) +;; lg %r5, 8(%r4) +;; lgr %r8, %r4 +;; lgr %r4, %r2 +;; ag %r4, 0(%r8) +;; lghi %r14, 0 +;; clgr %r2, %r5 +;; locgrhe %r4, %r14 +;; stc %r3, 0(%r4) ;; jg label1 ;; block1: -;; lmg %r14, %r15, 112(%r15) +;; lmg %r8, %r15, 64(%r15) ;; br %r14 ;; ;; function u0:1: @@ -64,13 +71,13 @@ ;; unwind StackAlloc { size: 0 } ;; block0: ;; llgfr %r2, %r2 -;; lg %r4, 8(%r3) -;; lgr %r5, %r2 -;; ag %r5, 0(%r3) +;; lg %r5, 8(%r3) +;; lgr %r4, %r2 +;; ag %r4, 0(%r3) ;; lghi %r3, 0 -;; clgr %r2, %r4 -;; locgrhe %r5, %r3 -;; llc %r2, 0(%r5) +;; clgr %r2, %r5 +;; locgrhe %r4, %r3 +;; llc %r2, 0(%r4) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index 82a28ca0dfcf..342e1136474d 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -72,15 +72,15 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } ;; unwind StackAlloc { size: 0 } ;; block0: -;; llgfr %r5, %r2 +;; llgfr %r2, %r2 ;; lg %r4, 8(%r3) -;; lgr %r2, %r5 -;; ag %r2, 0(%r3) -;; aghi %r2, 4096 +;; lgr %r5, %r2 +;; ag %r5, 0(%r3) +;; aghi %r5, 4096 ;; lghi %r3, 0 -;; clgr %r5, %r4 -;; locgrh %r2, %r3 -;; llc %r2, 0(%r2) +;; clgr %r2, %r4 +;; locgrh %r5, %r3 +;; llc %r2, 0(%r5) ;; jg label1 ;; block1: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 1bda827d83ad..4a9bb7442205 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -77,11 +77,11 @@ ;; lgr %r2, %r4 ;; ag %r2, 0(%r3) ;; llilh %r3, 65535 -;; agrk %r3, %r2, %r3 -;; lghi %r2, 0 +;; agr %r2, %r3 +;; lghi %r3, 0 ;; clgr %r4, %r5 -;; locgrh %r3, %r2 -;; llc %r2, 0(%r3) +;; locgrh %r2, %r3 +;; llc %r2, 0(%r2) ;; jg label1 ;; block1: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 536d2560cae0..daeb205fa0ba 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -62,15 +62,15 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lghi %r5, -4100 -;; ag %r5, 8(%r3) -;; clgr %r2, %r5 +;; lghi %r4, -4100 +;; ag %r4, 8(%r3) +;; clgr %r2, %r4 ;; jgh label3 ; jg label1 ;; block1: ;; lgr %r4, %r2 ;; ag %r4, 0(%r3) -;; lghi %r2, 4096 -;; lrv %r2, 0(%r2,%r4) +;; lghi %r3, 4096 +;; lrv %r2, 0(%r3,%r4) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 0abec009a74f..3c280d330546 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -77,8 +77,8 @@ ;; block1: ;; lgr %r4, %r2 ;; ag %r4, 0(%r3) -;; llilh %r3, 65535 -;; lrv %r2, 0(%r3,%r4) +;; llilh %r5, 65535 +;; lrv %r2, 0(%r5,%r4) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index 65a74304e38a..d3f740891bc0 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -62,15 +62,15 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lghi %r5, -4097 -;; ag %r5, 8(%r3) -;; clgr %r2, %r5 +;; lghi %r4, -4097 +;; ag %r4, 8(%r3) +;; clgr %r2, %r4 ;; jgh label3 ; jg label1 ;; block1: ;; lgr %r4, %r2 ;; ag %r4, 0(%r3) -;; lghi %r2, 4096 -;; llc %r2, 0(%r2,%r4) +;; lghi %r3, 4096 +;; llc %r2, 0(%r3,%r4) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index 5cbdc6a002e0..631727f67640 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -77,8 +77,8 @@ ;; block1: ;; lgr %r4, %r2 ;; ag %r4, 0(%r3) -;; llilh %r3, 65535 -;; llc %r2, 0(%r3,%r4) +;; llilh %r5, 65535 +;; llc %r2, 0(%r5,%r4) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat index fd18599271d7..82cf46d301ff 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -41,8 +41,7 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r7, %r15, 56(%r15) -;; unwind SaveReg { clobber_offset: 56, reg: p7i } +;; stmg %r8, %r15, 64(%r15) ;; unwind SaveReg { clobber_offset: 64, reg: p8i } ;; unwind SaveReg { clobber_offset: 72, reg: p9i } ;; unwind SaveReg { clobber_offset: 80, reg: p10i } @@ -53,34 +52,32 @@ ;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r5, %r4 -;; lghi %r4, -4 -;; lgr %r7, %r5 -;; ag %r4, 8(%r7) -;; lgr %r5, %r2 -;; ag %r5, 0(%r7) -;; lghi %r13, 0 -;; clgr %r2, %r4 -;; locgrh %r5, %r13 -;; strv %r3, 0(%r5) +;; lghi %r5, -4 +;; ag %r5, 8(%r4) +;; lgr %r8, %r4 +;; lgr %r4, %r2 +;; ag %r4, 0(%r8) +;; lghi %r14, 0 +;; clgr %r2, %r5 +;; locgrh %r4, %r14 +;; strv %r3, 0(%r4) ;; jg label1 ;; block1: -;; lmg %r7, %r15, 56(%r15) +;; lmg %r8, %r15, 64(%r15) ;; br %r14 ;; ;; function u0:1: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r4, %r3 -;; lghi %r3, -4 -;; ag %r3, 8(%r4) -;; lgr %r5, %r2 -;; ag %r5, 0(%r4) -;; lghi %r4, 0 -;; clgr %r2, %r3 -;; locgrh %r5, %r4 -;; lrv %r2, 0(%r5) +;; lghi %r5, -4 +;; ag %r5, 8(%r3) +;; lgr %r4, %r2 +;; ag %r4, 0(%r3) +;; lghi %r3, 0 +;; clgr %r2, %r5 +;; locgrh %r4, %r3 +;; lrv %r2, 0(%r4) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index f6887d70895f..c4d85cd4d808 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -60,9 +60,9 @@ ;; lgr %r6, %r2 ;; ag %r6, 0(%r5) ;; aghik %r5, %r6, 4096 -;; lghi %r14, 0 +;; lghi %r6, 0 ;; clgr %r2, %r4 -;; locgrh %r5, %r14 +;; locgrh %r5, %r6 ;; strv %r3, 0(%r5) ;; jg label1 ;; block1: @@ -79,11 +79,11 @@ ;; ag %r3, 8(%r5) ;; lgr %r4, %r2 ;; ag %r4, 0(%r5) -;; aghi %r4, 4096 -;; lghi %r5, 0 +;; aghik %r5, %r4, 4096 +;; lghi %r4, 0 ;; clgr %r2, %r3 -;; locgrh %r4, %r5 -;; lrv %r2, 0(%r4) +;; locgrh %r5, %r4 +;; lrv %r2, 0(%r5) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index a2df1b01cf36..ee6cac682505 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -79,11 +79,11 @@ ;; lg %r5, 8(%r3) ;; ag %r2, 0(%r3) ;; llilh %r3, 65535 -;; agr %r2, %r3 -;; lghi %r3, 0 +;; agrk %r3, %r2, %r3 +;; lghi %r2, 0 ;; clgr %r4, %r5 -;; locgrh %r2, %r3 -;; lrv %r2, 0(%r2) +;; locgrh %r3, %r2 +;; lrv %r2, 0(%r3) ;; jg label1 ;; block1: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat index 1b53ae51042a..907d9e6b9505 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -41,7 +41,8 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r12, %r15, 96(%r15) +;; stmg %r11, %r15, 88(%r15) +;; unwind SaveReg { clobber_offset: 88, reg: p11i } ;; unwind SaveReg { clobber_offset: 96, reg: p12i } ;; unwind SaveReg { clobber_offset: 104, reg: p13i } ;; unwind SaveReg { clobber_offset: 112, reg: p14i } @@ -49,28 +50,35 @@ ;; unwind StackAlloc { size: 0 } ;; block0: ;; lg %r5, 8(%r4) -;; lgr %r13, %r2 -;; ag %r13, 0(%r4) -;; lghi %r12, 0 +;; lgr %r11, %r2 +;; ag %r11, 0(%r4) +;; lghi %r13, 0 ;; clgr %r2, %r5 -;; locgrhe %r13, %r12 -;; stc %r3, 0(%r13) +;; locgrhe %r11, %r13 +;; stc %r3, 0(%r11) ;; jg label1 ;; block1: -;; lmg %r12, %r15, 96(%r15) +;; lmg %r11, %r15, 88(%r15) ;; br %r14 ;; ;; function u0:1: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } +;; stmg %r11, %r15, 88(%r15) +;; unwind SaveReg { clobber_offset: 88, reg: p11i } +;; unwind SaveReg { clobber_offset: 96, reg: p12i } +;; unwind SaveReg { clobber_offset: 104, reg: p13i } +;; unwind SaveReg { clobber_offset: 112, reg: p14i } +;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: ;; lg %r5, 8(%r3) -;; lgr %r4, %r2 -;; ag %r4, 0(%r3) -;; lghi %r3, 0 +;; lgr %r11, %r2 +;; ag %r11, 0(%r3) +;; lghi %r4, 0 ;; clgr %r2, %r5 -;; locgrhe %r4, %r3 -;; llc %r2, 0(%r4) +;; locgrhe %r11, %r4 +;; llc %r2, 0(%r11) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; lmg %r11, %r15, 88(%r15) +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 2980a318cca8..abb8aeca61ae 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -60,9 +60,9 @@ ;; lgr %r6, %r2 ;; ag %r6, 0(%r5) ;; aghik %r5, %r6, 4096 -;; lghi %r14, 0 +;; lghi %r6, 0 ;; clgr %r2, %r4 -;; locgrh %r5, %r14 +;; locgrh %r5, %r6 ;; stc %r3, 0(%r5) ;; jg label1 ;; block1: @@ -79,11 +79,11 @@ ;; ag %r3, 8(%r5) ;; lgr %r4, %r2 ;; ag %r4, 0(%r5) -;; aghi %r4, 4096 -;; lghi %r5, 0 +;; aghik %r5, %r4, 4096 +;; lghi %r4, 0 ;; clgr %r2, %r3 -;; locgrh %r4, %r5 -;; llc %r2, 0(%r4) +;; locgrh %r5, %r4 +;; llc %r2, 0(%r5) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index ae1caf96320c..8fcb0d779b38 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -79,11 +79,11 @@ ;; lg %r5, 8(%r3) ;; ag %r2, 0(%r3) ;; llilh %r3, 65535 -;; agr %r2, %r3 -;; lghi %r3, 0 +;; agrk %r3, %r2, %r3 +;; lghi %r2, 0 ;; clgr %r4, %r5 -;; locgrh %r2, %r3 -;; llc %r2, 0(%r2) +;; locgrh %r3, %r2 +;; llc %r2, 0(%r3) ;; jg label1 ;; block1: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index 57f3aeb37ad8..c034f17edad9 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -65,8 +65,8 @@ ;; jgh label3 ; jg label1 ;; block1: ;; ag %r2, 0(%r3) -;; lghi %r5, 4096 -;; lrv %r2, 0(%r5,%r2) +;; lghi %r3, 4096 +;; lrv %r2, 0(%r3,%r2) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index 217b1336aa10..27825b12e20d 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -65,8 +65,8 @@ ;; jgh label3 ; jg label1 ;; block1: ;; ag %r2, 0(%r3) -;; llilh %r5, 65535 -;; lrv %r2, 0(%r5,%r2) +;; llilh %r3, 65535 +;; lrv %r2, 0(%r3,%r2) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index afc2bcf33b78..076de1172519 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -65,8 +65,8 @@ ;; jgh label3 ; jg label1 ;; block1: ;; ag %r2, 0(%r3) -;; lghi %r5, 4096 -;; llc %r2, 0(%r5,%r2) +;; lghi %r3, 4096 +;; llc %r2, 0(%r3,%r2) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index 65808bc9c5b7..d4473f5877f8 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -65,8 +65,8 @@ ;; jgh label3 ; jg label1 ;; block1: ;; ag %r2, 0(%r3) -;; llilh %r5, 65535 -;; llc %r2, 0(%r5,%r2) +;; llilh %r3, 65535 +;; llc %r2, 0(%r3,%r2) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index 22ff765aaad6..7ffb39d00c00 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -41,7 +41,8 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r12, %r15, 96(%r15) +;; stmg %r11, %r15, 88(%r15) +;; unwind SaveReg { clobber_offset: 88, reg: p11i } ;; unwind SaveReg { clobber_offset: 96, reg: p12i } ;; unwind SaveReg { clobber_offset: 104, reg: p13i } ;; unwind SaveReg { clobber_offset: 112, reg: p14i } @@ -49,28 +50,35 @@ ;; unwind StackAlloc { size: 0 } ;; block0: ;; lg %r5, 8(%r4) -;; lgr %r13, %r2 -;; ag %r13, 0(%r4) -;; lghi %r12, 0 +;; lgr %r11, %r2 +;; ag %r11, 0(%r4) +;; lghi %r13, 0 ;; clgr %r2, %r5 -;; locgrh %r13, %r12 -;; strv %r3, 0(%r13) +;; locgrh %r11, %r13 +;; strv %r3, 0(%r11) ;; jg label1 ;; block1: -;; lmg %r12, %r15, 96(%r15) +;; lmg %r11, %r15, 88(%r15) ;; br %r14 ;; ;; function u0:1: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } +;; stmg %r11, %r15, 88(%r15) +;; unwind SaveReg { clobber_offset: 88, reg: p11i } +;; unwind SaveReg { clobber_offset: 96, reg: p12i } +;; unwind SaveReg { clobber_offset: 104, reg: p13i } +;; unwind SaveReg { clobber_offset: 112, reg: p14i } +;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: ;; lg %r5, 8(%r3) -;; lgr %r4, %r2 -;; ag %r4, 0(%r3) -;; lghi %r3, 0 +;; lgr %r11, %r2 +;; ag %r11, 0(%r3) +;; lghi %r4, 0 ;; clgr %r2, %r5 -;; locgrh %r4, %r3 -;; lrv %r2, 0(%r4) +;; locgrh %r11, %r4 +;; lrv %r2, 0(%r11) ;; jg label1 ;; block1: +;; lmg %r11, %r15, 88(%r15) ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index c8f69cfca12c..1c2070ffc42c 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -41,23 +41,30 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r13, %r15, 104(%r15) +;; stmg %r6, %r15, 48(%r15) +;; unwind SaveReg { clobber_offset: 48, reg: p6i } +;; unwind SaveReg { clobber_offset: 56, reg: p7i } +;; unwind SaveReg { clobber_offset: 64, reg: p8i } +;; unwind SaveReg { clobber_offset: 72, reg: p9i } +;; unwind SaveReg { clobber_offset: 80, reg: p10i } +;; unwind SaveReg { clobber_offset: 88, reg: p11i } +;; unwind SaveReg { clobber_offset: 96, reg: p12i } ;; unwind SaveReg { clobber_offset: 104, reg: p13i } ;; unwind SaveReg { clobber_offset: 112, reg: p14i } ;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lg %r14, 8(%r4) +;; lg %r6, 8(%r4) ;; lgr %r5, %r2 ;; ag %r5, 0(%r4) ;; aghi %r5, 4096 -;; lghi %r13, 0 -;; clgr %r2, %r14 -;; locgrh %r5, %r13 +;; lghi %r14, 0 +;; clgr %r2, %r6 +;; locgrh %r5, %r14 ;; strv %r3, 0(%r5) ;; jg label1 ;; block1: -;; lmg %r13, %r15, 104(%r15) +;; lmg %r6, %r15, 48(%r15) ;; br %r14 ;; ;; function u0:1: @@ -70,11 +77,11 @@ ;; lg %r14, 8(%r3) ;; lgr %r4, %r2 ;; ag %r4, 0(%r3) -;; aghik %r5, %r4, 4096 -;; lghi %r4, 0 +;; aghi %r4, 4096 +;; lghi %r5, 0 ;; clgr %r2, %r14 -;; locgrh %r5, %r4 -;; lrv %r2, 0(%r5) +;; locgrh %r4, %r5 +;; lrv %r2, 0(%r4) ;; jg label1 ;; block1: ;; lmg %r14, %r15, 112(%r15) diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 4fe8f62b50a5..3d8f014252ba 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -54,14 +54,14 @@ ;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lg %r6, 8(%r4) +;; lg %r7, 8(%r4) ;; lgr %r5, %r2 ;; ag %r5, 0(%r4) ;; llilh %r4, 65535 ;; agr %r5, %r4 -;; lghi %r14, 0 -;; clgr %r2, %r6 -;; locgrh %r5, %r14 +;; lghi %r6, 0 +;; clgr %r2, %r7 +;; locgrh %r5, %r6 ;; strv %r3, 0(%r5) ;; jg label1 ;; block1: @@ -87,11 +87,11 @@ ;; lgr %r4, %r2 ;; ag %r4, 0(%r3) ;; llilh %r3, 65535 -;; agr %r4, %r3 -;; lghi %r5, 0 +;; agrk %r5, %r4, %r3 +;; lghi %r4, 0 ;; clgr %r2, %r6 -;; locgrh %r4, %r5 -;; lrv %r2, 0(%r4) +;; locgrh %r5, %r4 +;; lrv %r2, 0(%r5) ;; jg label1 ;; block1: ;; lmg %r6, %r15, 48(%r15) diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index 47c415c4fc28..175a19bf50e8 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -41,7 +41,8 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r12, %r15, 96(%r15) +;; stmg %r11, %r15, 88(%r15) +;; unwind SaveReg { clobber_offset: 88, reg: p11i } ;; unwind SaveReg { clobber_offset: 96, reg: p12i } ;; unwind SaveReg { clobber_offset: 104, reg: p13i } ;; unwind SaveReg { clobber_offset: 112, reg: p14i } @@ -49,28 +50,35 @@ ;; unwind StackAlloc { size: 0 } ;; block0: ;; lg %r5, 8(%r4) -;; lgr %r13, %r2 -;; ag %r13, 0(%r4) -;; lghi %r12, 0 +;; lgr %r11, %r2 +;; ag %r11, 0(%r4) +;; lghi %r13, 0 ;; clgr %r2, %r5 -;; locgrhe %r13, %r12 -;; stc %r3, 0(%r13) +;; locgrhe %r11, %r13 +;; stc %r3, 0(%r11) ;; jg label1 ;; block1: -;; lmg %r12, %r15, 96(%r15) +;; lmg %r11, %r15, 88(%r15) ;; br %r14 ;; ;; function u0:1: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } +;; stmg %r11, %r15, 88(%r15) +;; unwind SaveReg { clobber_offset: 88, reg: p11i } +;; unwind SaveReg { clobber_offset: 96, reg: p12i } +;; unwind SaveReg { clobber_offset: 104, reg: p13i } +;; unwind SaveReg { clobber_offset: 112, reg: p14i } +;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: ;; lg %r5, 8(%r3) -;; lgr %r4, %r2 -;; ag %r4, 0(%r3) -;; lghi %r3, 0 +;; lgr %r11, %r2 +;; ag %r11, 0(%r3) +;; lghi %r4, 0 ;; clgr %r2, %r5 -;; locgrhe %r4, %r3 -;; llc %r2, 0(%r4) +;; locgrhe %r11, %r4 +;; llc %r2, 0(%r11) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; lmg %r11, %r15, 88(%r15) +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index 0e8196f8d69e..9a62871d7006 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -41,23 +41,30 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r13, %r15, 104(%r15) +;; stmg %r6, %r15, 48(%r15) +;; unwind SaveReg { clobber_offset: 48, reg: p6i } +;; unwind SaveReg { clobber_offset: 56, reg: p7i } +;; unwind SaveReg { clobber_offset: 64, reg: p8i } +;; unwind SaveReg { clobber_offset: 72, reg: p9i } +;; unwind SaveReg { clobber_offset: 80, reg: p10i } +;; unwind SaveReg { clobber_offset: 88, reg: p11i } +;; unwind SaveReg { clobber_offset: 96, reg: p12i } ;; unwind SaveReg { clobber_offset: 104, reg: p13i } ;; unwind SaveReg { clobber_offset: 112, reg: p14i } ;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lg %r14, 8(%r4) +;; lg %r6, 8(%r4) ;; lgr %r5, %r2 ;; ag %r5, 0(%r4) ;; aghi %r5, 4096 -;; lghi %r13, 0 -;; clgr %r2, %r14 -;; locgrh %r5, %r13 +;; lghi %r14, 0 +;; clgr %r2, %r6 +;; locgrh %r5, %r14 ;; stc %r3, 0(%r5) ;; jg label1 ;; block1: -;; lmg %r13, %r15, 104(%r15) +;; lmg %r6, %r15, 48(%r15) ;; br %r14 ;; ;; function u0:1: @@ -70,11 +77,11 @@ ;; lg %r14, 8(%r3) ;; lgr %r4, %r2 ;; ag %r4, 0(%r3) -;; aghik %r5, %r4, 4096 -;; lghi %r4, 0 +;; aghi %r4, 4096 +;; lghi %r5, 0 ;; clgr %r2, %r14 -;; locgrh %r5, %r4 -;; llc %r2, 0(%r5) +;; locgrh %r4, %r5 +;; llc %r2, 0(%r4) ;; jg label1 ;; block1: ;; lmg %r14, %r15, 112(%r15) diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 75a9d70cc7ac..2f861cc1f10a 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -54,14 +54,14 @@ ;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lg %r6, 8(%r4) +;; lg %r7, 8(%r4) ;; lgr %r5, %r2 ;; ag %r5, 0(%r4) ;; llilh %r4, 65535 ;; agr %r5, %r4 -;; lghi %r14, 0 -;; clgr %r2, %r6 -;; locgrh %r5, %r14 +;; lghi %r6, 0 +;; clgr %r2, %r7 +;; locgrh %r5, %r6 ;; stc %r3, 0(%r5) ;; jg label1 ;; block1: @@ -87,11 +87,11 @@ ;; lgr %r4, %r2 ;; ag %r4, 0(%r3) ;; llilh %r3, 65535 -;; agr %r4, %r3 -;; lghi %r5, 0 +;; agrk %r5, %r4, %r3 +;; lghi %r4, 0 ;; clgr %r2, %r6 -;; locgrh %r4, %r5 -;; llc %r2, 0(%r4) +;; locgrh %r5, %r4 +;; llc %r2, 0(%r5) ;; jg label1 ;; block1: ;; lmg %r6, %r15, 48(%r15) diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 1d76ee44d3d2..dff24197b473 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -66,8 +66,8 @@ ;; block1: ;; lgr %r4, %r5 ;; ag %r3, 0(%r4) -;; lghi %r5, 4096 -;; lrv %r2, 0(%r5,%r3) +;; lghi %r2, 4096 +;; lrv %r2, 0(%r2,%r3) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index 1b1d767c73b1..072dfed1e7c6 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -66,8 +66,8 @@ ;; block1: ;; lgr %r4, %r5 ;; ag %r3, 0(%r4) -;; lghi %r5, 4096 -;; llc %r2, 0(%r5,%r3) +;; lghi %r2, 4096 +;; llc %r2, 0(%r2,%r3) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat index 3bb17bc04416..502fc9856a03 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -58,12 +58,13 @@ ;; unwind StackAlloc { size: 0 } ;; block0: ;; llgfr %r5, %r2 -;; lgr %r4, %r5 -;; ag %r4, 0(%r3) +;; lgr %r4, %r3 +;; lgr %r3, %r5 +;; ag %r3, 0(%r4) ;; lghi %r2, 0 ;; clgfi %r5, 268435452 -;; locgrh %r4, %r2 -;; lrv %r2, 0(%r4) +;; locgrh %r3, %r2 +;; lrv %r2, 0(%r3) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 51a78e8fafee..8366b8251c3f 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -44,11 +44,11 @@ ;; llgfr %r2, %r2 ;; lgr %r5, %r2 ;; ag %r5, 0(%r4) -;; aghi %r5, 4096 -;; lghi %r4, 0 +;; aghik %r4, %r5, 4096 +;; lghi %r5, 0 ;; clgfi %r2, 268431356 -;; locgrh %r5, %r4 -;; strv %r3, 0(%r5) +;; locgrh %r4, %r5 +;; strv %r3, 0(%r4) ;; jg label1 ;; block1: ;; br %r14 @@ -60,11 +60,11 @@ ;; llgfr %r2, %r2 ;; lgr %r4, %r2 ;; ag %r4, 0(%r3) -;; aghik %r5, %r4, 4096 +;; aghi %r4, 4096 ;; lghi %r3, 0 ;; clgfi %r2, 268431356 -;; locgrh %r5, %r3 -;; lrv %r2, 0(%r5) +;; locgrh %r4, %r3 +;; lrv %r2, 0(%r4) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat index 9c8438dc43af..3594b2b9e64c 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -58,12 +58,13 @@ ;; unwind StackAlloc { size: 0 } ;; block0: ;; llgfr %r5, %r2 -;; lgr %r4, %r5 -;; ag %r4, 0(%r3) +;; lgr %r4, %r3 +;; lgr %r3, %r5 +;; ag %r3, 0(%r4) ;; lghi %r2, 0 ;; clgfi %r5, 268435455 -;; locgrh %r4, %r2 -;; llc %r2, 0(%r4) +;; locgrh %r3, %r2 +;; llc %r2, 0(%r3) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 8419285e14a1..c51890d0a287 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -44,11 +44,11 @@ ;; llgfr %r2, %r2 ;; lgr %r5, %r2 ;; ag %r5, 0(%r4) -;; aghi %r5, 4096 -;; lghi %r4, 0 +;; aghik %r4, %r5, 4096 +;; lghi %r5, 0 ;; clgfi %r2, 268431359 -;; locgrh %r5, %r4 -;; stc %r3, 0(%r5) +;; locgrh %r4, %r5 +;; stc %r3, 0(%r4) ;; jg label1 ;; block1: ;; br %r14 @@ -60,11 +60,11 @@ ;; llgfr %r2, %r2 ;; lgr %r4, %r2 ;; ag %r4, 0(%r3) -;; aghik %r5, %r4, 4096 +;; aghi %r4, 4096 ;; lghi %r3, 0 ;; clgfi %r2, 268431359 -;; locgrh %r5, %r3 -;; llc %r2, 0(%r5) +;; locgrh %r4, %r3 +;; llc %r2, 0(%r4) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 23b2ddf63da1..0d1ed849d45f 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -63,8 +63,8 @@ ;; block1: ;; lgr %r5, %r2 ;; ag %r5, 0(%r3) -;; lghi %r4, 4096 -;; lrv %r2, 0(%r4,%r5) +;; lghi %r2, 4096 +;; lrv %r2, 0(%r2,%r5) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index 19cdeed46f61..f9ed4aab9b37 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -63,8 +63,8 @@ ;; block1: ;; lgr %r5, %r2 ;; ag %r5, 0(%r3) -;; lghi %r4, 4096 -;; llc %r2, 0(%r4,%r5) +;; lghi %r2, 4096 +;; llc %r2, 0(%r2,%r5) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat index 149ebbf708e1..05c6839d5969 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -39,23 +39,16 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r11, %r15, 88(%r15) -;; unwind SaveReg { clobber_offset: 88, reg: p11i } -;; unwind SaveReg { clobber_offset: 96, reg: p12i } -;; unwind SaveReg { clobber_offset: 104, reg: p13i } -;; unwind SaveReg { clobber_offset: 112, reg: p14i } -;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r11, %r2 -;; ag %r11, 0(%r4) -;; lghi %r5, 0 +;; lgr %r5, %r2 +;; ag %r5, 0(%r4) +;; lghi %r4, 0 ;; clgfi %r2, 268435452 -;; locgrh %r11, %r5 -;; strv %r3, 0(%r11) +;; locgrh %r5, %r4 +;; strv %r3, 0(%r5) ;; jg label1 ;; block1: -;; lmg %r11, %r15, 88(%r15) ;; br %r14 ;; ;; function u0:1: @@ -70,4 +63,4 @@ ;; lrv %r2, 0(%r5) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 49c8fd746557..2851ab44629e 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -58,11 +58,11 @@ ;; block0: ;; lgr %r5, %r2 ;; ag %r5, 0(%r3) -;; aghik %r4, %r5, 4096 +;; aghik %r3, %r5, 4096 ;; lghi %r5, 0 ;; clgfi %r2, 268431356 -;; locgrh %r4, %r5 -;; lrv %r2, 0(%r4) +;; locgrh %r3, %r5 +;; lrv %r2, 0(%r3) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat index 42a29ea5cc52..0df2d11cbba4 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -39,23 +39,16 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r11, %r15, 88(%r15) -;; unwind SaveReg { clobber_offset: 88, reg: p11i } -;; unwind SaveReg { clobber_offset: 96, reg: p12i } -;; unwind SaveReg { clobber_offset: 104, reg: p13i } -;; unwind SaveReg { clobber_offset: 112, reg: p14i } -;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r11, %r2 -;; ag %r11, 0(%r4) -;; lghi %r5, 0 +;; lgr %r5, %r2 +;; ag %r5, 0(%r4) +;; lghi %r4, 0 ;; clgfi %r2, 268435455 -;; locgrh %r11, %r5 -;; stc %r3, 0(%r11) +;; locgrh %r5, %r4 +;; stc %r3, 0(%r5) ;; jg label1 ;; block1: -;; lmg %r11, %r15, 88(%r15) ;; br %r14 ;; ;; function u0:1: @@ -70,4 +63,4 @@ ;; llc %r2, 0(%r5) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index e25567fab885..5b8b480191b1 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -58,11 +58,11 @@ ;; block0: ;; lgr %r5, %r2 ;; ag %r5, 0(%r3) -;; aghik %r4, %r5, 4096 +;; aghik %r3, %r5, 4096 ;; lghi %r5, 0 ;; clgfi %r2, 268431359 -;; locgrh %r4, %r5 -;; llc %r2, 0(%r4) +;; locgrh %r3, %r5 +;; llc %r2, 0(%r3) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat index 46fb88b4670f..5e17082f889a 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0x1000_offset.wat @@ -63,8 +63,8 @@ ;; block1: ;; lgr %r5, %r2 ;; ag %r5, 0(%r3) -;; lghi %r4, 4096 -;; lrv %r2, 0(%r4,%r5) +;; lghi %r2, 4096 +;; lrv %r2, 0(%r2,%r5) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat index db9cf08ae992..d9442a3a1f20 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0x1000_offset.wat @@ -63,8 +63,8 @@ ;; block1: ;; lgr %r5, %r2 ;; ag %r5, 0(%r3) -;; lghi %r4, 4096 -;; llc %r2, 0(%r4,%r5) +;; lghi %r2, 4096 +;; llc %r2, 0(%r2,%r5) ;; jg label2 ;; block2: ;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index 024c9e9a7074..486133ed00ff 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -39,23 +39,16 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r11, %r15, 88(%r15) -;; unwind SaveReg { clobber_offset: 88, reg: p11i } -;; unwind SaveReg { clobber_offset: 96, reg: p12i } -;; unwind SaveReg { clobber_offset: 104, reg: p13i } -;; unwind SaveReg { clobber_offset: 112, reg: p14i } -;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r11, %r2 -;; ag %r11, 0(%r4) -;; lghi %r5, 0 +;; lgr %r5, %r2 +;; ag %r5, 0(%r4) +;; lghi %r4, 0 ;; clgfi %r2, 268435452 -;; locgrh %r11, %r5 -;; strv %r3, 0(%r11) +;; locgrh %r5, %r4 +;; strv %r3, 0(%r5) ;; jg label1 ;; block1: -;; lmg %r11, %r15, 88(%r15) ;; br %r14 ;; ;; function u0:1: @@ -70,4 +63,4 @@ ;; lrv %r2, 0(%r5) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index 11510f6c0eb2..a71863212d37 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -58,11 +58,11 @@ ;; block0: ;; lgr %r5, %r2 ;; ag %r5, 0(%r3) -;; aghik %r4, %r5, 4096 +;; aghik %r3, %r5, 4096 ;; lghi %r5, 0 ;; clgfi %r2, 268431356 -;; locgrh %r4, %r5 -;; lrv %r2, 0(%r4) +;; locgrh %r3, %r5 +;; lrv %r2, 0(%r3) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index 13e684dc79f9..89aec920be0d 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -39,23 +39,16 @@ ;; function u0:0: ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 160, offset_downward_to_clobbers: 0 } -;; stmg %r11, %r15, 88(%r15) -;; unwind SaveReg { clobber_offset: 88, reg: p11i } -;; unwind SaveReg { clobber_offset: 96, reg: p12i } -;; unwind SaveReg { clobber_offset: 104, reg: p13i } -;; unwind SaveReg { clobber_offset: 112, reg: p14i } -;; unwind SaveReg { clobber_offset: 120, reg: p15i } ;; unwind StackAlloc { size: 0 } ;; block0: -;; lgr %r11, %r2 -;; ag %r11, 0(%r4) -;; lghi %r5, 0 +;; lgr %r5, %r2 +;; ag %r5, 0(%r4) +;; lghi %r4, 0 ;; clgfi %r2, 268435455 -;; locgrh %r11, %r5 -;; stc %r3, 0(%r11) +;; locgrh %r5, %r4 +;; stc %r3, 0(%r5) ;; jg label1 ;; block1: -;; lmg %r11, %r15, 88(%r15) ;; br %r14 ;; ;; function u0:1: @@ -70,4 +63,4 @@ ;; llc %r2, 0(%r5) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index cf12a221d707..548feaca8244 100644 --- a/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/s390x/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -58,11 +58,11 @@ ;; block0: ;; lgr %r5, %r2 ;; ag %r5, 0(%r3) -;; aghik %r4, %r5, 4096 +;; aghik %r3, %r5, 4096 ;; lghi %r5, 0 ;; clgfi %r2, 268431359 -;; locgrh %r4, %r5 -;; llc %r2, 0(%r4) +;; locgrh %r3, %r5 +;; llc %r2, 0(%r3) ;; jg label1 ;; block1: -;; br %r14 \ No newline at end of file +;; br %r14 diff --git a/cranelift/filetests/filetests/isa/x64/amode-opt.clif b/cranelift/filetests/filetests/isa/x64/amode-opt.clif index e3d689998897..116ab61a082c 100644 --- a/cranelift/filetests/filetests/isa/x64/amode-opt.clif +++ b/cranelift/filetests/filetests/isa/x64/amode-opt.clif @@ -1,5 +1,4 @@ test compile precise-output -set use_egraphs=true set opt_level=speed target x86_64 diff --git a/cranelift/filetests/filetests/isa/x64/branches.clif b/cranelift/filetests/filetests/isa/x64/branches.clif index f5ef0c709f74..169b898c7088 100644 --- a/cranelift/filetests/filetests/isa/x64/branches.clif +++ b/cranelift/filetests/filetests/isa/x64/branches.clif @@ -630,17 +630,15 @@ block202: ; pushq %rbp ; movq %rsp, %rbp ; block0: -; movl $1112539136, %edx -; movd %edx, %xmm6 -; ucomiss %xmm6, %xmm0 +; movl $1112539136, %eax +; movd %eax, %xmm4 +; ucomiss %xmm4, %xmm0 ; jp label2 ; jnz label2; j label1 ; block1: ; jmp label5 ; block2: -; movl $1112539136, %r11d -; movd %r11d, %xmm10 -; ucomiss %xmm10, %xmm0 +; ucomiss %xmm4, %xmm0 ; jnp label4; j label3 ; block3: ; jmp label5 @@ -656,19 +654,17 @@ block202: ; pushq %rbp ; movq %rsp, %rbp ; block1: ; offset 0x4 -; movl $0x42500000, %edx -; movd %edx, %xmm6 -; ucomiss %xmm6, %xmm0 +; movl $0x42500000, %eax +; movd %eax, %xmm4 +; ucomiss %xmm4, %xmm0 ; jp 0x1c -; je 0x33 +; je 0x27 ; block2: ; offset 0x1c -; movl $0x42500000, %r11d -; movd %r11d, %xmm10 -; ucomiss %xmm10, %xmm0 -; jp 0x33 -; block3: ; offset 0x31 +; ucomiss %xmm4, %xmm0 +; jp 0x27 +; block3: ; offset 0x25 ; ud2 ; trap: heap_oob -; block4: ; offset 0x33 +; block4: ; offset 0x27 ; movq %rbp, %rsp ; popq %rbp ; retq diff --git a/cranelift/filetests/filetests/isa/x64/call-conv.clif b/cranelift/filetests/filetests/isa/x64/call-conv.clif index e3a34a7e3ab3..1d776357e969 100644 --- a/cranelift/filetests/filetests/isa/x64/call-conv.clif +++ b/cranelift/filetests/filetests/isa/x64/call-conv.clif @@ -441,11 +441,11 @@ block0: ; pushq %rbp ; movq %rsp, %rbp ; block0: -; movl $1, %esi +; movl $1, %ecx ; subq %rsp, $16, %rsp ; virtual_sp_offset_adjust 16 ; lea 0(%rsp), %rdi -; call *%rsi +; call *%rcx ; movq 0(%rsp), %rdx ; addq %rsp, $16, %rsp ; virtual_sp_offset_adjust -16 @@ -458,10 +458,10 @@ block0: ; pushq %rbp ; movq %rsp, %rbp ; block1: ; offset 0x4 -; movl $1, %esi +; movl $1, %ecx ; subq $0x10, %rsp ; leaq (%rsp), %rdi -; callq *%rsi +; callq *%rcx ; movq (%rsp), %rdx ; addq $0x10, %rsp ; movq %rbp, %rsp @@ -483,8 +483,8 @@ block0: ; movq %rbx, 0(%rsp) ; block0: ; movq %rdi, %rbx -; movl $1, %eax -; call *%rax +; movl $1, %edx +; call *%rdx ; movq %rbx, %rdi ; movl %edx, 0(%rdi) ; movq 0(%rsp), %rbx @@ -501,8 +501,8 @@ block0: ; movq %rbx, (%rsp) ; block1: ; offset 0xc ; movq %rdi, %rbx -; movl $1, %eax -; callq *%rax +; movl $1, %edx +; callq *%rdx ; movq %rbx, %rdi ; movl %edx, (%rdi) ; movq (%rsp), %rbx @@ -526,17 +526,17 @@ block0: ; movq %r13, 0(%rsp) ; block0: ; movq %rdi, %r13 -; movl $1, %eax +; movl $1, %r9d ; subq %rsp, $16, %rsp ; virtual_sp_offset_adjust 16 ; lea 0(%rsp), %rdi -; call *%rax -; movq 0(%rsp), %rdi +; call *%r9 +; movq 0(%rsp), %rsi ; addq %rsp, $16, %rsp ; virtual_sp_offset_adjust -16 -; movq %r13, %r9 -; movq %rdx, 0(%r9) -; movl %edi, 8(%r9) +; movq %r13, %rdi +; movq %rdx, 0(%rdi) +; movl %esi, 8(%rdi) ; movq 0(%rsp), %r13 ; addq %rsp, $16, %rsp ; movq %rbp, %rsp @@ -551,15 +551,15 @@ block0: ; movq %r13, (%rsp) ; block1: ; offset 0xc ; movq %rdi, %r13 -; movl $1, %eax +; movl $1, %r9d ; subq $0x10, %rsp ; leaq (%rsp), %rdi -; callq *%rax -; movq (%rsp), %rdi +; callq *%r9 +; movq (%rsp), %rsi ; addq $0x10, %rsp -; movq %r13, %r9 -; movq %rdx, (%r9) -; movl %edi, 8(%r9) +; movq %r13, %rdi +; movq %rdx, (%rdi) +; movl %esi, 8(%rdi) ; movq (%rsp), %r13 ; addq $0x10, %rsp ; movq %rbp, %rsp @@ -581,8 +581,8 @@ block0: ; movq %r13, 0(%rsp) ; block0: ; movq %rdi, %r13 -; movl $1, %eax -; call *%rax +; movl $1, %r9d +; call *%r9 ; movq %r13, %rdi ; movq %rax, 0(%rdi) ; movl %edx, 8(%rdi) @@ -601,8 +601,8 @@ block0: ; movq %r13, (%rsp) ; block1: ; offset 0xc ; movq %rdi, %r13 -; movl $1, %eax -; callq *%rax +; movl $1, %r9d +; callq *%r9 ; movq %r13, %rdi ; movq %rax, (%rdi) ; movl %edx, 8(%rdi) @@ -628,8 +628,8 @@ block0(v0: f32, v1: i64, v2: i32, v3: f32): ; movq %r12, 0(%rsp) ; block0: ; movq %rdx, %r12 -; movl $1, %r9d -; call *%r9 +; movl $1, %eax +; call *%rax ; movq %r12, %r8 ; movq %rax, 0(%r8) ; movl %edx, 8(%r8) @@ -648,8 +648,8 @@ block0(v0: f32, v1: i64, v2: i32, v3: f32): ; movq %r12, (%rsp) ; block1: ; offset 0xc ; movq %rdx, %r12 -; movl $1, %r9d -; callq *%r9 +; movl $1, %eax +; callq *%rax ; movq %r12, %r8 ; movq %rax, (%r8) ; movl %edx, 8(%r8) diff --git a/cranelift/filetests/filetests/isa/x64/i128.clif b/cranelift/filetests/filetests/isa/x64/i128.clif index 61ae6c438f65..6d04f354118c 100644 --- a/cranelift/filetests/filetests/isa/x64/i128.clif +++ b/cranelift/filetests/filetests/isa/x64/i128.clif @@ -1228,22 +1228,23 @@ block2(v8: i128): ; block0: ; xorq %rax, %rax, %rax ; xorq %r9, %r9, %r9 +; movq %r9, %r8 ; testb %dl, %dl ; jnz label2; j label1 ; block1: -; movl $2, %r8d +; movl $2, %r9d ; xorq %r10, %r10, %r10 -; addq %rax, %r8, %rax -; movq %r9, %rdx +; addq %rax, %r9, %rax +; movq %r8, %rdx ; adcq %rdx, %r10, %rdx ; movq %rbp, %rsp ; popq %rbp ; ret ; block2: -; movq %r9, %rdx -; movl $1, %r9d +; movq %r8, %rdx +; movl $1, %r10d ; xorq %r11, %r11, %r11 -; addq %rax, %r9, %rax +; addq %rax, %r10, %rax ; adcq %rdx, %r11, %rdx ; movq %rbp, %rsp ; popq %rbp @@ -1256,22 +1257,23 @@ block2(v8: i128): ; block1: ; offset 0x4 ; xorq %rax, %rax ; xorq %r9, %r9 +; movq %r9, %r8 ; testb %dl, %dl -; jne 0x29 -; block2: ; offset 0x12 -; movl $2, %r8d +; jne 0x2c +; block2: ; offset 0x15 +; movl $2, %r9d ; xorq %r10, %r10 -; addq %r8, %rax -; movq %r9, %rdx +; addq %r9, %rax +; movq %r8, %rdx ; adcq %r10, %rdx ; movq %rbp, %rsp ; popq %rbp ; retq -; block3: ; offset 0x29 -; movq %r9, %rdx -; movl $1, %r9d +; block3: ; offset 0x2c +; movq %r8, %rdx +; movl $1, %r10d ; xorq %r11, %r11 -; addq %r9, %rax +; addq %r10, %rax ; adcq %r11, %rdx ; movq %rbp, %rsp ; popq %rbp diff --git a/cranelift/filetests/filetests/isa/x64/immediates.clif b/cranelift/filetests/filetests/isa/x64/immediates.clif index 62528f0b6dcf..84b4f9b7397c 100644 --- a/cranelift/filetests/filetests/isa/x64/immediates.clif +++ b/cranelift/filetests/filetests/isa/x64/immediates.clif @@ -19,9 +19,9 @@ block0(v0: i64, v1: i64): ; pushq %rbp ; movq %rsp, %rbp ; block0: -; movabsq $-18765284782900, %r9 -; lea 0(%rdi,%r9,1), %r11 -; movq %r11, 0(%rsi) +; movabsq $-18765284782900, %r10 +; lea 0(%rdi,%r10,1), %r10 +; movq %r10, 0(%rsi) ; movq %rdi, %r11 ; subq %r11, const(0), %r11 ; movq %r11, 0(%rsi) @@ -39,20 +39,21 @@ block0(v0: i64, v1: i64): ; pushq %rbp ; movq %rsp, %rbp ; block1: ; offset 0x4 -; movabsq $18446725308424768716, %r9 -; leaq (%rdi, %r9), %r11 -; movq %r11, (%rsi) ; trap: heap_oob +; movabsq $18446725308424768716, %r10 +; addq %rdi, %r10 +; movq %r10, (%rsi) ; trap: heap_oob ; movq %rdi, %r11 -; subq 0x20(%rip), %r11 +; subq 0x22(%rip), %r11 ; movq %r11, (%rsi) ; trap: heap_oob ; movq %rdi, %rax -; andq 0x13(%rip), %rax +; andq 0x15(%rip), %rax ; movq %rax, (%rsi) ; trap: heap_oob -; orq 9(%rip), %rdi +; orq 0xb(%rip), %rdi ; movq %rdi, (%rsi) ; trap: heap_oob ; movq %rbp, %rsp ; popq %rbp ; retq +; addb %al, (%rax) ; addb %cl, %ah ; int3 ; fstp %st(5) diff --git a/cranelift/filetests/filetests/isa/x64/simd-lane-access-compile.clif b/cranelift/filetests/filetests/isa/x64/simd-lane-access-compile.clif index 5224705332de..8caedbd0e3ea 100644 --- a/cranelift/filetests/filetests/isa/x64/simd-lane-access-compile.clif +++ b/cranelift/filetests/filetests/isa/x64/simd-lane-access-compile.clif @@ -201,10 +201,10 @@ block0: ; pushq %rbp ; movq %rsp, %rbp ; block0: -; movl $-1, %esi -; movd %esi, %xmm2 -; pshuflw $0, %xmm2, %xmm4 -; pshufd $0, %xmm4, %xmm0 +; movl $-1, %ecx +; movd %ecx, %xmm1 +; pshuflw $0, %xmm1, %xmm3 +; pshufd $0, %xmm3, %xmm0 ; movq %rbp, %rsp ; popq %rbp ; ret @@ -214,10 +214,10 @@ block0: ; pushq %rbp ; movq %rsp, %rbp ; block1: ; offset 0x4 -; movl $0xffffffff, %esi -; movd %esi, %xmm2 -; pshuflw $0, %xmm2, %xmm4 -; pshufd $0, %xmm4, %xmm0 +; movl $0xffffffff, %ecx +; movd %ecx, %xmm1 +; pshuflw $0, %xmm1, %xmm3 +; pshufd $0, %xmm3, %xmm0 ; movq %rbp, %rsp ; popq %rbp ; retq diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat index 7c704a519b71..ee459925a1b6 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0_offset.wat @@ -46,9 +46,9 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movl %edi, %r10d -;; movabsq $-4, %r11 -;; addq %r11, 8(%rdx), %r11 -;; cmpq %r11, %r10 +;; movabsq $-4, %r9 +;; addq %r9, 8(%rdx), %r9 +;; cmpq %r9, %r10 ;; jnbe label3; j label1 ;; block1: ;; movq 0(%rdx), %rdi @@ -68,9 +68,9 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movl %edi, %r10d -;; movabsq $-4, %r11 -;; addq %r11, 8(%rsi), %r11 -;; cmpq %r11, %r10 +;; movabsq $-4, %r9 +;; addq %r9, 8(%rsi), %r9 +;; cmpq %r9, %r10 ;; jnbe label3; j label1 ;; block1: ;; movq 0(%rsi), %rsi diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index 5b529fb0d267..46a0b9cddc07 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -46,9 +46,9 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movl %edi, %r10d -;; movabsq $-4100, %r11 -;; addq %r11, 8(%rdx), %r11 -;; cmpq %r11, %r10 +;; movabsq $-4100, %r9 +;; addq %r9, 8(%rdx), %r9 +;; cmpq %r9, %r10 ;; jnbe label3; j label1 ;; block1: ;; movq 0(%rdx), %rdi @@ -68,9 +68,9 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movl %edi, %r10d -;; movabsq $-4100, %r11 -;; addq %r11, 8(%rsi), %r11 -;; cmpq %r11, %r10 +;; movabsq $-4100, %r9 +;; addq %r9, 8(%rsi), %r9 +;; cmpq %r9, %r10 ;; jnbe label3; j label1 ;; block1: ;; movq 0(%rsi), %rsi diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index 9ce5548adf49..23825be3f765 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -79,8 +79,8 @@ ;; jnbe label3; j label1 ;; block1: ;; addq %r8, 0(%rsi), %r8 -;; movl $-65536, %edi -;; movl 0(%r8,%rdi,1), %eax +;; movl $-65536, %eax +;; movl 0(%r8,%rax,1), %eax ;; jmp label2 ;; block2: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index f8d2d225623d..51fbcfa63db4 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -46,9 +46,9 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movl %edi, %r10d -;; movabsq $-4097, %r11 -;; addq %r11, 8(%rdx), %r11 -;; cmpq %r11, %r10 +;; movabsq $-4097, %r9 +;; addq %r9, 8(%rdx), %r9 +;; cmpq %r9, %r10 ;; jnbe label3; j label1 ;; block1: ;; movq 0(%rdx), %rdi @@ -68,9 +68,9 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movl %edi, %r10d -;; movabsq $-4097, %r11 -;; addq %r11, 8(%rsi), %r11 -;; cmpq %r11, %r10 +;; movabsq $-4097, %r9 +;; addq %r9, 8(%rsi), %r9 +;; cmpq %r9, %r10 ;; jnbe label3; j label1 ;; block1: ;; movq 0(%rsi), %rsi diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index 748434c5debc..187b535a986e 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -79,8 +79,8 @@ ;; jnbe label3; j label1 ;; block1: ;; addq %r8, 0(%rsi), %r8 -;; movl $-65536, %edi -;; movzbq 0(%r8,%rdi,1), %rax +;; movl $-65536, %eax +;; movzbq 0(%r8,%rax,1), %rax ;; jmp label2 ;; block2: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat index ff83546c3fb5..ef1fcddac967 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -46,14 +46,14 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movl %edi, %edi -;; movabsq $-4, %rax -;; addq %rax, 8(%rdx), %rax -;; movq %rdi, %r11 -;; addq %r11, 0(%rdx), %r11 -;; xorq %rcx, %rcx, %rcx -;; cmpq %rax, %rdi -;; cmovnbeq %rcx, %r11, %r11 -;; movl %esi, 0(%r11) +;; movabsq $-4, %r11 +;; addq %r11, 8(%rdx), %r11 +;; movq %rdi, %r10 +;; addq %r10, 0(%rdx), %r10 +;; xorq %rax, %rax, %rax +;; cmpq %r11, %rdi +;; cmovnbeq %rax, %r10, %r10 +;; movl %esi, 0(%r10) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -68,17 +68,17 @@ ;; block0: ;; movq %rsi, %rax ;; movl %edi, %esi -;; movabsq $-4, %rdi +;; movabsq $-4, %r11 ;; movq %rax, %rcx -;; addq %rdi, 8(%rcx), %rdi -;; movq %rsi, %r11 -;; addq %r11, 0(%rcx), %r11 -;; xorq %rax, %rax, %rax -;; cmpq %rdi, %rsi -;; cmovnbeq %rax, %r11, %r11 -;; movl 0(%r11), %eax +;; addq %r11, 8(%rcx), %r11 +;; movq %rsi, %r10 +;; addq %r10, 0(%rcx), %r10 +;; xorq %rdi, %rdi, %rdi +;; cmpq %r11, %rsi +;; cmovnbeq %rdi, %r10, %r10 +;; movl 0(%r10), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp ;; popq %rbp -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 3c42b63e6be1..0f3b9e5d12a0 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -49,11 +49,11 @@ ;; movabsq $-4100, %rax ;; addq %rax, 8(%rdx), %rax ;; movq 0(%rdx), %rcx -;; lea 4096(%rcx,%rdi,1), %rcx -;; xorq %rdx, %rdx, %rdx +;; lea 4096(%rcx,%rdi,1), %r11 +;; xorq %rcx, %rcx, %rcx ;; cmpq %rax, %rdi -;; cmovnbeq %rdx, %rcx, %rcx -;; movl %esi, 0(%rcx) +;; cmovnbeq %rcx, %r11, %r11 +;; movl %esi, 0(%r11) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -66,15 +66,17 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: +;; movq %rsi, %rax ;; movl %edi, %edi -;; movabsq $-4100, %rax -;; addq %rax, 8(%rsi), %rax -;; movq 0(%rsi), %rcx -;; lea 4096(%rcx,%rdi,1), %rsi -;; xorq %rcx, %rcx, %rcx -;; cmpq %rax, %rdi -;; cmovnbeq %rcx, %rsi, %rsi -;; movl 0(%rsi), %eax +;; movabsq $-4100, %rsi +;; movq %rax, %rdx +;; addq %rsi, 8(%rdx), %rsi +;; movq 0(%rdx), %rax +;; lea 4096(%rax,%rdi,1), %r11 +;; xorq %rax, %rax, %rax +;; cmpq %rsi, %rdi +;; cmovnbeq %rax, %r11, %r11 +;; movl 0(%r11), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 0cdce01dcf7c..dc35c58d198f 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -52,11 +52,11 @@ ;; movq 8(%rdx), %rcx ;; addq %r11, 0(%rdx), %r11 ;; movl $-65536, %edx -;; lea 0(%r11,%rdx,1), %rdx -;; xorq %r8, %r8, %r8 +;; lea 0(%r11,%rdx,1), %rdi +;; xorq %rdx, %rdx, %rdx ;; cmpq %rcx, %rax -;; cmovnbeq %r8, %rdx, %rdx -;; movl %esi, 0(%rdx) +;; cmovnbeq %rdx, %rdi, %rdi +;; movl %esi, 0(%rdi) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -76,11 +76,11 @@ ;; movq 8(%rsi), %rcx ;; addq %r11, 0(%rsi), %r11 ;; movl $-65536, %edx -;; lea 0(%r11,%rdx,1), %rdx -;; xorq %r8, %r8, %r8 +;; lea 0(%r11,%rdx,1), %rdi +;; xorq %rdx, %rdx, %rdx ;; cmpq %rcx, %rax -;; cmovnbeq %r8, %rdx, %rdx -;; movl 0(%rdx), %eax +;; cmovnbeq %rdx, %rdi, %rdi +;; movl 0(%rdi), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat index f27f915a6e78..17a6726b0cc9 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -47,12 +47,12 @@ ;; block0: ;; movl %edi, %r11d ;; movq 8(%rdx), %rdi -;; movq %r11, %r10 -;; addq %r10, 0(%rdx), %r10 +;; movq %r11, %r9 +;; addq %r9, 0(%rdx), %r9 ;; xorq %rax, %rax, %rax ;; cmpq %rdi, %r11 -;; cmovnbq %rax, %r10, %r10 -;; movb %sil, 0(%r10) +;; cmovnbq %rax, %r9, %r9 +;; movb %sil, 0(%r9) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -67,14 +67,14 @@ ;; block0: ;; movl %edi, %r11d ;; movq 8(%rsi), %rdi -;; movq %r11, %r10 -;; addq %r10, 0(%rsi), %r10 +;; movq %r11, %r9 +;; addq %r9, 0(%rsi), %r9 ;; xorq %rsi, %rsi, %rsi ;; cmpq %rdi, %r11 -;; cmovnbq %rsi, %r10, %r10 -;; movzbq 0(%r10), %rax +;; cmovnbq %rsi, %r9, %r9 +;; movzbq 0(%r9), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp ;; popq %rbp -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 69169611ba93..f105a06aa960 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -49,11 +49,11 @@ ;; movabsq $-4097, %rax ;; addq %rax, 8(%rdx), %rax ;; movq 0(%rdx), %rcx -;; lea 4096(%rcx,%rdi,1), %rcx -;; xorq %rdx, %rdx, %rdx +;; lea 4096(%rcx,%rdi,1), %r11 +;; xorq %rcx, %rcx, %rcx ;; cmpq %rax, %rdi -;; cmovnbeq %rdx, %rcx, %rcx -;; movb %sil, 0(%rcx) +;; cmovnbeq %rcx, %r11, %r11 +;; movb %sil, 0(%r11) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -66,15 +66,17 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: +;; movq %rsi, %rax ;; movl %edi, %edi -;; movabsq $-4097, %rax -;; addq %rax, 8(%rsi), %rax -;; movq 0(%rsi), %rcx -;; lea 4096(%rcx,%rdi,1), %rsi -;; xorq %rcx, %rcx, %rcx -;; cmpq %rax, %rdi -;; cmovnbeq %rcx, %rsi, %rsi -;; movzbq 0(%rsi), %rax +;; movabsq $-4097, %rsi +;; movq %rax, %rdx +;; addq %rsi, 8(%rdx), %rsi +;; movq 0(%rdx), %rax +;; lea 4096(%rax,%rdi,1), %r11 +;; xorq %rax, %rax, %rax +;; cmpq %rsi, %rdi +;; cmovnbeq %rax, %r11, %r11 +;; movzbq 0(%r11), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 4dad324de2d6..171202116deb 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -52,11 +52,11 @@ ;; movq 8(%rdx), %rcx ;; addq %r11, 0(%rdx), %r11 ;; movl $-65536, %edx -;; lea 0(%r11,%rdx,1), %rdx -;; xorq %r8, %r8, %r8 +;; lea 0(%r11,%rdx,1), %rdi +;; xorq %rdx, %rdx, %rdx ;; cmpq %rcx, %rax -;; cmovnbeq %r8, %rdx, %rdx -;; movb %sil, 0(%rdx) +;; cmovnbeq %rdx, %rdi, %rdi +;; movb %sil, 0(%rdi) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -76,11 +76,11 @@ ;; movq 8(%rsi), %rcx ;; addq %r11, 0(%rsi), %r11 ;; movl $-65536, %edx -;; lea 0(%r11,%rdx,1), %rdx -;; xorq %r8, %r8, %r8 +;; lea 0(%r11,%rdx,1), %rdi +;; xorq %rdx, %rdx, %rdx ;; cmpq %rcx, %rax -;; cmovnbeq %r8, %rdx, %rdx -;; movzbq 0(%rdx), %rax +;; cmovnbeq %rdx, %rdi, %rdi +;; movzbq 0(%rdi), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index 20f154347168..57e2d1680d46 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -73,8 +73,8 @@ ;; jnbe label3; j label1 ;; block1: ;; addq %r8, 0(%rsi), %r8 -;; movl $-65536, %r11d -;; movl 0(%r8,%r11,1), %eax +;; movl $-65536, %esi +;; movl 0(%r8,%rsi,1), %eax ;; jmp label2 ;; block2: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index e7fd0d0f0ecb..f2c873612824 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -73,8 +73,8 @@ ;; jnbe label3; j label1 ;; block1: ;; addq %r8, 0(%rsi), %r8 -;; movl $-65536, %r11d -;; movzbq 0(%r8,%r11,1), %rax +;; movl $-65536, %esi +;; movzbq 0(%r8,%rsi,1), %rax ;; jmp label2 ;; block2: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index 916816034c08..89b24d688248 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -47,12 +47,12 @@ ;; block0: ;; movl %edi, %r11d ;; movq 8(%rdx), %rdi -;; movq %r11, %r10 -;; addq %r10, 0(%rdx), %r10 +;; movq %r11, %r9 +;; addq %r9, 0(%rdx), %r9 ;; xorq %rax, %rax, %rax ;; cmpq %rdi, %r11 -;; cmovnbeq %rax, %r10, %r10 -;; movl %esi, 0(%r10) +;; cmovnbeq %rax, %r9, %r9 +;; movl %esi, 0(%r9) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -67,12 +67,12 @@ ;; block0: ;; movl %edi, %r11d ;; movq 8(%rsi), %rdi -;; movq %r11, %r10 -;; addq %r10, 0(%rsi), %r10 +;; movq %r11, %r9 +;; addq %r9, 0(%rsi), %r9 ;; xorq %rsi, %rsi, %rsi ;; cmpq %rdi, %r11 -;; cmovnbeq %rsi, %r10, %r10 -;; movl 0(%r10), %eax +;; cmovnbeq %rsi, %r9, %r9 +;; movl 0(%r9), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index d083b959b98e..5b49b27f4a88 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -48,11 +48,11 @@ ;; movl %edi, %edi ;; movq 8(%rdx), %rax ;; movq 0(%rdx), %rcx -;; lea 4096(%rcx,%rdi,1), %r11 +;; lea 4096(%rcx,%rdi,1), %r10 ;; xorq %rcx, %rcx, %rcx ;; cmpq %rax, %rdi -;; cmovnbeq %rcx, %r11, %r11 -;; movl %esi, 0(%r11) +;; cmovnbeq %rcx, %r10, %r10 +;; movl %esi, 0(%r10) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -68,11 +68,11 @@ ;; movl %edi, %ecx ;; movq 8(%rsi), %rdi ;; movq 0(%rsi), %rsi -;; lea 4096(%rsi,%rcx,1), %r11 +;; lea 4096(%rsi,%rcx,1), %r10 ;; xorq %rax, %rax, %rax ;; cmpq %rdi, %rcx -;; cmovnbeq %rax, %r11, %r11 -;; movl 0(%r11), %eax +;; cmovnbeq %rax, %r10, %r10 +;; movl 0(%r10), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 809121cb00ae..8b6846dfce16 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -50,11 +50,11 @@ ;; movq %rdi, %rcx ;; addq %rcx, 0(%rdx), %rcx ;; movl $-65536, %edx -;; lea 0(%rcx,%rdx,1), %rcx -;; xorq %rdx, %rdx, %rdx +;; lea 0(%rcx,%rdx,1), %r11 +;; xorq %rcx, %rcx, %rcx ;; cmpq %rax, %rdi -;; cmovnbeq %rdx, %rcx, %rcx -;; movl %esi, 0(%rcx) +;; cmovnbeq %rcx, %r11, %r11 +;; movl %esi, 0(%r11) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -71,12 +71,12 @@ ;; movq 8(%rsi), %rax ;; movq %rdi, %rcx ;; addq %rcx, 0(%rsi), %rcx -;; movl $-65536, %esi -;; lea 0(%rcx,%rsi,1), %rsi +;; movl $-65536, %edx +;; lea 0(%rcx,%rdx,1), %r11 ;; xorq %rcx, %rcx, %rcx ;; cmpq %rax, %rdi -;; cmovnbeq %rcx, %rsi, %rsi -;; movl 0(%rsi), %eax +;; cmovnbeq %rcx, %r11, %r11 +;; movl 0(%r11), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index 8bfbcc818ca0..1ac80ebbc66a 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -47,12 +47,12 @@ ;; block0: ;; movl %edi, %r11d ;; movq 8(%rdx), %rdi -;; movq %r11, %r10 -;; addq %r10, 0(%rdx), %r10 +;; movq %r11, %r9 +;; addq %r9, 0(%rdx), %r9 ;; xorq %rax, %rax, %rax ;; cmpq %rdi, %r11 -;; cmovnbq %rax, %r10, %r10 -;; movb %sil, 0(%r10) +;; cmovnbq %rax, %r9, %r9 +;; movb %sil, 0(%r9) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -67,14 +67,14 @@ ;; block0: ;; movl %edi, %r11d ;; movq 8(%rsi), %rdi -;; movq %r11, %r10 -;; addq %r10, 0(%rsi), %r10 +;; movq %r11, %r9 +;; addq %r9, 0(%rsi), %r9 ;; xorq %rsi, %rsi, %rsi ;; cmpq %rdi, %r11 -;; cmovnbq %rsi, %r10, %r10 -;; movzbq 0(%r10), %rax +;; cmovnbq %rsi, %r9, %r9 +;; movzbq 0(%r9), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp ;; popq %rbp -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index 917aee92f163..774e27d08615 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -48,11 +48,11 @@ ;; movl %edi, %edi ;; movq 8(%rdx), %rax ;; movq 0(%rdx), %rcx -;; lea 4096(%rcx,%rdi,1), %r11 +;; lea 4096(%rcx,%rdi,1), %r10 ;; xorq %rcx, %rcx, %rcx ;; cmpq %rax, %rdi -;; cmovnbeq %rcx, %r11, %r11 -;; movb %sil, 0(%r11) +;; cmovnbeq %rcx, %r10, %r10 +;; movb %sil, 0(%r10) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -68,11 +68,11 @@ ;; movl %edi, %ecx ;; movq 8(%rsi), %rdi ;; movq 0(%rsi), %rsi -;; lea 4096(%rsi,%rcx,1), %r11 +;; lea 4096(%rsi,%rcx,1), %r10 ;; xorq %rax, %rax, %rax ;; cmpq %rdi, %rcx -;; cmovnbeq %rax, %r11, %r11 -;; movzbq 0(%r11), %rax +;; cmovnbeq %rax, %r10, %r10 +;; movzbq 0(%r10), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 1efba8977530..5ac256e173d3 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i32_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -50,11 +50,11 @@ ;; movq %rdi, %rcx ;; addq %rcx, 0(%rdx), %rcx ;; movl $-65536, %edx -;; lea 0(%rcx,%rdx,1), %rcx -;; xorq %rdx, %rdx, %rdx +;; lea 0(%rcx,%rdx,1), %r11 +;; xorq %rcx, %rcx, %rcx ;; cmpq %rax, %rdi -;; cmovnbeq %rdx, %rcx, %rcx -;; movb %sil, 0(%rcx) +;; cmovnbeq %rcx, %r11, %r11 +;; movb %sil, 0(%r11) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -71,12 +71,12 @@ ;; movq 8(%rsi), %rax ;; movq %rdi, %rcx ;; addq %rcx, 0(%rsi), %rcx -;; movl $-65536, %esi -;; lea 0(%rcx,%rsi,1), %rsi +;; movl $-65536, %edx +;; lea 0(%rcx,%rdx,1), %r11 ;; xorq %rcx, %rcx, %rcx ;; cmpq %rax, %rdi -;; cmovnbeq %rcx, %rsi, %rsi -;; movzbq 0(%rsi), %rax +;; cmovnbeq %rcx, %r11, %r11 +;; movzbq 0(%r11), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat index fdeae9cf0346..df96ce78bdc7 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0_offset.wat @@ -45,9 +45,9 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movabsq $-4, %r9 -;; addq %r9, 8(%rdx), %r9 -;; cmpq %r9, %rdi +;; movabsq $-4, %r8 +;; addq %r8, 8(%rdx), %r8 +;; cmpq %r8, %rdi ;; jnbe label3; j label1 ;; block1: ;; movq 0(%rdx), %r11 @@ -66,9 +66,9 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movabsq $-4, %r9 -;; addq %r9, 8(%rsi), %r9 -;; cmpq %r9, %rdi +;; movabsq $-4, %r8 +;; addq %r8, 8(%rsi), %r8 +;; cmpq %r8, %rdi ;; jnbe label3; j label1 ;; block1: ;; movq 0(%rsi), %r11 diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat index e270150e72b1..5e04c5842661 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0x1000_offset.wat @@ -45,9 +45,9 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movabsq $-4100, %r9 -;; addq %r9, 8(%rdx), %r9 -;; cmpq %r9, %rdi +;; movabsq $-4100, %r8 +;; addq %r8, 8(%rdx), %r8 +;; cmpq %r8, %rdi ;; jnbe label3; j label1 ;; block1: ;; movq 0(%rdx), %r11 @@ -66,9 +66,9 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movabsq $-4100, %r9 -;; addq %r9, 8(%rsi), %r9 -;; cmpq %r9, %rdi +;; movabsq $-4100, %r8 +;; addq %r8, 8(%rsi), %r8 +;; cmpq %r8, %rdi ;; jnbe label3; j label1 ;; block1: ;; movq 0(%rsi), %r11 diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat index f1e8d03c1fc5..606ac690204d 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -77,8 +77,8 @@ ;; jnbe label3; j label1 ;; block1: ;; addq %rdi, 0(%rsi), %rdi -;; movl $-65536, %esi -;; movl 0(%rdi,%rsi,1), %eax +;; movl $-65536, %eax +;; movl 0(%rdi,%rax,1), %eax ;; jmp label2 ;; block2: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat index 3362e6c49389..ebee6f63ec05 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0x1000_offset.wat @@ -45,9 +45,9 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movabsq $-4097, %r9 -;; addq %r9, 8(%rdx), %r9 -;; cmpq %r9, %rdi +;; movabsq $-4097, %r8 +;; addq %r8, 8(%rdx), %r8 +;; cmpq %r8, %rdi ;; jnbe label3; j label1 ;; block1: ;; movq 0(%rdx), %r11 @@ -66,9 +66,9 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movabsq $-4097, %r9 -;; addq %r9, 8(%rsi), %r9 -;; cmpq %r9, %rdi +;; movabsq $-4097, %r8 +;; addq %r8, 8(%rsi), %r8 +;; cmpq %r8, %rdi ;; jnbe label3; j label1 ;; block1: ;; movq 0(%rsi), %r11 diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat index a9a609a07901..1253391f756b 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -77,8 +77,8 @@ ;; jnbe label3; j label1 ;; block1: ;; addq %rdi, 0(%rsi), %rdi -;; movl $-65536, %esi -;; movzbq 0(%rdi,%rsi,1), %rax +;; movl $-65536, %eax +;; movzbq 0(%rdi,%rax,1), %rax ;; jmp label2 ;; block2: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat index 4c5cc6a3ffdc..5ce7b41a4c9d 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -45,14 +45,14 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movabsq $-4, %r11 -;; addq %r11, 8(%rdx), %r11 -;; movq %rdi, %r10 -;; addq %r10, 0(%rdx), %r10 -;; xorq %rax, %rax, %rax -;; cmpq %r11, %rdi -;; cmovnbeq %rax, %r10, %r10 -;; movl %esi, 0(%r10) +;; movabsq $-4, %r10 +;; addq %r10, 8(%rdx), %r10 +;; movq %rdi, %r9 +;; addq %r9, 0(%rdx), %r9 +;; xorq %r11, %r11, %r11 +;; cmpq %r10, %rdi +;; cmovnbeq %r11, %r9, %r9 +;; movl %esi, 0(%r9) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -65,16 +65,16 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movabsq $-4, %r11 -;; addq %r11, 8(%rsi), %r11 -;; movq %rdi, %r10 -;; addq %r10, 0(%rsi), %r10 -;; xorq %rsi, %rsi, %rsi -;; cmpq %r11, %rdi -;; cmovnbeq %rsi, %r10, %r10 -;; movl 0(%r10), %eax +;; movabsq $-4, %r10 +;; addq %r10, 8(%rsi), %r10 +;; movq %rdi, %r9 +;; addq %r9, 0(%rsi), %r9 +;; xorq %r11, %r11, %r11 +;; cmpq %r10, %rdi +;; cmovnbeq %r11, %r9, %r9 +;; movl 0(%r9), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp ;; popq %rbp -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index ca9a9ac97e9d..97907fc88179 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -45,14 +45,14 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movabsq $-4100, %rax -;; addq %rax, 8(%rdx), %rax -;; movq 0(%rdx), %rcx -;; lea 4096(%rcx,%rdi,1), %r11 -;; xorq %rcx, %rcx, %rcx -;; cmpq %rax, %rdi -;; cmovnbeq %rcx, %r11, %r11 -;; movl %esi, 0(%r11) +;; movabsq $-4100, %r11 +;; addq %r11, 8(%rdx), %r11 +;; movq 0(%rdx), %rax +;; lea 4096(%rax,%rdi,1), %r10 +;; xorq %rax, %rax, %rax +;; cmpq %r11, %rdi +;; cmovnbeq %rax, %r10, %r10 +;; movl %esi, 0(%r10) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -65,14 +65,14 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movabsq $-4100, %rcx -;; addq %rcx, 8(%rsi), %rcx +;; movabsq $-4100, %r11 +;; addq %r11, 8(%rsi), %r11 ;; movq 0(%rsi), %rsi -;; lea 4096(%rsi,%rdi,1), %r11 -;; xorq %rax, %rax, %rax -;; cmpq %rcx, %rdi -;; cmovnbeq %rax, %r11, %r11 -;; movl 0(%r11), %eax +;; lea 4096(%rsi,%rdi,1), %r10 +;; xorq %rsi, %rsi, %rsi +;; cmpq %r11, %rdi +;; cmovnbeq %rsi, %r10, %r10 +;; movl 0(%r10), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat index 3d3c0ad94b2a..98836b711f88 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -51,11 +51,11 @@ ;; movq 8(%rdx), %rax ;; movq %rdi, %rcx ;; addq %rcx, 0(%rdx), %rcx -;; movl $-65536, %edi -;; lea 0(%rcx,%rdi,1), %rcx -;; xorq %rdi, %rdi, %rdi +;; movl $-65536, %edx +;; lea 0(%rcx,%rdx,1), %rcx +;; xorq %rdx, %rdx, %rdx ;; cmpq %rax, %r8 -;; cmovnbeq %rdi, %rcx, %rcx +;; cmovnbeq %rdx, %rcx, %rcx ;; movl %esi, 0(%rcx) ;; jmp label1 ;; block1: @@ -69,18 +69,18 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movq %rdi, %rdx -;; addq %rdx, const(0), %rdx +;; movq %rdi, %rcx +;; addq %rcx, const(0), %rcx ;; jb #trap=heap_oob ;; movq 8(%rsi), %rax -;; movq %rdi, %rcx -;; addq %rcx, 0(%rsi), %rcx -;; movl $-65536, %edi -;; lea 0(%rcx,%rdi,1), %rcx -;; xorq %rdi, %rdi, %rdi -;; cmpq %rax, %rdx -;; cmovnbeq %rdi, %rcx, %rcx -;; movl 0(%rcx), %eax +;; movq %rdi, %rdx +;; addq %rdx, 0(%rsi), %rdx +;; movl $-65536, %r8d +;; lea 0(%rdx,%r8,1), %rsi +;; xorq %rdx, %rdx, %rdx +;; cmpq %rax, %rcx +;; cmovnbeq %rdx, %rsi, %rsi +;; movl 0(%rsi), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat index e9a43600955a..b2f45beb12eb 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -46,12 +46,12 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 8(%rdx), %r10 -;; movq %rdi, %r9 -;; addq %r9, 0(%rdx), %r9 +;; movq %rdi, %r8 +;; addq %r8, 0(%rdx), %r8 ;; xorq %r11, %r11, %r11 ;; cmpq %r10, %rdi -;; cmovnbq %r11, %r9, %r9 -;; movb %sil, 0(%r9) +;; cmovnbq %r11, %r8, %r8 +;; movb %sil, 0(%r8) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -65,14 +65,14 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 8(%rsi), %r10 -;; movq %rdi, %r9 -;; addq %r9, 0(%rsi), %r9 +;; movq %rdi, %r8 +;; addq %r8, 0(%rsi), %r8 ;; xorq %r11, %r11, %r11 ;; cmpq %r10, %rdi -;; cmovnbq %r11, %r9, %r9 -;; movzbq 0(%r9), %rax +;; cmovnbq %r11, %r8, %r8 +;; movzbq 0(%r8), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp ;; popq %rbp -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 28522fed9b33..3d1a7115acbd 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -45,14 +45,14 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movabsq $-4097, %rax -;; addq %rax, 8(%rdx), %rax -;; movq 0(%rdx), %rcx -;; lea 4096(%rcx,%rdi,1), %r11 -;; xorq %rcx, %rcx, %rcx -;; cmpq %rax, %rdi -;; cmovnbeq %rcx, %r11, %r11 -;; movb %sil, 0(%r11) +;; movabsq $-4097, %r11 +;; addq %r11, 8(%rdx), %r11 +;; movq 0(%rdx), %rax +;; lea 4096(%rax,%rdi,1), %r10 +;; xorq %rax, %rax, %rax +;; cmpq %r11, %rdi +;; cmovnbeq %rax, %r10, %r10 +;; movb %sil, 0(%r10) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -65,14 +65,14 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movabsq $-4097, %rcx -;; addq %rcx, 8(%rsi), %rcx +;; movabsq $-4097, %r11 +;; addq %r11, 8(%rsi), %r11 ;; movq 0(%rsi), %rsi -;; lea 4096(%rsi,%rdi,1), %r11 -;; xorq %rax, %rax, %rax -;; cmpq %rcx, %rdi -;; cmovnbeq %rax, %r11, %r11 -;; movzbq 0(%r11), %rax +;; lea 4096(%rsi,%rdi,1), %r10 +;; xorq %rsi, %rsi, %rsi +;; cmpq %r11, %rdi +;; cmovnbeq %rsi, %r10, %r10 +;; movzbq 0(%r10), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat index aad9fe06b0c1..be22d8a42144 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -51,11 +51,11 @@ ;; movq 8(%rdx), %rax ;; movq %rdi, %rcx ;; addq %rcx, 0(%rdx), %rcx -;; movl $-65536, %edi -;; lea 0(%rcx,%rdi,1), %rcx -;; xorq %rdi, %rdi, %rdi +;; movl $-65536, %edx +;; lea 0(%rcx,%rdx,1), %rcx +;; xorq %rdx, %rdx, %rdx ;; cmpq %rax, %r8 -;; cmovnbeq %rdi, %rcx, %rcx +;; cmovnbeq %rdx, %rcx, %rcx ;; movb %sil, 0(%rcx) ;; jmp label1 ;; block1: @@ -69,18 +69,18 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movq %rdi, %rdx -;; addq %rdx, const(0), %rdx +;; movq %rdi, %rcx +;; addq %rcx, const(0), %rcx ;; jb #trap=heap_oob ;; movq 8(%rsi), %rax -;; movq %rdi, %rcx -;; addq %rcx, 0(%rsi), %rcx -;; movl $-65536, %edi -;; lea 0(%rcx,%rdi,1), %rcx -;; xorq %rdi, %rdi, %rdi -;; cmpq %rax, %rdx -;; cmovnbeq %rdi, %rcx, %rcx -;; movzbq 0(%rcx), %rax +;; movq %rdi, %rdx +;; addq %rdx, 0(%rsi), %rdx +;; movl $-65536, %r8d +;; lea 0(%rdx,%r8,1), %rsi +;; xorq %rdx, %rdx, %rdx +;; cmpq %rax, %rcx +;; cmovnbeq %rdx, %rsi, %rsi +;; movzbq 0(%rsi), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat index ffca63fbeabe..6d9c1df46417 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i32_access_0xffff0000_offset.wat @@ -73,8 +73,8 @@ ;; block1: ;; movq %rdi, %r11 ;; addq %r11, 0(%rsi), %r11 -;; movl $-65536, %r10d -;; movl 0(%r11,%r10,1), %eax +;; movl $-65536, %esi +;; movl 0(%r11,%rsi,1), %eax ;; jmp label2 ;; block2: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat index 59beae8c97dc..33e0e97a68c0 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_no_spectre_i8_access_0xffff0000_offset.wat @@ -73,8 +73,8 @@ ;; block1: ;; movq %rdi, %r11 ;; addq %r11, 0(%rsi), %r11 -;; movl $-65536, %r10d -;; movzbq 0(%r11,%r10,1), %rax +;; movl $-65536, %esi +;; movzbq 0(%r11,%rsi,1), %rax ;; jmp label2 ;; block2: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index 8919253b3fd7..c7c43a0d3f9e 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -46,12 +46,12 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 8(%rdx), %r10 -;; movq %rdi, %r9 -;; addq %r9, 0(%rdx), %r9 +;; movq %rdi, %r8 +;; addq %r8, 0(%rdx), %r8 ;; xorq %r11, %r11, %r11 ;; cmpq %r10, %rdi -;; cmovnbeq %r11, %r9, %r9 -;; movl %esi, 0(%r9) +;; cmovnbeq %r11, %r8, %r8 +;; movl %esi, 0(%r8) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -65,12 +65,12 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 8(%rsi), %r10 -;; movq %rdi, %r9 -;; addq %r9, 0(%rsi), %r9 +;; movq %rdi, %r8 +;; addq %r8, 0(%rsi), %r8 ;; xorq %r11, %r11, %r11 ;; cmpq %r10, %rdi -;; cmovnbeq %r11, %r9, %r9 -;; movl 0(%r9), %eax +;; cmovnbeq %r11, %r8, %r8 +;; movl 0(%r8), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index 2d4182b7371f..03cc24bf9787 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -47,11 +47,11 @@ ;; block0: ;; movq 8(%rdx), %r11 ;; movq 0(%rdx), %rax -;; lea 4096(%rax,%rdi,1), %r10 +;; lea 4096(%rax,%rdi,1), %r9 ;; xorq %rax, %rax, %rax ;; cmpq %r11, %rdi -;; cmovnbeq %rax, %r10, %r10 -;; movl %esi, 0(%r10) +;; cmovnbeq %rax, %r9, %r9 +;; movl %esi, 0(%r9) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -66,11 +66,11 @@ ;; block0: ;; movq 8(%rsi), %r11 ;; movq 0(%rsi), %rsi -;; lea 4096(%rsi,%rdi,1), %r10 +;; lea 4096(%rsi,%rdi,1), %r9 ;; xorq %rsi, %rsi, %rsi ;; cmpq %r11, %rdi -;; cmovnbeq %rsi, %r10, %r10 -;; movl 0(%r10), %eax +;; cmovnbeq %rsi, %r9, %r9 +;; movl 0(%r9), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat index f9840da3b9b5..3320b9fa3c4c 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0xffff0000_offset.wat @@ -48,12 +48,12 @@ ;; movq 8(%rdx), %rax ;; movq %rdi, %rcx ;; addq %rcx, 0(%rdx), %rcx -;; movl $-65536, %r11d -;; lea 0(%rcx,%r11,1), %r11 +;; movl $-65536, %edx +;; lea 0(%rcx,%rdx,1), %r10 ;; xorq %rcx, %rcx, %rcx ;; cmpq %rax, %rdi -;; cmovnbeq %rcx, %r11, %r11 -;; movl %esi, 0(%r11) +;; cmovnbeq %rcx, %r10, %r10 +;; movl %esi, 0(%r10) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -69,12 +69,12 @@ ;; movq 8(%rsi), %rcx ;; movq %rdi, %rax ;; addq %rax, 0(%rsi), %rax -;; movl $-65536, %r11d -;; lea 0(%rax,%r11,1), %r11 +;; movl $-65536, %esi +;; lea 0(%rax,%rsi,1), %r10 ;; xorq %rax, %rax, %rax ;; cmpq %rcx, %rdi -;; cmovnbeq %rax, %r11, %r11 -;; movl 0(%r11), %eax +;; cmovnbeq %rax, %r10, %r10 +;; movl 0(%r10), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index de892555117f..449f63560bf7 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -46,12 +46,12 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 8(%rdx), %r10 -;; movq %rdi, %r9 -;; addq %r9, 0(%rdx), %r9 +;; movq %rdi, %r8 +;; addq %r8, 0(%rdx), %r8 ;; xorq %r11, %r11, %r11 ;; cmpq %r10, %rdi -;; cmovnbq %r11, %r9, %r9 -;; movb %sil, 0(%r9) +;; cmovnbq %r11, %r8, %r8 +;; movb %sil, 0(%r8) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -65,14 +65,14 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 8(%rsi), %r10 -;; movq %rdi, %r9 -;; addq %r9, 0(%rsi), %r9 +;; movq %rdi, %r8 +;; addq %r8, 0(%rsi), %r8 ;; xorq %r11, %r11, %r11 ;; cmpq %r10, %rdi -;; cmovnbq %r11, %r9, %r9 -;; movzbq 0(%r9), %rax +;; cmovnbq %r11, %r8, %r8 +;; movzbq 0(%r8), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp ;; popq %rbp -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index d0b1536e8beb..be1e9e7c9b74 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -47,11 +47,11 @@ ;; block0: ;; movq 8(%rdx), %r11 ;; movq 0(%rdx), %rax -;; lea 4096(%rax,%rdi,1), %r10 +;; lea 4096(%rax,%rdi,1), %r9 ;; xorq %rax, %rax, %rax ;; cmpq %r11, %rdi -;; cmovnbeq %rax, %r10, %r10 -;; movb %sil, 0(%r10) +;; cmovnbeq %rax, %r9, %r9 +;; movb %sil, 0(%r9) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -66,11 +66,11 @@ ;; block0: ;; movq 8(%rsi), %r11 ;; movq 0(%rsi), %rsi -;; lea 4096(%rsi,%rdi,1), %r10 +;; lea 4096(%rsi,%rdi,1), %r9 ;; xorq %rsi, %rsi, %rsi ;; cmpq %r11, %rdi -;; cmovnbeq %rsi, %r10, %r10 -;; movzbq 0(%r10), %rax +;; cmovnbeq %rsi, %r9, %r9 +;; movzbq 0(%r9), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat index 870594b12e65..214b6e06f87f 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_dynamic_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0xffff0000_offset.wat @@ -48,12 +48,12 @@ ;; movq 8(%rdx), %rax ;; movq %rdi, %rcx ;; addq %rcx, 0(%rdx), %rcx -;; movl $-65536, %r11d -;; lea 0(%rcx,%r11,1), %r11 +;; movl $-65536, %edx +;; lea 0(%rcx,%rdx,1), %r10 ;; xorq %rcx, %rcx, %rcx ;; cmpq %rax, %rdi -;; cmovnbeq %rcx, %r11, %r11 -;; movb %sil, 0(%r11) +;; cmovnbeq %rcx, %r10, %r10 +;; movb %sil, 0(%r10) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -69,12 +69,12 @@ ;; movq 8(%rsi), %rcx ;; movq %rdi, %rax ;; addq %rax, 0(%rsi), %rax -;; movl $-65536, %r11d -;; lea 0(%rax,%r11,1), %r11 +;; movl $-65536, %esi +;; lea 0(%rax,%rsi,1), %r10 ;; xorq %rax, %rax, %rax ;; cmpq %rcx, %rdi -;; cmovnbeq %rax, %r11, %r11 -;; movzbq 0(%r11), %rax +;; cmovnbeq %rax, %r10, %r10 +;; movzbq 0(%r10), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat index 917ca1f6c317..8066a12155e7 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -44,12 +44,12 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movl %edi, %r10d -;; movq %r10, %r9 -;; addq %r9, 0(%rdx), %r9 +;; movq %r10, %r8 +;; addq %r8, 0(%rdx), %r8 ;; xorq %r11, %r11, %r11 ;; cmpq $268435452, %r10 -;; cmovnbeq %r11, %r9, %r9 -;; movl %esi, 0(%r9) +;; cmovnbeq %r11, %r8, %r8 +;; movl %esi, 0(%r8) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -63,14 +63,14 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movl %edi, %r10d -;; movq %r10, %r9 -;; addq %r9, 0(%rsi), %r9 +;; movq %r10, %r8 +;; addq %r8, 0(%rsi), %r8 ;; xorq %r11, %r11, %r11 ;; cmpq $268435452, %r10 -;; cmovnbeq %r11, %r9, %r9 -;; movl 0(%r9), %eax +;; cmovnbeq %r11, %r8, %r8 +;; movl 0(%r8), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp ;; popq %rbp -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index 3a6c1b9dcbb7..0d6b731a7715 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -45,11 +45,11 @@ ;; block0: ;; movl %edi, %r11d ;; movq 0(%rdx), %rdi -;; lea 4096(%rdi,%r11,1), %r10 +;; lea 4096(%rdi,%r11,1), %r9 ;; xorq %rdi, %rdi, %rdi ;; cmpq $268431356, %r11 -;; cmovnbeq %rdi, %r10, %r10 -;; movl %esi, 0(%r10) +;; cmovnbeq %rdi, %r9, %r9 +;; movl %esi, 0(%r9) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -64,11 +64,11 @@ ;; block0: ;; movl %edi, %r11d ;; movq 0(%rsi), %rsi -;; lea 4096(%rsi,%r11,1), %r10 +;; lea 4096(%rsi,%r11,1), %r9 ;; xorq %rsi, %rsi, %rsi ;; cmpq $268431356, %r11 -;; cmovnbeq %rsi, %r10, %r10 -;; movl 0(%r10), %eax +;; cmovnbeq %rsi, %r9, %r9 +;; movl 0(%r9), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat index 2b07fb5e44fc..93d48967ab97 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -44,12 +44,12 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movl %edi, %r10d -;; movq %r10, %r9 -;; addq %r9, 0(%rdx), %r9 +;; movq %r10, %r8 +;; addq %r8, 0(%rdx), %r8 ;; xorq %r11, %r11, %r11 ;; cmpq $268435455, %r10 -;; cmovnbeq %r11, %r9, %r9 -;; movb %sil, 0(%r9) +;; cmovnbeq %r11, %r8, %r8 +;; movb %sil, 0(%r8) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -63,14 +63,14 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movl %edi, %r10d -;; movq %r10, %r9 -;; addq %r9, 0(%rsi), %r9 +;; movq %r10, %r8 +;; addq %r8, 0(%rsi), %r8 ;; xorq %r11, %r11, %r11 ;; cmpq $268435455, %r10 -;; cmovnbeq %r11, %r9, %r9 -;; movzbq 0(%r9), %rax +;; cmovnbeq %r11, %r8, %r8 +;; movzbq 0(%r8), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp ;; popq %rbp -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index 70caad3ef762..d7bb854fbeb8 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i32_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -45,11 +45,11 @@ ;; block0: ;; movl %edi, %r11d ;; movq 0(%rdx), %rdi -;; lea 4096(%rdi,%r11,1), %r10 +;; lea 4096(%rdi,%r11,1), %r9 ;; xorq %rdi, %rdi, %rdi ;; cmpq $268431359, %r11 -;; cmovnbeq %rdi, %r10, %r10 -;; movb %sil, 0(%r10) +;; cmovnbeq %rdi, %r9, %r9 +;; movb %sil, 0(%r9) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -64,11 +64,11 @@ ;; block0: ;; movl %edi, %r11d ;; movq 0(%rsi), %rsi -;; lea 4096(%rsi,%r11,1), %r10 +;; lea 4096(%rsi,%r11,1), %r9 ;; xorq %rsi, %rsi, %rsi ;; cmpq $268431359, %r11 -;; cmovnbeq %rsi, %r10, %r10 -;; movzbq 0(%r10), %rax +;; cmovnbeq %rsi, %r9, %r9 +;; movzbq 0(%r9), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat index 628ec6c1eb72..c0113a35f739 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0_offset.wat @@ -61,14 +61,14 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movq %rdi, %r8 -;; addq %r8, 0(%rsi), %r8 +;; movq %rdi, %rdx +;; addq %rdx, 0(%rsi), %rdx ;; xorq %r9, %r9, %r9 ;; cmpq $268435452, %rdi -;; cmovnbeq %r9, %r8, %r8 -;; movl 0(%r8), %eax +;; cmovnbeq %r9, %rdx, %rdx +;; movl 0(%rdx), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp ;; popq %rbp -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat index cc461ab9fddb..f9df8f3f9f83 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -44,11 +44,11 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 0(%rdx), %r10 -;; lea 4096(%r10,%rdi,1), %r9 +;; lea 4096(%r10,%rdi,1), %r8 ;; xorq %r10, %r10, %r10 ;; cmpq $268431356, %rdi -;; cmovnbeq %r10, %r9, %r9 -;; movl %esi, 0(%r9) +;; cmovnbeq %r10, %r8, %r8 +;; movl %esi, 0(%r8) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -62,11 +62,11 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 0(%rsi), %r10 -;; lea 4096(%r10,%rdi,1), %r9 +;; lea 4096(%r10,%rdi,1), %r8 ;; xorq %r10, %r10, %r10 ;; cmpq $268431356, %rdi -;; cmovnbeq %r10, %r9, %r9 -;; movl 0(%r9), %eax +;; cmovnbeq %r10, %r8, %r8 +;; movl 0(%r8), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat index 08cb5cfb238a..6bf8e9cc8a0d 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0_offset.wat @@ -61,14 +61,14 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movq %rdi, %r8 -;; addq %r8, 0(%rsi), %r8 +;; movq %rdi, %rdx +;; addq %rdx, 0(%rsi), %rdx ;; xorq %r9, %r9, %r9 ;; cmpq $268435455, %rdi -;; cmovnbeq %r9, %r8, %r8 -;; movzbq 0(%r8), %rax +;; cmovnbeq %r9, %rdx, %rdx +;; movzbq 0(%rdx), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp ;; popq %rbp -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat index ed9ca6fad8f9..ffa89d0b8110 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -44,11 +44,11 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 0(%rdx), %r10 -;; lea 4096(%r10,%rdi,1), %r9 +;; lea 4096(%r10,%rdi,1), %r8 ;; xorq %r10, %r10, %r10 ;; cmpq $268431359, %rdi -;; cmovnbeq %r10, %r9, %r9 -;; movb %sil, 0(%r9) +;; cmovnbeq %r10, %r8, %r8 +;; movb %sil, 0(%r8) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -62,11 +62,11 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 0(%rsi), %r10 -;; lea 4096(%r10,%rdi,1), %r9 +;; lea 4096(%r10,%rdi,1), %r8 ;; xorq %r10, %r10, %r10 ;; cmpq $268431359, %rdi -;; cmovnbeq %r10, %r9, %r9 -;; movzbq 0(%r9), %rax +;; cmovnbeq %r10, %r8, %r8 +;; movzbq 0(%r8), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat index a5a642ca76f7..c58eeb9a84b1 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0_offset.wat @@ -61,14 +61,14 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movq %rdi, %r8 -;; addq %r8, 0(%rsi), %r8 +;; movq %rdi, %rdx +;; addq %rdx, 0(%rsi), %rdx ;; xorq %r9, %r9, %r9 ;; cmpq $268435452, %rdi -;; cmovnbeq %r9, %r8, %r8 -;; movl 0(%r8), %eax +;; cmovnbeq %r9, %rdx, %rdx +;; movl 0(%rdx), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp ;; popq %rbp -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat index 5917c8e75587..d03ce63e4683 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i32_access_0x1000_offset.wat @@ -44,11 +44,11 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 0(%rdx), %r10 -;; lea 4096(%r10,%rdi,1), %r9 +;; lea 4096(%r10,%rdi,1), %r8 ;; xorq %r10, %r10, %r10 ;; cmpq $268431356, %rdi -;; cmovnbeq %r10, %r9, %r9 -;; movl %esi, 0(%r9) +;; cmovnbeq %r10, %r8, %r8 +;; movl %esi, 0(%r8) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -62,11 +62,11 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 0(%rsi), %r10 -;; lea 4096(%r10,%rdi,1), %r9 +;; lea 4096(%r10,%rdi,1), %r8 ;; xorq %r10, %r10, %r10 ;; cmpq $268431356, %rdi -;; cmovnbeq %r10, %r9, %r9 -;; movl 0(%r9), %eax +;; cmovnbeq %r10, %r8, %r8 +;; movl 0(%r8), %eax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat index a936fe47feb3..421d738d86b7 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0_offset.wat @@ -61,14 +61,14 @@ ;; movq %rsp, %rbp ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: -;; movq %rdi, %r8 -;; addq %r8, 0(%rsi), %r8 +;; movq %rdi, %rdx +;; addq %rdx, 0(%rsi), %rdx ;; xorq %r9, %r9, %r9 ;; cmpq $268435455, %rdi -;; cmovnbeq %r9, %r8, %r8 -;; movzbq 0(%r8), %rax +;; cmovnbeq %r9, %rdx, %rdx +;; movzbq 0(%rdx), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp ;; popq %rbp -;; ret \ No newline at end of file +;; ret diff --git a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat index 16dd75e526cf..0f2e210d57f7 100644 --- a/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat +++ b/cranelift/filetests/filetests/isa/x64/wasm/load_store_static_kind_i64_index_0xffffffff_guard_yes_spectre_i8_access_0x1000_offset.wat @@ -44,11 +44,11 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 0(%rdx), %r10 -;; lea 4096(%r10,%rdi,1), %r9 +;; lea 4096(%r10,%rdi,1), %r8 ;; xorq %r10, %r10, %r10 ;; cmpq $268431359, %rdi -;; cmovnbeq %r10, %r9, %r9 -;; movb %sil, 0(%r9) +;; cmovnbeq %r10, %r8, %r8 +;; movb %sil, 0(%r8) ;; jmp label1 ;; block1: ;; movq %rbp, %rsp @@ -62,11 +62,11 @@ ;; unwind DefineNewFrame { offset_upward_to_caller_sp: 16, offset_downward_to_clobbers: 0 } ;; block0: ;; movq 0(%rsi), %r10 -;; lea 4096(%r10,%rdi,1), %r9 +;; lea 4096(%r10,%rdi,1), %r8 ;; xorq %r10, %r10, %r10 ;; cmpq $268431359, %rdi -;; cmovnbeq %r10, %r9, %r9 -;; movzbq 0(%r9), %rax +;; cmovnbeq %r10, %r8, %r8 +;; movzbq 0(%r8), %rax ;; jmp label1 ;; block1: ;; movq %rbp, %rsp diff --git a/cranelift/filetests/filetests/licm/basic.clif b/cranelift/filetests/filetests/licm/basic.clif deleted file mode 100644 index 60f2f3c2ea22..000000000000 --- a/cranelift/filetests/filetests/licm/basic.clif +++ /dev/null @@ -1,39 +0,0 @@ -test licm -target riscv32 - -function %simple_loop(i32) -> i32 { - -block0(v0: i32): - jump block1(v0) - -block1(v1: i32): - v2 = iconst.i32 1 - v3 = iconst.i32 2 - v4 = iadd v2, v3 - brif v1, block2, block3(v1) - -block2: - v5 = isub v1, v2 - jump block1(v5) - -block3(v6: i32): - return v6 - -} -; sameln: function %simple_loop -; nextln: block0(v0: i32): -; nextln: v2 = iconst.i32 1 -; nextln: v3 = iconst.i32 2 -; nextln: v4 = iadd v2, v3 -; nextln: jump block1(v0) -; nextln: -; nextln: block1(v1: i32): -; nextln: brif v1, block2, block3(v1) -; nextln: -; nextln: block2: -; nextln: v5 = isub.i32 v1, v2 -; nextln: jump block1(v5) -; nextln: -; nextln: block3(v6: i32): -; nextln: return v6 -; nextln: } diff --git a/cranelift/filetests/filetests/licm/br-table.clif b/cranelift/filetests/filetests/licm/br-table.clif deleted file mode 100644 index 3710f7421047..000000000000 --- a/cranelift/filetests/filetests/licm/br-table.clif +++ /dev/null @@ -1,19 +0,0 @@ -test compile -set opt_level=speed_and_size -target aarch64 -target x86_64 - -function %br_table_opt() { - - block0: - v0 = iconst.i32 1 - br_table v0, block2, [block1, block2] - - block1: - return - - block2: - v1 = iconst.i32 1 - jump block2 - -} diff --git a/cranelift/filetests/filetests/licm/complex.clif b/cranelift/filetests/filetests/licm/complex.clif deleted file mode 100644 index 31efa820ae9e..000000000000 --- a/cranelift/filetests/filetests/licm/complex.clif +++ /dev/null @@ -1,88 +0,0 @@ -test licm -target riscv32 - -function %complex(i32) -> i32 system_v { -block0(v0: i32): -[UJ#1b] jump block1(v0) - - block1(v1: i32): - v2 = iconst.i32 1 - v3 = iconst.i32 4 - v4 = iadd v2, v1 -[SBzero#18] brif v1, block4(v4), block2(v2) - - block2(v5: i32): - v6 = iconst.i32 2 - v7 = iadd v5, v4 - v8 = iadd v6, v1 -[UJ#1b] jump block3(v8) - - block3(v9: i32): - v10 = iadd v9, v5 - v11 = iadd.i32 v1, v4 -[SBzero#18] brif.i32 v1, block6(v10), block2(v9) - - block4(v12: i32): - v13 = iconst.i32 3 - v14 = iadd v12, v13 - v15 = iadd.i32 v4, v13 -[UJ#1b] jump block5(v13) - - block5(v16: i32): - v17 = iadd.i32 v14, v4 -[SBzero#18] brif.i32 v1, block6(v16), block4(v16) - - block6(v18: i32): - v19 = iadd v18, v2 - v20 = iadd.i32 v2, v3 -[SBzero#18] brif.i32 v1, block7, block1(v20) - - block7: -[Iret#19] return v19 -} - -; sameln: function %complex -; nextln: block0(v0: i32): -; nextln: v2 = iconst.i32 1 -; nextln: v3 = iconst.i32 4 -; nextln: v6 = iconst.i32 2 -; nextln: v13 = iconst.i32 3 -; nextln: v20 = iadd v2, v3 -; nextln: jump block1(v0) -; nextln: -; nextln: block1(v1: i32): -; nextln: v4 = iadd.i32 v2, v1 -; nextln: brif v1, block9(v4), block8(v2) -; nextln: -; nextln: block8(v21: i32): -; nextln: v8 = iadd.i32 v6, v1 -; nextln: v11 = iadd.i32 v1, v4 -; nextln: jump block2(v21) -; nextln: -; nextln: block2(v5: i32): -; nextln: v7 = iadd v5, v4 -; nextln: jump block3(v8) -; nextln: -; nextln: block3(v9: i32): -; nextln: v10 = iadd v9, v5 -; nextln: brif.i32 v1, block6(v10), block2(v9) -; nextln: -; nextln: block9(v22: i32): -; nextln: v15 = iadd.i32 v4, v13 -; nextln: jump block4(v22) -; nextln: -; nextln: block4(v12: i32): -; nextln: v14 = iadd v12, v13 -; nextln: jump block5(v13) -; nextln: -; nextln: block5(v16: i32): -; nextln: v17 = iadd.i32 v14, v4 -; nextln: brif.i32 v1, block6(v16), block4(v16) -; nextln: -; nextln: block6(v18: i32): -; nextln: v19 = iadd v18, v2 -; nextln: brif.i32 v1, block7, block1(v20) -; nextln: -; nextln: block7: -; nextln: return v19 -; nextln: } diff --git a/cranelift/filetests/filetests/licm/critical-edge.clif b/cranelift/filetests/filetests/licm/critical-edge.clif deleted file mode 100644 index ae8862b644ae..000000000000 --- a/cranelift/filetests/filetests/licm/critical-edge.clif +++ /dev/null @@ -1,50 +0,0 @@ -test licm -target riscv32 - -; The loop in this function is entered from a critical edge. - -function %critical_edge(i32, i32) -> i32 { - - block0(v0: i32, v7: i32): -[SBzero#38] brif v7, block2(v0), block1 - - block1: -[Iret#19] return v0 - - block2(v1: i32): - v2 = iconst.i32 1 - v3 = iconst.i32 2 - v4 = iadd v2, v3 -[SBzero#18] brif v1, block3, block4(v1) - - block3: - v5 = isub v1, v2 -[UJ#1b] jump block2(v5) - - block4(v6: i32): -[Iret#19] return v6 - -} -; sameln: function %critical_edge -; nextln: block0(v0: i32, v7: i32): -; nextln: brif v7, block5(v0), block1 -; nextln: -; nextln: block1: -; nextln: return v0 -; nextln: -; nextln: block5(v8: i32): -; nextln: v2 = iconst.i32 1 -; nextln: v3 = iconst.i32 2 -; nextln: v4 = iadd v2, v3 -; nextln: jump block2(v8) -; nextln: -; nextln: block2(v1: i32): -; nextln: brif v1, block3, block4(v1) -; nextln: -; nextln: block3: -; nextln: v5 = isub.i32 v1, v2 -; nextln: jump block2(v5) -; nextln: -; nextln: block4(v6: i32): -; nextln: return v6 -; nextln: } diff --git a/cranelift/filetests/filetests/licm/encoding.clif b/cranelift/filetests/filetests/licm/encoding.clif deleted file mode 100644 index 7e262bebadd7..000000000000 --- a/cranelift/filetests/filetests/licm/encoding.clif +++ /dev/null @@ -1,40 +0,0 @@ -test licm -target riscv32 - -; Ensure that instructions emitted by LICM get encodings. - -function %simple_loop(i32) -> i32 { - block0(v0: i32): -[UJ#1b] jump block1(v0) - - block1(v1: i32): -[Iz#04,%x0] v2 = iconst.i32 1 -[Iz#04,%x1] v3 = iconst.i32 2 -[R#0c,%x2] v4 = iadd v2, v3 -[SBzero#18] brif v1, block2, block3(v1) - - block2: -[R#200c,%x5] v5 = isub v1, v2 -[UJ#1b] jump block1(v5) - - block3(v6: i32): -[Iret#19] return v6 -} - -; check: function -; nextln: block0(v0: i32): -; nextln: [Iz#04,%x0] v2 = iconst.i32 1 -; nextln: [Iz#04,%x1] v3 = iconst.i32 2 -; nextln: [R#0c,%x2] v4 = iadd v2, v3 -; nextln: [UJ#1b] jump block1(v0) -; nextln: -; nextln: block1(v1: i32): -; nextln: [SBzero#18] brif v1, block2, block3(v1) -; nextln: -; nextln: block2: -; nextln: [R#200c,%x5] v5 = isub.i32 v1, v2 -; nextln: [UJ#1b] jump block1(v5) -; nextln: -; nextln: block3(v6: i32): -; nextln: [Iret#19] return v6 -; nextln: } diff --git a/cranelift/filetests/filetests/licm/load_readonly_notrap.clif b/cranelift/filetests/filetests/licm/load_readonly_notrap.clif deleted file mode 100644 index cd5fc03e4746..000000000000 --- a/cranelift/filetests/filetests/licm/load_readonly_notrap.clif +++ /dev/null @@ -1,51 +0,0 @@ -test licm - -target aarch64 -target x86_64 - -;; Nontrapping readonly load from address that is not loop-dependent -;; should be hoisted out of loop. - -function %hoist_load(i32, i64 vmctx) -> i32 { - gv0 = vmctx - gv1 = load.i64 notrap aligned readonly gv0 - -block0(v0: i32, v1: i64): - jump block1(v0, v1) - -block1(v2: i32, v3: i64): - v4 = iconst.i32 1 - v5 = global_value.i64 gv1 - v6 = load.i32 notrap aligned readonly v5 - v7 = iadd v2, v6 - brif v2, block2, block3(v2) - -block2: - v8 = isub v2, v4 - jump block1(v8, v3) - -block3(v9: i32): - return v9 -} - -; sameln: function %hoist_load(i32, i64 vmctx) -> i32 fast { -; nextln: gv0 = vmctx -; nextln: gv1 = load.i64 notrap aligned readonly gv0 -; nextln: -; nextln: block0(v0: i32, v1: i64): -; nextln: v4 = iconst.i32 1 -; nextln: v5 = global_value.i64 gv1 -; nextln: v6 = load.i32 notrap aligned readonly v5 -; nextln: jump block1(v0, v1) -; nextln: -; nextln: block1(v2: i32, v3: i64): -; nextln: v7 = iadd v2, v6 -; nextln: brif v2, block2, block3(v2) -; nextln: -; nextln: block2: -; nextln: v8 = isub.i32 v2, v4 -; nextln: jump block1(v8, v3) -; nextln: -; nextln: block3(v9: i32): -; nextln: return v9 -; nextln: } diff --git a/cranelift/filetests/filetests/licm/multiple-blocks.clif b/cranelift/filetests/filetests/licm/multiple-blocks.clif deleted file mode 100644 index f2fddb706e3a..000000000000 --- a/cranelift/filetests/filetests/licm/multiple-blocks.clif +++ /dev/null @@ -1,55 +0,0 @@ -test licm -target riscv32 - -function %multiple_blocks(i32) -> i32 { - -block0(v0: i32): - jump block1(v0) - -block1(v10: i32): - v11 = iconst.i32 1 - v12 = iconst.i32 2 - v13 = iadd v11, v12 - brif v10, block2, block4(v10) - -block2: - v15 = isub v10, v11 - brif v15, block3, block5(v15) - -block3: - v14 = isub v10, v11 - jump block1(v14) - -block4(v20: i32): - return v20 - -block5(v30: i32): - v31 = iadd v11, v13 - jump block1(v30) - -} -; sameln:function %multiple_blocks(i32) -> i32 { -; nextln: block0(v0: i32): -; nextln: v11 = iconst.i32 1 -; nextln: v12 = iconst.i32 2 -; nextln: v13 = iadd v11, v12 -; nextln: v31 = iadd v11, v13 -; nextln: jump block1(v0) -; nextln: -; nextln: block1(v10: i32): -; nextln: brif v10, block2, block4(v10) -; nextln: -; nextln: block2: -; nextln: v15 = isub.i32 v10, v11 -; nextln: brif v15, block3, block5(v15) -; nextln: -; nextln: block3: -; nextln: v14 = isub.i32 v10, v11 -; nextln: jump block1(v14) -; nextln: -; nextln: block4(v20: i32): -; nextln: return v20 -; nextln: -; nextln: block5(v30: i32): -; nextln: jump block1(v30) -; nextln: } diff --git a/cranelift/filetests/filetests/licm/nested_loops.clif b/cranelift/filetests/filetests/licm/nested_loops.clif deleted file mode 100644 index 1fb04cf7c54a..000000000000 --- a/cranelift/filetests/filetests/licm/nested_loops.clif +++ /dev/null @@ -1,58 +0,0 @@ -test licm -target riscv32 - -function %nested_loops(i32) -> i32 { - -block0(v0: i32): - jump block1(v0) - -block1(v1: i32): - v2 = iconst.i32 1 - v3 = iconst.i32 2 - v4 = iadd v2, v3 - v5 = isub v1, v2 - jump block2(v5, v5) - -block2(v10: i32, v11: i32): - brif v11, block3, block4(v10) - -block3: - v12 = iconst.i32 1 - v15 = iadd v12, v5 - v13 = isub v11, v12 - jump block2(v10,v13) - -block4(v20: i32): - brif v20, block1(v20), block5(v20) - -block5(v30: i32): - return v30 - -} - -; sameln:function %nested_loops(i32) -> i32 { -; nextln: block0(v0: i32): -; nextln: v2 = iconst.i32 1 -; nextln: v3 = iconst.i32 2 -; nextln: v4 = iadd v2, v3 -; nextln: v12 = iconst.i32 1 -; nextln: jump block1(v0) -; nextln: -; nextln: block1(v1: i32): -; nextln: v5 = isub v1, v2 -; nextln: v15 = iadd.i32 v12, v5 -; nextln: jump block2(v5, v5) -; nextln: -; nextln: block2(v10: i32, v11: i32): -; nextln: brif v11, block3, block4(v10) -; nextln: -; nextln: block3: -; nextln: v13 = isub.i32 v11, v12 -; nextln: jump block2(v10, v13) -; nextln: -; nextln: block4(v20: i32): -; nextln: brif v20, block1(v20), block5(v20) -; nextln: -; nextln: block5(v30: i32): -; nextln: return v30 -; nextln: } diff --git a/cranelift/filetests/filetests/licm/reject.clif b/cranelift/filetests/filetests/licm/reject.clif deleted file mode 100644 index 52933507694d..000000000000 --- a/cranelift/filetests/filetests/licm/reject.clif +++ /dev/null @@ -1,65 +0,0 @@ -test licm -target riscv32 - -function %other_side_effects(i32) -> i32 { - -block0(v0: i32): - jump block1(v0) - -block1(v1: i32): - v2 = iconst.i32 1 - brif v1, block2, block3(v1) - -block2: - v5 = isub v1, v2 - jump block1(v5) - -block3(v6: i32): - return v6 - -} - -function %spill(i32, i32) -> i32 { -block0(v0: i32, v1: i32): - v2 = spill.i32 v0 - jump block1(v0, v1) - -block1(v3: i32, v4: i32): - v5 = spill.i32 v1 - v6 = fill.i32 v2 - v7 = fill.i32 v5 -; check: block1(v3: i32, v4: i32): -; check: v5 = spill.i32 v1 -; check: v6 = fill.i32 v2 -; check: v7 = fill v5 - brif v1, block2, block3(v1) - -block2: - v9 = isub v1, v4 - jump block1(v9, v3) - -block3(v10: i32): - return v10 -} - -function %non_invariant_aliases(i32) -> i32 { - -block0(v0: i32): - jump block1(v0) - -block1(v1: i32): - v8 -> v1 - v9 -> v1 - v2 = iadd v8, v9 -; check: block1(v1: i32): -; check: v2 = iadd v8, v9 - brif v1, block2, block3(v1) - -block2: - v5 = isub v1, v2 - jump block1(v5) - -block3(v6: i32): - return v6 - -} diff --git a/cranelift/filetests/filetests/licm/reject_load_notrap.clif b/cranelift/filetests/filetests/licm/reject_load_notrap.clif deleted file mode 100644 index 904382bc78b0..000000000000 --- a/cranelift/filetests/filetests/licm/reject_load_notrap.clif +++ /dev/null @@ -1,52 +0,0 @@ -test licm - -target aarch64 -target x86_64 - -;; Nontrapping possibly-not-readonly load from address that is not -;; loop-dependent should *not* be hoisted out of loop, though the -;; address computation can be. - -function %hoist_load(i32, i64 vmctx) -> i32 { - gv0 = vmctx - gv1 = load.i64 notrap aligned readonly gv0 - -block0(v0: i32, v1: i64): - v4 = iconst.i32 1 - v5 = global_value.i64 gv1 - jump block1(v0, v1) - -block1(v2: i32, v3: i64): - v6 = load.i32 notrap aligned v5 - v7 = iadd v2, v6 - brif v2, block2, block3(v2) - -block2: - v8 = isub v2, v4 - jump block1(v8, v3) - -block3(v9: i32): - return v9 -} - -; sameln: function %hoist_load(i32, i64 vmctx) -> i32 fast { -; nextln: gv0 = vmctx -; nextln: gv1 = load.i64 notrap aligned readonly gv0 -; nextln: -; nextln: block0(v0: i32, v1: i64): -; nextln: v4 = iconst.i32 1 -; nextln: v5 = global_value.i64 gv1 -; nextln: jump block1(v0, v1) -; nextln: -; nextln: block1(v2: i32, v3: i64): -; nextln: v6 = load.i32 notrap aligned v5 -; nextln: v7 = iadd v2, v6 -; nextln: brif v2, block2, block3(v2) -; nextln: -; nextln: block2: -; nextln: v8 = isub.i32 v2, v4 ; v4 = 1 -; nextln: jump block1(v8, v3) -; nextln: -; nextln: block3(v9: i32): -; nextln: return v9 -; nextln: } diff --git a/cranelift/filetests/filetests/licm/reject_load_readonly.clif b/cranelift/filetests/filetests/licm/reject_load_readonly.clif deleted file mode 100644 index d5cc40dfb6ca..000000000000 --- a/cranelift/filetests/filetests/licm/reject_load_readonly.clif +++ /dev/null @@ -1,52 +0,0 @@ -test licm - -target aarch64 -target x86_64 - -;; Maybe-trapping readonly load from address that is not -;; loop-dependent should *not* be hoisted out of loop, though the -;; address computation can be hoisted. - -function %hoist_load(i32, i64 vmctx) -> i32 { - gv0 = vmctx - gv1 = load.i64 notrap aligned readonly gv0 - -block0(v0: i32, v1: i64): - jump block1(v0, v1) - -block1(v2: i32, v3: i64): - v4 = iconst.i32 1 - v5 = global_value.i64 gv1 - v6 = load.i32 aligned readonly v5 - v7 = iadd v2, v6 - brif v2, block2, block3(v2) - -block2: - v8 = isub v2, v4 - jump block1(v8, v3) - -block3(v9: i32): - return v9 -} - -; sameln: function %hoist_load(i32, i64 vmctx) -> i32 fast { -; nextln: gv0 = vmctx -; nextln: gv1 = load.i64 notrap aligned readonly gv0 -; nextln: -; nextln: block0(v0: i32, v1: i64): -; nextln: v4 = iconst.i32 1 -; nextln: v5 = global_value.i64 gv1 -; nextln: jump block1(v0, v1) -; nextln: -; nextln: block1(v2: i32, v3: i64): -; nextln: v6 = load.i32 aligned readonly v5 -; nextln: v7 = iadd v2, v6 -; nextln: brif v2, block2, block3(v2) -; nextln: -; nextln: block2: -; nextln: v8 = isub.i32 v2, v4 -; nextln: jump block1(v8, v3) -; nextln: -; nextln: block3(v9: i32): -; nextln: return v9 -; nextln: } diff --git a/cranelift/filetests/filetests/licm/rewrite-jump-table.clif b/cranelift/filetests/filetests/licm/rewrite-jump-table.clif deleted file mode 100644 index a4a00c62c571..000000000000 --- a/cranelift/filetests/filetests/licm/rewrite-jump-table.clif +++ /dev/null @@ -1,23 +0,0 @@ -test licm -target aarch64 - -function %rewrite_jump_table() { - - block0: - v0 = iconst.i32 1 - br_table v0, block1, [block1, block2] - - block1: - return - - block2: - v4 = iconst.i8 0 - jump block2 -} - -; sameln: function -; check: block3: -; nextln: v4 = iconst.i8 0 -; nextln: jump block2 -; check: block2: -; nextln: jump block2 diff --git a/cranelift/filetests/filetests/runtests/issue5569.clif b/cranelift/filetests/filetests/runtests/issue5569.clif index 3e2966498801..73b6c8b00cdf 100644 --- a/cranelift/filetests/filetests/runtests/issue5569.clif +++ b/cranelift/filetests/filetests/runtests/issue5569.clif @@ -1,5 +1,4 @@ test run -set use_egraphs=true target riscv64 function %a(i16, f64, i32, i64, i16, i128, f32) -> i16 { diff --git a/cranelift/filetests/filetests/simple_gvn/basic.clif b/cranelift/filetests/filetests/simple_gvn/basic.clif deleted file mode 100644 index 2462a8935705..000000000000 --- a/cranelift/filetests/filetests/simple_gvn/basic.clif +++ /dev/null @@ -1,43 +0,0 @@ -test simple-gvn - -function %simple_redundancy(i32, i32) -> i32 { -block0(v0: i32, v1: i32): - v2 = iadd v0, v1 - v3 = iadd v0, v1 - v4 = imul v2, v3 -; check: v4 = imul v2, v2 - return v4 -} - -function %cascading_redundancy(i32, i32) -> i32 { -block0(v0: i32, v1: i32): - v2 = iadd v0, v1 - v3 = iadd v0, v1 - v4 = imul v2, v3 - v5 = imul v2, v2 - v6 = iadd v4, v5 -; check: v6 = iadd v4, v4 - return v6 -} - -function %redundancies_on_some_paths(i32, i32, i32) -> i32 { -block0(v0: i32, v1: i32, v2: i32): - v3 = iadd v0, v1 - brif v3, block3, block1 - -block3: - v4 = iadd v0, v1 - jump block2(v4) -; check: jump block2(v3) - -block1: - v5 = iadd v0, v1 - jump block2(v5) -; check: jump block2(v3) - -block2(v6: i32): - v7 = iadd v0, v1 - v8 = iadd v6, v7 -; check: v8 = iadd v6, v3 - return v8 -} diff --git a/cranelift/filetests/filetests/simple_gvn/idempotent-trapping.clif b/cranelift/filetests/filetests/simple_gvn/idempotent-trapping.clif deleted file mode 100644 index d9b320c31fa1..000000000000 --- a/cranelift/filetests/filetests/simple_gvn/idempotent-trapping.clif +++ /dev/null @@ -1,68 +0,0 @@ -;; Test that we GVN instructions that can trap (which is idempotent as long as -;; it isn't a resumable trap), but which are still otherwise pure functions of -;; their inputs. - -test simple-gvn - -function %udiv(i32, i32) -> i32 { -block0(v0: i32, v1: i32): - v2 = udiv v0, v1 - v3 = udiv v0, v1 - v4 = iadd v2, v3 -; check: v4 = iadd v2, v2 - return v4 -} - -function %sdiv(i32, i32) -> i32 { -block0(v0: i32, v1: i32): - v2 = sdiv v0, v1 - v3 = sdiv v0, v1 - v4 = iadd v2, v3 -; check: v4 = iadd v2, v2 - return v4 -} - -function %urem(i32, i32) -> i32 { -block0(v0: i32, v1: i32): - v2 = urem v0, v1 - v3 = urem v0, v1 - v4 = iadd v2, v3 -; check: v4 = iadd v2, v2 - return v4 -} - -function %srem(i32, i32) -> i32 { -block0(v0: i32, v1: i32): - v2 = srem v0, v1 - v3 = srem v0, v1 - v4 = iadd v2, v3 -; check: v4 = iadd v2, v2 - return v4 -} - -function %uadd_overflow_trap(i32, i32) -> i32 { -block0(v0: i32, v1: i32): - v2 = uadd_overflow_trap v0, v1, heap_oob - v3 = uadd_overflow_trap v0, v1, heap_oob - v4 = iadd v2, v3 -; check: v4 = iadd v2, v2 - return v4 -} - -function %fcvt_to_uint(f32) -> i32 { -block0(v0: f32): - v1 = fcvt_to_uint.i32 v0 - v2 = fcvt_to_uint.i32 v0 - v3 = iadd v1, v2 -; check: v3 = iadd v1, v1 - return v3 -} - -function %fcvt_to_sint(f32) -> i32 { -block0(v0: f32): - v1 = fcvt_to_sint.i32 v0 - v2 = fcvt_to_sint.i32 v0 - v3 = iadd v1, v2 -; check: v3 = iadd v1, v1 - return v3 -} diff --git a/cranelift/filetests/filetests/simple_gvn/readonly.clif b/cranelift/filetests/filetests/simple_gvn/readonly.clif deleted file mode 100644 index 322ea275d64d..000000000000 --- a/cranelift/filetests/filetests/simple_gvn/readonly.clif +++ /dev/null @@ -1,25 +0,0 @@ -test simple-gvn - -target aarch64 -target x86_64 - -function %eliminate_redundant_global_loads(i32, i64 vmctx) { - gv0 = vmctx - gv1 = load.i64 notrap aligned readonly gv0 - -block0(v0: i32, v1: i64): - v2 = global_value.i64 gv1 - v3 = global_value.i64 gv1 - - v4 = iconst.i32 0 - store.i32 notrap aligned v4, v2 - store.i32 notrap aligned v4, v3 - - return -} -; check: v2 = global_value.i64 gv1 -; check: v3 -> v2 -; check: v4 = iconst.i32 0 -; check: store notrap aligned v4, v2 -; check: store notrap aligned v4, v2 -; check: return diff --git a/cranelift/filetests/filetests/simple_gvn/reject.clif b/cranelift/filetests/filetests/simple_gvn/reject.clif deleted file mode 100644 index 21286996dfbe..000000000000 --- a/cranelift/filetests/filetests/simple_gvn/reject.clif +++ /dev/null @@ -1,27 +0,0 @@ -test simple-gvn - -function %differing_typevars() -> i64 { -block0: - v0 = iconst.i32 7 - v1 = iconst.i64 7 - v2 = iconst.i64 8 -; check: v0 = iconst.i32 7 -; check: v1 = iconst.i64 7 -; check: v2 = iconst.i64 8 - v3 = uextend.i64 v0 - v4 = iadd v2, v1 - v5 = iadd v4, v3 - return v5 -} - -function %cpu_flags() -> i8 { -block0: - v0 = iconst.i32 7 - v1 = iconst.i32 8 - v2 = icmp eq v0, v1 - v3 = icmp eq v0, v1 - v4 = bor v2, v3 -; check: v2 = icmp eq v0, v1 -; check: v4 = bor v2, v2 - return v4 -} diff --git a/cranelift/filetests/filetests/simple_gvn/scopes.clif b/cranelift/filetests/filetests/simple_gvn/scopes.clif deleted file mode 100644 index 8ec95a777742..000000000000 --- a/cranelift/filetests/filetests/simple_gvn/scopes.clif +++ /dev/null @@ -1,80 +0,0 @@ -test simple-gvn - -function %two_diamonds(i32, i32, i32, i32, i32) { -block0(v0: i32, v1: i32, v2: i32, v3: i32, v4: i32): - v5 = iconst.i32 16 - ; check: v5 = iconst.i32 16 - brif v0, block5, block1 - -block5: - v6 = iconst.i32 17 - ; check: v6 = iconst.i32 17 - v7 = iconst.i32 16 - ; not: v7 = iconst.i32 16 - jump block2 - -block1: - v8 = iconst.i32 18 - ; check: v8 = iconst.i32 18 - v9 = iconst.i32 17 - ; check: v9 = iconst.i32 17 - v10 = iconst.i32 16 - ; not: v10 = iconst.i32 16 - jump block2 - -block2: - v11 = iconst.i32 19 - ; check: v11 = iconst.i32 19 - v12 = iconst.i32 18 - ; check: v12 = iconst.i32 18 - v13 = iconst.i32 17 - ; check: v13 = iconst.i32 17 - v14 = iconst.i32 16 - ; not: v14 = iconst.i32 16 - brif v1, block6, block3 - -block6: - v15 = iconst.i32 20 - ; check: v15 = iconst.i32 20 - v16 = iconst.i32 19 - ; not: v16 = iconst.i32 19 - v17 = iconst.i32 18 - ; not: v17 = iconst.i32 18 - v18 = iconst.i32 17 - ; not: v18 = iconst.i32 17 - v19 = iconst.i32 16 - ; not: v19 = iconst.i32 16 - jump block4 - -block3: - v20 = iconst.i32 21 - ; check: v20 = iconst.i32 21 - v21 = iconst.i32 20 - ; check: v21 = iconst.i32 20 - v22 = iconst.i32 19 - ; not: v22 = iconst.i32 19 - v23 = iconst.i32 18 - ; not: v23 = iconst.i32 18 - v24 = iconst.i32 17 - ; not: v24 = iconst.i32 17 - v25 = iconst.i32 16 - ; not: v25 = iconst.i32 16 - jump block4 - -block4: - v26 = iconst.i32 22 - ; check: v26 = iconst.i32 22 - v27 = iconst.i32 21 - ; check: v27 = iconst.i32 21 - v28 = iconst.i32 20 - ; check: v28 = iconst.i32 20 - v29 = iconst.i32 19 - ; not: v29 = iconst.i32 19 - v30 = iconst.i32 18 - ; not: v30 = iconst.i32 18 - v31 = iconst.i32 17 - ; not: v31 = iconst.i32 17 - v32 = iconst.i32 16 - ; not: v32 = iconst.i32 16 - return -} diff --git a/cranelift/filetests/filetests/simple_preopt/branch.clif b/cranelift/filetests/filetests/simple_preopt/branch.clif deleted file mode 100644 index c710ba843fc2..000000000000 --- a/cranelift/filetests/filetests/simple_preopt/branch.clif +++ /dev/null @@ -1,53 +0,0 @@ -test simple_preopt -target aarch64 -target x86_64 - -function %icmp_to_brif_false_fold(i32) -> i32 { -block0(v0: i32): - v1 = icmp_imm eq v0, 0 - brif v1, block1, block2 -block1: - v3 = iconst.i32 1 - return v3 -block2: - v4 = iconst.i32 2 - return v4 -} -; sameln: function %icmp_to_brif_false_fold -; nextln: block0(v0: i32): -; nextln: v1 = icmp_imm eq v0, 0 -; nextln: brif v0, block2, block1 -; nextln: -; nextln: block1: -; nextln: v3 = iconst.i32 1 -; nextln: return v3 -; nextln: -; nextln: block2: -; nextln: v4 = iconst.i32 2 -; nextln: return v4 -; nextln: } - -function %icmp_to_brif_false_inverted_fold(i32) -> i32 { -block0(v0: i32): - v1 = icmp_imm ne v0, 0 - brif v1, block2, block1 -block1: - v3 = iconst.i32 1 - return v3 -block2: - v4 = iconst.i32 2 - return v4 -} -; sameln: function %icmp_to_brif_false_inverted_fold -; nextln: block0(v0: i32): -; nextln: v1 = icmp_imm ne v0, 0 -; nextln: brif v0, block2, block1 -; nextln: -; nextln: block1: -; nextln: v3 = iconst.i32 1 -; nextln: return v3 -; nextln: -; nextln: block2: -; nextln: v4 = iconst.i32 2 -; nextln: return v4 -; nextln: } diff --git a/cranelift/filetests/filetests/simple_preopt/div_by_const_indirect.clif b/cranelift/filetests/filetests/simple_preopt/div_by_const_indirect.clif deleted file mode 100644 index 7b09c24d0489..000000000000 --- a/cranelift/filetests/filetests/simple_preopt/div_by_const_indirect.clif +++ /dev/null @@ -1,60 +0,0 @@ -test simple_preopt -target aarch64 -target x86_64 baseline - -; Cases where the denominator is created by an iconst - -function %indir_udiv32(i32) -> i32 { -block0(v0: i32): - v1 = iconst.i32 7 - v2 = udiv v0, v1 - ; check: iconst.i32 7 - ; check: iconst.i32 0x2492_4925 - ; check: umulhi v0, v3 - ; check: isub v0, v4 - ; check: ushr_imm v5, 1 - ; check: iadd v6, v4 - ; check: v8 = ushr_imm v7, 2 - ; check: v2 -> v8 - return v2 -} - -function %indir_sdiv32(i32) -> i32 { -block0(v0: i32): - v1 = iconst.i32 -17 - v2 = sdiv v0, v1 - ; check: iconst.i32 -17 - ; check: iconst.i32 0xffff_ffff_8787_8787 - ; check: smulhi v0, v3 - ; check: sshr_imm v4, 3 - ; check: ushr_imm v5, 31 - ; check: v7 = iadd v5, v6 - ; check: v2 -> v7 - return v2 -} - -function %indir_udiv64(i64) -> i64 { -block0(v0: i64): - v1 = iconst.i64 1337 - v2 = udiv v0, v1 - ; check: iconst.i64 1337 - ; check: iconst.i64 0xc411_9d95_2866_a139 - ; check: umulhi v0, v3 - ; check: v5 = ushr_imm v4, 10 - ; check: v2 -> v5 - return v2 -} - -function %indir_sdiv64(i64) -> i64 { -block0(v0: i64): - v1 = iconst.i64 -90210 - v2 = sdiv v0, v1 - ; check: iconst.i64 0xffff_ffff_fffe_9f9e - ; check: iconst.i64 0xd181_4ee8_939c_b8bb - ; check: smulhi v0, v3 - ; check: sshr_imm v4, 14 - ; check: ushr_imm v5, 63 - ; check: v7 = iadd v5, v6 - ; check: v2 -> v7 - return v2 -} diff --git a/cranelift/filetests/filetests/simple_preopt/div_by_const_non_power_of_2.clif b/cranelift/filetests/filetests/simple_preopt/div_by_const_non_power_of_2.clif deleted file mode 100644 index f22577771859..000000000000 --- a/cranelift/filetests/filetests/simple_preopt/div_by_const_non_power_of_2.clif +++ /dev/null @@ -1,267 +0,0 @@ -test simple_preopt -target aarch64 -target i686 baseline - -; -------- U32 -------- - -; complex case (mul, sub, shift, add, shift) -function %t_udiv32_p7(i32) -> i32 { -block0(v0: i32): - v1 = udiv_imm v0, 7 - ; check: iconst.i32 0x2492_4925 - ; check: umulhi v0, v2 - ; check: isub v0, v3 - ; check: ushr_imm v4, 1 - ; check: iadd v5, v3 - ; check: v7 = ushr_imm v6, 2 - ; check: v1 -> v7 - return v1 -} - -; simple case (mul, shift) -function %t_udiv32_p125(i32) -> i32 { -block0(v0: i32): - v1 = udiv_imm v0, 125 - ; check: iconst.i32 0x1062_4dd3 - ; check: umulhi v0, v2 - ; check: v4 = ushr_imm v3, 3 - ; check: v1 -> v4 - return v1 -} - -; simple case w/ shift by zero (mul) -function %t_udiv32_p641(i32) -> i32 { -block0(v0: i32): - v1 = udiv_imm v0, 641 - ; check: iconst.i32 0x0066_3d81 - ; check: v3 = umulhi v0, v2 - ; check: v1 -> v3 - return v1 -} - - -; -------- S32 -------- - -; simple case w/ shift by zero (mul, add-sign-bit) -function %t_sdiv32_n6(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, -6 - ; check: iconst.i32 0xffff_ffff_d555_5555 - ; check: smulhi v0, v2 - ; check: ushr_imm v3, 31 - ; check: v5 = iadd v3, v4 - ; check: v1 -> v5 - return v1 -} - -; simple case (mul, shift, add-sign-bit) -function %t_sdiv32_n5(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, -5 - ; check: iconst.i32 0xffff_ffff_9999_9999 - ; check: smulhi v0, v2 - ; check: sshr_imm v3, 1 - ; check: ushr_imm v4, 31 - ; check: v6 = iadd v4, v5 - ; check: v1 -> v6 - return v1 -} - -; case d < 0 && M > 0 (mul, sub, shift, add-sign-bit) -function %t_sdiv32_n3(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, -3 - ; check: iconst.i32 0x5555_5555 - ; check: smulhi v0, v2 - ; check: isub v3, v0 - ; check: sshr_imm v4, 1 - ; check: ushr_imm v5, 31 - ; check: v7 = iadd v5, v6 - ; check: v1 -> v7 - return v1 -} - -; simple case w/ shift by zero (mul, add-sign-bit) -function %t_sdiv32_p6(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, 6 - ; check: iconst.i32 0x2aaa_aaab - ; check: smulhi v0, v2 - ; check: ushr_imm v3, 31 - ; check: v5 = iadd v3, v4 - ; check: v1 -> v5 - return v1 -} - -; case d > 0 && M < 0 (mull, add, shift, add-sign-bit) -function %t_sdiv32_p7(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, 7 - ; check: iconst.i32 0xffff_ffff_9249_2493 - ; check: smulhi v0, v2 - ; check: iadd v3, v0 - ; check: sshr_imm v4, 2 - ; check: ushr_imm v5, 31 - ; check: v7 = iadd v5, v6 - ; check: v1 -> v7 - return v1 -} - -; simple case (mul, shift, add-sign-bit) -function %t_sdiv32_p625(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, 625 - ; check: iconst.i32 0x68db_8bad - ; check: smulhi v0, v2 - ; check: sshr_imm v3, 8 - ; check: ushr_imm v4, 31 - ; check: v6 = iadd v4, v5 - ; check: v1 -> v6 - return v1 -} - - -; -------- U64 -------- - -; complex case (mul, sub, shift, add, shift) -function %t_udiv64_p7(i64) -> i64 { -block0(v0: i64): - v1 = udiv_imm v0, 7 - ; check: iconst.i64 0x2492_4924_9249_2493 - ; check: umulhi v0, v2 - ; check: isub v0, v3 - ; check: ushr_imm v4, 1 - ; check: iadd v5, v3 - ; check: v7 = ushr_imm v6, 2 - ; check: v1 -> v7 - return v1 -} - -; simple case (mul, shift) -function %t_udiv64_p9(i64) -> i64 { -block0(v0: i64): - v1 = udiv_imm v0, 9 - ; check: iconst.i64 0xe38e_38e3_8e38_e38f - ; check: umulhi v0, v2 - ; check: v4 = ushr_imm v3, 3 - ; check: v1 -> v4 - return v1 -} - -; complex case (mul, sub, shift, add, shift) -function %t_udiv64_p125(i64) -> i64 { -block0(v0: i64): - v1 = udiv_imm v0, 125 - ; check: iconst.i64 0x0624_dd2f_1a9f_be77 - ; check: umulhi v0, v2 - ; check: isub v0, v3 - ; check: ushr_imm v4, 1 - ; check: iadd v5, v3 - ; check: v7 = ushr_imm v6, 6 - ; check: v1 -> v7 - return v1 -} - -; simple case w/ shift by zero (mul) -function %t_udiv64_p274177(i64) -> i64 { -block0(v0: i64): - v1 = udiv_imm v0, 274177 - ; check: iconst.i64 0x3d30_f19c_d101 - ; check: v3 = umulhi v0, v2 - ; check: v1 -> v3 - return v1 -} - - -; -------- S64 -------- - -; simple case (mul, shift, add-sign-bit) -function %t_sdiv64_n625(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, -625 - ; check: iconst.i64 0xcb92_3a29_c779_a6b5 - ; check: smulhi v0, v2 - ; check: sshr_imm v3, 7 - ; check: ushr_imm v4, 63 - ; check: v6 = iadd v4, v5 - ; check: v1 -> v6 - return v1 -} - -; simple case w/ zero shift (mul, add-sign-bit) -function %t_sdiv64_n6(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, -6 - ; check: iconst.i64 0xd555_5555_5555_5555 - ; check: smulhi v0, v2 - ; check: ushr_imm v3, 63 - ; check: v5 = iadd v3, v4 - ; check: v1 -> v5 - return v1 -} - -; simple case w/ zero shift (mul, add-sign-bit) -function %t_sdiv64_n5(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, -5 - ; check: iconst.i64 0x9999_9999_9999_9999 - ; check: smulhi v0, v2 - ; check: sshr_imm v3, 1 - ; check: ushr_imm v4, 63 - ; check: v6 = iadd v4, v5 - ; check: v1 -> v6 - return v1 -} - -; case d < 0 && M > 0 (mul, sub, shift, add-sign-bit) -function %t_sdiv64_n3(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, -3 - ; check: iconst.i64 0x5555_5555_5555_5555 - ; check: smulhi v0, v2 - ; check: isub v3, v0 - ; check: sshr_imm v4, 1 - ; check: ushr_imm v5, 63 - ; check: v7 = iadd v5, v6 - ; check: v1 -> v7 - return v1 -} - -; simple case w/ zero shift (mul, add-sign-bit) -function %t_sdiv64_p6(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, 6 - ; check: iconst.i64 0x2aaa_aaaa_aaaa_aaab - ; check: smulhi v0, v2 - ; check: ushr_imm v3, 63 - ; check: v5 = iadd v3, v4 - ; check: v1 -> v5 - return v1 -} - -; case d > 0 && M < 0 (mul, add, shift, add-sign-bit) -function %t_sdiv64_p15(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, 15 - ; check: iconst.i64 0x8888_8888_8888_8889 - ; check: smulhi v0, v2 - ; check: iadd v3, v0 - ; check: sshr_imm v4, 3 - ; check: ushr_imm v5, 63 - ; check: v7 = iadd v5, v6 - ; check: v1 -> v7 - return v1 -} - -; simple case (mul, shift, add-sign-bit) -function %t_sdiv64_p625(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, 625 - ; check: iconst.i64 0x346d_c5d6_3886_594b - ; check: smulhi v0, v2 - ; check: sshr_imm v3, 7 - ; check: ushr_imm v4, 63 - ; check: v6 = iadd v4, v5 - ; check: v1 -> v6 - return v1 -} diff --git a/cranelift/filetests/filetests/simple_preopt/div_by_const_power_of_2.clif b/cranelift/filetests/filetests/simple_preopt/div_by_const_power_of_2.clif deleted file mode 100644 index 09e0aa180cb5..000000000000 --- a/cranelift/filetests/filetests/simple_preopt/div_by_const_power_of_2.clif +++ /dev/null @@ -1,293 +0,0 @@ -test simple_preopt -target aarch64 -target i686 baseline - -; -------- U32 -------- - -; ignored -function %t_udiv32_p0(i32) -> i32 { -block0(v0: i32): - v1 = udiv_imm v0, 0 - ; check: udiv_imm v0, 0 - return v1 -} - -; converted to a nop -function %t_udiv32_p1(i32) -> i32 { -block0(v0: i32): - v1 = udiv_imm v0, 1 - ; check: nop - return v1 -} - -; shift -function %t_udiv32_p2(i32) -> i32 { -block0(v0: i32): - v1 = udiv_imm v0, 2 - ; check: ushr_imm v0, 1 - return v1 -} - -; shift -function %t_udiv32_p2p31(i32) -> i32 { -block0(v0: i32): - v1 = udiv_imm v0, 0x8000_0000 - ; check: ushr_imm v0, 31 - return v1 -} - - -; -------- U64 -------- - -; ignored -function %t_udiv64_p0(i64) -> i64 { -block0(v0: i64): - v1 = udiv_imm v0, 0 - ; check: udiv_imm v0, 0 - return v1 -} - -; converted to a nop -function %t_udiv64_p1(i64) -> i64 { -block0(v0: i64): - v1 = udiv_imm v0, 1 - ; check: nop - return v1 -} - -; shift -function %t_udiv64_p2(i64) -> i64 { -block0(v0: i64): - v1 = udiv_imm v0, 2 - ; check: ushr_imm v0, 1 - return v1 -} - -; shift -function %t_udiv64_p2p63(i64) -> i64 { -block0(v0: i64): - v1 = udiv_imm v0, 0x8000_0000_0000_0000 - ; check: ushr_imm v0, 63 - return v1 -} - - -; -------- S32 -------- - -; ignored -function %t_sdiv32_p0(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, 0 - ; check: sdiv_imm v0, 0 - return v1 -} - -; converted to a nop -function %t_sdiv32_p1(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, 1 - ; check: nop - return v1 -} - -; ignored -function %t_sdiv32_n1(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, -1 - ; check: sdiv_imm v0, -1 - return v1 -} - -; shift -function %t_sdiv32_p2(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, 2 - ; check: ushr_imm v0, 31 - ; check: iadd v0, v2 - ; check: sshr_imm v3, 1 - ; check: v1 -> v4 - return v1 -} - -; shift -function %t_sdiv32_n2(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, -2 - ; check: ushr_imm v0, 31 - ; check: iadd v0, v2 - ; check: sshr_imm v3, 1 - ; check: irsub_imm v4, 0 - return v1 -} - -; shift -function %t_sdiv32_p4(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, 4 - ; check: v2 = sshr_imm v0, 1 - ; check: ushr_imm v2, 30 - ; check: iadd v0, v3 - ; check: v5 = sshr_imm v4, 2 - ; check: v1 -> v5 - - return v1 -} - -; shift -function %t_sdiv32_n4(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, -4 - ; check: sshr_imm v0, 1 - ; check: ushr_imm v2, 30 - ; check: iadd v0, v3 - ; check: sshr_imm v4, 2 - ; check: irsub_imm v5, 0 - return v1 -} - -; shift -function %t_sdiv32_p2p30(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, 0x4000_0000 - ; check: sshr_imm v0, 29 - ; check: ushr_imm v2, 2 - ; check: iadd v0, v3 - ; check: v5 = sshr_imm v4, 30 - ; check: v1 -> v5 - return v1 -} - -; shift -function %t_sdiv32_n2p30(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, -0x4000_0000 - ; check: sshr_imm v0, 29 - ; check: ushr_imm v2, 2 - ; check: iadd v0, v3 - ; check: sshr_imm v4, 30 - ; check: irsub_imm v5, 0 - return v1 -} - -; there's no positive version of this, since -(-0x8000_0000) isn't -; representable. -function %t_sdiv32_n2p31(i32) -> i32 { -block0(v0: i32): - v1 = sdiv_imm v0, -0x8000_0000 - ; check: sshr_imm v0, 30 - ; check: ushr_imm v2, 1 - ; check: iadd v0, v3 - ; check: sshr_imm v4, 31 - ; check: irsub_imm v5, 0 - return v1 -} - - -; -------- S64 -------- - -; ignored -function %t_sdiv64_p0(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, 0 - ; check: sdiv_imm v0, 0 - return v1 -} - -; converted to a nop -function %t_sdiv64_p1(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, 1 - ; check: nop - return v1 -} - -; ignored -function %t_sdiv64_n1(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, -1 - ; check: sdiv_imm v0, -1 - return v1 -} - -; shift -function %t_sdiv64_p2(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, 2 - ; check: ushr_imm v0, 63 - ; check: iadd v0, v2 - ; check: v4 = sshr_imm v3, 1 - ; check: v1 -> v4 - return v1 -} - -; shift -function %t_sdiv64_n2(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, -2 - ; check: ushr_imm v0, 63 - ; check: iadd v0, v2 - ; check: sshr_imm v3, 1 - ; check: irsub_imm v4, 0 - return v1 -} - -; shift -function %t_sdiv64_p4(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, 4 - ; check: sshr_imm v0, 1 - ; check: ushr_imm v2, 62 - ; check: iadd v0, v3 - ; check: v5 = sshr_imm v4, 2 - ; check: v1 -> v5 - return v1 -} - -; shift -function %t_sdiv64_n4(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, -4 - ; check: sshr_imm v0, 1 - ; check: ushr_imm v2, 62 - ; check: iadd v0, v3 - ; check: sshr_imm v4, 2 - ; check: irsub_imm v5, 0 - return v1 -} - -; shift -function %t_sdiv64_p2p62(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, 0x4000_0000_0000_0000 - ; check: sshr_imm v0, 61 - ; check: ushr_imm v2, 2 - ; check: iadd v0, v3 - ; check: v5 = sshr_imm v4, 62 - ; check: v1 -> v5 - return v1 -} - -; shift -function %t_sdiv64_n2p62(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, -0x4000_0000_0000_0000 - ; check: sshr_imm v0, 61 - ; check: ushr_imm v2, 2 - ; check: iadd v0, v3 - ; check: sshr_imm v4, 62 - ; check: irsub_imm v5, 0 - return v1 -} - -; there's no positive version of this, since -(-0x8000_0000_0000_0000) isn't -; representable. -function %t_sdiv64_n2p63(i64) -> i64 { -block0(v0: i64): - v1 = sdiv_imm v0, -0x8000_0000_0000_0000 - ; check: sshr_imm v0, 62 - ; check: ushr_imm v2, 1 - ; check: iadd v0, v3 - ; check: sshr_imm v4, 63 - ; check: irsub_imm v5, 0 - return v1 -} diff --git a/cranelift/filetests/filetests/simple_preopt/do_not_reorder_instructions_when_transplanting.clif b/cranelift/filetests/filetests/simple_preopt/do_not_reorder_instructions_when_transplanting.clif deleted file mode 100644 index 90517d2288d4..000000000000 --- a/cranelift/filetests/filetests/simple_preopt/do_not_reorder_instructions_when_transplanting.clif +++ /dev/null @@ -1,23 +0,0 @@ -test simple_preopt -target aarch64 -target x86_64 - -;; Test that although v5 can be replaced with v1, we don't transplant `load.i32 -;; v0` on top of `iadd v3, v4`, because that would move the load past other uses -;; of its result. - -function %foo(i64) -> i32 { -block0(v0: i64): - v1 = load.i32 v0 - v2 = iconst.i32 16 - v3 = iadd_imm v1, -16 - v4 = iconst.i32 16 - v5 = iadd v3, v4 - ; check: v1 = load.i32 v0 - ; nextln: v5 -> v1 - ; nextln: v2 = iconst.i32 16 - ; nextln: v3 = iadd_imm v1, -16 - ; nextln: v4 = iconst.i32 16 - ; nextln: nop - return v5 -} diff --git a/cranelift/filetests/filetests/simple_preopt/fold-extended-move-wraparound.clif b/cranelift/filetests/filetests/simple_preopt/fold-extended-move-wraparound.clif deleted file mode 100644 index 13d77d7cfa53..000000000000 --- a/cranelift/filetests/filetests/simple_preopt/fold-extended-move-wraparound.clif +++ /dev/null @@ -1,15 +0,0 @@ -test simple_preopt -target aarch64 -target x86_64 - -function %wraparound(i64 vmctx) -> f32 system_v { - gv0 = vmctx - gv1 = iadd_imm.i64 gv0, 48 - -block35(v0: i64): - v88 = iconst.i64 0 - v89 = iconst.i64 0x8000_0000_0000_0000 - v90 = ishl_imm v88, 0x8000_0000_0000_0000 - v91 = sshr v90, v89; check: sshr_imm v90, 0x8000_0000_0000_0000 - trap user0 -} diff --git a/cranelift/filetests/filetests/simple_preopt/i128.clif b/cranelift/filetests/filetests/simple_preopt/i128.clif deleted file mode 100644 index b3bc2d666916..000000000000 --- a/cranelift/filetests/filetests/simple_preopt/i128.clif +++ /dev/null @@ -1,28 +0,0 @@ -test simple_preopt -target aarch64 -target x86_64 -target s390x -target riscv64 - -function %imul_imm_zero(i128) -> i128 { -block0(v0: i128): - v1 = imul_imm v0, 0 - return v1 -} -; sameln: function %imul_imm_zero -; nextln: block0(v0: i128): -; nextln: v1 = imul_imm v0, 0 -; nextln: return v1 -; nextln: } - - -function %band_imm_zero(i128) -> i128 { -block0(v0: i128): - v1 = band_imm v0, 0 - return v1 -} -; check: function %band_imm_zero -; nextln: block0(v0: i128): -; nextln: v1 = band_imm v0, 0 -; nextln: return v1 -; nextln: } diff --git a/cranelift/filetests/filetests/simple_preopt/rem_by_const_non_power_of_2.clif b/cranelift/filetests/filetests/simple_preopt/rem_by_const_non_power_of_2.clif deleted file mode 100644 index a7cd49246ed3..000000000000 --- a/cranelift/filetests/filetests/simple_preopt/rem_by_const_non_power_of_2.clif +++ /dev/null @@ -1,286 +0,0 @@ -test simple_preopt -target aarch64 -target i686 baseline - -; -------- U32 -------- - -; complex case (mul, sub, shift, add, shift) -function %t_urem32_p7(i32) -> i32 { -block0(v0: i32): - v1 = urem_imm v0, 7 - ; check: iconst.i32 0x2492_4925 - ; check: umulhi v0, v2 - ; check: isub v0, v3 - ; check: ushr_imm v4, 1 - ; check: iadd v5, v3 - ; check: ushr_imm v6, 2 - ; check: imul_imm v7, 7 - ; check: isub v0, v8 - return v1 -} - -; simple case (mul, shift) -function %t_urem32_p125(i32) -> i32 { -block0(v0: i32): - v1 = urem_imm v0, 125 - ; check: iconst.i32 0x1062_4dd3 - ; check: umulhi v0, v2 - ; check: ushr_imm v3, 3 - ; check: imul_imm v4, 125 - ; check: isub v0, v5 - return v1 -} - -; simple case w/ shift by zero (mul) -function %t_urem32_p641(i32) -> i32 { -block0(v0: i32): - v1 = urem_imm v0, 641 - ; check: iconst.i32 0x0066_3d81 - ; check: umulhi v0, v2 - ; check: imul_imm v3, 641 - ; check: isub v0, v4 - return v1 -} - - -; -------- S32 -------- - -; simple case w/ shift by zero (mul, add-sign-bit) -function %t_srem32_n6(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, -6 - ; check: iconst.i32 0xffff_ffff_d555_5555 - ; check: smulhi v0, v2 - ; check: ushr_imm v3, 31 - ; check: iadd v3, v4 - ; check: imul_imm v5, -6 - ; check: isub v0, v6 - return v1 -} - -; simple case (mul, shift, add-sign-bit) -function %t_srem32_n5(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, -5 - ; check: iconst.i32 0xffff_ffff_9999_9999 - ; check: smulhi v0, v2 - ; check: sshr_imm v3, 1 - ; check: ushr_imm v4, 31 - ; check: iadd v4, v5 - ; check: imul_imm v6, -5 - ; check: isub v0, v7 - return v1 -} - -; case d < 0 && M > 0 (mul, sub, shift, add-sign-bit) -function %t_srem32_n3(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, -3 - ; check: iconst.i32 0x5555_5555 - ; check: smulhi v0, v2 - ; check: isub v3, v0 - ; check: sshr_imm v4, 1 - ; check: ushr_imm v5, 31 - ; check: iadd v5, v6 - ; check: imul_imm v7, -3 - ; check: isub v0, v8 - return v1 -} - -; simple case w/ shift by zero (mul, add-sign-bit) -function %t_srem32_p6(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, 6 - ; check: iconst.i32 0x2aaa_aaab - ; check: smulhi v0, v2 - ; check: ushr_imm v3, 31 - ; check: iadd v3, v4 - ; check: imul_imm v5, 6 - ; check: isub v0, v6 - return v1 -} - -; case d > 0 && M < 0 (mull, add, shift, add-sign-bit) -function %t_srem32_p7(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, 7 - ; check: iconst.i32 0xffff_ffff_9249_2493 - ; check: smulhi v0, v2 - ; check: iadd v3, v0 - ; check: sshr_imm v4, 2 - ; check: ushr_imm v5, 31 - ; check: iadd v5, v6 - ; check: imul_imm v7, 7 - ; check: isub v0, v8 - return v1 -} - -; simple case (mul, shift, add-sign-bit) -function %t_srem32_p625(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, 625 - ; check: iconst.i32 0x68db_8bad - ; check: smulhi v0, v2 - ; check: sshr_imm v3, 8 - ; check: ushr_imm v4, 31 - ; check: iadd v4, v5 - ; check: imul_imm v6, 625 - ; check: isub v0, v7 - return v1 -} - - -; -------- U64 -------- - -; complex case (mul, sub, shift, add, shift) -function %t_urem64_p7(i64) -> i64 { -block0(v0: i64): - v1 = urem_imm v0, 7 - ; check: umulhi v0, v2 - ; check: isub v0, v3 - ; check: ushr_imm v4, 1 - ; check: iadd v5, v3 - ; check: ushr_imm v6, 2 - ; check: imul_imm v7, 7 - ; check: isub v0, v8 - return v1 -} - -; simple case (mul, shift) -function %t_urem64_p9(i64) -> i64 { -block0(v0: i64): - v1 = urem_imm v0, 9 - ; check: iconst.i64 0xe38e_38e3_8e38_e38f - ; check: umulhi v0, v2 - ; check: ushr_imm v3, 3 - ; check: imul_imm v4, 9 - ; check: isub v0, v5 - return v1 -} - -; complex case (mul, sub, shift, add, shift) -function %t_urem64_p125(i64) -> i64 { -block0(v0: i64): - v1 = urem_imm v0, 125 - ; check: iconst.i64 0x0624_dd2f_1a9f_be77 - ; check: umulhi v0, v2 - ; check: isub v0, v3 - ; check: ushr_imm v4, 1 - ; check: iadd v5, v3 - ; check: ushr_imm v6, 6 - ; check: imul_imm v7, 125 - ; check: isub v0, v8 - return v1 -} - -; simple case w/ shift by zero (mul) -function %t_urem64_p274177(i64) -> i64 { -block0(v0: i64): - v1 = urem_imm v0, 274177 - ; check: iconst.i64 0x3d30_f19c_d101 - ; check: umulhi v0, v2 - ; check: imul_imm v3, 0x0004_2f01 - ; check: isub v0, v4 - return v1 -} - - -; -------- S64 -------- - -; simple case (mul, shift, add-sign-bit) -function %t_srem64_n625(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, -625 - ; check: iconst.i64 0xcb92_3a29_c779_a6b5 - ; check: smulhi v0, v2 - ; check: sshr_imm v3, 7 - ; check: ushr_imm v4, 63 - ; check: iadd v4, v5 - ; check: imul_imm v6, -625 - ; check: isub v0, v7 - return v1 -} - -; simple case w/ zero shift (mul, add-sign-bit) -function %t_srem64_n6(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, -6 - ; check: iconst.i64 0xd555_5555_5555_5555 - ; check: smulhi v0, v2 - ; check: ushr_imm v3, 63 - ; check: iadd v3, v4 - ; check: imul_imm v5, -6 - ; check: isub v0, v6 - return v1 -} - -; simple case w/ zero shift (mul, add-sign-bit) -function %t_srem64_n5(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, -5 - ; check: iconst.i64 0x9999_9999_9999_9999 - ; check: smulhi v0, v2 - ; check: sshr_imm v3, 1 - ; check: ushr_imm v4, 63 - ; check: iadd v4, v5 - ; check: imul_imm v6, -5 - ; check: isub v0, v7 - return v1 -} - -; case d < 0 && M > 0 (mul, sub, shift, add-sign-bit) -function %t_srem64_n3(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, -3 - ; check: iconst.i64 0x5555_5555_5555_5555 - ; check: smulhi v0, v2 - ; check: isub v3, v0 - ; check: sshr_imm v4, 1 - ; check: ushr_imm v5, 63 - ; check: iadd v5, v6 - ; check: imul_imm v7, -3 - ; check: isub v0, v8 - return v1 -} - -; simple case w/ zero shift (mul, add-sign-bit) -function %t_srem64_p6(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, 6 - ; check: iconst.i64 0x2aaa_aaaa_aaaa_aaab - ; check: smulhi v0, v2 - ; check: ushr_imm v3, 63 - ; check: iadd v3, v4 - ; check: imul_imm v5, 6 - ; check: isub v0, v6 - return v1 -} - -; case d > 0 && M < 0 (mul, add, shift, add-sign-bit) -function %t_srem64_p15(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, 15 - ; check: iconst.i64 0x8888_8888_8888_8889 - ; check: smulhi v0, v2 - ; check: iadd v3, v0 - ; check: sshr_imm v4, 3 - ; check: ushr_imm v5, 63 - ; check: iadd v5, v6 - ; check: imul_imm v7, 15 - ; check: isub v0, v8 - return v1 -} - -; simple case (mul, shift, add-sign-bit) -function %t_srem64_p625(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, 625 - ; check: iconst.i64 0x346d_c5d6_3886_594b - ; check: smulhi v0, v2 - ; check: sshr_imm v3, 7 - ; check: ushr_imm v4, 63 - ; check: iadd v4, v5 - ; check: imul_imm v6, 625 - ; check: isub v0, v7 - return v1 -} diff --git a/cranelift/filetests/filetests/simple_preopt/rem_by_const_power_of_2.clif b/cranelift/filetests/filetests/simple_preopt/rem_by_const_power_of_2.clif deleted file mode 100644 index 19cc5e82b523..000000000000 --- a/cranelift/filetests/filetests/simple_preopt/rem_by_const_power_of_2.clif +++ /dev/null @@ -1,292 +0,0 @@ -test simple_preopt -target aarch64 -target i686 baseline - -; -------- U32 -------- - -; ignored -function %t_urem32_p0(i32) -> i32 { -block0(v0: i32): - v1 = urem_imm v0, 0 - ; check: urem_imm v0, 0 - return v1 -} - -; converted to constant zero -function %t_urem32_p1(i32) -> i32 { -block0(v0: i32): - v1 = urem_imm v0, 1 - ; check: iconst.i32 0 - return v1 -} - -; shift -function %t_urem32_p2(i32) -> i32 { -block0(v0: i32): - v1 = urem_imm v0, 2 - ; check: band_imm v0, 1 - return v1 -} - -; shift -function %t_urem32_p2p31(i32) -> i32 { -block0(v0: i32): - v1 = urem_imm v0, 0x8000_0000 - ; check: band_imm v0, 0x7fff_ffff - return v1 -} - - -; -------- U64 -------- - -; ignored -function %t_urem64_p0(i64) -> i64 { -block0(v0: i64): - v1 = urem_imm v0, 0 - ; check: urem_imm v0, 0 - return v1 -} - -; converted to constant zero -function %t_urem64_p1(i64) -> i64 { -block0(v0: i64): - v1 = urem_imm v0, 1 - ; check: iconst.i64 0 - return v1 -} - -; shift -function %t_urem64_p2(i64) -> i64 { -block0(v0: i64): - v1 = urem_imm v0, 2 - ; check: band_imm v0, 1 - return v1 -} - -; shift -function %t_urem64_p2p63(i64) -> i64 { -block0(v0: i64): - v1 = urem_imm v0, 0x8000_0000_0000_0000 - ; check: band_imm v0, 0x7fff_ffff_ffff_ffff - return v1 -} - - -; -------- S32 -------- - -; ignored -function %t_srem32_n1(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, -1 - ; check: srem_imm v0, -1 - return v1 -} - -; ignored -function %t_srem32_p0(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, 0 - ; check: srem_imm v0, 0 - return v1 -} - -; converted to constant zero -function %t_srem32_p1(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, 1 - ; check: iconst.i32 0 - return v1 -} - -; shift -function %t_srem32_p2(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, 2 - ; check: ushr_imm v0, 31 - ; check: iadd v0, v2 - ; check: band_imm v3, -2 - ; check: isub v0, v4 - return v1 -} - -; shift -function %t_srem32_n2(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, -2 - ; check: ushr_imm v0, 31 - ; check: iadd v0, v2 - ; check: band_imm v3, -2 - ; check: isub v0, v4 - return v1 -} - -; shift -function %t_srem32_p4(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, 4 - ; check: sshr_imm v0, 1 - ; check: ushr_imm v2, 30 - ; check: iadd v0, v3 - ; check: band_imm v4, -4 - ; check: isub v0, v5 - return v1 -} - -; shift -function %t_srem32_n4(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, -4 - ; check: sshr_imm v0, 1 - ; check: ushr_imm v2, 30 - ; check: iadd v0, v3 - ; check: band_imm v4, -4 - ; check: isub v0, v5 - return v1 -} - -; shift -function %t_srem32_p2p30(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, 0x4000_0000 - ; check: sshr_imm v0, 29 - ; check: ushr_imm v2, 2 - ; check: iadd v0, v3 - ; check: band_imm v4, 0xffff_ffff_c000_0000 - ; check: isub v0, v5 - return v1 -} - -; shift -function %t_srem32_n2p30(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, -0x4000_0000 - ; check: sshr_imm v0, 29 - ; check: ushr_imm v2, 2 - ; check: iadd v0, v3 - ; check: band_imm v4, 0xffff_ffff_c000_0000 - ; check: isub v0, v5 - return v1 -} - -; there's no positive version of this, since -(-0x8000_0000) isn't -; representable. -function %t_srem32_n2p31(i32) -> i32 { -block0(v0: i32): - v1 = srem_imm v0, -0x8000_0000 - ; check: sshr_imm v0, 30 - ; check: ushr_imm v2, 1 - ; check: iadd v0, v3 - ; check: band_imm v4, 0xffff_ffff_8000_0000 - ; check: isub v0, v5 - return v1 -} - - -; -------- S64 -------- - -; ignored -function %t_srem64_n1(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, -1 - ; check: srem_imm v0, -1 - return v1 -} - -; ignored -function %t_srem64_p0(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, 0 - ; check: srem_imm v0, 0 - return v1 -} - -; converted to constant zero -function %t_srem64_p1(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, 1 - ; check: iconst.i64 0 - return v1 -} - -; shift -function %t_srem64_p2(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, 2 - ; check: ushr_imm v0, 63 - ; check: iadd v0, v2 - ; check: band_imm v3, -2 - ; check: isub v0, v4 - return v1 -} - -; shift -function %t_srem64_n2(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, -2 - ; check: ushr_imm v0, 63 - ; check: iadd v0, v2 - ; check: band_imm v3, -2 - ; check: isub v0, v4 - return v1 -} - -; shift -function %t_srem64_p4(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, 4 - ; check: sshr_imm v0, 1 - ; check: ushr_imm v2, 62 - ; check: iadd v0, v3 - ; check: band_imm v4, -4 - ; check: isub v0, v5 - return v1 -} - -; shift -function %t_srem64_n4(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, -4 - ; check: sshr_imm v0, 1 - ; check: ushr_imm v2, 62 - ; check: iadd v0, v3 - ; check: band_imm v4, -4 - ; check: isub v0, v5 - return v1 -} - -; shift -function %t_srem64_p2p62(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, 0x4000_0000_0000_0000 - ; check: sshr_imm v0, 61 - ; check: ushr_imm v2, 2 - ; check: iadd v0, v3 - ; check: band_imm v4, 0xc000_0000_0000_0000 - ; check: isub v0, v5 - return v1 -} - -; shift -function %t_srem64_n2p62(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, -0x4000_0000_0000_0000 - ; check: sshr_imm v0, 61 - ; check: ushr_imm v2, 2 - ; check: iadd v0, v3 - ; check: band_imm v4, 0xc000_0000_0000_0000 - ; check: isub v0, v5 - return v1 -} - -; there's no positive version of this, since -(-0x8000_0000_0000_0000) isn't -; representable. -function %t_srem64_n2p63(i64) -> i64 { -block0(v0: i64): - v1 = srem_imm v0, -0x8000_0000_0000_0000 - ; check: sshr_imm v0, 62 - ; check: ushr_imm v2, 1 - ; check: iadd v0, v3 - ; check: band_imm v4, 0x8000_0000_0000_0000 - ; check: isub v0, v5 - return v1 -} diff --git a/cranelift/filetests/filetests/simple_preopt/replace_branching_instructions_and_cfg_predecessors.clif b/cranelift/filetests/filetests/simple_preopt/replace_branching_instructions_and_cfg_predecessors.clif deleted file mode 100644 index 89a576fab635..000000000000 --- a/cranelift/filetests/filetests/simple_preopt/replace_branching_instructions_and_cfg_predecessors.clif +++ /dev/null @@ -1,18 +0,0 @@ -test simple_preopt -target aarch64 -target x86_64 - -function u0:2(i64 , i64) { - block0(v0: i64, v1: i64): - v18 = load.i32 v0 - v19 = iconst.i32 4 - v20 = icmp ne v18, v19 - v21 = uextend.i32 v20 - brif v21, block2, block4 - block4: - jump block1 - block2: - jump block1 - block1: - return -} diff --git a/cranelift/filetests/filetests/simple_preopt/sign_extend.clif b/cranelift/filetests/filetests/simple_preopt/sign_extend.clif deleted file mode 100644 index 6fccf8553e62..000000000000 --- a/cranelift/filetests/filetests/simple_preopt/sign_extend.clif +++ /dev/null @@ -1,40 +0,0 @@ -test simple_preopt -target aarch64 -target x86_64 - -;; Tests for sign-extending immediates. - -function %sign_extend_signed_icmp(i8) -> i8 { -block0(v0: i8): - ; 255 = -1 as u8 - v1 = iconst.i8 255 - v2 = icmp sge v0, v1 - ; check: v2 = icmp_imm sge v0, -1 - return v2 -} - -function %do_not_sign_extend_unsigned_icmp(i8) -> i8 { -block0(v0: i8): - v1 = iconst.i8 255 - v2 = icmp uge v0, v1 - ; check: v2 = icmp_imm uge v0, 255 - return v2 -} - -function %sign_extend_sdiv(i8) -> i8 { -block0(v0: i8): - ; 255 = -1 as u8 - v1 = iconst.i8 255 - v2 = sdiv v0, v1 - ; check: v2 = sdiv_imm v0, -1 - return v2 -} - -function %sign_extend_srem(i8) -> i8 { -block0(v0: i8): - ; 255 = -1 as u8 - v1 = iconst.i8 255 - v2 = srem v0, v1 - ; check: v2 = srem_imm v0, -1 - return v2 -} diff --git a/cranelift/filetests/filetests/simple_preopt/simplify32.clif b/cranelift/filetests/filetests/simple_preopt/simplify32.clif deleted file mode 100644 index 80fb1363e5d3..000000000000 --- a/cranelift/filetests/filetests/simple_preopt/simplify32.clif +++ /dev/null @@ -1,62 +0,0 @@ -test simple_preopt -target aarch64 -target i686 - -;; 32-bits platforms. - -function %iadd_imm(i32) -> i32 { -block0(v0: i32): - v1 = iconst.i32 2 - v2 = iadd v0, v1 - return v2 -} -; sameln: function %iadd_imm -; nextln: block0(v0: i32): -; nextln: v1 = iconst.i32 2 -; nextln: v2 = iadd_imm v0, 2 -; nextln: return v2 -; nextln: } - -function %isub_imm(i32) -> i32 { -block0(v0: i32): - v1 = iconst.i32 2 - v2 = isub v0, v1 - return v2 -} -; sameln: function %isub_imm -; nextln: block0(v0: i32): -; nextln: v1 = iconst.i32 2 -; nextln: v2 = iadd_imm v0, -2 -; nextln: return v2 -; nextln: } - -function %icmp_imm(i32) -> i32 { -block0(v0: i32): - v1 = iconst.i32 2 - v2 = icmp slt v0, v1 - v3 = uextend.i32 v2 - return v3 -} -; sameln: function %icmp_imm -; nextln: block0(v0: i32): -; nextln: v1 = iconst.i32 2 -; nextln: v2 = icmp_imm slt v0, 2 -; nextln: v3 = uextend.i32 v2 -; nextln: return v3 -; nextln: } - -;; Don't simplify operations that would get illegal because of lack of native -;; support. -function %iadd_imm(i64) -> i64 { -block0(v0: i64): - v1 = iconst.i64 2 - v2 = iadd v0, v1 - return v2 -} -; sameln: function %iadd_imm -; nextln: block0(v0: i64): -; nextln: v1 = iconst.i64 2 -; nextln: v2 = iadd v0, v1 -; nextln: return v2 -; nextln: } - diff --git a/cranelift/filetests/filetests/simple_preopt/simplify64.clif b/cranelift/filetests/filetests/simple_preopt/simplify64.clif deleted file mode 100644 index dc850f715ecc..000000000000 --- a/cranelift/filetests/filetests/simple_preopt/simplify64.clif +++ /dev/null @@ -1,294 +0,0 @@ -test simple_preopt -target aarch64 -target x86_64 - -;; 64-bits platforms. - -function %iadd_imm(i32) -> i32 { -block0(v0: i32): - v1 = iconst.i32 2 - v2 = iadd v0, v1 - return v2 -} -; sameln: function %iadd_imm -; nextln: block0(v0: i32): -; nextln: v1 = iconst.i32 2 -; nextln: v2 = iadd_imm v0, 2 -; nextln: return v2 -; nextln: } - -function %isub_imm(i32) -> i32 { -block0(v0: i32): - v1 = iconst.i32 2 - v2 = isub v0, v1 - return v2 -} -; sameln: function %isub_imm -; nextln: block0(v0: i32): -; nextln: v1 = iconst.i32 2 -; nextln: v2 = iadd_imm v0, -2 -; nextln: return v2 -; nextln: } - -function %icmp_imm(i32) -> i32 { -block0(v0: i32): - v1 = iconst.i32 2 - v2 = icmp slt v0, v1 - v3 = uextend.i32 v2 - return v3 -} -; sameln: function %icmp_imm -; nextln: block0(v0: i32): -; nextln: v1 = iconst.i32 2 -; nextln: v2 = icmp_imm slt v0, 2 -; nextln: v3 = uextend.i32 v2 -; nextln: return v3 -; nextln: } - -function %brif_false_uextend(i32) { -block0(v0: i32): - v3 = icmp_imm slt v0, 0 - v1 = uextend.i32 v3 - v2 = select v1, v1, v1 - trapz v1, user0 - brif v1, block2, block1 - -block1: - return - -block2: - return -} -; sameln: function %brif_false_uextend -; nextln: (v0: i32): -; nextln: v3 = icmp_imm slt v0, 0 -; nextln: v1 = uextend.i32 v3 -; nextln: v2 = select v1, v1, v1 -; nextln: trapz v1, user0 -; nextln: brif v1, block2, block1 - -function %irsub_imm(i32) -> i32 { -block0(v0: i32): - v1 = iconst.i32 2 - v2 = isub v1, v0 - return v2 -} -; sameln: function %irsub_imm -; nextln: block0(v0: i32): -; nextln: v1 = iconst.i32 2 -; nextln: v2 = irsub_imm v0, 2 -; nextln: return v2 -; nextln: } - -;; Sign-extensions. - -;; 8 -> 16 -function %uextend_8_16() -> i16 { -block0: - v0 = iconst.i16 37 - v1 = ishl_imm v0, 8 - v2 = ushr_imm v1, 8 - return v2 -} -; sameln: function %uextend_8_16 -; nextln: block0: -; nextln: v0 = iconst.i16 37 -; nextln: v1 = ishl_imm v0, 8 -; nextln: v3 = ireduce.i8 v0 -; nextln: v2 = uextend.i16 v3 -; nextln: return v2 -; nextln: } - -function %sextend_8_16() -> i16 { -block0: - v0 = iconst.i16 37 - v1 = ishl_imm v0, 8 - v2 = sshr_imm v1, 8 - return v2 -} -; sameln: function %sextend_8_16 -; nextln: block0: -; nextln: v0 = iconst.i16 37 -; nextln: v1 = ishl_imm v0, 8 -; nextln: v3 = ireduce.i8 v0 -; nextln: v2 = sextend.i16 v3 -; nextln: return v2 -; nextln: } - -;; 8 -> 32 -function %uextend_8_32() -> i32 { -block0: - v0 = iconst.i32 37 - v1 = ishl_imm v0, 24 - v2 = ushr_imm v1, 24 - return v2 -} -; sameln: function %uextend_8_32 -; nextln: block0: -; nextln: v0 = iconst.i32 37 -; nextln: v1 = ishl_imm v0, 24 -; nextln: v3 = ireduce.i8 v0 -; nextln: v2 = uextend.i32 v3 -; nextln: return v2 -; nextln: } - -function %sextend_8_32() -> i32 { -block0: - v0 = iconst.i32 37 - v1 = ishl_imm v0, 24 - v2 = sshr_imm v1, 24 - return v2 -} -; sameln: function %sextend_8_32 -; nextln: block0: -; nextln: v0 = iconst.i32 37 -; nextln: v1 = ishl_imm v0, 24 -; nextln: v3 = ireduce.i8 v0 -; nextln: v2 = sextend.i32 v3 -; nextln: return v2 -; nextln: } - -;; 16 -> 32 -function %uextend_16_32() -> i32 { -block0: - v0 = iconst.i32 37 - v1 = ishl_imm v0, 16 - v2 = ushr_imm v1, 16 - return v2 -} -; sameln: function %uextend_16_32 -; nextln: block0: -; nextln: v0 = iconst.i32 37 -; nextln: v1 = ishl_imm v0, 16 -; nextln: v3 = ireduce.i16 v0 -; nextln: v2 = uextend.i32 v3 -; nextln: return v2 -; nextln: } - -function %sextend_16_32() -> i32 { -block0: - v0 = iconst.i32 37 - v1 = ishl_imm v0, 16 - v2 = sshr_imm v1, 16 - return v2 -} -; sameln: function %sextend_16_32 -; nextln: block0: -; nextln: v0 = iconst.i32 37 -; nextln: v1 = ishl_imm v0, 16 -; nextln: v3 = ireduce.i16 v0 -; nextln: v2 = sextend.i32 v3 -; nextln: return v2 -; nextln: } - -;; 8 -> 64 -function %uextend_8_64() -> i64 { -block0: - v0 = iconst.i64 37 - v1 = ishl_imm v0, 56 - v2 = ushr_imm v1, 56 - return v2 -} -; sameln: function %uextend_8_64 -; nextln: block0: -; nextln: v0 = iconst.i64 37 -; nextln: v1 = ishl_imm v0, 56 -; nextln: v3 = ireduce.i8 v0 -; nextln: v2 = uextend.i64 v3 -; nextln: return v2 -; nextln: } - -function %sextend_8_64() -> i64 { -block0: - v0 = iconst.i64 37 - v1 = ishl_imm v0, 56 - v2 = sshr_imm v1, 56 - return v2 -} -; sameln: function %sextend_8_64 -; nextln: block0: -; nextln: v0 = iconst.i64 37 -; nextln: v1 = ishl_imm v0, 56 -; nextln: v3 = ireduce.i8 v0 -; nextln: v2 = sextend.i64 v3 -; nextln: return v2 -; nextln: } - -;; 16 -> 64 -function %uextend_16_64() -> i64 { -block0: - v0 = iconst.i64 37 - v1 = ishl_imm v0, 48 - v2 = ushr_imm v1, 48 - return v2 -} -; sameln: function %uextend_16_64 -; nextln: block0: -; nextln: v0 = iconst.i64 37 -; nextln: v1 = ishl_imm v0, 48 -; nextln: v3 = ireduce.i16 v0 -; nextln: v2 = uextend.i64 v3 -; nextln: return v2 -; nextln: } - -function %sextend_16_64() -> i64 { -block0: - v0 = iconst.i64 37 - v1 = ishl_imm v0, 48 - v2 = sshr_imm v1, 48 - return v2 -} -; sameln: function %sextend_16_64 -; nextln: block0: -; nextln: v0 = iconst.i64 37 -; nextln: v1 = ishl_imm v0, 48 -; nextln: v3 = ireduce.i16 v0 -; nextln: v2 = sextend.i64 v3 -; nextln: return v2 -; nextln: } - -;; 32 -> 64 -function %uextend_32_64() -> i64 { -block0: - v0 = iconst.i64 37 - v1 = ishl_imm v0, 32 - v2 = ushr_imm v1, 32 - return v2 -} -; sameln: function %uextend_32_64 -; nextln: block0: -; nextln: v0 = iconst.i64 37 -; nextln: v1 = ishl_imm v0, 32 -; nextln: v3 = ireduce.i32 v0 -; nextln: v2 = uextend.i64 v3 -; nextln: return v2 -; nextln: } - -function %sextend_32_64() -> i64 { -block0: - v0 = iconst.i64 37 - v1 = ishl_imm v0, 32 - v2 = sshr_imm v1, 32 - return v2 -} -; sameln: function %sextend_32_64 -; nextln: block0: -; nextln: v0 = iconst.i64 37 -; nextln: v1 = ishl_imm v0, 32 -; nextln: v3 = ireduce.i32 v0 -; nextln: v2 = sextend.i64 v3 -; nextln: return v2 -; nextln: } - -function %add_imm_fold(i32) -> i32 { -block0(v0: i32): - v1 = iadd_imm v0, 42 - v2 = iadd_imm v1, -42 - return v2 -} -; sameln: function %add_imm_fold(i32) -; nextln: block0(v0: i32): -; nextln: v2 -> v0 -; nextln: v1 = iadd_imm v0, 42 -; nextln: nop -; nextln: return v2 diff --git a/cranelift/filetests/filetests/wasm/duplicate-loads-dynamic-memory-egraph.wat b/cranelift/filetests/filetests/wasm/duplicate-loads-dynamic-memory-egraph.wat deleted file mode 100644 index 73aaccd829e4..000000000000 --- a/cranelift/filetests/filetests/wasm/duplicate-loads-dynamic-memory-egraph.wat +++ /dev/null @@ -1,88 +0,0 @@ -;;! target = "x86_64" -;;! -;;! optimize = true -;;! -;;! settings = [ -;;! "enable_heap_access_spectre_mitigation=true", -;;! "opt_level=speed_and_size", -;;! "use_egraphs=true" -;;! ] -;;! -;;! [globals.vmctx] -;;! type = "i64" -;;! vmctx = true -;;! -;;! [globals.heap_base] -;;! type = "i64" -;;! load = { base = "vmctx", offset = 0 } -;;! -;;! [globals.heap_bound] -;;! type = "i64" -;;! load = { base = "vmctx", offset = 8 } -;;! -;;! [[heaps]] -;;! base = "heap_base" -;;! min_size = 0 -;;! offset_guard_size = 0xffffffff -;;! index_type = "i32" -;;! style = { kind = "dynamic", bound = "heap_bound" } - -(module - (memory (export "memory") 0) - (func (export "load-without-offset") (param i32) (result i32 i32) - local.get 0 - i32.load - local.get 0 - i32.load - ) - (func (export "load-with-offset") (param i32) (result i32 i32) - local.get 0 - i32.load offset=1234 - local.get 0 - i32.load offset=1234 - ) -) - -;; function u0:0(i32, i64 vmctx) -> i32, i32 fast { -;; gv0 = vmctx -;; gv1 = load.i64 notrap aligned gv0+8 -;; gv2 = load.i64 notrap aligned gv0 -;; -;; block0(v0: i32, v1: i64): -;; @0057 v5 = load.i64 notrap aligned v1+8 -;; @0057 v7 = load.i64 notrap aligned v1 -;; @0057 v4 = uextend.i64 v0 -;; @0057 v6 = icmp ugt v4, v5 -;; @0057 v9 = iconst.i64 0 -;; @0057 v8 = iadd v7, v4 -;; @0057 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 -;; @0057 v11 = load.i32 little heap v10 -;; v2 -> v11 -;; @005f jump block1 -;; -;; block1: -;; @005f return v11, v11 -;; } -;; -;; function u0:1(i32, i64 vmctx) -> i32, i32 fast { -;; gv0 = vmctx -;; gv1 = load.i64 notrap aligned gv0+8 -;; gv2 = load.i64 notrap aligned gv0 -;; -;; block0(v0: i32, v1: i64): -;; @0064 v5 = load.i64 notrap aligned v1+8 -;; @0064 v7 = load.i64 notrap aligned v1 -;; @0064 v4 = uextend.i64 v0 -;; @0064 v6 = icmp ugt v4, v5 -;; @0064 v10 = iconst.i64 0 -;; @0064 v8 = iadd v7, v4 -;; v22 = iconst.i64 1234 -;; @0064 v9 = iadd v8, v22 ; v22 = 1234 -;; @0064 v11 = select_spectre_guard v6, v10, v9 ; v10 = 0 -;; @0064 v12 = load.i32 little heap v11 -;; v2 -> v12 -;; @006e jump block1 -;; -;; block1: -;; @006e return v12, v12 -;; } diff --git a/cranelift/filetests/filetests/wasm/duplicate-loads-dynamic-memory.wat b/cranelift/filetests/filetests/wasm/duplicate-loads-dynamic-memory.wat index 53b97ceb5143..7d00c81bfdd5 100644 --- a/cranelift/filetests/filetests/wasm/duplicate-loads-dynamic-memory.wat +++ b/cranelift/filetests/filetests/wasm/duplicate-loads-dynamic-memory.wat @@ -5,7 +5,6 @@ ;;! settings = [ ;;! "enable_heap_access_spectre_mitigation=true", ;;! "opt_level=speed_and_size", -;;! "use_egraphs=false" ;;! ] ;;! ;;! [globals.vmctx] @@ -49,24 +48,15 @@ ;; gv2 = load.i64 notrap aligned gv0 ;; ;; block0(v0: i32, v1: i64): -;; @0057 v4 = uextend.i64 v0 -;; v12 -> v4 ;; @0057 v5 = load.i64 notrap aligned v1+8 -;; v13 -> v5 -;; @0057 v6 = icmp ugt v4, v5 -;; v14 -> v6 ;; @0057 v7 = load.i64 notrap aligned v1 -;; v15 -> v7 -;; @0057 v8 = iadd v7, v4 -;; v16 -> v8 +;; @0057 v4 = uextend.i64 v0 +;; @0057 v6 = icmp ugt v4, v5 ;; @0057 v9 = iconst.i64 0 -;; v17 -> v9 +;; @0057 v8 = iadd v7, v4 ;; @0057 v10 = select_spectre_guard v6, v9, v8 ; v9 = 0 -;; v18 -> v10 ;; @0057 v11 = load.i32 little heap v10 ;; v2 -> v11 -;; v19 -> v11 -;; v3 -> v19 ;; @005f jump block1 ;; ;; block1: @@ -79,28 +69,17 @@ ;; gv2 = load.i64 notrap aligned gv0 ;; ;; block0(v0: i32, v1: i64): -;; @0064 v4 = uextend.i64 v0 -;; v13 -> v4 ;; @0064 v5 = load.i64 notrap aligned v1+8 -;; v14 -> v5 -;; @0064 v6 = icmp ugt v4, v5 -;; v15 -> v6 ;; @0064 v7 = load.i64 notrap aligned v1 -;; v16 -> v7 +;; @0064 v4 = uextend.i64 v0 +;; @0064 v6 = icmp ugt v4, v5 +;; @0064 v10 = iconst.i64 0 ;; @0064 v8 = iadd v7, v4 -;; v17 -> v8 ;; v22 = iconst.i64 1234 -;; v23 -> v22 ;; @0064 v9 = iadd v8, v22 ; v22 = 1234 -;; v18 -> v9 -;; @0064 v10 = iconst.i64 0 -;; v19 -> v10 ;; @0064 v11 = select_spectre_guard v6, v10, v9 ; v10 = 0 -;; v20 -> v11 ;; @0064 v12 = load.i32 little heap v11 ;; v2 -> v12 -;; v21 -> v12 -;; v3 -> v21 ;; @006e jump block1 ;; ;; block1: diff --git a/cranelift/filetests/filetests/wasm/duplicate-loads-static-memory-egraph.wat b/cranelift/filetests/filetests/wasm/duplicate-loads-static-memory-egraph.wat deleted file mode 100644 index d434d5a33a61..000000000000 --- a/cranelift/filetests/filetests/wasm/duplicate-loads-static-memory-egraph.wat +++ /dev/null @@ -1,74 +0,0 @@ -;;! target = "x86_64" -;;! -;;! optimize = true -;;! -;;! settings = [ -;;! "enable_heap_access_spectre_mitigation=true", -;;! "opt_level=speed_and_size", -;;! "use_egraphs=true" -;;! ] -;;! -;;! [globals.vmctx] -;;! type = "i64" -;;! vmctx = true -;;! -;;! [globals.heap_base] -;;! type = "i64" -;;! load = { base = "vmctx", offset = 0, readonly = true } -;;! -;;! [[heaps]] -;;! base = "heap_base" -;;! min_size = 0x10000 -;;! offset_guard_size = 0xffffffff -;;! index_type = "i32" -;;! style = { kind = "static", bound = 0x10000000 } - -(module - (memory (export "memory") 1) - (func (export "load-without-offset") (param i32) (result i32 i32) - local.get 0 - i32.load - local.get 0 - i32.load - ) - (func (export "load-with-offset") (param i32) (result i32 i32) - local.get 0 - i32.load offset=1234 - local.get 0 - i32.load offset=1234 - ) -) - -;; function u0:0(i32, i64 vmctx) -> i32, i32 fast { -;; gv0 = vmctx -;; gv1 = load.i64 notrap aligned readonly gv0 -;; -;; block0(v0: i32, v1: i64): -;; @0057 v5 = load.i64 notrap aligned readonly v1 -;; @0057 v4 = uextend.i64 v0 -;; @0057 v6 = iadd v5, v4 -;; @0057 v7 = load.i32 little heap v6 -;; v2 -> v7 -;; @005f jump block1 -;; -;; block1: -;; @005f return v7, v7 -;; } -;; -;; function u0:1(i32, i64 vmctx) -> i32, i32 fast { -;; gv0 = vmctx -;; gv1 = load.i64 notrap aligned readonly gv0 -;; -;; block0(v0: i32, v1: i64): -;; @0064 v5 = load.i64 notrap aligned readonly v1 -;; @0064 v4 = uextend.i64 v0 -;; @0064 v6 = iadd v5, v4 -;; v14 = iconst.i64 1234 -;; @0064 v7 = iadd v6, v14 ; v14 = 1234 -;; @0064 v8 = load.i32 little heap v7 -;; v2 -> v8 -;; @006e jump block1 -;; -;; block1: -;; @006e return v8, v8 -;; } diff --git a/cranelift/filetests/filetests/wasm/duplicate-loads-static-memory.wat b/cranelift/filetests/filetests/wasm/duplicate-loads-static-memory.wat index bef294915803..16a4fe413335 100644 --- a/cranelift/filetests/filetests/wasm/duplicate-loads-static-memory.wat +++ b/cranelift/filetests/filetests/wasm/duplicate-loads-static-memory.wat @@ -5,7 +5,6 @@ ;;! settings = [ ;;! "enable_heap_access_spectre_mitigation=true", ;;! "opt_level=speed_and_size", -;;! "use_egraphs=false" ;;! ] ;;! ;;! [globals.vmctx] @@ -44,16 +43,11 @@ ;; gv1 = load.i64 notrap aligned readonly gv0 ;; ;; block0(v0: i32, v1: i64): -;; @0057 v4 = uextend.i64 v0 -;; v8 -> v4 ;; @0057 v5 = load.i64 notrap aligned readonly v1 -;; v9 -> v5 +;; @0057 v4 = uextend.i64 v0 ;; @0057 v6 = iadd v5, v4 -;; v10 -> v6 ;; @0057 v7 = load.i32 little heap v6 ;; v2 -> v7 -;; v11 -> v7 -;; v3 -> v11 ;; @005f jump block1 ;; ;; block1: @@ -65,20 +59,13 @@ ;; gv1 = load.i64 notrap aligned readonly gv0 ;; ;; block0(v0: i32, v1: i64): -;; @0064 v4 = uextend.i64 v0 -;; v9 -> v4 ;; @0064 v5 = load.i64 notrap aligned readonly v1 -;; v10 -> v5 +;; @0064 v4 = uextend.i64 v0 ;; @0064 v6 = iadd v5, v4 -;; v11 -> v6 ;; v14 = iconst.i64 1234 -;; v15 -> v14 ;; @0064 v7 = iadd v6, v14 ; v14 = 1234 -;; v12 -> v7 ;; @0064 v8 = load.i32 little heap v7 ;; v2 -> v8 -;; v13 -> v8 -;; v3 -> v13 ;; @006e jump block1 ;; ;; block1: diff --git a/cranelift/filetests/filetests/wasm/dynamic-memory-no-spectre-access-same-index-different-offsets.wat b/cranelift/filetests/filetests/wasm/dynamic-memory-no-spectre-access-same-index-different-offsets.wat index 14da1eb48373..d3f19dfe5266 100644 --- a/cranelift/filetests/filetests/wasm/dynamic-memory-no-spectre-access-same-index-different-offsets.wat +++ b/cranelift/filetests/filetests/wasm/dynamic-memory-no-spectre-access-same-index-different-offsets.wat @@ -5,7 +5,6 @@ ;;! settings = [ ;;! "enable_heap_access_spectre_mitigation=false", ;;! "opt_level=speed_and_size", -;;! "use_egraphs=true" ;;! ] ;;! ;;! [globals.vmctx] diff --git a/cranelift/filetests/filetests/wasm/dynamic-memory-yes-spectre-access-same-index-different-offsets.wat b/cranelift/filetests/filetests/wasm/dynamic-memory-yes-spectre-access-same-index-different-offsets.wat index 4dbe53e807bd..c31b82338eb6 100644 --- a/cranelift/filetests/filetests/wasm/dynamic-memory-yes-spectre-access-same-index-different-offsets.wat +++ b/cranelift/filetests/filetests/wasm/dynamic-memory-yes-spectre-access-same-index-different-offsets.wat @@ -5,7 +5,6 @@ ;;! settings = [ ;;! "enable_heap_access_spectre_mitigation=true", ;;! "opt_level=speed_and_size", -;;! "use_egraphs=true" ;;! ] ;;! ;;! [globals.vmctx] diff --git a/cranelift/filetests/src/lib.rs b/cranelift/filetests/src/lib.rs index c82e452809cb..3314aae81c1d 100644 --- a/cranelift/filetests/src/lib.rs +++ b/cranelift/filetests/src/lib.rs @@ -41,13 +41,10 @@ mod test_dce; mod test_domtree; mod test_interpret; mod test_legalizer; -mod test_licm; mod test_optimize; mod test_print_cfg; mod test_run; mod test_safepoint; -mod test_simple_gvn; -mod test_simple_preopt; mod test_unwind; mod test_verifier; mod test_wasm; @@ -114,13 +111,10 @@ fn new_subtest(parsed: &TestCommand) -> anyhow::Result "domtree" => test_domtree::subtest(parsed), "interpret" => test_interpret::subtest(parsed), "legalizer" => test_legalizer::subtest(parsed), - "licm" => test_licm::subtest(parsed), "optimize" => test_optimize::subtest(parsed), "print-cfg" => test_print_cfg::subtest(parsed), "run" => test_run::subtest(parsed), "safepoint" => test_safepoint::subtest(parsed), - "simple-gvn" => test_simple_gvn::subtest(parsed), - "simple_preopt" => test_simple_preopt::subtest(parsed), "unwind" => test_unwind::subtest(parsed), "verifier" => test_verifier::subtest(parsed), _ => anyhow::bail!("unknown test command '{}'", parsed.command), diff --git a/cranelift/filetests/src/test_alias_analysis.rs b/cranelift/filetests/src/test_alias_analysis.rs index 8d155811ba1c..5fbf86dfefcf 100644 --- a/cranelift/filetests/src/test_alias_analysis.rs +++ b/cranelift/filetests/src/test_alias_analysis.rs @@ -35,9 +35,6 @@ impl SubTest for TestAliasAnalysis { let mut comp_ctx = cranelift_codegen::Context::for_function(func.into_owned()); comp_ctx.flowgraph(); - comp_ctx - .simple_gvn(context.flags_or_isa()) - .map_err(|e| crate::pretty_anyhow_error(&comp_ctx.func, Into::into(e)))?; comp_ctx .replace_redundant_loads() .map_err(|e| crate::pretty_anyhow_error(&comp_ctx.func, Into::into(e)))?; diff --git a/cranelift/filetests/src/test_licm.rs b/cranelift/filetests/src/test_licm.rs deleted file mode 100644 index b02bac1e74c6..000000000000 --- a/cranelift/filetests/src/test_licm.rs +++ /dev/null @@ -1,51 +0,0 @@ -//! Test command for testing the LICM pass. -//! -//! The `licm` test command runs each function through the LICM pass after ensuring -//! that all instructions are legal for the target. -//! -//! The resulting function is sent to `filecheck`. - -use crate::subtest::{run_filecheck, Context, SubTest}; -use cranelift_codegen; -use cranelift_codegen::ir::Function; -use cranelift_reader::TestCommand; -use std::borrow::Cow; - -struct TestLICM; - -pub fn subtest(parsed: &TestCommand) -> anyhow::Result> { - assert_eq!(parsed.command, "licm"); - if !parsed.options.is_empty() { - anyhow::bail!("No options allowed on {}", parsed); - } - Ok(Box::new(TestLICM)) -} - -impl SubTest for TestLICM { - fn name(&self) -> &'static str { - "licm" - } - - fn needs_isa(&self) -> bool { - true - } - - fn is_mutating(&self) -> bool { - true - } - - fn run(&self, func: Cow, context: &Context) -> anyhow::Result<()> { - let isa = context.isa.expect("LICM needs an ISA"); - let mut comp_ctx = cranelift_codegen::Context::for_function(func.into_owned()); - - comp_ctx.flowgraph(); - comp_ctx.compute_loop_analysis(); - comp_ctx - .licm(isa) - .map_err(|e| crate::pretty_anyhow_error(&comp_ctx.func, Into::into(e)))?; - - let text = comp_ctx.func.display().to_string(); - log::debug!("Post-LICM CLIF:\n{}", text); - run_filecheck(&text, context) - } -} diff --git a/cranelift/filetests/src/test_simple_gvn.rs b/cranelift/filetests/src/test_simple_gvn.rs deleted file mode 100644 index bb563f4315cb..000000000000 --- a/cranelift/filetests/src/test_simple_gvn.rs +++ /dev/null @@ -1,44 +0,0 @@ -//! Test command for testing the simple GVN pass. -//! -//! The `simple-gvn` test command runs each function through the simple GVN pass after ensuring -//! that all instructions are legal for the target. -//! -//! The resulting function is sent to `filecheck`. - -use crate::subtest::{run_filecheck, Context, SubTest}; -use cranelift_codegen; -use cranelift_codegen::ir::Function; -use cranelift_reader::TestCommand; -use std::borrow::Cow; - -struct TestSimpleGVN; - -pub fn subtest(parsed: &TestCommand) -> anyhow::Result> { - assert_eq!(parsed.command, "simple-gvn"); - if !parsed.options.is_empty() { - anyhow::bail!("No options allowed on {}", parsed); - } - Ok(Box::new(TestSimpleGVN)) -} - -impl SubTest for TestSimpleGVN { - fn name(&self) -> &'static str { - "simple-gvn" - } - - fn is_mutating(&self) -> bool { - true - } - - fn run(&self, func: Cow, context: &Context) -> anyhow::Result<()> { - let mut comp_ctx = cranelift_codegen::Context::for_function(func.into_owned()); - - comp_ctx.flowgraph(); - comp_ctx - .simple_gvn(context.flags_or_isa()) - .map_err(|e| crate::pretty_anyhow_error(&comp_ctx.func, Into::into(e)))?; - - let text = comp_ctx.func.display().to_string(); - run_filecheck(&text, context) - } -} diff --git a/cranelift/filetests/src/test_simple_preopt.rs b/cranelift/filetests/src/test_simple_preopt.rs deleted file mode 100644 index 9a591ef023f0..000000000000 --- a/cranelift/filetests/src/test_simple_preopt.rs +++ /dev/null @@ -1,46 +0,0 @@ -//! Test command for testing the preopt pass. -//! -//! The resulting function is sent to `filecheck`. - -use crate::subtest::{run_filecheck, Context, SubTest}; -use cranelift_codegen; -use cranelift_codegen::ir::Function; -use cranelift_reader::TestCommand; -use std::borrow::Cow; - -struct TestSimplePreopt; - -pub fn subtest(parsed: &TestCommand) -> anyhow::Result> { - assert_eq!(parsed.command, "simple_preopt"); - if !parsed.options.is_empty() { - anyhow::bail!("No options allowed on {}", parsed); - } - Ok(Box::new(TestSimplePreopt)) -} - -impl SubTest for TestSimplePreopt { - fn name(&self) -> &'static str { - "simple_preopt" - } - - fn needs_isa(&self) -> bool { - true - } - - fn is_mutating(&self) -> bool { - true - } - - fn run(&self, func: Cow, context: &Context) -> anyhow::Result<()> { - let mut comp_ctx = cranelift_codegen::Context::for_function(func.into_owned()); - let isa = context.isa.expect("preopt needs an ISA"); - - comp_ctx.compute_cfg(); - comp_ctx - .preopt(isa) - .map_err(|e| crate::pretty_anyhow_error(&comp_ctx.func, e))?; - let text = &comp_ctx.func.display().to_string(); - log::debug!("After simple_preopt:\n{}", text); - run_filecheck(&text, context) - } -} diff --git a/cranelift/fuzzgen/src/lib.rs b/cranelift/fuzzgen/src/lib.rs index e8e649314611..4a759583bd4f 100644 --- a/cranelift/fuzzgen/src/lib.rs +++ b/cranelift/fuzzgen/src/lib.rs @@ -183,7 +183,6 @@ where "enable_incremental_compilation_cache_checks", "regalloc_checker", "enable_llvm_abi_extensions", - "use_egraphs", ]; for flag_name in bool_settings { let enabled = self diff --git a/crates/fuzzing/src/generators/config.rs b/crates/fuzzing/src/generators/config.rs index 11e52f94694a..d6891583262d 100644 --- a/crates/fuzzing/src/generators/config.rs +++ b/crates/fuzzing/src/generators/config.rs @@ -141,7 +141,6 @@ impl Config { } /// Converts this to a `wasmtime::Config` object - #[allow(deprecated)] // Allow use of `cranelift_use_egraphs` below. pub fn to_wasmtime(&self) -> wasmtime::Config { crate::init_fuzzing(); log::debug!("creating wasmtime config with {:#?}", self.wasmtime); @@ -157,7 +156,6 @@ impl Config { .native_unwind_info(self.wasmtime.native_unwind_info) .cranelift_nan_canonicalization(self.wasmtime.canonicalize_nans) .cranelift_opt_level(self.wasmtime.opt_level.to_wasmtime()) - .cranelift_use_egraphs(self.wasmtime.use_egraphs) .consume_fuel(self.wasmtime.consume_fuel) .epoch_interruption(self.wasmtime.epoch_interruption) .memory_init_cow(self.wasmtime.memory_init_cow) @@ -377,7 +375,6 @@ impl<'a> Arbitrary<'a> for Config { #[derive(Arbitrary, Clone, Debug, Eq, Hash, PartialEq)] pub struct WasmtimeConfig { opt_level: OptLevel, - use_egraphs: bool, debug_info: bool, canonicalize_nans: bool, interruptable: bool, diff --git a/crates/wasmtime/src/config.rs b/crates/wasmtime/src/config.rs index c21428392169..504d8d22b067 100644 --- a/crates/wasmtime/src/config.rs +++ b/crates/wasmtime/src/config.rs @@ -884,30 +884,6 @@ impl Config { self } - /// Configures the Cranelift code generator to use its - /// "egraph"-based mid-end optimizer. - /// - /// This optimizer has replaced the compiler's more traditional - /// pipeline of optimization passes with a unified code-rewriting - /// system. It is on by default, but the traditional optimization - /// pass structure is still available for now (it is deprecrated and - /// will be removed in a future version). - /// - /// The default value for this is `true`. - #[cfg(compiler)] - #[cfg_attr(nightlydoc, doc(cfg(any(feature = "cranelift", feature = "winch"))))] // see build.rs - #[deprecated( - since = "5.0.0", - note = "egraphs will be the default and this method will be removed in a future version." - )] - pub fn cranelift_use_egraphs(&mut self, enable: bool) -> &mut Self { - let val = if enable { "true" } else { "false" }; - self.compiler_config - .settings - .insert("use_egraphs".to_string(), val.to_string()); - self - } - /// Configures whether Cranelift should perform a NaN-canonicalization pass. /// /// When Cranelift is used as a code generation backend this will configure diff --git a/crates/wasmtime/src/engine.rs b/crates/wasmtime/src/engine.rs index 6153194186d6..a900a435fe3a 100644 --- a/crates/wasmtime/src/engine.rs +++ b/crates/wasmtime/src/engine.rs @@ -412,7 +412,6 @@ impl Engine { | "machine_code_cfg_info" | "tls_model" // wasmtime doesn't use tls right now | "opt_level" // opt level doesn't change semantics - | "use_egraphs" // optimizing with egraphs doesn't change semantics | "enable_alias_analysis" // alias analysis-based opts don't change semantics | "probestack_func_adjusts_sp" // probestack above asserted disabled | "probestack_size_log2" // probestack above asserted disabled