diff --git a/crates/wasmparser/src/binary_reader.rs b/crates/wasmparser/src/binary_reader.rs index c3ab7a4ab7..00bcd80209 100644 --- a/crates/wasmparser/src/binary_reader.rs +++ b/crates/wasmparser/src/binary_reader.rs @@ -1645,51 +1645,58 @@ impl<'a> BinaryReader<'a> { 0x50 => Operator::V128Or, 0x51 => Operator::V128Xor, 0x52 => Operator::V128Bitselect, - 0x53 => Operator::F64x2ConvertLowI32x4S, - 0x54 => Operator::F64x2ConvertLowI32x4U, - 0x55 => Operator::I32x4TruncSatF64x2SZero, - 0x56 => Operator::I32x4TruncSatF64x2UZero, - 0x57 => Operator::F32x4DemoteF64x2Zero, - 0x58 => Operator::V128Load8Lane { + 0x53 => Operator::V128AnyTrue, + 0x54 => Operator::V128Load8Lane { memarg: self.read_memarg()?, lane: self.read_lane_index(16)?, }, - 0x59 => Operator::V128Load16Lane { + 0x55 => Operator::V128Load16Lane { memarg: self.read_memarg()?, lane: self.read_lane_index(8)?, }, - 0x5a => Operator::V128Load32Lane { + 0x56 => Operator::V128Load32Lane { memarg: self.read_memarg()?, lane: self.read_lane_index(4)?, }, - 0x5b => Operator::V128Load64Lane { + 0x57 => Operator::V128Load64Lane { memarg: self.read_memarg()?, lane: self.read_lane_index(2)?, }, - 0x5c => Operator::V128Store8Lane { + 0x58 => Operator::V128Store8Lane { memarg: self.read_memarg()?, lane: self.read_lane_index(16)?, }, - 0x5d => Operator::V128Store16Lane { + 0x59 => Operator::V128Store16Lane { memarg: self.read_memarg()?, lane: self.read_lane_index(8)?, }, - 0x5e => Operator::V128Store32Lane { + 0x5a => Operator::V128Store32Lane { memarg: self.read_memarg()?, lane: self.read_lane_index(4)?, }, - 0x5f => Operator::V128Store64Lane { + 0x5b => Operator::V128Store64Lane { memarg: self.read_memarg()?, lane: self.read_lane_index(2)?, }, + 0x5c => Operator::V128Load32Zero { + memarg: self.read_memarg_of_align(2)?, + }, + 0x5d => Operator::V128Load64Zero { + memarg: self.read_memarg_of_align(3)?, + }, + 0x5e => Operator::F32x4DemoteF64x2Zero, + 0x5f => Operator::F64x2PromoteLowF32x4, 0x60 => Operator::I8x16Abs, 0x61 => Operator::I8x16Neg, - 0x62 => Operator::V128AnyTrue, + 0x62 => Operator::I8x16Popcnt, 0x63 => Operator::I8x16AllTrue, 0x64 => Operator::I8x16Bitmask, 0x65 => Operator::I8x16NarrowI16x8S, 0x66 => Operator::I8x16NarrowI16x8U, - 0x69 => Operator::F64x2PromoteLowF32x4, + 0x67 => Operator::F32x4Ceil, + 0x68 => Operator::F32x4Floor, + 0x69 => Operator::F32x4Trunc, + 0x6a => Operator::F32x4Nearest, 0x6b => Operator::I8x16Shl, 0x6c => Operator::I8x16ShrS, 0x6d => Operator::I8x16ShrU, @@ -1699,13 +1706,21 @@ impl<'a> BinaryReader<'a> { 0x71 => Operator::I8x16Sub, 0x72 => Operator::I8x16SubSatS, 0x73 => Operator::I8x16SubSatU, + 0x74 => Operator::F64x2Ceil, + 0x75 => Operator::F64x2Floor, 0x76 => Operator::I8x16MinS, 0x77 => Operator::I8x16MinU, 0x78 => Operator::I8x16MaxS, 0x79 => Operator::I8x16MaxU, + 0x7a => Operator::F64x2Trunc, 0x7b => Operator::I8x16RoundingAverageU, + 0x7c => Operator::I16x8ExtAddPairwiseI8x16S, + 0x7d => Operator::I16x8ExtAddPairwiseI8x16U, + 0x7e => Operator::I32x4ExtAddPairwiseI16x8S, + 0x7f => Operator::I32x4ExtAddPairwiseI16x8U, 0x80 => Operator::I16x8Abs, 0x81 => Operator::I16x8Neg, + 0x82 => Operator::I16x8Q15MulrSatS, 0x83 => Operator::I16x8AllTrue, 0x84 => Operator::I16x8Bitmask, 0x85 => Operator::I16x8NarrowI32x4S, @@ -1723,14 +1738,14 @@ impl<'a> BinaryReader<'a> { 0x91 => Operator::I16x8Sub, 0x92 => Operator::I16x8SubSatS, 0x93 => Operator::I16x8SubSatU, + 0x94 => Operator::F64x2Nearest, 0x95 => Operator::I16x8Mul, 0x96 => Operator::I16x8MinS, 0x97 => Operator::I16x8MinU, 0x98 => Operator::I16x8MaxS, 0x99 => Operator::I16x8MaxU, - 0x9a => Operator::I16x8ExtMulLowI8x16S, 0x9b => Operator::I16x8RoundingAverageU, - 0x9c => Operator::I16x8Q15MulrSatS, + 0x9c => Operator::I16x8ExtMulLowI8x16S, 0x9d => Operator::I16x8ExtMulHighI8x16S, 0x9e => Operator::I16x8ExtMulLowI8x16U, 0x9f => Operator::I16x8ExtMulHighI8x16U, @@ -1753,12 +1768,13 @@ impl<'a> BinaryReader<'a> { 0xb8 => Operator::I32x4MaxS, 0xb9 => Operator::I32x4MaxU, 0xba => Operator::I32x4DotI16x8S, - 0xbb => Operator::I32x4ExtMulLowI16x8S, + 0xbc => Operator::I32x4ExtMulLowI16x8S, 0xbd => Operator::I32x4ExtMulHighI16x8S, 0xbe => Operator::I32x4ExtMulLowI16x8U, 0xbf => Operator::I32x4ExtMulHighI16x8U, - 0xc0 => Operator::I64x2Eq, + 0xc0 => Operator::I64x2Abs, 0xc1 => Operator::I64x2Neg, + 0xc3 => Operator::I64x2AllTrue, 0xc4 => Operator::I64x2Bitmask, 0xc7 => Operator::I64x2WidenLowI32x4S, 0xc8 => Operator::I64x2WidenHighI32x4S, @@ -1768,22 +1784,18 @@ impl<'a> BinaryReader<'a> { 0xcc => Operator::I64x2ShrS, 0xcd => Operator::I64x2ShrU, 0xce => Operator::I64x2Add, - 0xcf => Operator::I64x2AllTrue, - 0xd0 => Operator::I64x2Ne, 0xd1 => Operator::I64x2Sub, - 0xd2 => Operator::I64x2ExtMulLowI32x4S, - 0xd3 => Operator::I64x2ExtMulHighI32x4S, 0xd5 => Operator::I64x2Mul, - 0xd6 => Operator::I64x2ExtMulLowI32x4U, - 0xd7 => Operator::I64x2ExtMulHighI32x4U, - 0xd8 => Operator::F32x4Ceil, - 0xd9 => Operator::F32x4Floor, - 0xda => Operator::F32x4Trunc, - 0xdb => Operator::F32x4Nearest, - 0xdc => Operator::F64x2Ceil, - 0xdd => Operator::F64x2Floor, - 0xde => Operator::F64x2Trunc, - 0xdf => Operator::F64x2Nearest, + 0xd6 => Operator::I64x2Eq, + 0xd7 => Operator::I64x2Ne, + 0xd8 => Operator::I64x2LtS, + 0xd9 => Operator::I64x2GtS, + 0xda => Operator::I64x2LeS, + 0xdb => Operator::I64x2GeS, + 0xdc => Operator::I64x2ExtMulLowI32x4S, + 0xdd => Operator::I64x2ExtMulHighI32x4S, + 0xde => Operator::I64x2ExtMulLowI32x4U, + 0xdf => Operator::I64x2ExtMulHighI32x4U, 0xe0 => Operator::F32x4Abs, 0xe1 => Operator::F32x4Neg, 0xe3 => Operator::F32x4Sqrt, @@ -1810,12 +1822,11 @@ impl<'a> BinaryReader<'a> { 0xf9 => Operator::I32x4TruncSatF32x4U, 0xfa => Operator::F32x4ConvertI32x4S, 0xfb => Operator::F32x4ConvertI32x4U, - 0xfc => Operator::V128Load32Zero { - memarg: self.read_memarg_of_align(2)?, - }, - 0xfd => Operator::V128Load64Zero { - memarg: self.read_memarg_of_align(3)?, - }, + 0xfc => Operator::I32x4TruncSatF64x2SZero, + 0xfd => Operator::I32x4TruncSatF64x2UZero, + 0xfe => Operator::F64x2ConvertLowI32x4S, + 0xff => Operator::F64x2ConvertLowI32x4U, + _ => { return Err(BinaryReaderError::new( format!("Unknown 0xfd subopcode: 0x{:x}", code), diff --git a/crates/wasmparser/src/operators_validator.rs b/crates/wasmparser/src/operators_validator.rs index 23c714b7ab..326bd3e437 100644 --- a/crates/wasmparser/src/operators_validator.rs +++ b/crates/wasmparser/src/operators_validator.rs @@ -1553,6 +1553,10 @@ impl OperatorValidator { | Operator::I32x4GeU | Operator::I64x2Eq | Operator::I64x2Ne + | Operator::I64x2LtS + | Operator::I64x2GtS + | Operator::I64x2LeS + | Operator::I64x2GeS | Operator::V128And | Operator::V128AndNot | Operator::V128Or @@ -1607,6 +1611,10 @@ impl OperatorValidator { | Operator::I64x2ExtMulHighI32x4S | Operator::I64x2ExtMulLowI32x4U | Operator::I64x2ExtMulHighI32x4U + | Operator::I16x8ExtAddPairwiseI8x16S + | Operator::I16x8ExtAddPairwiseI8x16U + | Operator::I32x4ExtAddPairwiseI16x8S + | Operator::I32x4ExtAddPairwiseI16x8U | Operator::I16x8Q15MulrSatS => { self.check_simd_enabled()?; self.pop_operand(Some(Type::V128))?; @@ -1643,10 +1651,12 @@ impl OperatorValidator { Operator::V128Not | Operator::I8x16Abs | Operator::I8x16Neg + | Operator::I8x16Popcnt | Operator::I16x8Abs | Operator::I16x8Neg | Operator::I32x4Abs | Operator::I32x4Neg + | Operator::I64x2Abs | Operator::I64x2Neg | Operator::I32x4TruncSatF32x4S | Operator::I32x4TruncSatF32x4U diff --git a/crates/wasmparser/src/primitives.rs b/crates/wasmparser/src/primitives.rs index f46bdfa114..a702453327 100644 --- a/crates/wasmparser/src/primitives.rs +++ b/crates/wasmparser/src/primitives.rs @@ -984,6 +984,10 @@ pub enum Operator<'a> { I32x4GeU, I64x2Eq, I64x2Ne, + I64x2LtS, + I64x2GtS, + I64x2LeS, + I64x2GeS, F32x4Eq, F32x4Ne, F32x4Lt, @@ -1053,6 +1057,7 @@ pub enum Operator<'a> { I32x4MaxS, I32x4MaxU, I32x4DotI16x8S, + I64x2Abs, I64x2Neg, I64x2AllTrue, I64x2Bitmask, @@ -1146,6 +1151,10 @@ pub enum Operator<'a> { I64x2ExtMulHighI32x4S, I64x2ExtMulLowI32x4U, I64x2ExtMulHighI32x4U, + I16x8ExtAddPairwiseI8x16S, + I16x8ExtAddPairwiseI8x16U, + I32x4ExtAddPairwiseI16x8S, + I32x4ExtAddPairwiseI16x8U, V128Load8x8S { memarg: MemoryImmediate, }, @@ -1205,4 +1214,5 @@ pub enum Operator<'a> { F64x2ConvertLowI32x4U, I32x4TruncSatF64x2SZero, I32x4TruncSatF64x2UZero, + I8x16Popcnt, } diff --git a/crates/wasmprinter/src/lib.rs b/crates/wasmprinter/src/lib.rs index ff655ddd86..13fd6b65e2 100644 --- a/crates/wasmprinter/src/lib.rs +++ b/crates/wasmprinter/src/lib.rs @@ -1230,6 +1230,10 @@ impl Printer { I64x2Eq => self.result.push_str("i64x2.eq"), I64x2Ne => self.result.push_str("i64x2.ne"), + I64x2LtS => self.result.push_str("i64x2.lt_s"), + I64x2GtS => self.result.push_str("i64x2.gt_s"), + I64x2LeS => self.result.push_str("i64x2.le_s"), + I64x2GeS => self.result.push_str("i64x2.ge_s"), F32x4Eq => self.result.push_str("f32x4.eq"), F32x4Ne => self.result.push_str("f32x4.ne"), @@ -1293,6 +1297,7 @@ impl Printer { I32x4Sub => self.result.push_str("i32x4.sub"), I32x4Mul => self.result.push_str("i32x4.mul"), + I64x2Abs => self.result.push_str("i64x2.abs"), I64x2Neg => self.result.push_str("i64x2.neg"), I64x2AllTrue => self.result.push_str("i64x2.all_true"), I64x2Bitmask => self.result.push_str("i64x2.bitmask"), @@ -1452,6 +1457,13 @@ impl Printer { F64x2ConvertLowI32x4U => self.result.push_str("f64x2.convert_low_i32x4_u"), I32x4TruncSatF64x2SZero => self.result.push_str("i32x4.trunc_sat_f64x2_s_zero"), I32x4TruncSatF64x2UZero => self.result.push_str("i32x4.trunc_sat_f64x2_u_zero"), + + I8x16Popcnt => self.result.push_str("i8x16.popcnt"), + + I16x8ExtAddPairwiseI8x16S => self.result.push_str("i16x8.extadd_pairwise_i8x16_s"), + I16x8ExtAddPairwiseI8x16U => self.result.push_str("i16x8.extadd_pairwise_i8x16_u"), + I32x4ExtAddPairwiseI16x8S => self.result.push_str("i32x4.extadd_pairwise_i16x8_s"), + I32x4ExtAddPairwiseI16x8U => self.result.push_str("i32x4.extadd_pairwise_i16x8_u"), } Ok(()) } diff --git a/crates/wast/src/ast/expr.rs b/crates/wast/src/ast/expr.rs index 5c69f26150..d6dc6812e2 100644 --- a/crates/wast/src/ast/expr.rs +++ b/crates/wast/src/ast/expr.rs @@ -936,30 +936,34 @@ instructions! { V128Or : [0xfd, 0x50] : "v128.or", V128Xor : [0xfd, 0x51] : "v128.xor", V128Bitselect : [0xfd, 0x52] : "v128.bitselect", + V128AnyTrue : [0xfd, 0x53] : "v128.any_true", - F64x2ConvertLowI32x4S : [0xfd, 0x53] : "f64x2.convert_low_i32x4_s", - F64x2ConvertLowI32x4U : [0xfd, 0x54] : "f64x2.convert_low_i32x4_u", - I32x4TruncSatF64x2SZero : [0xfd, 0x55] : "i32x4.trunc_sat_f64x2_s_zero", - I32x4TruncSatF64x2UZero : [0xfd, 0x56] : "i32x4.trunc_sat_f64x2_u_zero", - F32x4DemoteF64x2Zero : [0xfd, 0x57] : "f32x4.demote_f64x2_zero", - - V128Load8Lane(LoadOrStoreLane<1>) : [0xfd, 0x58] : "v128.load8_lane", - V128Load16Lane(LoadOrStoreLane<2>) : [0xfd, 0x59] : "v128.load16_lane", - V128Load32Lane(LoadOrStoreLane<4>) : [0xfd, 0x5a] : "v128.load32_lane", - V128Load64Lane(LoadOrStoreLane<8>): [0xfd, 0x5b] : "v128.load64_lane", - V128Store8Lane(LoadOrStoreLane<1>) : [0xfd, 0x5c] : "v128.store8_lane", - V128Store16Lane(LoadOrStoreLane<2>) : [0xfd, 0x5d] : "v128.store16_lane", - V128Store32Lane(LoadOrStoreLane<4>) : [0xfd, 0x5e] : "v128.store32_lane", - V128Store64Lane(LoadOrStoreLane<8>) : [0xfd, 0x5f] : "v128.store64_lane", + V128Load8Lane(LoadOrStoreLane<1>) : [0xfd, 0x54] : "v128.load8_lane", + V128Load16Lane(LoadOrStoreLane<2>) : [0xfd, 0x55] : "v128.load16_lane", + V128Load32Lane(LoadOrStoreLane<4>) : [0xfd, 0x56] : "v128.load32_lane", + V128Load64Lane(LoadOrStoreLane<8>): [0xfd, 0x57] : "v128.load64_lane", + V128Store8Lane(LoadOrStoreLane<1>) : [0xfd, 0x58] : "v128.store8_lane", + V128Store16Lane(LoadOrStoreLane<2>) : [0xfd, 0x59] : "v128.store16_lane", + V128Store32Lane(LoadOrStoreLane<4>) : [0xfd, 0x5a] : "v128.store32_lane", + V128Store64Lane(LoadOrStoreLane<8>) : [0xfd, 0x5b] : "v128.store64_lane", + + V128Load32Zero(MemArg<4>) : [0xfd, 0x5c] : "v128.load32_zero", + V128Load64Zero(MemArg<8>) : [0xfd, 0x5d] : "v128.load64_zero", + + F32x4DemoteF64x2Zero : [0xfd, 0x5e] : "f32x4.demote_f64x2_zero", + F64x2PromoteLowF32x4 : [0xfd, 0x5f] : "f64x2.promote_low_f32x4", I8x16Abs : [0xfd, 0x60] : "i8x16.abs", I8x16Neg : [0xfd, 0x61] : "i8x16.neg", - V128AnyTrue : [0xfd, 0x62] : "v128.any_true", + I8x16Popcnt : [0xfd, 0x62] : "i8x16.popcnt", I8x16AllTrue : [0xfd, 0x63] : "i8x16.all_true", I8x16Bitmask : [0xfd, 0x64] : "i8x16.bitmask", I8x16NarrowI16x8S : [0xfd, 0x65] : "i8x16.narrow_i16x8_s", I8x16NarrowI16x8U : [0xfd, 0x66] : "i8x16.narrow_i16x8_u", - F64x2PromoteLowF32x4 : [0xfd, 0x69] : "f64x2.promote_low_f32x4", + F32x4Ceil : [0xfd, 0x67] : "f32x4.ceil", + F32x4Floor : [0xfd, 0x68] : "f32x4.floor", + F32x4Trunc : [0xfd, 0x69] : "f32x4.trunc", + F32x4Nearest : [0xfd, 0x6a] : "f32x4.nearest", I8x16Shl : [0xfd, 0x6b] : "i8x16.shl", I8x16ShrS : [0xfd, 0x6c] : "i8x16.shr_s", I8x16ShrU : [0xfd, 0x6d] : "i8x16.shr_u", @@ -969,14 +973,22 @@ instructions! { I8x16Sub : [0xfd, 0x71] : "i8x16.sub", I8x16SubSatS : [0xfd, 0x72] : "i8x16.sub_sat_s", I8x16SubSatU : [0xfd, 0x73] : "i8x16.sub_sat_u", + F64x2Ceil : [0xfd, 0x74] : "f64x2.ceil", + F64x2Floor : [0xfd, 0x75] : "f64x2.floor", I8x16MinS : [0xfd, 0x76] : "i8x16.min_s", I8x16MinU : [0xfd, 0x77] : "i8x16.min_u", I8x16MaxS : [0xfd, 0x78] : "i8x16.max_s", I8x16MaxU : [0xfd, 0x79] : "i8x16.max_u", + F64x2Trunc : [0xfd, 0x7a] : "f64x2.trunc", I8x16AvgrU : [0xfd, 0x7b] : "i8x16.avgr_u", + I16x8ExtAddPairwiseI8x16S : [0xfd, 0x7c] : "i16x8.extadd_pairwise_i8x16_s", + I16x8ExtAddPairwiseI8x16U : [0xfd, 0x7d] : "i16x8.extadd_pairwise_i8x16_u", + I32x4ExtAddPairwiseI16x8S : [0xfd, 0x7e] : "i32x4.extadd_pairwise_i16x8_s", + I32x4ExtAddPairwiseI16x8U : [0xfd, 0x7f] : "i32x4.extadd_pairwise_i16x8_u", I16x8Abs : [0xfd, 0x80] : "i16x8.abs", I16x8Neg : [0xfd, 0x81] : "i16x8.neg", + I16x8Q15MulrSatS : [0xfd, 0x82] : "i16x8.q15mulr_sat_s", I16x8AllTrue : [0xfd, 0x83] : "i16x8.all_true", I16x8Bitmask : [0xfd, 0x84] : "i16x8.bitmask", I16x8NarrowI32x4S : [0xfd, 0x85] : "i16x8.narrow_i32x4_s", @@ -994,14 +1006,14 @@ instructions! { I16x8Sub : [0xfd, 0x91] : "i16x8.sub", I16x8SubSatS : [0xfd, 0x92] : "i16x8.sub_sat_s", I16x8SubSatU : [0xfd, 0x93] : "i16x8.sub_sat_u", + F64x2Nearest : [0xfd, 0x94] : "f64x2.nearest", I16x8Mul : [0xfd, 0x95] : "i16x8.mul", I16x8MinS : [0xfd, 0x96] : "i16x8.min_s", I16x8MinU : [0xfd, 0x97] : "i16x8.min_u", I16x8MaxS : [0xfd, 0x98] : "i16x8.max_s", I16x8MaxU : [0xfd, 0x99] : "i16x8.max_u", - I16x8ExtMulLowI8x16S : [0xfd, 0x9a] : "i16x8.extmul_low_i8x16_s", I16x8AvgrU : [0xfd, 0x9b] : "i16x8.avgr_u", - I16x8Q15MulrSatS : [0xfd, 0x9c] : "i16x8.q15mulr_sat_s", + I16x8ExtMulLowI8x16S : [0xfd, 0x9c] : "i16x8.extmul_low_i8x16_s", I16x8ExtMulHighI8x16S : [0xfd, 0x9d] : "i16x8.extmul_high_i8x16_s", I16x8ExtMulLowI8x16U : [0xfd, 0x9e] : "i16x8.extmul_low_i8x16_u", I16x8ExtMulHighI8x16U : [0xfd, 0x9f] : "i16x8.extmul_high_i8x16_u", @@ -1025,39 +1037,35 @@ instructions! { I32x4MaxS : [0xfd, 0xb8] : "i32x4.max_s", I32x4MaxU : [0xfd, 0xb9] : "i32x4.max_u", I32x4DotI16x8S : [0xfd, 0xba] : "i32x4.dot_i16x8_s", - I32x4ExtMulLowI16x8S : [0xfd, 0xbb] : "i32x4.extmul_low_i16x8_s", + I32x4ExtMulLowI16x8S : [0xfd, 0xbc] : "i32x4.extmul_low_i16x8_s", I32x4ExtMulHighI16x8S : [0xfd, 0xbd] : "i32x4.extmul_high_i16x8_s", I32x4ExtMulLowI16x8U : [0xfd, 0xbe] : "i32x4.extmul_low_i16x8_u", I32x4ExtMulHighI16x8U : [0xfd, 0xbf] : "i32x4.extmul_high_i16x8_u", - I64x2Eq : [0xfd, 0xc0] : "i64x2.eq", + I64x2Abs : [0xfd, 0xc0] : "i64x2.abs", I64x2Neg : [0xfd, 0xc1] : "i64x2.neg", - I64x2Shl : [0xfd, 0xcb] : "i64x2.shl", + I64x2AllTrue : [0xfd, 0xc3] : "i64x2.all_true", I64x2Bitmask : [0xfd, 0xc4] : "i64x2.bitmask", I64x2WidenLowI32x4S : [0xfd, 0xc7] : "i64x2.widen_low_i32x4_s", I64x2WidenHighI32x4S : [0xfd, 0xc8] : "i64x2.widen_high_i32x4_s", I64x2WidenLowI32x4U : [0xfd, 0xc9] : "i64x2.widen_low_i32x4_u", I64x2WidenHighI32x4U : [0xfd, 0xca] : "i64x2.widen_high_i32x4_u", + I64x2Shl : [0xfd, 0xcb] : "i64x2.shl", I64x2ShrS : [0xfd, 0xcc] : "i64x2.shr_s", I64x2ShrU : [0xfd, 0xcd] : "i64x2.shr_u", I64x2Add : [0xfd, 0xce] : "i64x2.add", - I64x2AllTrue : [0xfd, 0xcf] : "i64x2.all_true", - I64x2Ne : [0xfd, 0xd0] : "i64x2.ne", I64x2Sub : [0xfd, 0xd1] : "i64x2.sub", - I64x2ExtMulLowI32x4S : [0xfd, 0xd2] : "i64x2.extmul_low_i32x4_s", - I64x2ExtMulHighI32x4S : [0xfd, 0xd3] : "i64x2.extmul_high_i32x4_s", I64x2Mul : [0xfd, 0xd5] : "i64x2.mul", - I64x2ExtMulLowI32x4U : [0xfd, 0xd6] : "i64x2.extmul_low_i32x4_u", - I64x2ExtMulHighI32x4U : [0xfd, 0xd7] : "i64x2.extmul_high_i32x4_u", - - F32x4Ceil : [0xfd, 0xd8] : "f32x4.ceil", - F32x4Floor : [0xfd, 0xd9] : "f32x4.floor", - F32x4Trunc : [0xfd, 0xda] : "f32x4.trunc", - F32x4Nearest : [0xfd, 0xdb] : "f32x4.nearest", - F64x2Ceil : [0xfd, 0xdc] : "f64x2.ceil", - F64x2Floor : [0xfd, 0xdd] : "f64x2.floor", - F64x2Trunc : [0xfd, 0xde] : "f64x2.trunc", - F64x2Nearest : [0xfd, 0xdf] : "f64x2.nearest", + I64x2Eq : [0xfd, 0xd6] : "i64x2.eq", + I64x2Ne : [0xfd, 0xd7] : "i64x2.ne", + I64x2LtS : [0xfd, 0xd8] : "i64x2.lt_s", + I64x2GtS : [0xfd, 0xd9] : "i64x2.gt_s", + I64x2LeS : [0xfd, 0xda] : "i64x2.le_s", + I64x2GeS : [0xfd, 0xdb] : "i64x2.ge_s", + I64x2ExtMulLowI32x4S : [0xfd, 0xdc] : "i64x2.extmul_low_i32x4_s", + I64x2ExtMulHighI32x4S : [0xfd, 0xdd] : "i64x2.extmul_high_i32x4_s", + I64x2ExtMulLowI32x4U : [0xfd, 0xde] : "i64x2.extmul_low_i32x4_u", + I64x2ExtMulHighI32x4U : [0xfd, 0xdf] : "i64x2.extmul_high_i32x4_u", F32x4Abs : [0xfd, 0xe0] : "f32x4.abs", F32x4Neg : [0xfd, 0xe1] : "f32x4.neg", @@ -1088,8 +1096,10 @@ instructions! { F32x4ConvertI32x4S : [0xfd, 0xfa] : "f32x4.convert_i32x4_s", F32x4ConvertI32x4U : [0xfd, 0xfb] : "f32x4.convert_i32x4_u", - V128Load32Zero(MemArg<4>) : [0xfd, 0xfc] : "v128.load32_zero", - V128Load64Zero(MemArg<8>) : [0xfd, 0xfd] : "v128.load64_zero", + I32x4TruncSatF64x2SZero : [0xfd, 0xfc] : "i32x4.trunc_sat_f64x2_s_zero", + I32x4TruncSatF64x2UZero : [0xfd, 0xfd] : "i32x4.trunc_sat_f64x2_u_zero", + F64x2ConvertLowI32x4S : [0xfd, 0xfe] : "f64x2.convert_low_i32x4_s", + F64x2ConvertLowI32x4U : [0xfd, 0xff] : "f64x2.convert_low_i32x4_u", // Exception handling proposal CatchAll : [0x05] : "catch_all", // Reuses the else opcode. diff --git a/tests/local/simd.wat b/tests/local/simd.wat index 768fdcf8e8..a247aca89b 100644 --- a/tests/local/simd.wat +++ b/tests/local/simd.wat @@ -200,6 +200,30 @@ i8x16.neg drop + v128.const i32x4 0 0 0 0 + v128.const i32x4 0 0 0 0 + i64x2.lt_s + i8x16.neg + drop + + v128.const i32x4 0 0 0 0 + v128.const i32x4 0 0 0 0 + i64x2.gt_s + i8x16.neg + drop + + v128.const i32x4 0 0 0 0 + v128.const i32x4 0 0 0 0 + i64x2.le_s + i8x16.neg + drop + + v128.const i32x4 0 0 0 0 + v128.const i32x4 0 0 0 0 + i64x2.ge_s + i8x16.neg + drop + v128.const i32x4 0 0 0 0 v128.const i32x4 0 0 0 0 i16x8.q15mulr_sat_s @@ -236,6 +260,40 @@ i8x16.neg drop + v128.const i32x4 0 0 0 0 + i64x2.abs + i8x16.neg + drop + + v128.const i32x4 0 0 0 0 + i8x16.popcnt + i8x16.neg + drop + + v128.const i32x4 0 0 0 0 + v128.const i32x4 0 0 0 0 + i16x8.extadd_pairwise_i8x16_s + i8x16.neg + drop + + v128.const i32x4 0 0 0 0 + v128.const i32x4 0 0 0 0 + i16x8.extadd_pairwise_i8x16_u + i8x16.neg + drop + + v128.const i32x4 0 0 0 0 + v128.const i32x4 0 0 0 0 + i32x4.extadd_pairwise_i16x8_s + i8x16.neg + drop + + v128.const i32x4 0 0 0 0 + v128.const i32x4 0 0 0 0 + i32x4.extadd_pairwise_i16x8_u + i8x16.neg + drop + ) (memory (;0;) 1) diff --git a/tests/roundtrip.rs b/tests/roundtrip.rs index d59e77f9b7..559e3cb7a8 100644 --- a/tests/roundtrip.rs +++ b/tests/roundtrip.rs @@ -154,6 +154,11 @@ fn skip_test(test: &Path, contents: &[u8]) -> bool { // iNxM.any_true and the introduction of v128.any_true. "proposals/simd/simd_boolean.wast", "proposals/simd/simd_lane.wast", + // WebAssembly/simd#452 caused instructions renumbering, + // temporary disable some wabt tests. + "proposals/simd/simd_i16x8_arith2.wast", + "proposals/simd/simd_f64x2_rounding.wast", + "proposals/simd/simd_f32x4_rounding.wast", // roundtrip/fold-simd.txt is skipped to deal with the removal of // iNxM.any_true and the introduction of v128.any_true. "roundtrip/fold-simd.txt",