From 4c0d088d774c55152637dcd3514c579a06c95646 Mon Sep 17 00:00:00 2001
From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
Date: Mon, 26 Sep 2022 18:05:57 +0200
Subject: [PATCH 1/2] [AArch64] Fix incorrect regalloc constraints for
 atomic_cas (#4959)

* [AArch64] Fix incorrect regalloc constraints for atomic_cas

* Update test for latest Cranelift changes
---
 cranelift/codegen/src/isa/aarch64/inst/mod.rs |  4 +--
 .../filetests/isa/aarch64/atomic-cas.clif     | 32 +++++++++++++++++++
 2 files changed, 34 insertions(+), 2 deletions(-)
 create mode 100644 cranelift/filetests/filetests/isa/aarch64/atomic-cas.clif

diff --git a/cranelift/codegen/src/isa/aarch64/inst/mod.rs b/cranelift/codegen/src/isa/aarch64/inst/mod.rs
index 22b034d4e240..db03203d2b2a 100644
--- a/cranelift/codegen/src/isa/aarch64/inst/mod.rs
+++ b/cranelift/codegen/src/isa/aarch64/inst/mod.rs
@@ -726,8 +726,8 @@ fn aarch64_get_operands<F: Fn(VReg) -> VReg>(inst: &Inst, collector: &mut Operan
             collector.reg_fixed_use(addr, xreg(25));
             collector.reg_fixed_use(expected, xreg(26));
             collector.reg_fixed_use(replacement, xreg(28));
-            collector.reg_fixed_def(oldval, xreg(24));
-            collector.reg_fixed_def(scratch, xreg(27));
+            collector.reg_fixed_def(oldval, xreg(27));
+            collector.reg_fixed_def(scratch, xreg(24));
         }
         &Inst::LoadAcquire { rt, rn, .. } => {
             collector.reg_use(rn);
diff --git a/cranelift/filetests/filetests/isa/aarch64/atomic-cas.clif b/cranelift/filetests/filetests/isa/aarch64/atomic-cas.clif
new file mode 100644
index 000000000000..f3d5c249c01e
--- /dev/null
+++ b/cranelift/filetests/filetests/isa/aarch64/atomic-cas.clif
@@ -0,0 +1,32 @@
+; Regression test for incorrect regalloc constraints introduced in #4830
+
+test compile precise-output
+target aarch64
+
+function u0:0(i64, i32, i32) -> i8 system_v {
+block0(v0: i64, v1: i32, v2: i32):
+    v6 = atomic_cas.i32 v0, v1, v2
+    v7 = icmp eq v6, v1
+    v8 = bint.i8 v7
+    return v8
+}
+
+;   stp fp, lr, [sp, #-16]!
+;   mov fp, sp
+;   str x28, [sp, #-16]!
+;   stp x26, x27, [sp, #-16]!
+;   stp x24, x25, [sp, #-16]!
+; block0:
+;   mov x25, x0
+;   mov x26, x1
+;   mov x28, x2
+;   atomic_cas_loop_32 addr=x25, expect=x26, replacement=x28, oldval=x27, scratch=x24
+;   subs wzr, w27, w26
+;   cset x8, eq
+;   and w0, w8, #1
+;   ldp x24, x25, [sp], #16
+;   ldp x26, x27, [sp], #16
+;   ldr x28, [sp], #16
+;   ldp fp, lr, [sp], #16
+;   ret
+

From 5afdff89c48b9da37b46d96474f64c0f404c49dd Mon Sep 17 00:00:00 2001
From: Chris Fallin <chris@cfallin.org>
Date: Mon, 26 Sep 2022 10:06:05 -0700
Subject: [PATCH 2/2] Update precise-output test for 1.0.0 regalloc.

---
 cranelift/filetests/filetests/isa/aarch64/atomic-cas.clif | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/cranelift/filetests/filetests/isa/aarch64/atomic-cas.clif b/cranelift/filetests/filetests/isa/aarch64/atomic-cas.clif
index f3d5c249c01e..c605709eb0d6 100644
--- a/cranelift/filetests/filetests/isa/aarch64/atomic-cas.clif
+++ b/cranelift/filetests/filetests/isa/aarch64/atomic-cas.clif
@@ -18,8 +18,9 @@ block0(v0: i64, v1: i32, v2: i32):
 ;   stp x24, x25, [sp, #-16]!
 ; block0:
 ;   mov x25, x0
-;   mov x26, x1
+;   mov x9, x1
 ;   mov x28, x2
+;   mov x26, x9
 ;   atomic_cas_loop_32 addr=x25, expect=x26, replacement=x28, oldval=x27, scratch=x24
 ;   subs wzr, w27, w26
 ;   cset x8, eq