Build FPGA SD image · chipsalliance/caliptra-sw@768ddbe

Triggered via schedule January 9, 2024 13:20

korran

main

Status Success

Total duration 11m 34s

Artifacts 1

fpga-image.yml

on: schedule

1 error

unable to access 'https://github.com/chipsalliance/caliptra-sw/': The requested URL returned error: 500

Produced during runtime

Name	Size
caliptra-fpga-image Expired	379 MB