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libcaliptra: add SHA accelerator API #1637

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@MDr164 MDr164 commented Aug 14, 2024

Resolves #1361 by providing an abstraction above the caliptra_write_u32 and caliptra_read_u32 function calls according to the info at https://chipsalliance.github.io/caliptra-rtl/main/external-regs/?p=caliptra_top_reg.sha512_acc_csr

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linux-foundation-easycla bot commented Sep 11, 2024

CLA Signed

The committers listed above are authorized under a signed CLA.

  • ✅ login: MDr164 / name: Marvin Drees (c1d16d7)

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I think there are some issues when it comes to obtaining and releasing the lock. It think there should also be a test that performs these operations with a known answer to ensure this is working.


if (mode == CALIPTRA_SHA_ACCELERATOR_MODE_MBOX_384 || mode == CALIPTRA_SHA_ACCELERATOR_MODE_MBOX_512) {
// Writing 1 will clear the lock
caliptra_write_u32(CALIPTRA_SHA_ACCELERATOR_LOCK_ADDR, 0x1);
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Don't we need to obtain the lock before interacting with it? I think we'll also want to return a busy error if it's not available as we do for the mailbox.

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I manually ran a test on the FPGA for that back when I wrote it but I might have just been lucky that nothing interfered. But I agree, I'll add a tests around locking and unlocking the accelerator and check if that handling needs to be revised.

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I'm somewhat confused about the locking behavior. Writing 1 will clear the lock and "reading 0" will set the lock but how does "reading 0" even work? That documentation looks odd to me now that I went over it again and it also seems like the emulator is not really doing what is written in the documentation.

@MDr164 MDr164 force-pushed the sha-accel branch 2 times, most recently from 86ab97c to 3eef2a0 Compare December 11, 2024 17:39
Signed-off-by: Marvin Drees <marvin.drees@9elements.com>
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Libcaliptra support needed for SHA accelerator engine
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