From 2f3bb1c968d2d4896efef2ea353ac9b2e760cf83 Mon Sep 17 00:00:00 2001 From: ducky Date: Mon, 30 Jan 2017 18:44:26 -0800 Subject: [PATCH] Moar fix --- .../src/main/scala/chisel3/core/BlackBox.scala | 2 ++ .../src/main/scala/chisel3/core/Module.scala | 11 ++--------- 2 files changed, 4 insertions(+), 9 deletions(-) diff --git a/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala b/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala index 5de6e3741d9..9034746b919 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/BlackBox.scala @@ -31,6 +31,8 @@ abstract class BlackBox(val params: Map[String, Param] = Map.empty[String, Param def io: Record private[core] override def generateComponent(): Component = { + _autoWrapPorts() // pre-IO(...) compatibility hack + require(!_closed, "Can't generate module more than once") _closed = true diff --git a/chiselFrontend/src/main/scala/chisel3/core/Module.scala b/chiselFrontend/src/main/scala/chisel3/core/Module.scala index 4693a9d32bb..842921c7380 100644 --- a/chiselFrontend/src/main/scala/chisel3/core/Module.scala +++ b/chiselFrontend/src/main/scala/chisel3/core/Module.scala @@ -238,6 +238,8 @@ abstract class UserModule(implicit moduleCompileOptions: CompileOptions) } private[core] override def generateComponent(): Component = { + _autoWrapPorts() // pre-IO(...) compatibility hack + require(!_closed, "Can't generate module more than once") _closed = true @@ -299,15 +301,6 @@ abstract class ImplicitModule( val clock = IO(Input(Clock())) val reset = IO(Input(Bool())) - private[core] override def generateComponent(): Component = { - _autoWrapPorts() // pre-IO(...) compatibility hack - - // Ensure that io is properly bound - //require(_ioPortBound(), "Missing IO binding in $this") - - super.generateComponent() - } - private[core] def initializeInParent(externalClock: Option[Clock], externalReset: Option[Bool]) { // Don't generate source info referencing parents inside a module, since this interferes with // module de-duplication in FIRRTL emission.