From 0d9e143096bedfbf06d50a19a2b8164c38df46ed Mon Sep 17 00:00:00 2001 From: Daniel Lim Wee Soong Date: Wed, 15 Apr 2020 00:27:09 +0800 Subject: [PATCH] Add license header to top of all code files Resolve #38 Signed-off-by: Daniel Lim Wee Soong --- tests/carry/carry.sim.v | 16 ++++++++++++++++ tests/carry/cblock/cblock.sim.v | 16 ++++++++++++++++ .../dff_comb_one_clock/dff_comb_one_clock.sim.v | 16 ++++++++++++++++ tests/clocks/dff_one_clock/dff_one_clock.sim.v | 16 ++++++++++++++++ tests/clocks/dff_two_clocks/dff_two_clocks.sim.v | 16 ++++++++++++++++ .../input_attr_clock/input_attr_clock.sim.v | 16 ++++++++++++++++ tests/clocks/input_attr_not_clock/block.sim.v | 16 ++++++++++++++++ .../clocks/input_named_clk/input_named_clk.sim.v | 16 ++++++++++++++++ .../input_named_rdclk/input_named_rdclk.sim.v | 16 ++++++++++++++++ tests/clocks/input_named_regex/block.sim.v | 16 ++++++++++++++++ .../multiple_inputs_named_clk.sim.v | 16 ++++++++++++++++ .../multiple_outputs_named_clk.sim.v | 16 ++++++++++++++++ .../output_attr_clock/output_attr_clock.sim.v | 16 ++++++++++++++++ .../output_named_clk/output_named_clk.sim.v | 16 ++++++++++++++++ .../output_named_rdclk/output_named_rdclk.sim.v | 16 ++++++++++++++++ .../dsp_combinational/dsp_combinational.sim.v | 16 ++++++++++++++++ .../dsp_in_registered/dsp_in_registered.sim.v | 16 ++++++++++++++++ .../dsp_inout_registered.sim.v | 16 ++++++++++++++++ .../dsp_inout_registered_dualclk.sim.v | 16 ++++++++++++++++ tests/dsp/dsp_modes/dsp_modes.sim.v | 16 ++++++++++++++++ .../dsp_out_registered/dsp_out_registered.sim.v | 16 ++++++++++++++++ .../dsp_partial_registered.sim.v | 16 ++++++++++++++++ tests/internal_conn/child/child.sim.v | 16 ++++++++++++++++ tests/internal_conn/parent.sim.v | 16 ++++++++++++++++ tests/io/input/ipad.sim.v | 16 ++++++++++++++++ tests/io/output/opad.sim.v | 16 ++++++++++++++++ tests/logicbox/logicbox.sim.v | 16 ++++++++++++++++ tests/modes/inv.sim.v | 16 ++++++++++++++++ tests/modes/not/not.sim.v | 16 ++++++++++++++++ tests/multiple_instance/multiple_instance.sim.v | 16 ++++++++++++++++ tests/muxes/use_mux.sim.v | 16 ++++++++++++++++ tests/net_attr/child/child.sim.v | 16 ++++++++++++++++ tests/net_attr/parent.sim.v | 16 ++++++++++++++++ tests/no_comb/ff.sim.v | 16 ++++++++++++++++ tests/simple_pll/simple_pll.sim.v | 16 ++++++++++++++++ tests/test_v2x.py | 14 ++++++++++++++ tests/vtr/dff/dff.sim.v | 16 ++++++++++++++++ tests/vtr/full-adder/adder.sim.v | 16 ++++++++++++++++ tests/vtr/lutff-pair/ff/ff.sim.v | 16 ++++++++++++++++ tests/vtr/lutff-pair/lut/lut4.sim.v | 16 ++++++++++++++++ tests/vtr/lutff-pair/pair.sim.v | 16 ++++++++++++++++ v2x/__main__.py | 14 ++++++++++++++ v2x/lib/argparse_extra.py | 15 +++++++++++++++ v2x/lib/asserts.py | 15 +++++++++++++++ v2x/lib/mux.py | 15 +++++++++++++++ v2x/mux_gen.py | 15 +++++++++++++++ v2x/vlog_to_model.py | 15 +++++++++++++++ v2x/vlog_to_pbtype.py | 15 +++++++++++++++ v2x/xmlinc/xmlinc.py | 15 +++++++++++++++ v2x/yosys/json.py | 15 +++++++++++++++ v2x/yosys/run.py | 15 +++++++++++++++ v2x/yosys/utils.py | 15 +++++++++++++++ 52 files changed, 818 insertions(+) diff --git a/tests/carry/carry.sim.v b/tests/carry/carry.sim.v index 9263abd1..8234d979 100644 --- a/tests/carry/carry.sim.v +++ b/tests/carry/carry.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `default_nettype none `include "cblock/cblock.sim.v" diff --git a/tests/carry/cblock/cblock.sim.v b/tests/carry/cblock/cblock.sim.v index b73ddbb7..db35b7dc 100644 --- a/tests/carry/cblock/cblock.sim.v +++ b/tests/carry/cblock/cblock.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `default_nettype none (* whitebox *) diff --git a/tests/clocks/dff_comb_one_clock/dff_comb_one_clock.sim.v b/tests/clocks/dff_comb_one_clock/dff_comb_one_clock.sim.v index a1e60c21..a1c2b311 100644 --- a/tests/clocks/dff_comb_one_clock/dff_comb_one_clock.sim.v +++ b/tests/clocks/dff_comb_one_clock/dff_comb_one_clock.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + /* * `input wire a` should be detected as a clock because it drives the flip * flop. diff --git a/tests/clocks/dff_one_clock/dff_one_clock.sim.v b/tests/clocks/dff_one_clock/dff_one_clock.sim.v index d6e2c394..e7b5794f 100644 --- a/tests/clocks/dff_one_clock/dff_one_clock.sim.v +++ b/tests/clocks/dff_one_clock/dff_one_clock.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + /* * `input wire a` should be detected as a clock because it drives the flip * flop. diff --git a/tests/clocks/dff_two_clocks/dff_two_clocks.sim.v b/tests/clocks/dff_two_clocks/dff_two_clocks.sim.v index c9bcb0fc..58b1bffb 100644 --- a/tests/clocks/dff_two_clocks/dff_two_clocks.sim.v +++ b/tests/clocks/dff_two_clocks/dff_two_clocks.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + module BLOCK(c1, c2, a, b, c, o1, o2); input wire c1; input wire c2; diff --git a/tests/clocks/input_attr_clock/input_attr_clock.sim.v b/tests/clocks/input_attr_clock/input_attr_clock.sim.v index 819cb8f9..6b2d0e9b 100644 --- a/tests/clocks/input_attr_clock/input_attr_clock.sim.v +++ b/tests/clocks/input_attr_clock/input_attr_clock.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + /* * `input wire a` should be detected as a clock because of the `(* CLOCK *)` * attribute. diff --git a/tests/clocks/input_attr_not_clock/block.sim.v b/tests/clocks/input_attr_not_clock/block.sim.v index f87f8b26..864daa44 100644 --- a/tests/clocks/input_attr_not_clock/block.sim.v +++ b/tests/clocks/input_attr_not_clock/block.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + /* * `input wire a` should be detected as a clock because it drives the flip * flop. However, it has the attribute CLOCK set to 0 which should force it diff --git a/tests/clocks/input_named_clk/input_named_clk.sim.v b/tests/clocks/input_named_clk/input_named_clk.sim.v index 7d5b6193..260cace7 100644 --- a/tests/clocks/input_named_clk/input_named_clk.sim.v +++ b/tests/clocks/input_named_clk/input_named_clk.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + /* * `input wire clk` should be detected as a clock despite this being a black * box module. diff --git a/tests/clocks/input_named_rdclk/input_named_rdclk.sim.v b/tests/clocks/input_named_rdclk/input_named_rdclk.sim.v index 70d827aa..51100391 100644 --- a/tests/clocks/input_named_rdclk/input_named_rdclk.sim.v +++ b/tests/clocks/input_named_rdclk/input_named_rdclk.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + /* * `input wire rdclk` should be detected as a clock despite this being a black * box module. diff --git a/tests/clocks/input_named_regex/block.sim.v b/tests/clocks/input_named_regex/block.sim.v index 3870d30b..f5fa1451 100644 --- a/tests/clocks/input_named_regex/block.sim.v +++ b/tests/clocks/input_named_regex/block.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + (* whitebox *) module BLOCK( input wire clk, diff --git a/tests/clocks/multiple_inputs_named_clk/multiple_inputs_named_clk.sim.v b/tests/clocks/multiple_inputs_named_clk/multiple_inputs_named_clk.sim.v index 076d6305..ce1f366b 100644 --- a/tests/clocks/multiple_inputs_named_clk/multiple_inputs_named_clk.sim.v +++ b/tests/clocks/multiple_inputs_named_clk/multiple_inputs_named_clk.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + /* * `input wire rdclk` and `input wire wrclk` should be detected as a clock * despite this being a black box module. diff --git a/tests/clocks/multiple_outputs_named_clk/multiple_outputs_named_clk.sim.v b/tests/clocks/multiple_outputs_named_clk/multiple_outputs_named_clk.sim.v index 42899f84..9c372277 100644 --- a/tests/clocks/multiple_outputs_named_clk/multiple_outputs_named_clk.sim.v +++ b/tests/clocks/multiple_outputs_named_clk/multiple_outputs_named_clk.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + /* * `output wire rdclk` and `output wire wrclk` should be detected as a clock * despite this being a black box module. diff --git a/tests/clocks/output_attr_clock/output_attr_clock.sim.v b/tests/clocks/output_attr_clock/output_attr_clock.sim.v index bdf47471..1511fad4 100644 --- a/tests/clocks/output_attr_clock/output_attr_clock.sim.v +++ b/tests/clocks/output_attr_clock/output_attr_clock.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + /* * `output wire o` should be detected as a clock because of the `(* CLOCK *)` * attribute. diff --git a/tests/clocks/output_named_clk/output_named_clk.sim.v b/tests/clocks/output_named_clk/output_named_clk.sim.v index fcf775b2..596383aa 100644 --- a/tests/clocks/output_named_clk/output_named_clk.sim.v +++ b/tests/clocks/output_named_clk/output_named_clk.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + /* * `output wire clk` should be detected as a clock despite this being a black * box module. diff --git a/tests/clocks/output_named_rdclk/output_named_rdclk.sim.v b/tests/clocks/output_named_rdclk/output_named_rdclk.sim.v index 4b72b6f0..6bb47b90 100644 --- a/tests/clocks/output_named_rdclk/output_named_rdclk.sim.v +++ b/tests/clocks/output_named_rdclk/output_named_rdclk.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + /* * `output wire rdclk` should be detected as a clock despite this being a black * box module. diff --git a/tests/dsp/dsp_combinational/dsp_combinational.sim.v b/tests/dsp/dsp_combinational/dsp_combinational.sim.v index bbfa9531..f0663576 100644 --- a/tests/dsp/dsp_combinational/dsp_combinational.sim.v +++ b/tests/dsp/dsp_combinational/dsp_combinational.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `ifndef DSP_COMB `define DSP_COMB (* whitebox *) diff --git a/tests/dsp/dsp_in_registered/dsp_in_registered.sim.v b/tests/dsp/dsp_in_registered/dsp_in_registered.sim.v index b940e447..aadd62d5 100644 --- a/tests/dsp/dsp_in_registered/dsp_in_registered.sim.v +++ b/tests/dsp/dsp_in_registered/dsp_in_registered.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `include "../../vtr/dff/dff.sim.v" `include "../dsp_combinational/dsp_combinational.sim.v" diff --git a/tests/dsp/dsp_inout_registered/dsp_inout_registered.sim.v b/tests/dsp/dsp_inout_registered/dsp_inout_registered.sim.v index 2417b829..b73bfc39 100644 --- a/tests/dsp/dsp_inout_registered/dsp_inout_registered.sim.v +++ b/tests/dsp/dsp_inout_registered/dsp_inout_registered.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `include "../../vtr/dff/dff.sim.v" `include "../dsp_combinational/dsp_combinational.sim.v" diff --git a/tests/dsp/dsp_inout_registered_dualclk/dsp_inout_registered_dualclk.sim.v b/tests/dsp/dsp_inout_registered_dualclk/dsp_inout_registered_dualclk.sim.v index bb73b321..c9b4b1c6 100644 --- a/tests/dsp/dsp_inout_registered_dualclk/dsp_inout_registered_dualclk.sim.v +++ b/tests/dsp/dsp_inout_registered_dualclk/dsp_inout_registered_dualclk.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `include "../../vtr/dff/dff.sim.v" `include "../dsp_combinational/dsp_combinational.sim.v" diff --git a/tests/dsp/dsp_modes/dsp_modes.sim.v b/tests/dsp/dsp_modes/dsp_modes.sim.v index cd7f69b2..aa5d22b6 100644 --- a/tests/dsp/dsp_modes/dsp_modes.sim.v +++ b/tests/dsp/dsp_modes/dsp_modes.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `include "../dsp_combinational/dsp_combinational.sim.v" `include "../dsp_inout_registered/dsp_inout_registered.sim.v" `include "../dsp_in_registered/dsp_in_registered.sim.v" diff --git a/tests/dsp/dsp_out_registered/dsp_out_registered.sim.v b/tests/dsp/dsp_out_registered/dsp_out_registered.sim.v index c9f7b742..a0e2b328 100644 --- a/tests/dsp/dsp_out_registered/dsp_out_registered.sim.v +++ b/tests/dsp/dsp_out_registered/dsp_out_registered.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `include "../../vtr/dff/dff.sim.v" `include "../dsp_combinational/dsp_combinational.sim.v" diff --git a/tests/dsp/dsp_partial_registered/dsp_partial_registered.sim.v b/tests/dsp/dsp_partial_registered/dsp_partial_registered.sim.v index 3ffc3b76..fb9acaeb 100644 --- a/tests/dsp/dsp_partial_registered/dsp_partial_registered.sim.v +++ b/tests/dsp/dsp_partial_registered/dsp_partial_registered.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `include "../../vtr/dff/dff.sim.v" `include "../dsp_combinational/dsp_combinational.sim.v" diff --git a/tests/internal_conn/child/child.sim.v b/tests/internal_conn/child/child.sim.v index e6aee442..9d783ad5 100644 --- a/tests/internal_conn/child/child.sim.v +++ b/tests/internal_conn/child/child.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + (* blackbox *) module CHILD( input wire I, diff --git a/tests/internal_conn/parent.sim.v b/tests/internal_conn/parent.sim.v index f837c7bc..89378a1c 100644 --- a/tests/internal_conn/parent.sim.v +++ b/tests/internal_conn/parent.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `include "./child/child.sim.v" module PARENT ( diff --git a/tests/io/input/ipad.sim.v b/tests/io/input/ipad.sim.v index 5288d420..efa825b4 100644 --- a/tests/io/input/ipad.sim.v +++ b/tests/io/input/ipad.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + (* CLASS="input" *) module IPAD(inpad); output wire inpad; diff --git a/tests/io/output/opad.sim.v b/tests/io/output/opad.sim.v index 9ce27e11..f236e802 100644 --- a/tests/io/output/opad.sim.v +++ b/tests/io/output/opad.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + (* CLASS="output" *) module OPAD(outpad); input wire outpad; diff --git a/tests/logicbox/logicbox.sim.v b/tests/logicbox/logicbox.sim.v index 6ac2b93f..fac5f1a6 100644 --- a/tests/logicbox/logicbox.sim.v +++ b/tests/logicbox/logicbox.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + (* whitebox *) module LOGICBOX (I, O); input wire I; diff --git a/tests/modes/inv.sim.v b/tests/modes/inv.sim.v index 45fd3df8..e580455f 100644 --- a/tests/modes/inv.sim.v +++ b/tests/modes/inv.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `include "./not/not.sim.v" (* MODES="PASSTHROUGH;INVERT" *) diff --git a/tests/modes/not/not.sim.v b/tests/modes/not/not.sim.v index c4b4d1d4..f7b1adba 100644 --- a/tests/modes/not/not.sim.v +++ b/tests/modes/not/not.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + (* whitebox *) module NOT (I, O); diff --git a/tests/multiple_instance/multiple_instance.sim.v b/tests/multiple_instance/multiple_instance.sim.v index 46536e9e..7a2927d6 100644 --- a/tests/multiple_instance/multiple_instance.sim.v +++ b/tests/multiple_instance/multiple_instance.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `include "../vtr/full-adder/adder.sim.v" module MULTIPLE_INSTANCE (a, b, c, d, cin, cout, sum); localparam DATA_WIDTH = 4; diff --git a/tests/muxes/use_mux.sim.v b/tests/muxes/use_mux.sim.v index 9ba59b06..62a6936f 100644 --- a/tests/muxes/use_mux.sim.v +++ b/tests/muxes/use_mux.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `include "routing/rmux.sim.v" `include "../logicbox/logicbox.sim.v" module USE_MUX (a, b, c, o1, o2); diff --git a/tests/net_attr/child/child.sim.v b/tests/net_attr/child/child.sim.v index e09db94c..d0e1d34f 100644 --- a/tests/net_attr/child/child.sim.v +++ b/tests/net_attr/child/child.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + module CHILD( input wire I, output wire O diff --git a/tests/net_attr/parent.sim.v b/tests/net_attr/parent.sim.v index 599456a6..16b89163 100644 --- a/tests/net_attr/parent.sim.v +++ b/tests/net_attr/parent.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `include "./child/child.sim.v" module PARENT( diff --git a/tests/no_comb/ff.sim.v b/tests/no_comb/ff.sim.v index bddea789..e8876d14 100644 --- a/tests/no_comb/ff.sim.v +++ b/tests/no_comb/ff.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + (* whitebox *) module FF(clk, D, S, R, E, Q); input wire clk; diff --git a/tests/simple_pll/simple_pll.sim.v b/tests/simple_pll/simple_pll.sim.v index 68ae816f..d6d8a7e4 100644 --- a/tests/simple_pll/simple_pll.sim.v +++ b/tests/simple_pll/simple_pll.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + /* Simple model of a PLL which divides the input block by 64 */ module SIMPLE_PLL (in_clock, out_clock); diff --git a/tests/test_v2x.py b/tests/test_v2x.py index 127b9ce4..b7680904 100644 --- a/tests/test_v2x.py +++ b/tests/test_v2x.py @@ -1,5 +1,19 @@ #!/usr/bin/env python3 +# Copyright (C) 2020 The SymbiFlow Authors. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + from pathlib import Path import os from functools import cmp_to_key diff --git a/tests/vtr/dff/dff.sim.v b/tests/vtr/dff/dff.sim.v index 3927929e..2b005772 100644 --- a/tests/vtr/dff/dff.sim.v +++ b/tests/vtr/dff/dff.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + (* whitebox *) module DFF (D, CLK, Q); diff --git a/tests/vtr/full-adder/adder.sim.v b/tests/vtr/full-adder/adder.sim.v index 2088a773..1543d015 100644 --- a/tests/vtr/full-adder/adder.sim.v +++ b/tests/vtr/full-adder/adder.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + (* whitebox *) module ADDER ( a, b, cin, diff --git a/tests/vtr/lutff-pair/ff/ff.sim.v b/tests/vtr/lutff-pair/ff/ff.sim.v index 24905477..691bbed2 100644 --- a/tests/vtr/lutff-pair/ff/ff.sim.v +++ b/tests/vtr/lutff-pair/ff/ff.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + (* whitebox *) module DFF (CLK, D, Q); diff --git a/tests/vtr/lutff-pair/lut/lut4.sim.v b/tests/vtr/lutff-pair/lut/lut4.sim.v index caa640b4..1b78f646 100644 --- a/tests/vtr/lutff-pair/lut/lut4.sim.v +++ b/tests/vtr/lutff-pair/lut/lut4.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + (* whitebox *) module LUT4 (I, O); input wire [3:0] I; diff --git a/tests/vtr/lutff-pair/pair.sim.v b/tests/vtr/lutff-pair/pair.sim.v index 750cf654..264f3667 100644 --- a/tests/vtr/lutff-pair/pair.sim.v +++ b/tests/vtr/lutff-pair/pair.sim.v @@ -1,3 +1,19 @@ +/* + * Copyright (C) 2020 The SymbiFlow Authors. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + `include "lut/lut4.sim.v" `include "ff/ff.sim.v" `include "omux/omux.sim.v" diff --git a/v2x/__main__.py b/v2x/__main__.py index 38ba16d2..e0d82dc1 100644 --- a/v2x/__main__.py +++ b/v2x/__main__.py @@ -1,5 +1,19 @@ #!/usr/bin/env python3 +# Copyright (C) 2020 The SymbiFlow Authors. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + from . import vlog_to_pbtype from . import vlog_to_model import argparse diff --git a/v2x/lib/argparse_extra.py b/v2x/lib/argparse_extra.py index 9be1116e..b078f085 100644 --- a/v2x/lib/argparse_extra.py +++ b/v2x/lib/argparse_extra.py @@ -1,4 +1,19 @@ #!/usr/bin/env python3 + +# Copyright (C) 2020 The SymbiFlow Authors. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + import argparse diff --git a/v2x/lib/asserts.py b/v2x/lib/asserts.py index e341f32f..ec7d5064 100644 --- a/v2x/lib/asserts.py +++ b/v2x/lib/asserts.py @@ -1,4 +1,19 @@ #!/usr/bin/env python3 + +# Copyright (C) 2020 The SymbiFlow Authors. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + def __safe_call(f, a): """Call a function and capture all exceptions.""" try: diff --git a/v2x/lib/mux.py b/v2x/lib/mux.py index 700d02b7..bfd74f88 100644 --- a/v2x/lib/mux.py +++ b/v2x/lib/mux.py @@ -1,4 +1,19 @@ #!/usr/bin/env python3 + +# Copyright (C) 2020 The SymbiFlow Authors. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + import lxml.etree as ET from enum import Enum diff --git a/v2x/mux_gen.py b/v2x/mux_gen.py index f24950fc..7feec0ef 100755 --- a/v2x/mux_gen.py +++ b/v2x/mux_gen.py @@ -1,4 +1,19 @@ #!/usr/bin/env python3 + +# Copyright (C) 2020 The SymbiFlow Authors. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + """ Generate MUX. diff --git a/v2x/vlog_to_model.py b/v2x/vlog_to_model.py index 3477de19..2acec6e6 100755 --- a/v2x/vlog_to_model.py +++ b/v2x/vlog_to_model.py @@ -1,4 +1,19 @@ #!/usr/bin/env python3 + +# Copyright (C) 2020 The SymbiFlow Authors. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + """ Convert a Verilog simulation model to a VPR `model.xml` diff --git a/v2x/vlog_to_pbtype.py b/v2x/vlog_to_pbtype.py index 71469923..5b6827ca 100755 --- a/v2x/vlog_to_pbtype.py +++ b/v2x/vlog_to_pbtype.py @@ -1,4 +1,19 @@ #!/usr/bin/env python3 + +# Copyright (C) 2020 The SymbiFlow Authors. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + """\ Convert a Verilog simulation model to a VPR `pb_type.xml` diff --git a/v2x/xmlinc/xmlinc.py b/v2x/xmlinc/xmlinc.py index b6115347..06b3d83b 100644 --- a/v2x/xmlinc/xmlinc.py +++ b/v2x/xmlinc/xmlinc.py @@ -1,4 +1,19 @@ #!/usr/bin/env python3 + +# Copyright (C) 2020 The SymbiFlow Authors. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + import lxml.etree as ET import os diff --git a/v2x/yosys/json.py b/v2x/yosys/json.py index 93a32da2..30cbd4c9 100755 --- a/v2x/yosys/json.py +++ b/v2x/yosys/json.py @@ -1,4 +1,19 @@ #!/usr/bin/env python3 + +# Copyright (C) 2020 The SymbiFlow Authors. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + """ This is intended to provide a range of helper functions around the output of Yosys' `write_json`. Depending on the tasks, this may need to be flattened diff --git a/v2x/yosys/run.py b/v2x/yosys/run.py index ef2627e5..ef3b11c7 100755 --- a/v2x/yosys/run.py +++ b/v2x/yosys/run.py @@ -1,4 +1,19 @@ #!/usr/bin/env python3 + +# Copyright (C) 2020 The SymbiFlow Authors. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + import json import os import re diff --git a/v2x/yosys/utils.py b/v2x/yosys/utils.py index f6c3597c..2e17f1e6 100644 --- a/v2x/yosys/utils.py +++ b/v2x/yosys/utils.py @@ -1,4 +1,19 @@ #!/usr/bin/env python3 + +# Copyright (C) 2020 The SymbiFlow Authors. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + import re CLOCK_NAME_REGEX = re.compile(r"[a-z_]*clk[a-z0-9]*$")