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CookieboyCPU.cpp
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#include "CookieboyCPU.h"
#include <stdio.h>
#include <assert.h>
#include <Windows.h>
#include "CookieboyMemory.h"
#include "CookieboyInterrupts.h"
#include "CookieboyDividerTimer.h"
#include "CookieboyTIMATimer.h"
#include "CookieboyGPU.h"
#include "CookieboySound.h"
#include "CookieboyJoypad.h"
#include "CookieboySerialIO.h"
#include "CookieboySpeedSwitcher.h"
/*
Passed tests
CPU opcodes - Passed
01-special
02-interrupts - very tricky:
1. My HALT was wrong
2. My interrupts handling routine also was wrong - check GameboyInterrupts.cpp
03-op sp,hl
04-op r,imm
05-op rp
06-ld r,r
07-jr,jp,call,ret,rst
09-op r,r - you need to reset Z in RLCA RLA RRCA RRA to pass
10-bit ops
11-op a,(hl)
CPU timings - Passed
instr_timing - some ops are wrong, some ops depend on branch being taken
Memory timings - Passed
01-read_timing
02-write_timing
03-modify_timing
*/
#define SYNC_WITH_CPU(clockDelta) \
{DWORD adjustedClockDelta = clockDelta; \
if (CGBDoubleSpeed) \
{ \
adjustedClockDelta >>= 1; \
} \
GPU.Step(adjustedClockDelta, MMU); \
DIV.Step(adjustedClockDelta); \
TIMA.Step(adjustedClockDelta, INT); \
Serial.Step(adjustedClockDelta, INT); \
Joypad.Step(INT); \
Sound.Step(adjustedClockDelta);}
//Using this to replace conditionals with bitwise operations. Should be extremly careful using it - assumes operands and calculations are 32-bit
#define EQUALS_ZERO(value) ((~((value) | (~(value) + 1)) >> 31) & 0x1)
#define ARE_EQUAL(A, B) ((~(((A) - (B)) | ((B) - (A))) >> 31) & 0x1)
#define IS_NEGATIVE(value) (((value) >> 31) & 0x1)
#define A_SMALLER_THAN_B(A, B) (IS_NEGATIVE((A) - (B)))
#define IS_CARRY4(value) (((value) >> 4) & 0x1)
#define IS_CARRY8(value) (((value) >> 8) & 0x1)
#define IS_CARRY12(value) (((value) >> 12) & 0x1)
#define IS_CARRY16(value) (((value) >> 16) & 0x1)
//Zero flag (7 bit) - set when the result of a math operation is zero or two values match when using the CP instruction.
#define SET_FLAG_Z(value) (F = ((value) << 7) | (F & 0x7F))
//Substract flag (6 bit) - set if a subtraction was performed in the last math instruction.
#define SET_FLAG_N(value) (F = ((value) << 6) | (F & 0xBF))
//Half carry flag (5 bit) - set if a carry occurred from the lower nibble in the last math operation
#define SET_FLAG_H(value) (F = ((value) << 5) | (F & 0xDF))
//Carry flag (4 bit) - set if a carry occurred from the last math operation or if register A is the smaller value when executing the CP instruction
#define SET_FLAG_C(value) (F = ((value) << 4) | (F & 0xEF))
#define GET_FLAG_Z() ((F >> 7) & 0x1)
#define GET_FLAG_N() ((F >> 6) & 0x1)
#define GET_FLAG_H() ((F >> 5) & 0x1)
#define GET_FLAG_C() ((F >> 4) & 0x1)
#define DELAYED_JUMP(value) \
{PC = (value); \
\
SYNC_WITH_CPU(4);}
#define ADD_N(value) \
{SET_FLAG_Z(EQUALS_ZERO((A + (value)) & 0xFF)); \
SET_FLAG_N(0); \
SET_FLAG_H(IS_CARRY4((A & 0xF) + ((value) & 0xF))); \
SET_FLAG_C(IS_CARRY8(A + (value))); \
\
A += (value);}
#define ADC_N(value) \
{int FlagC = GET_FLAG_C(); \
\
SET_FLAG_Z(EQUALS_ZERO((A + (value) + FlagC) & 0xFF)); \
SET_FLAG_N(0); \
SET_FLAG_H(IS_CARRY4((A & 0xF) + ((value) & 0xF) + FlagC)); \
SET_FLAG_C(IS_CARRY8(A + (value) + FlagC)); \
\
A += (value) + FlagC;}
#define SBC_N(value) \
{int result = A - (value) - GET_FLAG_C(); \
\
SET_FLAG_N(1); \
SET_FLAG_H(A_SMALLER_THAN_B(A & 0xF, ((value) & 0xF) + GET_FLAG_C())); \
SET_FLAG_C(IS_NEGATIVE(result)); \
\
A = result; \
\
SET_FLAG_Z(EQUALS_ZERO(A));}
#define SUB_N(value) \
{SET_FLAG_Z(ARE_EQUAL(A, value)); \
SET_FLAG_N(1); \
SET_FLAG_H(A_SMALLER_THAN_B(A & 0xF, (value) & 0xF)); \
SET_FLAG_C(A_SMALLER_THAN_B(A, value));} \
\
A -= (value);
#define AND_N(value) \
{A &= (value); \
\
SET_FLAG_Z(EQUALS_ZERO(A)); \
SET_FLAG_N(0); \
SET_FLAG_H(1); \
SET_FLAG_C(0);}
#define OR_N(value) \
{A |= (value); \
\
SET_FLAG_Z(EQUALS_ZERO(A)); \
SET_FLAG_N(0); \
SET_FLAG_H(0); \
SET_FLAG_C(0);}
#define XOR_N(value) \
{A ^= (value); \
\
SET_FLAG_Z(EQUALS_ZERO(A)); \
SET_FLAG_N(0); \
SET_FLAG_H(0); \
SET_FLAG_C(0);}
#define CP_N(value) \
{SET_FLAG_Z(ARE_EQUAL(A, value)); \
SET_FLAG_N(1); \
SET_FLAG_H(A_SMALLER_THAN_B(A & 0xF, (value) & 0xF)); \
SET_FLAG_C(A_SMALLER_THAN_B(A, value));}
#define INC_N(value) \
{SET_FLAG_Z(EQUALS_ZERO(((value) + 1) & 0xFF)); \
SET_FLAG_N(0); \
SET_FLAG_H(IS_CARRY4(((value) & 0xF) + 1)); \
\
value++;}
#define DEC_N(value) \
{SET_FLAG_Z(EQUALS_ZERO((value) - 1)); \
SET_FLAG_N(1); \
SET_FLAG_H(IS_NEGATIVE(((value) & 0xF) - 1)); \
\
(value)--;}
#define ADD_HL(value) \
{SET_FLAG_N(0); \
SET_FLAG_H(IS_CARRY12((HL.word & 0xFFF) + ((value) & 0xFFF))); \
SET_FLAG_C(IS_CARRY16(HL.word + (value))); \
\
HL.word += (value); \
\
SYNC_WITH_CPU(4);}
#define INC_NN(value) \
{(value)++; \
\
SYNC_WITH_CPU(4);}
#define DEC_NN(value) \
{(value)--; \
\
SYNC_WITH_CPU(4);}
#define JP_CC_NN(condition) \
{WORD addr = MemoryReadWord(PC);\
PC += 2; \
\
if ((condition)) \
{ \
DELAYED_JUMP(addr); \
}}
#define JR_CC_NN(condition) \
{signed char addr = MemoryRead(PC); \
PC++; \
\
if ((condition)) \
{ \
DELAYED_JUMP(PC + addr); \
}}
#define CALL_CC_NN(condition) \
{WORD addr = MemoryReadWord(PC);\
PC += 2; \
\
if ((condition)) \
{ \
StackPushWord(PC); \
\
PC = addr; \
}}
#define RST_N(addr) \
{StackPushWord(PC); \
\
PC = addr;}
#define RET_CC(condition) \
{SYNC_WITH_CPU(4); \
\
if ((condition)) \
{ \
DELAYED_JUMP(StackPopWord()); \
}}
#define SWAP_N(value) \
{(value) = (((value) & 0xF) << 4) | (((value) & 0xF0) >> 4);\
\
SET_FLAG_Z(EQUALS_ZERO(value)); \
SET_FLAG_N(0); \
SET_FLAG_H(0); \
SET_FLAG_C(0);}
#define RLC_N(value) \
{BYTE MSB = (value) >> 7; \
\
(value) = ((value) << 1) | MSB; \
\
SET_FLAG_Z(EQUALS_ZERO(value)); \
SET_FLAG_H(0); \
SET_FLAG_N(0); \
SET_FLAG_C(MSB);}
#define RL_N(value) \
{BYTE MSB = (value) >> 7; \
\
(value) = ((value) << 1) | GET_FLAG_C();\
\
SET_FLAG_Z(EQUALS_ZERO(value)); \
SET_FLAG_N(0); \
SET_FLAG_H(0); \
SET_FLAG_C(MSB);}
#define RRC_N(value) \
{BYTE LSB = (value) & 0x1; \
\
(value) = ((value) >> 1) | (LSB << 7); \
\
SET_FLAG_Z(EQUALS_ZERO(value)); \
SET_FLAG_H(0); \
SET_FLAG_N(0); \
SET_FLAG_C(LSB);}
#define RR_N(value) \
{BYTE LSB = (value) & 0x1; \
\
(value) = ((value) >> 1) | (GET_FLAG_C() << 7); \
\
SET_FLAG_Z(EQUALS_ZERO(value)); \
SET_FLAG_H(0); \
SET_FLAG_N(0); \
SET_FLAG_C(LSB);}
#define SLA_N(value) \
{BYTE MSB = (value) >> 7; \
\
(value) <<= 1; \
\
SET_FLAG_Z(EQUALS_ZERO(value)); \
SET_FLAG_H(0); \
SET_FLAG_N(0); \
SET_FLAG_C(MSB);}
#define SRA_N(value) \
{BYTE LSB = (value) & 0x1; \
\
(value) = ((value) >> 1) | ((value) & 0x80);\
\
SET_FLAG_Z(EQUALS_ZERO(value)); \
SET_FLAG_H(0); \
SET_FLAG_N(0); \
SET_FLAG_C(LSB);}
#define SRL_N(value) \
{BYTE LSB = (value) & 0x1; \
\
(value) >>= 1; \
\
SET_FLAG_Z(EQUALS_ZERO(value)); \
SET_FLAG_H(0); \
SET_FLAG_N(0); \
SET_FLAG_C(LSB);}
#define BITX_N(BitIndex, value) \
{SET_FLAG_Z(((~(value)) >> (BitIndex)) & 0x1); \
SET_FLAG_N(0); \
SET_FLAG_H(1);}
Cookieboy::CPU::CPU(const bool &_CGB,
bool &_CGBDoubleSpeed,
SpeedSwitcher &speedSwitcher,
Cookieboy::Memory &MMU,
Cookieboy::GPU &GPU,
Cookieboy::DividerTimer &DIV,
Cookieboy::TIMATimer &TIMA,
Cookieboy::Joypad &joypad,
Cookieboy::Sound &sound,
Cookieboy::SerialIO &serial,
Cookieboy::Interrupts &INT):
CGB(_CGB),
CGBDoubleSpeed(_CGBDoubleSpeed),
CGBSpeedSwitcher(speedSwitcher),
MMU(MMU),
GPU(GPU),
DIV(DIV),
TIMA(TIMA),
Joypad(joypad),
Sound(sound),
Serial(serial),
INT(INT)
{
Reset();
}
void Cookieboy::CPU::Reset()
{
if (CGB)
{
A = 0x11;
PC = 0x100;
}
else
{
A = 0;
PC = 0;
}
F = 0;
BC.word = 0;
DE.word = 0;
HL.word = 0;
SP = 0xFFFE;
IME = 0;
Halted = false;
HaltBug = false;
DIDelay = 0;
EIDelay = 0;
}
void Cookieboy::CPU::EmulateBIOS()
{
Reset();
if (CGB)
{
A = 0x11;
}
else
{
A = 0x01;
}
F = 0xB0;
BC.word = 0x0013;
DE.word = 0x00D8;
HL.word = 0x014D;
SP = 0xFFFE;
PC = 0x100;
}
void Cookieboy::CPU::Step()
{
WORD immValueW = 0;
BYTE immValueB = 0;
BYTE opcode = MemoryRead(PC);
PC++;
#ifdef DEBUG_PRINTCPU
static char disassembly[63] = {'\0'};
#endif
//Halt bug occurs when HALT executed while IME=0
//CPU continues to run but instruction after HALT
//is executed twice.
if (!Halted && HaltBug)
{
HaltBug = false;
PC--;
}
//Delaying until next instruction is executed
if (DIDelay > 0)
{
if (DIDelay == 1)
{
IME = 0;
}
DIDelay--;
}
if (EIDelay > 0)
{
if (EIDelay == 1)
{
IME = 1;
}
EIDelay--;
}
switch (opcode)
{
#pragma region LD r, n
case 0x06:
BC.bytes.H = MemoryRead(PC);
PC++;
PRINT_INSTRUCTION(disassembly, "LD B, 0x%X", BC.bytes.H);
break;
case 0x0E:
BC.bytes.L = MemoryRead(PC);
PC++;
PRINT_INSTRUCTION(disassembly, "LD C, 0x%X", BC.bytes.L);
break;
case 0x16:
DE.bytes.H = MemoryRead(PC);
PC++;
PRINT_INSTRUCTION(disassembly, "LD D, 0x%X", DE.bytes.H);
break;
case 0x1E:
DE.bytes.L = MemoryRead(PC);
PC++;
PRINT_INSTRUCTION(disassembly, "LD E, 0x%X", DE.bytes.L);
break;
case 0x26:
HL.bytes.H = MemoryRead(PC);
PC++;
PRINT_INSTRUCTION(disassembly, "LD H, 0x%X", HL.bytes.H);
break;
case 0x2E:
HL.bytes.L = MemoryRead(PC);
PC++;
PRINT_INSTRUCTION(disassembly, "LD L, 0x%X", HL.bytes.L);
break;
#pragma endregion
#pragma region LD r, r
case 0x7F:
A = A;
PRINT_INSTRUCTION(disassembly, "LD A, A");
break;
case 0x78:
A = BC.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD A, B");
break;
case 0x79:
A = BC.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD A, C");
break;
case 0x7A:
A = DE.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD A, D");
break;
case 0x7B:
A = DE.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD A, E");
break;
case 0x7C:
A = HL.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD A, H");
break;
case 0x7D:
A = HL.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD A, L");
break;
case 0x7E:
A = MemoryRead(HL.word);
PRINT_INSTRUCTION(disassembly, "LD A, (HL)");
break;
case 0x40:
BC.bytes.H = BC.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD B, B");
break;
case 0x41:
BC.bytes.H = BC.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD B, C");
break;
case 0x42:
BC.bytes.H = DE.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD B, D");
break;
case 0x43:
BC.bytes.H = DE.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD B, E");
break;
case 0x44:
BC.bytes.H = HL.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD B, H");
break;
case 0x45:
BC.bytes.H = HL.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD B, L");
break;
case 0x46:
BC.bytes.H = MemoryRead(HL.word);
PRINT_INSTRUCTION(disassembly, "LD B, (HL)");
break;
case 0x48:
BC.bytes.L = BC.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD C, B");
break;
case 0x49:
BC.bytes.L = BC.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD C, C");
break;
case 0x4A:
BC.bytes.L = DE.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD C, D");
break;
case 0x4B:
BC.bytes.L = DE.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD C, E");
break;
case 0x4C:
BC.bytes.L = HL.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD C, H");
break;
case 0x4D:
BC.bytes.L = HL.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD C, L");
break;
case 0x4E:
BC.bytes.L = MemoryRead(HL.word);
PRINT_INSTRUCTION(disassembly, "LD C, (HL)");
break;
case 0x50:
DE.bytes.H = BC.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD D, B");
break;
case 0x51:
DE.bytes.H = BC.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD D, C");
break;
case 0x52:
DE.bytes.H = DE.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD D, D");
break;
case 0x53:
DE.bytes.H = DE.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD D, E");
break;
case 0x54:
DE.bytes.H = HL.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD D, H");
break;
case 0x55:
DE.bytes.H = HL.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD D, L");
break;
case 0x56:
DE.bytes.H = MemoryRead(HL.word);
PRINT_INSTRUCTION(disassembly, "LD D, (HL)");
break;
case 0x58:
DE.bytes.L = BC.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD E, B");
break;
case 0x59:
DE.bytes.L = BC.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD E, C");
break;
case 0x5A:
DE.bytes.L = DE.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD E, D");
break;
case 0x5B:
DE.bytes.L = DE.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD E, E");
break;
case 0x5C:
DE.bytes.L = HL.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD E, H");
break;
case 0x5D:
DE.bytes.L = HL.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD E, L");
break;
case 0x5E:
DE.bytes.L = MemoryRead(HL.word);
PRINT_INSTRUCTION(disassembly, "LD E, (HL)");
break;
case 0x60:
HL.bytes.H = BC.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD H, B");
break;
case 0x61:
HL.bytes.H = BC.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD H, C");
break;
case 0x62:
HL.bytes.H = DE.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD H, D");
break;
case 0x63:
HL.bytes.H = DE.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD H, E");
break;
case 0x64:
HL.bytes.H = HL.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD H, H");
break;
case 0x65:
HL.bytes.H = HL.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD H, L");
break;
case 0x66:
HL.bytes.H = MemoryRead(HL.word);
PRINT_INSTRUCTION(disassembly, "LD H, (HL)");
break;
case 0x68:
HL.bytes.L = BC.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD L, B");
break;
case 0x69:
HL.bytes.L = BC.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD L, C");
break;
case 0x6A:
HL.bytes.L = DE.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD L, D");
break;
case 0x6B:
HL.bytes.L = DE.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD L, E");
break;
case 0x6C:
HL.bytes.L = HL.bytes.H;
PRINT_INSTRUCTION(disassembly, "LD L, H");
break;
case 0x6D:
HL.bytes.L = HL.bytes.L;
PRINT_INSTRUCTION(disassembly, "LD L, L");
break;
case 0x6E:
HL.bytes.L = MemoryRead(HL.word);
PRINT_INSTRUCTION(disassembly, "LD L, (HL)");
break;
case 0x70:
MemoryWrite(HL.word, BC.bytes.H);
PRINT_INSTRUCTION(disassembly, "LD (HL), B");
break;
case 0x71:
MemoryWrite(HL.word, BC.bytes.L);
PRINT_INSTRUCTION(disassembly, "LD (HL), C");
break;
case 0x72:
MemoryWrite(HL.word, DE.bytes.H);
PRINT_INSTRUCTION(disassembly, "LD (HL), D");
break;
case 0x73:
MemoryWrite(HL.word, DE.bytes.L);
PRINT_INSTRUCTION(disassembly, "LD (HL), E");
break;
case 0x74:
MemoryWrite(HL.word, HL.bytes.H);
PRINT_INSTRUCTION(disassembly, "LD (HL), H");
break;
case 0x75:
MemoryWrite(HL.word, HL.bytes.L);
PRINT_INSTRUCTION(disassembly, "LD (HL), L");
break;
case 0x36:
immValueB = MemoryRead(PC);
PC++;
MemoryWrite(HL.word, immValueB);
PRINT_INSTRUCTION(disassembly, "LD (HL), 0x%X", immValueB);
break;
#pragma endregion
#pragma region LD A, n
case 0x0A:
A = MemoryRead(BC.word);
PRINT_INSTRUCTION(disassembly, "LD A, (BC)");
break;
case 0x1A:
A = MemoryRead(DE.word);
PRINT_INSTRUCTION(disassembly, "LD A, (DE)");
break;
case 0xFA:
immValueW = MemoryReadWord(PC);
PC += 2;
A = MemoryRead(immValueW);
PRINT_INSTRUCTION(disassembly, "LD A, (0x%X)", immValueW);
break;
case 0x3E:
A = MemoryRead(PC);
PC++;
PRINT_INSTRUCTION(disassembly, "LD A, 0x%X", A);
break;
#pragma endregion
#pragma region LD n, A
case 0x47:
BC.bytes.H = A;
PRINT_INSTRUCTION(disassembly, "LD B, A");
break;
case 0x4F:
BC.bytes.L = A;
PRINT_INSTRUCTION(disassembly, "LD C, A");
break;
case 0x57:
DE.bytes.H = A;
PRINT_INSTRUCTION(disassembly, "LD D, A");
break;
case 0x5F:
DE.bytes.L = A;
PRINT_INSTRUCTION(disassembly, "LD E, A");
break;
case 0x67:
HL.bytes.H = A;
PRINT_INSTRUCTION(disassembly, "LD H, A");
break;
case 0x6F:
HL.bytes.L = A;
PRINT_INSTRUCTION(disassembly, "LD L, A");
break;
case 0x02:
MemoryWrite(BC.word, A);
PRINT_INSTRUCTION(disassembly, "LD (BC), A");
break;
case 0x12:
MemoryWrite(DE.word, A);
PRINT_INSTRUCTION(disassembly, "LD (DE), A");
break;
case 0x77:
MemoryWrite(HL.word, A);
PRINT_INSTRUCTION(disassembly, "LD (HL), A");
break;
case 0xEA:
immValueW = MemoryReadWord(PC);
PC += 2;
MemoryWrite(immValueW, A);
PRINT_INSTRUCTION(disassembly, "LD (0x%X), A", immValueW);
break;
#pragma endregion
#pragma region LD A, (C)
case 0xF2:
A = MemoryRead(0xFF00 + BC.bytes.L);
PRINT_INSTRUCTION(disassembly, "LD A, (0xFF00 + C)");
break;
#pragma endregion
#pragma region LD (C), A
case 0xE2:
MemoryWrite(0xFF00 + BC.bytes.L, A);
PRINT_INSTRUCTION(disassembly, "LD (0xFF00 + C), A");
break;
#pragma endregion
#pragma region LDD A, (HL)
case 0x3A:
A = MemoryRead(HL.word);
HL.word--;
PRINT_INSTRUCTION(disassembly, "LDD A, (HL)");
break;
#pragma endregion
#pragma region LDD (HL), A
case 0x32:
MemoryWrite(HL.word, A);
HL.word--;
PRINT_INSTRUCTION(disassembly, "LDD (HL), A");
break;
#pragma endregion
#pragma region LDI A, (HL)
case 0x2A:
A = MemoryRead(HL.word);
HL.word++;
PRINT_INSTRUCTION(disassembly, "LDI A, (HL)");
break;
#pragma endregion
#pragma region LDI (HL), A
case 0x22:
MemoryWrite(HL.word, A);
HL.word++;
PRINT_INSTRUCTION(disassembly, "LDI (HL), A");
break;
#pragma endregion
#pragma region LDH (n), A
case 0xE0:
immValueB = MemoryRead(PC);
PC++;
MemoryWrite(0xFF00 + immValueB, A);
PRINT_INSTRUCTION(disassembly, "LDH (0xFF00 + 0x%X), A", immValueB);
break;
#pragma endregion
#pragma region LDH A, (n)
case 0xF0:
immValueB = MemoryRead(PC);
PC++;
A = MemoryRead(0xFF00 + immValueB);
PRINT_INSTRUCTION(disassembly, "LDH A, (0xFF00 + 0x%X)", immValueB);
break;
#pragma endregion
#pragma region LD n, nn
case 0x01:
BC.word = MemoryReadWord(PC);
PC += 2;
PRINT_INSTRUCTION(disassembly, "LD BC, 0x%X", BC.word);
break;
case 0x11:
DE.word = MemoryReadWord(PC);
PC += 2;
PRINT_INSTRUCTION(disassembly, "LD DE, 0x%X", DE.word);
break;
case 0x21:
HL.word = MemoryReadWord(PC);
PC += 2;
PRINT_INSTRUCTION(disassembly, "LD HL, 0x%X", HL.word);
break;
case 0x31:
SP = MemoryReadWord(PC);
PC += 2;
PRINT_INSTRUCTION(disassembly, "LD SP, 0x%X", SP);
break;
#pragma endregion
#pragma region LD SP, HL
case 0xF9:
SP = HL.word;
SYNC_WITH_CPU(4);
PRINT_INSTRUCTION(disassembly, "LD SP, HL");
break;
#pragma endregion
#pragma region LDHL SP, n
case 0xF8:
immValueB = MemoryRead(PC);
PC++;
immValueW = SP + (signed char)immValueB;
SET_FLAG_Z(0);
SET_FLAG_N(0);
SET_FLAG_C((immValueW & 0xFF) < (SP & 0xFF));
SET_FLAG_H((immValueW & 0xF) < (SP & 0xF));
HL.word = immValueW;
SYNC_WITH_CPU(4);
PRINT_INSTRUCTION(disassembly, "LDHL SP, 0x%X", immValueB);
break;
#pragma endregion
#pragma region LD (nn), SP
case 0x08:
immValueW = MemoryReadWord(PC);
PC += 2;
MemoryWriteWord(immValueW, SP);
PRINT_INSTRUCTION(disassembly, "LD (0x%X), SP", immValueW);
break;
#pragma endregion
#pragma region PUSH nn
case 0xF5:
StackPushByte(A);
StackPushByte(F);
SYNC_WITH_CPU(4);
PRINT_INSTRUCTION(disassembly, "PUSH AF");
break;
case 0xC5:
StackPushWord(BC.word);
PRINT_INSTRUCTION(disassembly, "PUSH BC");
break;
case 0xD5:
StackPushWord(DE.word);
PRINT_INSTRUCTION(disassembly, "PUSH DE");
break;
case 0xE5:
StackPushWord(HL.word);
PRINT_INSTRUCTION(disassembly, "PUSH HL");
break;
#pragma endregion
#pragma region POP nn
case 0xF1:
F = StackPopByte();
A = StackPopByte();
//Required to pass some CPU ops tests
F &= 0xF0;
PRINT_INSTRUCTION(disassembly, "POP AF");
break;
case 0xC1:
BC.word = StackPopWord();
PRINT_INSTRUCTION(disassembly, "POP BC");