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This is a VHDL register file generator.

Given a JSON input file containing a register dscritption, it can generate:

  • A VHDL source file
  • Markdown documentation
  • Basic Linux C drivers
  • Basic no-os C drivers

Right now this project is in a very unfinished state. There are still tons of features / improvements left to make if I ever find the time. For now, this works "well enough" to get a project up and running, but it still leaves a lot to be desired. Mainly, I just did this as a toy project to start learning Rust.