PMI arm diffs issue

[BruceForstall]

I saw this a few times in some arm altjit frameworks PMI diffs:

Base:

            movw    r3, 0xd1ff
            movt    r3, 0xd1ff
            blx     r3                   // System.Threading.Tasks.Dataflow.BatchBlock`1[__Canon][System.__Canon]:get_DebuggerDisplayContent():ref:this

diff:

            mov     r3, 0x3d8000
            blx     r3                   // System.Threading.Tasks.Dataflow.BatchBlock`1[__Canon][System.__Canon]:get_DebuggerDisplayContent():ref:this

I presume what’s happening is the addresses are different between base and diff, and we’re getting lucky to be able to encode a constant with one of arm’s wacky constant encodings. I don’t remember ever seeing this with ngen-base altjit asm diffs – presumably because the addresses always required relocs, so we always forced movw/movt encoding. This could be kind of annoying; we might have to thing about how to make this stable.

(This points out an advantage for SuperPMI diffs, where the addresses are guaranteed to be identical.)

[BruceForstall]

One way to fix this would be to change emitter::isModImmConst to always return "false" when COMPlus_JitDiffableDasm=1. We currently never change code generation for diffable; we only elide the constant outputs. It seems like it would be ok in this case to avoid "random" diff failures.

Comments, @briansull @AndyAyersMS @dotnet/jit-contrib @dotnet/arm32-contrib ?

[AndyAyersMS]

I'd prefer not to change how the jit behaves just for diffing, but I don't have any better ideas.