diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp
index caecf46569f20..57869771d58b4 100644
--- a/src/coreclr/jit/codegenarm64.cpp
+++ b/src/coreclr/jit/codegenarm64.cpp
@@ -4864,12 +4864,11 @@ void CodeGen::genCodeForJumpCompare(GenTreeOpCC* tree)
 
     if (tree->OperIs(GT_JTEST))
     {
-        ssize_t compareImm = op2->AsIntCon()->IconValue();
-
-        assert(isPow2(((size_t)compareImm)));
+        uint64_t compareImm = op2->AsIntCon()->IntegralValueUnsigned();
+        assert(isPow2(compareImm));
 
         instruction ins = (cc.GetCode() == GenCondition::EQ) ? INS_tbz : INS_tbnz;
-        int         imm = genLog2((size_t)compareImm);
+        int         imm = genLog2(compareImm);
 
         GetEmitter()->emitIns_J_R_I(ins, attr, compiler->compCurBB->GetJumpDest(), reg, imm);
     }
diff --git a/src/coreclr/jit/gentree.cpp b/src/coreclr/jit/gentree.cpp
index 4843a3f1bc3ce..e1e0932df474c 100644
--- a/src/coreclr/jit/gentree.cpp
+++ b/src/coreclr/jit/gentree.cpp
@@ -5122,7 +5122,7 @@ unsigned Compiler::gtSetEvalOrder(GenTree* tree)
             {
                 GenTreeIntCon* con            = tree->AsIntCon();
                 bool           iconNeedsReloc = con->ImmedValNeedsReloc(this);
-                INT64          imm            = con->LngValue();
+                INT64          imm            = con->IntegralValue();
                 emitAttr       size           = EA_SIZE(emitActualTypeSize(tree));
 
                 if (iconNeedsReloc)
diff --git a/src/coreclr/jit/gentree.h b/src/coreclr/jit/gentree.h
index e84eeddc48492..7275ba94272cc 100644
--- a/src/coreclr/jit/gentree.h
+++ b/src/coreclr/jit/gentree.h
@@ -3120,6 +3120,22 @@ struct GenTreeIntCon : public GenTree
         m_value = value;
     }
 
+    uint64_t IntegralValueUnsigned() const
+    {
+        return Is32BitConst() ? static_cast<uint32_t>(m_value) : m_value;
+    }
+
+    void SetIntegralValueUnsigned(uint64_t value)
+    {
+        if (Is32BitConst())
+        {
+            assert(FitsIn<uint32_t>(value));
+            value = static_cast<int32_t>(value);
+        }
+
+        m_value = value;
+    }
+
     //------------------------------------------------------------------------
     // SetValueTruncating: Set the value, truncating to TYP_INT if necessary.
     //
@@ -3148,14 +3164,12 @@ struct GenTreeIntCon : public GenTree
         static_assert_no_msg(
             (std::is_same<T, int32_t>::value || std::is_same<T, int64_t>::value || std::is_same<T, ssize_t>::value));
 
-        if (TypeIs(TYP_LONG))
+        if (Is32BitConst())
         {
-            SetLngValue(value);
-        }
-        else
-        {
-            SetIconValue(static_cast<int32_t>(value));
+            value = static_cast<int32_t>(value);
         }
+
+        SetIntegralValue(value);
     }
 
     int LoVal() const
@@ -3178,6 +3192,16 @@ struct GenTreeIntCon : public GenTree
     bool FitsInAddrBase(Compiler* comp);
     bool AddrNeedsReloc(Compiler* comp);
 #endif
+
+private:
+    bool Is32BitConst() const
+    {
+#ifdef TARGET_64BIT
+        return TypeIs(TYP_INT);
+#else
+        return !TypeIs(TYP_LONG);
+#endif
+    }
 };
 
 // node representing a read from a physical register
diff --git a/src/coreclr/jit/lower.cpp b/src/coreclr/jit/lower.cpp
index 93e6c12ba2b9f..a34ff979e1b7e 100644
--- a/src/coreclr/jit/lower.cpp
+++ b/src/coreclr/jit/lower.cpp
@@ -3832,8 +3832,7 @@ GenTree* Lowering::LowerJTrue(GenTreeOp* jtrue)
             newOper = GT_JTEST;
             cc      = cond->OperIs(GT_LT) ? GenCondition(GenCondition::NE) : GenCondition(GenCondition::EQ);
             // x < 0 => (x & signBit) != 0. Update the constant to be the sign bit.
-            relopOp2->AsIntCon()->SetIntegralValue(
-                (static_cast<INT64>(1) << (8 * genTypeSize(genActualType(relopOp1)) - 1)));
+            relopOp2->AsIntCon()->SetIntegralValueUnsigned(1ULL << (8 * genTypeSize(genActualType(relopOp1)) - 1));
         }
         else if (cond->OperIs(GT_TEST_EQ, GT_TEST_NE) && isPow2(relopOp2->AsIntCon()->IconValue()))
         {