; Assembly listing for method IntrinsicDev.ToVector128Test:ToVector128_byte(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector128`1[Byte] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 1, 1 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V01 OutArgs [V01 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; ; Lcl frame size = 16 G_M10119_IG01: A9BE7BFD stp fp, lr, [sp,#-32]! 910003FD mov fp, sp FD000FA0 str d0, [fp,#24] ;; bbWeight=1 PerfScore 2.50 G_M10119_IG02: FD400FB0 ldr d16, [fp,#24] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 2.50 G_M10119_IG03: A8C27BFD ldp fp, lr, [sp],#32 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 28, prolog size 8, PerfScore 9.80, (MethodHash=f2f5d878) for method IntrinsicDev.ToVector128Test:ToVector128_byte(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector128`1[Byte] ; ============================================================ <10, 10, 10, 10, 10, 10, 10, 10, 0, 0, 0, 0, 0, 0, 0, 0> ; Assembly listing for method IntrinsicDev.ToVector128Test:ToVector128_sbyte(System.Runtime.Intrinsics.Vector64`1[SByte]):System.Runtime.Intrinsics.Vector128`1[SByte] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 1, 1 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V01 OutArgs [V01 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; ; Lcl frame size = 16 G_M45844_IG01: A9BE7BFD stp fp, lr, [sp,#-32]! 910003FD mov fp, sp FD000FA0 str d0, [fp,#24] ;; bbWeight=1 PerfScore 2.50 G_M45844_IG02: FD400FB0 ldr d16, [fp,#24] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 2.50 G_M45844_IG03: A8C27BFD ldp fp, lr, [sp],#32 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 28, prolog size 8, PerfScore 9.80, (MethodHash=d04e4ceb) for method IntrinsicDev.ToVector128Test:ToVector128_sbyte(System.Runtime.Intrinsics.Vector64`1[SByte]):System.Runtime.Intrinsics.Vector128`1[SByte] ; ============================================================ <10, 10, 10, 10, 10, 10, 10, 10, 0, 0, 0, 0, 0, 0, 0, 0> ; Assembly listing for method IntrinsicDev.ToVector128Test:ToVector128_short(System.Runtime.Intrinsics.Vector64`1[Int16]):System.Runtime.Intrinsics.Vector128`1[Int16] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 1, 1 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V01 OutArgs [V01 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; ; Lcl frame size = 16 G_M54495_IG01: A9BE7BFD stp fp, lr, [sp,#-32]! 910003FD mov fp, sp FD000FA0 str d0, [fp,#24] ;; bbWeight=1 PerfScore 2.50 G_M54495_IG02: FD400FB0 ldr d16, [fp,#24] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 2.50 G_M54495_IG03: A8C27BFD ldp fp, lr, [sp],#32 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 28, prolog size 8, PerfScore 9.80, (MethodHash=e64a2b20) for method IntrinsicDev.ToVector128Test:ToVector128_short(System.Runtime.Intrinsics.Vector64`1[Int16]):System.Runtime.Intrinsics.Vector128`1[Int16] ; ============================================================ <10, 10, 10, 10, 0, 0, 0, 0> ; Assembly listing for method IntrinsicDev.ToVector128Test:ToVector128_ushort(System.Runtime.Intrinsics.Vector64`1[UInt16]):System.Runtime.Intrinsics.Vector128`1[UInt16] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 1, 1 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V01 OutArgs [V01 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; ; Lcl frame size = 16 G_M53578_IG01: A9BE7BFD stp fp, lr, [sp,#-32]! 910003FD mov fp, sp FD000FA0 str d0, [fp,#24] ;; bbWeight=1 PerfScore 2.50 G_M53578_IG02: FD400FB0 ldr d16, [fp,#24] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 2.50 G_M53578_IG03: A8C27BFD ldp fp, lr, [sp],#32 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 28, prolog size 8, PerfScore 9.80, (MethodHash=288f2eb5) for method IntrinsicDev.ToVector128Test:ToVector128_ushort(System.Runtime.Intrinsics.Vector64`1[UInt16]):System.Runtime.Intrinsics.Vector128`1[UInt16] ; ============================================================ <10, 10, 10, 10, 0, 0, 0, 0> ; Assembly listing for method IntrinsicDev.ToVector128Test:ToVector128_int(System.Runtime.Intrinsics.Vector64`1[Int32]):System.Runtime.Intrinsics.Vector128`1[Int32] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 1, 1 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V01 OutArgs [V01 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; ; Lcl frame size = 16 G_M13406_IG01: A9BE7BFD stp fp, lr, [sp,#-32]! 910003FD mov fp, sp FD000FA0 str d0, [fp,#24] ;; bbWeight=1 PerfScore 2.50 G_M13406_IG02: FD400FB0 ldr d16, [fp,#24] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 2.50 G_M13406_IG03: A8C27BFD ldp fp, lr, [sp],#32 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 28, prolog size 8, PerfScore 9.80, (MethodHash=390acba1) for method IntrinsicDev.ToVector128Test:ToVector128_int(System.Runtime.Intrinsics.Vector64`1[Int32]):System.Runtime.Intrinsics.Vector128`1[Int32] ; ============================================================ <10, 10, 0, 0> ; Assembly listing for method IntrinsicDev.ToVector128Test:ToVector128_uint(System.Runtime.Intrinsics.Vector64`1[UInt32]):System.Runtime.Intrinsics.Vector128`1[UInt32] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 1, 1 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V01 OutArgs [V01 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; ; Lcl frame size = 16 G_M4747_IG01: A9BE7BFD stp fp, lr, [sp,#-32]! 910003FD mov fp, sp FD000FA0 str d0, [fp,#24] ;; bbWeight=1 PerfScore 2.50 G_M4747_IG02: FD400FB0 ldr d16, [fp,#24] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 2.50 G_M4747_IG03: A8C27BFD ldp fp, lr, [sp],#32 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 28, prolog size 8, PerfScore 9.80, (MethodHash=b231ed74) for method IntrinsicDev.ToVector128Test:ToVector128_uint(System.Runtime.Intrinsics.Vector64`1[UInt32]):System.Runtime.Intrinsics.Vector128`1[UInt32] ; ============================================================ <10, 10, 0, 0> ; Assembly listing for method IntrinsicDev.ToVector128Test:ToVector128_long(System.Runtime.Intrinsics.Vector64`1[Int64]):System.Runtime.Intrinsics.Vector128`1[Int64] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 1, 1 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V01 OutArgs [V01 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; ; Lcl frame size = 16 G_M31655_IG01: A9BE7BFD stp fp, lr, [sp,#-32]! 910003FD mov fp, sp FD000FA0 str d0, [fp,#24] ;; bbWeight=1 PerfScore 2.50 G_M31655_IG02: FD400FB0 ldr d16, [fp,#24] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 2.50 G_M31655_IG03: A8C27BFD ldp fp, lr, [sp],#32 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 28, prolog size 8, PerfScore 9.80, (MethodHash=f4a98458) for method IntrinsicDev.ToVector128Test:ToVector128_long(System.Runtime.Intrinsics.Vector64`1[Int64]):System.Runtime.Intrinsics.Vector128`1[Int64] ; ============================================================ <10, 0> ; Assembly listing for method IntrinsicDev.ToVector128Test:ToVector128_ulong(System.Runtime.Intrinsics.Vector64`1[UInt64]):System.Runtime.Intrinsics.Vector128`1[UInt64] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 1, 1 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V01 OutArgs [V01 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; ; Lcl frame size = 16 G_M27762_IG01: A9BE7BFD stp fp, lr, [sp,#-32]! 910003FD mov fp, sp FD000FA0 str d0, [fp,#24] ;; bbWeight=1 PerfScore 2.50 G_M27762_IG02: FD400FB0 ldr d16, [fp,#24] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 2.50 G_M27762_IG03: A8C27BFD ldp fp, lr, [sp],#32 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 28, prolog size 8, PerfScore 9.80, (MethodHash=3216938d) for method IntrinsicDev.ToVector128Test:ToVector128_ulong(System.Runtime.Intrinsics.Vector64`1[UInt64]):System.Runtime.Intrinsics.Vector128`1[UInt64] ; ============================================================ <10, 0> ; Assembly listing for method IntrinsicDev.ToVector128Test:ToVector128_float(System.Runtime.Intrinsics.Vector64`1[Single]):System.Runtime.Intrinsics.Vector128`1[Single] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 1, 1 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V01 OutArgs [V01 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; ; Lcl frame size = 16 G_M12509_IG01: A9BE7BFD stp fp, lr, [sp,#-32]! 910003FD mov fp, sp FD000FA0 str d0, [fp,#24] ;; bbWeight=1 PerfScore 2.50 G_M12509_IG02: FD400FB0 ldr d16, [fp,#24] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 2.50 G_M12509_IG03: A8C27BFD ldp fp, lr, [sp],#32 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 28, prolog size 8, PerfScore 9.80, (MethodHash=c39fcf22) for method IntrinsicDev.ToVector128Test:ToVector128_float(System.Runtime.Intrinsics.Vector64`1[Single]):System.Runtime.Intrinsics.Vector128`1[Single] ; ============================================================ <10.1, 10.1, 0, 0> ; Assembly listing for method IntrinsicDev.ToVector128Test:ToVector128_double(System.Runtime.Intrinsics.Vector64`1[Double]):System.Runtime.Intrinsics.Vector128`1[Double] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 1, 1 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V01 OutArgs [V01 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; ; Lcl frame size = 16 G_M25624_IG01: A9BE7BFD stp fp, lr, [sp,#-32]! 910003FD mov fp, sp FD000FA0 str d0, [fp,#24] ;; bbWeight=1 PerfScore 2.50 G_M25624_IG02: FD400FB0 ldr d16, [fp,#24] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 2.50 G_M25624_IG03: A8C27BFD ldp fp, lr, [sp],#32 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 28, prolog size 8, PerfScore 9.80, (MethodHash=f0539be7) for method IntrinsicDev.ToVector128Test:ToVector128_double(System.Runtime.Intrinsics.Vector64`1[Double]):System.Runtime.Intrinsics.Vector128`1[Double] ; ============================================================ <10.1, 0>