Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

arm64 JitStressRegs8 VectorTableLookup test failures #84746

Closed
BruceForstall opened this issue Apr 13, 2023 · 4 comments
Closed

arm64 JitStressRegs8 VectorTableLookup test failures #84746

BruceForstall opened this issue Apr 13, 2023 · 4 comments
Assignees
Labels
arch-arm64 area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI blocking-clean-ci-optional Blocking optional rolling runs JitStress CLR JIT issues involving JIT internal stress modes
Milestone

Comments

@BruceForstall
Copy link
Member

arm64, JitStressRegs=8 failures

https://dev.azure.com/dnceng-public/public/_build/results?buildId=235834&view=ms.vss-test-web.build-test-results-tab&runId=4502818&resultId=115730&paneView=dotnet-dnceng.dnceng-build-release-tasks.helix-test-information-tab

Beginning scenario: RunBasicScenario_UnsafeRead
Arm64.VectorTableLookup<Byte>((Vector128<Byte>, Vector128<Byte>, Vector128<Byte>), Vector128<Byte>): RunBasicScenario_UnsafeRead failed:
 firstOp: (237, 32, 196, 156, 48, 210, 184, 99, 214, 69, 225, 33, 247, 164, 185, 195)
 secondOp: (56, 91, 176, 252, 195, 64, 124, 232, 48, 3, 22, 171, 53, 129, 192, 251)
 thirdOp: (228, 226, 82, 37, 54, 252, 138, 120, 193, 226, 101, 56, 92, 176, 91, 248)
 indices: (45, 32, 54, 57, 33, 35, 22, 20, 49, 3, 4, 39, 12, 21, 54, 44)
 result: (176, 228, 0, 0, 226, 37, 124, 195, 0, 56, 92, 120, 0, 64, 0, 92)
08:37:19.807 Failed test: _AdvSimd_Arm64_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.VectorLookup_3_Byte()

08:37:19.808 Running test: _AdvSimd_Arm64_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.VectorLookup_3_SByte()
Beginning scenario: RunBasicScenario_UnsafeRead
Arm64.VectorTableLookup<SByte>((Vector128<SByte>, Vector128<SByte>, Vector128<SByte>), Vector128<SByte>): RunBasicScenario_UnsafeRead failed:
 firstOp: (50, 58, 92, 65, 78, 72, 98, 86, 8, 4, 18, 11, 121, 51, 97, 70)
 secondOp: (8, 101, 93, 14, 49, 20, 59, 80, 112, 12, 97, 29, 80, 104, 14, 42)
 thirdOp: (81, 70, 5, 40, 116, 46, 36, 14, 40, 63, 89, 42, 83, 26, 94, 62)
 indices: (3, 41, 58, 41, 0, 9, 39, 39, 47, 6, 22, 5, 34, 33, 49, 18)
 result: (42, 63, 0, 63, 40, 0, 14, 14, 62, 94, 59, 26, 5, 70, 0, 93)

Beginning scenario: RunReflectionScenario_UnsafeRead
Beginning scenario: RunClsVarScenario
Beginning scenario: RunLclVarScenario_UnsafeRead
Beginning scenario: RunClassLclFldScenario
Beginning scenario: RunClassFldScenario
Beginning scenario: RunStructLclFldScenario
Beginning scenario: RunStructFldScenario
08:37:19.897 Failed test: _AdvSimd_Arm64_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.VectorLookup_3_SByte()

08:39:40.443 Running test: _AdvSimd_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Program.VectorLookup_3_SByte()
Beginning scenario: RunBasicScenario_UnsafeRead
AdvSimd.VectorTableLookup<SByte>((Vector128<SByte>, Vector128<SByte>, Vector128<SByte>), Vector64<SByte>): RunBasicScenario_UnsafeRead failed:
 firstOp: (45, 94, 31, 32, 36, 68, 24, 14, 19, 37, 88, 40, 9, 50, 72, 123)
 secondOp: (36, 36, 125, 118, 88, 25, 110, 120, 0, 90, 60, 75, 23, 69, 14, 55)
 thirdOp: (115, 23, 104, 44, 42, 30, 20, 107, 25, 70, 38, 15, 32, 110, 7, 111)
 indices: (4, 20, 55, 4, 32, 28, 58, 2)
 result: (32, 88, 0, 32, 115, 23, 0, 38)

Beginning scenario: RunReflectionScenario_UnsafeRead
Beginning scenario: RunClsVarScenario
Beginning scenario: RunLclVarScenario_UnsafeRead
Beginning scenario: RunClassLclFldScenario
Beginning scenario: RunClassFldScenario
Beginning scenario: RunStructLclFldScenario
Beginning scenario: RunStructFldScenario
08:39:40.539 Failed test: _AdvSimd_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Program.VectorLookup_3_SByte()

Looks like Linux/Mac have one additional failure.

@BruceForstall BruceForstall added arch-arm64 JitStress CLR JIT issues involving JIT internal stress modes area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI labels Apr 13, 2023
@BruceForstall BruceForstall added this to the 8.0.0 milestone Apr 13, 2023
@ghost
Copy link

ghost commented Apr 13, 2023

Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch, @kunalspathak
See info in area-owners.md if you want to be subscribed.

Issue Details

arm64, JitStressRegs=8 failures

https://dev.azure.com/dnceng-public/public/_build/results?buildId=235834&view=ms.vss-test-web.build-test-results-tab&runId=4502818&resultId=115730&paneView=dotnet-dnceng.dnceng-build-release-tasks.helix-test-information-tab

Beginning scenario: RunBasicScenario_UnsafeRead
Arm64.VectorTableLookup<Byte>((Vector128<Byte>, Vector128<Byte>, Vector128<Byte>), Vector128<Byte>): RunBasicScenario_UnsafeRead failed:
 firstOp: (237, 32, 196, 156, 48, 210, 184, 99, 214, 69, 225, 33, 247, 164, 185, 195)
 secondOp: (56, 91, 176, 252, 195, 64, 124, 232, 48, 3, 22, 171, 53, 129, 192, 251)
 thirdOp: (228, 226, 82, 37, 54, 252, 138, 120, 193, 226, 101, 56, 92, 176, 91, 248)
 indices: (45, 32, 54, 57, 33, 35, 22, 20, 49, 3, 4, 39, 12, 21, 54, 44)
 result: (176, 228, 0, 0, 226, 37, 124, 195, 0, 56, 92, 120, 0, 64, 0, 92)
08:37:19.807 Failed test: _AdvSimd_Arm64_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.VectorLookup_3_Byte()

08:37:19.808 Running test: _AdvSimd_Arm64_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.VectorLookup_3_SByte()
Beginning scenario: RunBasicScenario_UnsafeRead
Arm64.VectorTableLookup<SByte>((Vector128<SByte>, Vector128<SByte>, Vector128<SByte>), Vector128<SByte>): RunBasicScenario_UnsafeRead failed:
 firstOp: (50, 58, 92, 65, 78, 72, 98, 86, 8, 4, 18, 11, 121, 51, 97, 70)
 secondOp: (8, 101, 93, 14, 49, 20, 59, 80, 112, 12, 97, 29, 80, 104, 14, 42)
 thirdOp: (81, 70, 5, 40, 116, 46, 36, 14, 40, 63, 89, 42, 83, 26, 94, 62)
 indices: (3, 41, 58, 41, 0, 9, 39, 39, 47, 6, 22, 5, 34, 33, 49, 18)
 result: (42, 63, 0, 63, 40, 0, 14, 14, 62, 94, 59, 26, 5, 70, 0, 93)

Beginning scenario: RunReflectionScenario_UnsafeRead
Beginning scenario: RunClsVarScenario
Beginning scenario: RunLclVarScenario_UnsafeRead
Beginning scenario: RunClassLclFldScenario
Beginning scenario: RunClassFldScenario
Beginning scenario: RunStructLclFldScenario
Beginning scenario: RunStructFldScenario
08:37:19.897 Failed test: _AdvSimd_Arm64_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Arm64.Program.VectorLookup_3_SByte()

08:39:40.443 Running test: _AdvSimd_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Program.VectorLookup_3_SByte()
Beginning scenario: RunBasicScenario_UnsafeRead
AdvSimd.VectorTableLookup<SByte>((Vector128<SByte>, Vector128<SByte>, Vector128<SByte>), Vector64<SByte>): RunBasicScenario_UnsafeRead failed:
 firstOp: (45, 94, 31, 32, 36, 68, 24, 14, 19, 37, 88, 40, 9, 50, 72, 123)
 secondOp: (36, 36, 125, 118, 88, 25, 110, 120, 0, 90, 60, 75, 23, 69, 14, 55)
 thirdOp: (115, 23, 104, 44, 42, 30, 20, 107, 25, 70, 38, 15, 32, 110, 7, 111)
 indices: (4, 20, 55, 4, 32, 28, 58, 2)
 result: (32, 88, 0, 32, 115, 23, 0, 38)

Beginning scenario: RunReflectionScenario_UnsafeRead
Beginning scenario: RunClsVarScenario
Beginning scenario: RunLclVarScenario_UnsafeRead
Beginning scenario: RunClassLclFldScenario
Beginning scenario: RunClassFldScenario
Beginning scenario: RunStructLclFldScenario
Beginning scenario: RunStructFldScenario
08:39:40.539 Failed test: _AdvSimd_ro::JIT.HardwareIntrinsics.Arm._AdvSimd.Program.VectorLookup_3_SByte()

Looks like Linux/Mac have one additional failure.

Author: BruceForstall
Assignees: kunalspathak
Labels:

arch-arm64, JitStress, area-CodeGen-coreclr

Milestone: 8.0.0

@BruceForstall
Copy link
Member Author

@BruceForstall BruceForstall added the blocking-clean-ci-optional Blocking optional rolling runs label Apr 13, 2023
@kunalspathak
Copy link
Member

This is duplicate of #84696 but will keep it open because this one also has JitStressRegs involved.

@kunalspathak
Copy link
Member

Fixed by #84824

@ghost ghost locked as resolved and limited conversation to collaborators May 20, 2023
Sign up for free to subscribe to this conversation on GitHub. Already have an account? Sign in.
Labels
arch-arm64 area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI blocking-clean-ci-optional Blocking optional rolling runs JitStress CLR JIT issues involving JIT internal stress modes
Projects
None yet
Development

No branches or pull requests

2 participants