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ARM64-SVE: Add FloatingPointExponentialAccelerator
#104649
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Note regarding the
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Note regarding the
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{ | ||
uint index = op1 & 0b111111; | ||
uint coeff = index switch | ||
{ |
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These tables were copied from the ARM docs.
Tagging subscribers to this area: @dotnet/area-system-runtime-intrinsics |
Ah, I see we have the |
I tweaked the |
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Need to write an equivalent for double
.
{Op1BaseType} iterResult = (mask[i] != 0) ? {GetIterResult} : falseVal[i]; | ||
if (iterResult != result[i]) | ||
{RetBaseType} iterResult = (mask[i] != 0) ? {GetIterResult} : falseVal[i]; | ||
if ({ConvertFunc}(iterResult) != {ConvertFunc}(result[i])) |
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can you please run the tests that uses the templates updated to make sure they pass?
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Sure: The only template using this validation logic right now is SveSimpleVecOpDifferentRetTypeTest
, which is only used by the ConvertTo*
APIs (for now) and FloatingPointExponentialAccelerator
. Both are passing.
src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs
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@@ -5262,6 +5338,82 @@ public static double MultiplyExtended(double op1, double op2) | |||
} | |||
} | |||
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public static double FPExponentialAccelerator(ulong op1) | |||
{ | |||
ulong index = op1 & 0b111111; |
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I believe you are using N == 16
in https://docsmirror.github.io/A64/2023-06/shared_pseudocode.html#impl-aarch64.FPExpA.1?
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For N=32
and N=64
, the index is the first 6 bits instead of the first 5. For this helper, I got the table from the N=64
case.
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LGTM. Thanks!
Part of #99957. I added a new test template that will probably go away soon; in #104478, I can update the
fexpa
tests to use the same template as theConvertTo*
APIs, and add some extra templating to wrap the API's result with the appropriateBitConverter
method for theConditionalSelect
scenarios (I'm assuming theConditionalSelect
scenarios aren't testing anything interesting for this API, though).Test output:
@dotnet/arm64-contrib PTAL, thanks!