From 0a0d8ad6c0a30f2f6091616802ebacc13ce97c91 Mon Sep 17 00:00:00 2001 From: Fan Yang Date: Wed, 26 Apr 2023 08:51:21 -0700 Subject: [PATCH 1/3] Intrinsify Vector128.Create --- src/mono/mono/mini/mini-arm64.c | 2 +- src/mono/mono/mini/simd-intrinsics.c | 12 +++++++----- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/src/mono/mono/mini/mini-arm64.c b/src/mono/mono/mini/mini-arm64.c index 17b5c14995e84..2380b969de336 100644 --- a/src/mono/mono/mini/mini-arm64.c +++ b/src/mono/mono/mini/mini-arm64.c @@ -4041,7 +4041,7 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb) } break; } - // Enable this when adding support for Narrow and enable support for Create at the same time + // This requires Vector64 SIMD support // case OP_XCONCAT: // arm_neon_ext_16b(code, dreg, sreg1, sreg2, 8); // break; diff --git a/src/mono/mono/mini/simd-intrinsics.c b/src/mono/mono/mini/simd-intrinsics.c index 29bdf030026df..1f33ca8080af4 100644 --- a/src/mono/mono/mini/simd-intrinsics.c +++ b/src/mono/mono/mini/simd-intrinsics.c @@ -1349,12 +1349,8 @@ emit_sri_vector (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsi if (!(!strcmp (m_class_get_name (cmethod->klass), "Vector128") || !strcmp (m_class_get_name (cmethod->klass), "Vector"))) return NULL; switch (id) { - case SN_Create: case SN_GetLower: case SN_GetUpper: - case SN_Shuffle: - case SN_ToVector128: - case SN_ToVector128Unsafe: return NULL; default: break; @@ -1569,8 +1565,14 @@ emit_sri_vector (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsi MonoInst* ins = emit_simd_ins (cfg, klass, type_to_expand_op (etype->type), args [0]->dreg, -1); ins->inst_c1 = arg0_type; return ins; - } else if (is_create_from_half_vectors_overload (fsig)) + } else if (is_create_from_half_vectors_overload (fsig)) { +#if defined(TARGET_ARM64) + // Require Vector64 SIMD support + if (!COMPILE_LLVM (cfg)) + return NULL; +#endif return emit_simd_ins (cfg, klass, OP_XCONCAT, args [0]->dreg, args [1]->dreg); + } else if (is_elementwise_create_overload (fsig, etype)) return emit_vector_create_elementwise (cfg, fsig, fsig->ret, arg0_type, args); break; From 49cffbd4dc3f3687508c97d99125a28afb7d7590 Mon Sep 17 00:00:00 2001 From: Fan Yang Date: Thu, 27 Apr 2023 13:17:13 -0700 Subject: [PATCH 2/3] Hopefully fix the test failure --- src/mono/mono/mini/mini-arm64.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/src/mono/mono/mini/mini-arm64.c b/src/mono/mono/mini/mini-arm64.c index 2380b969de336..f5c7430adf6e5 100644 --- a/src/mono/mono/mini/mini-arm64.c +++ b/src/mono/mono/mini/mini-arm64.c @@ -3944,10 +3944,19 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb) break; } - if (dreg != sreg1) - arm_neon_mov (code, dreg, sreg1); - - arm_neon_ins_e(code, t, dreg, sreg2, ins->inst_c0, 0); + if (dreg != sreg1) { + if (dreg != sreg2) { + arm_neon_mov (code, dreg, sreg1); + arm_neon_ins_e(code, t, dreg, sreg2, ins->inst_c0, 0); + } else { + arm_neon_mov (code, NEON_TMP_REG, sreg1); + arm_neon_ins_e(code, t, NEON_TMP_REG, sreg2, ins->inst_c0, 0); + arm_neon_mov (code, dreg, NEON_TMP_REG); + } + } else { + g_assert (dreg != sreg2); + arm_neon_ins_e(code, t, dreg, sreg2, ins->inst_c0, 0); + } break; } case OP_ARM64_XTN: From 3cb4c0ad67ceb1adabf5c407acd029e69fd2fe79 Mon Sep 17 00:00:00 2001 From: Fan Yang Date: Fri, 28 Apr 2023 07:05:35 -0700 Subject: [PATCH 3/3] Increase maximal instruction length --- src/mono/mono/mini/cpu-arm64.mdesc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mono/mono/mini/cpu-arm64.mdesc b/src/mono/mono/mini/cpu-arm64.mdesc index 1480b38aa72b6..4db20cccbb4f9 100644 --- a/src/mono/mono/mini/cpu-arm64.mdesc +++ b/src/mono/mono/mini/cpu-arm64.mdesc @@ -525,8 +525,8 @@ insert_i1: dest:x src1:x src2:i len:8 insert_i2: dest:x src1:x src2:i len:8 insert_i4: dest:x src1:x src2:i len:8 insert_i8: dest:x src1:x src2:i len:8 -insert_r4: dest:x src1:x src2:f len:8 -insert_r8: dest:x src1:x src2:f len:8 +insert_r4: dest:x src1:x src2:f len:12 +insert_r8: dest:x src1:x src2:f len:12 create_scalar_int: dest:x src1:i len:8 create_scalar_float: dest:x src1:f len:12 create_scalar_unsafe_int: dest:x src1:i len:4