From 4546f99a94e1d0fb5cdc32dceabfa29f3ec63a26 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Wed, 24 Mar 2021 09:01:34 +0100 Subject: [PATCH 01/37] Commit Signed-off-by: Sweta Shah --- parser_library/src/context/instruction.cpp | 2592 +++++++++++--------- parser_library/src/context/instruction.h | 160 +- 2 files changed, 1454 insertions(+), 1298 deletions(-) diff --git a/parser_library/src/context/instruction.cpp b/parser_library/src/context/instruction.cpp index 0965eab17..0c309e975 100644 --- a/parser_library/src/context/instruction.cpp +++ b/parser_library/src/context/instruction.cpp @@ -215,12 +215,9 @@ void hlasm_plugin::parser_library::context::machine_instruction::clear_diagnosti class vnot_instruction : public machine_instruction { public: - vnot_instruction(const std::string& name, - mach_format format, - std::vector operands, - size_t size, - size_t page_no) - : machine_instruction(name, format, operands, (int)size, page_no, (size_t)0) + vnot_instruction( + const std::string& name, mach_format format, std::vector operands, size_t page_no) + : machine_instruction(name, format, operands, page_no, (size_t)0) {} virtual bool check(const std::string& name_of_instruction, @@ -260,49 +257,47 @@ void add_machine_instr(std::map& res const std::string& instruction_name, mach_format format, std::vector op_format, - size_t size, size_t page_no) { result.insert(std::pair( - instruction_name, std::make_unique(instruction_name, format, op_format, size, page_no))); + instruction_name, std::make_unique(instruction_name, format, op_format, page_no))); } void add_machine_instr(std::map& result, const std::string& instruction_name, mach_format format, std::vector op_format, int optional, - size_t size, size_t page_no) { result.insert(std::pair(instruction_name, - std::make_unique( - instruction_name, format, std::move(op_format), optional, size, page_no))); + std::make_unique(instruction_name, format, std::move(op_format), optional, page_no))); } std::map hlasm_plugin::parser_library::context::instruction::get_machine_instructions() { std::map result; - add_machine_instr(result, "AR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 510); - add_machine_instr(result, "AGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 510); - add_machine_instr(result, "AGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 510); - add_machine_instr(result, "ARK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 510); - add_machine_instr(result, "AGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 510); - add_machine_instr(result, "A", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 510); - add_machine_instr(result, "AY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 511); - add_machine_instr(result, "AG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 511); - add_machine_instr(result, "AGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 511); - add_machine_instr(result, "AFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 511); - add_machine_instr(result, "AGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 511); - add_machine_instr(result, "AHIK", mach_format::RIE_d, { reg_4_U, reg_4_U, imm_16_S }, 48, 511); - add_machine_instr(result, "AGHIK", mach_format::RIE_d, { reg_4_U, reg_4_U, imm_16_S }, 48, 511); - add_machine_instr(result, "ASI", mach_format::SIY, { db_20_4_S, imm_8_S }, 48, 511); - add_machine_instr(result, "AGSI", mach_format::SIY, { db_20_4_S, imm_8_S }, 48, 511); - add_machine_instr(result, "AH", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 512); - add_machine_instr(result, "AHY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 512); - add_machine_instr(result, "AGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 512); - add_machine_instr(result, "AHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 512); - add_machine_instr(result, "AGHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 513); + add_machine_instr(result, "AR", mach_format::RR, { reg_4_U, reg_4_U }, 510); + add_machine_instr(result, "ADDFRR", mach_format::RRE, { reg_4_U, reg_4_U }, 7); + add_machine_instr(result, "AGR", mach_format::RRE, { reg_4_U, reg_4_U }, 510); + add_machine_instr(result, "AGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 510); + add_machine_instr(result, "ARK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 510); + add_machine_instr(result, "AGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 510); + add_machine_instr(result, "A", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 510); + add_machine_instr(result, "AY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 511); + add_machine_instr(result, "AG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 511); + add_machine_instr(result, "AGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 511); + add_machine_instr(result, "AFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 511); + add_machine_instr(result, "AGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 511); + add_machine_instr(result, "AHIK", mach_format::RIE_d, { reg_4_U, reg_4_U, imm_16_S }, 511); + add_machine_instr(result, "AGHIK", mach_format::RIE_d, { reg_4_U, reg_4_U, imm_16_S }, 511); + add_machine_instr(result, "ASI", mach_format::SIY, { db_20_4_S, imm_8_S }, 511); + add_machine_instr(result, "AGSI", mach_format::SIY, { db_20_4_S, imm_8_S }, 511); + add_machine_instr(result, "AH", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 512); + add_machine_instr(result, "AHY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 512); + add_machine_instr(result, "AGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 512); + add_machine_instr(result, "AHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 512); + add_machine_instr(result, "AGHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 513); add_machine_instr(result, "AHHHR", mach_format::RRF_a, @@ -311,63 +306,63 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() reg_4_U, reg_4_U, }, - 32, + 513); - add_machine_instr(result, "AHHLR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 513); - add_machine_instr(result, "AIH", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 513); - add_machine_instr(result, "ALR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 514); - add_machine_instr(result, "ALGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 514); - add_machine_instr(result, "ALGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 514); - add_machine_instr(result, "ALRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 514); - add_machine_instr(result, "ALGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 514); - add_machine_instr(result, "AL", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 514); - add_machine_instr(result, "ALY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 514); - add_machine_instr(result, "ALG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 514); - add_machine_instr(result, "ALGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 514); - add_machine_instr(result, "ALFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 514); - add_machine_instr(result, "ALGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 514); - add_machine_instr(result, "ALHHHR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 515); - add_machine_instr(result, "ALHHLR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 515); - add_machine_instr(result, "ALCR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 515); - add_machine_instr(result, "ALCGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 515); - add_machine_instr(result, "ALC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 515); - add_machine_instr(result, "ALCG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 515); - add_machine_instr(result, "ALSI", mach_format::SIY, { db_20_4_S, imm_8_S }, 48, 516); - add_machine_instr(result, "ALGSI", mach_format::SIY, { db_20_4_S, imm_8_S }, 48, 516); - add_machine_instr(result, "ALHSIK", mach_format::RIE_d, { reg_4_U, reg_4_U, imm_16_S }, 48, 516); - add_machine_instr(result, "ALGHSIK", mach_format::RIE_d, { reg_4_U, reg_4_U, imm_16_S }, 48, 516); - add_machine_instr(result, "ALSIH", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 517); - add_machine_instr(result, "ALSIHN", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 517); - add_machine_instr(result, "NR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 517); - add_machine_instr(result, "NGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 517); - add_machine_instr(result, "NRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 517); - add_machine_instr(result, "NGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 517); - add_machine_instr(result, "N", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 517); - add_machine_instr(result, "NY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 517); - add_machine_instr(result, "NG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 517); - add_machine_instr(result, "NI", mach_format::SI, { db_12_4_U, imm_8_U }, 32, 517); - add_machine_instr(result, "NIY", mach_format::SIY, { db_20_4_S, imm_8_U }, 48, 518); - add_machine_instr(result, "NC", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 48, 518); - add_machine_instr(result, "NIHF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 518); - add_machine_instr(result, "NIHH", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 518); - add_machine_instr(result, "NIHL", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 518); - add_machine_instr(result, "NILF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 519); - add_machine_instr(result, "NILH", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 519); - add_machine_instr(result, "NILL", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 519); - add_machine_instr(result, "BALR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 519); - add_machine_instr(result, "BAL", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 519); - add_machine_instr(result, "BASR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 520); - add_machine_instr(result, "BAS", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 520); - add_machine_instr(result, "BASSM", mach_format::RX_a, { reg_4_U, reg_4_U }, 16, 520); - add_machine_instr(result, "BSM", mach_format::RR, { reg_4_U, reg_4_U }, 16, 522); - add_machine_instr(result, "BIC", mach_format::RXY_b, { mask_4_U, dxb_20_4x4_S }, 48, 523); - add_machine_instr(result, "BCR", mach_format::RR, { mask_4_U, reg_4_U }, 16, 524); - add_machine_instr(result, "BC", mach_format::RX_b, { mask_4_U, dxb_12_4x4_U }, 32, 524); - add_machine_instr(result, "BCTR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 525); - add_machine_instr(result, "BCTGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 525); - add_machine_instr(result, "BCT", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 525); - add_machine_instr(result, "BCTG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 525); - add_machine_instr(result, "BXH", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 32, 526); + add_machine_instr(result, "AHHLR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 513); + add_machine_instr(result, "AIH", mach_format::RIL_a, { reg_4_U, imm_32_S }, 513); + add_machine_instr(result, "ALR", mach_format::RR, { reg_4_U, reg_4_U }, 514); + add_machine_instr(result, "ALGR", mach_format::RRE, { reg_4_U, reg_4_U }, 514); + add_machine_instr(result, "ALGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 514); + add_machine_instr(result, "ALRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 514); + add_machine_instr(result, "ALGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 514); + add_machine_instr(result, "AL", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 514); + add_machine_instr(result, "ALY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 514); + add_machine_instr(result, "ALG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 514); + add_machine_instr(result, "ALGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 514); + add_machine_instr(result, "ALFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 514); + add_machine_instr(result, "ALGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 514); + add_machine_instr(result, "ALHHHR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 515); + add_machine_instr(result, "ALHHLR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 515); + add_machine_instr(result, "ALCR", mach_format::RRE, { reg_4_U, reg_4_U }, 515); + add_machine_instr(result, "ALCGR", mach_format::RRE, { reg_4_U, reg_4_U }, 515); + add_machine_instr(result, "ALC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 515); + add_machine_instr(result, "ALCG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 515); + add_machine_instr(result, "ALSI", mach_format::SIY, { db_20_4_S, imm_8_S }, 516); + add_machine_instr(result, "ALGSI", mach_format::SIY, { db_20_4_S, imm_8_S }, 516); + add_machine_instr(result, "ALHSIK", mach_format::RIE_d, { reg_4_U, reg_4_U, imm_16_S }, 516); + add_machine_instr(result, "ALGHSIK", mach_format::RIE_d, { reg_4_U, reg_4_U, imm_16_S }, 516); + add_machine_instr(result, "ALSIH", mach_format::RIL_a, { reg_4_U, imm_32_S }, 517); + add_machine_instr(result, "ALSIHN", mach_format::RIL_a, { reg_4_U, imm_32_S }, 517); + add_machine_instr(result, "NR", mach_format::RR, { reg_4_U, reg_4_U }, 517); + add_machine_instr(result, "NGR", mach_format::RRE, { reg_4_U, reg_4_U }, 517); + add_machine_instr(result, "NRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 517); + add_machine_instr(result, "NGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 517); + add_machine_instr(result, "N", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 517); + add_machine_instr(result, "NY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 517); + add_machine_instr(result, "NG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 517); + add_machine_instr(result, "NI", mach_format::SI, { db_12_4_U, imm_8_U }, 517); + add_machine_instr(result, "NIY", mach_format::SIY, { db_20_4_S, imm_8_U }, 518); + add_machine_instr(result, "NC", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 518); + add_machine_instr(result, "NIHF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 518); + add_machine_instr(result, "NIHH", mach_format::RI_a, { reg_4_U, imm_16_U }, 518); + add_machine_instr(result, "NIHL", mach_format::RI_a, { reg_4_U, imm_16_U }, 518); + add_machine_instr(result, "NILF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 519); + add_machine_instr(result, "NILH", mach_format::RI_a, { reg_4_U, imm_16_U }, 519); + add_machine_instr(result, "NILL", mach_format::RI_a, { reg_4_U, imm_16_U }, 519); + add_machine_instr(result, "BALR", mach_format::RR, { reg_4_U, reg_4_U }, 519); + add_machine_instr(result, "BAL", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 519); + add_machine_instr(result, "BASR", mach_format::RR, { reg_4_U, reg_4_U }, 520); + add_machine_instr(result, "BAS", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 520); + add_machine_instr(result, "BASSM", mach_format::RX_a, { reg_4_U, reg_4_U }, 520); + add_machine_instr(result, "BSM", mach_format::RR, { reg_4_U, reg_4_U }, 522); + add_machine_instr(result, "BIC", mach_format::RXY_b, { mask_4_U, dxb_20_4x4_S }, 523); + add_machine_instr(result, "BCR", mach_format::RR, { mask_4_U, reg_4_U }, 524); + add_machine_instr(result, "BC", mach_format::RX_b, { mask_4_U, dxb_12_4x4_U }, 524); + add_machine_instr(result, "BCTR", mach_format::RR, { reg_4_U, reg_4_U }, 525); + add_machine_instr(result, "BCTGR", mach_format::RRE, { reg_4_U, reg_4_U }, 525); + add_machine_instr(result, "BCT", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 525); + add_machine_instr(result, "BCTG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 525); + add_machine_instr(result, "BXH", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 526); add_machine_instr(result, "BXHG", mach_format::RSY_a, @@ -376,9 +371,9 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() reg_4_U, db_20_4_S, }, - 48, + 526); - add_machine_instr(result, "BXLE", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 32, 526); + add_machine_instr(result, "BXLE", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 526); add_machine_instr(result, "BXLEG", mach_format::RSY_a, @@ -387,44 +382,44 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() reg_4_U, db_20_4_S, }, - 48, + 526); - add_machine_instr(result, "BPP", mach_format::SMI, { mask_4_U, reg_imm_16_S, db_12_4_U }, 48, 527); - add_machine_instr(result, "BPRP", mach_format::MII, { mask_4_U, reg_imm_12_S, reg_imm_24_S }, 48, 527); - add_machine_instr(result, "BRAS", mach_format::RI_b, { reg_4_U, reg_imm_16_S }, 32, 530); - add_machine_instr(result, "BRASL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 530); - add_machine_instr(result, "BRC", mach_format::RI_c, { mask_4_U, reg_imm_16_S }, 32, 530); - add_machine_instr(result, "BRCL", mach_format::RIL_c, { mask_4_U, reg_imm_32_S }, 48, 530); - add_machine_instr(result, "BRCT", mach_format::RI_b, { reg_4_U, reg_imm_16_S }, 32, 531); - add_machine_instr(result, "BRCTG", mach_format::RI_b, { reg_4_U, reg_imm_16_S }, 32, 531); - add_machine_instr(result, "BRCTH", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 531); - add_machine_instr(result, "BRXH", mach_format::RSI, { reg_4_U, reg_4_U, reg_imm_16_S }, 32, 532); - add_machine_instr(result, "BRXHG", mach_format::RIE_e, { reg_4_U, reg_4_U, reg_imm_16_S }, 48, 532); - add_machine_instr(result, "BRXLE", mach_format::RSI, { reg_4_U, reg_4_U, reg_imm_16_S }, 32, 532); - add_machine_instr(result, "BRXLG", mach_format::RIE_e, { reg_4_U, reg_4_U, reg_imm_16_S }, 48, 532); - add_machine_instr(result, "CKSM", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 533); - add_machine_instr(result, "KM", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 537); - add_machine_instr(result, "KMC", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 537); - add_machine_instr(result, "KMA", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U }, 32, 562); - add_machine_instr(result, "KMF", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 576); - add_machine_instr(result, "KMCTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U }, 32, 591); - add_machine_instr(result, "KMO", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 604); - add_machine_instr(result, "CR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 618); - add_machine_instr(result, "CGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 618); - add_machine_instr(result, "CGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 618); - add_machine_instr(result, "C", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 618); - add_machine_instr(result, "CY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 618); - add_machine_instr(result, "CG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 618); - add_machine_instr(result, "CGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 618); - add_machine_instr(result, "CFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 618); - add_machine_instr(result, "CGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 619); - add_machine_instr(result, "CRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 619); - add_machine_instr(result, "CGRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 619); - add_machine_instr(result, "CGFRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 619); - add_machine_instr(result, "CRB", mach_format::RRS, { reg_4_U, reg_4_U, mask_4_U, db_12_4_U }, 48, 619); - add_machine_instr(result, "CGRB", mach_format::RRS, { reg_4_U, reg_4_U, mask_4_U, db_12_4_U }, 48, 619); - add_machine_instr(result, "CRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, reg_imm_16_S }, 48, 619); - add_machine_instr(result, "CGRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, reg_imm_16_S }, 48, 620); + add_machine_instr(result, "BPP", mach_format::SMI, { mask_4_U, reg_imm_16_S, db_12_4_U }, 527); + add_machine_instr(result, "BPRP", mach_format::MII, { mask_4_U, reg_imm_12_S, reg_imm_24_S }, 527); + add_machine_instr(result, "BRAS", mach_format::RI_b, { reg_4_U, reg_imm_16_S }, 530); + add_machine_instr(result, "BRASL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 530); + add_machine_instr(result, "BRC", mach_format::RI_c, { mask_4_U, reg_imm_16_S }, 530); + add_machine_instr(result, "BRCL", mach_format::RIL_c, { mask_4_U, reg_imm_32_S }, 530); + add_machine_instr(result, "BRCT", mach_format::RI_b, { reg_4_U, reg_imm_16_S }, 531); + add_machine_instr(result, "BRCTG", mach_format::RI_b, { reg_4_U, reg_imm_16_S }, 531); + add_machine_instr(result, "BRCTH", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 531); + add_machine_instr(result, "BRXH", mach_format::RSI, { reg_4_U, reg_4_U, reg_imm_16_S }, 532); + add_machine_instr(result, "BRXHG", mach_format::RIE_e, { reg_4_U, reg_4_U, reg_imm_16_S }, 532); + add_machine_instr(result, "BRXLE", mach_format::RSI, { reg_4_U, reg_4_U, reg_imm_16_S }, 532); + add_machine_instr(result, "BRXLG", mach_format::RIE_e, { reg_4_U, reg_4_U, reg_imm_16_S }, 532); + add_machine_instr(result, "CKSM", mach_format::RRE, { reg_4_U, reg_4_U }, 533); + add_machine_instr(result, "KM", mach_format::RRE, { reg_4_U, reg_4_U }, 537); + add_machine_instr(result, "KMC", mach_format::RRE, { reg_4_U, reg_4_U }, 537); + add_machine_instr(result, "KMA", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U }, 562); + add_machine_instr(result, "KMF", mach_format::RRE, { reg_4_U, reg_4_U }, 576); + add_machine_instr(result, "KMCTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U }, 591); + add_machine_instr(result, "KMO", mach_format::RRE, { reg_4_U, reg_4_U }, 604); + add_machine_instr(result, "CR", mach_format::RR, { reg_4_U, reg_4_U }, 618); + add_machine_instr(result, "CGR", mach_format::RRE, { reg_4_U, reg_4_U }, 618); + add_machine_instr(result, "CGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 618); + add_machine_instr(result, "C", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 618); + add_machine_instr(result, "CY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 618); + add_machine_instr(result, "CG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 618); + add_machine_instr(result, "CGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 618); + add_machine_instr(result, "CFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 618); + add_machine_instr(result, "CGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 619); + add_machine_instr(result, "CRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 619); + add_machine_instr(result, "CGRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 619); + add_machine_instr(result, "CGFRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 619); + add_machine_instr(result, "CRB", mach_format::RRS, { reg_4_U, reg_4_U, mask_4_U, db_12_4_U }, 619); + add_machine_instr(result, "CGRB", mach_format::RRS, { reg_4_U, reg_4_U, mask_4_U, db_12_4_U }, 619); + add_machine_instr(result, "CRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, reg_imm_16_S }, 619); + add_machine_instr(result, "CGRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, reg_imm_16_S }, 620); add_machine_instr(result, "CIB", mach_format::RIS, @@ -434,7 +429,7 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() mask_4_U, db_12_4_U, }, - 48, + 620); add_machine_instr(result, "CGIB", @@ -445,43 +440,44 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() mask_4_U, db_12_4_U, }, - 48, + 620); - add_machine_instr(result, "CIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, reg_imm_16_S }, 48, 620); - add_machine_instr(result, "CGIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, reg_imm_16_S }, 48, 620); - add_machine_instr(result, "CFC", mach_format::S, { db_12_4_U }, 32, 621); - add_machine_instr(result, "CS", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 32, 628); - add_machine_instr(result, "CSY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 628); - add_machine_instr(result, "CSG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 628); - add_machine_instr(result, "CDS", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 32, 628); - add_machine_instr(result, "CDSY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 628); - add_machine_instr(result, "CDSG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 628); - add_machine_instr(result, "CSST", mach_format::SSF, { db_12_4_U, db_12_4_U, reg_4_U }, 48, 630); - add_machine_instr(result, "CRT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 32, 633); - add_machine_instr(result, "CGRT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 32, 633); - add_machine_instr(result, "CIT", mach_format::RIE_a, { reg_4_U, imm_16_S, mask_4_U }, 48, 633); - add_machine_instr(result, "CGIT", mach_format::RIE_a, { reg_4_U, imm_16_S, mask_4_U }, 48, 633); - add_machine_instr(result, "CH", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 634); - add_machine_instr(result, "CHY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 634); - add_machine_instr(result, "CGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 634); - add_machine_instr(result, "CHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 634); - add_machine_instr(result, "CGHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 634); - add_machine_instr(result, "CHHSI", mach_format::SIL, { db_12_4_U, imm_16_S }, 48, 634); - add_machine_instr(result, "CHSI", mach_format::SIL, { db_12_4_U, imm_16_S }, 48, 634); - add_machine_instr(result, "CGHSI", mach_format::SIL, { db_12_4_U, imm_16_S }, 48, 634); - add_machine_instr(result, "CHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 634); - add_machine_instr(result, "CGHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 634); - add_machine_instr(result, "CHHR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 635); - add_machine_instr(result, "CHLR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 635); - add_machine_instr(result, "CHF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 635); - add_machine_instr(result, "CIH", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 635); - add_machine_instr(result, "CLR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 636); - add_machine_instr(result, "CLGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 636); - add_machine_instr(result, "CLGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 636); - add_machine_instr(result, "CL", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 636); - add_machine_instr(result, "CLY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 636); - add_machine_instr(result, "CLG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 636); - add_machine_instr(result, "CLGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 636); + add_machine_instr(result, "CIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, reg_imm_16_S }, 620); + add_machine_instr(result, "CGIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, reg_imm_16_S }, 620); + add_machine_instr(result, "CFC", mach_format::S, { db_12_4_U }, 621); + add_machine_instr(result, "CONCS", mach_format::S, { db_12_4_U }, 263); + add_machine_instr(result, "CS", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 628); + add_machine_instr(result, "CSY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 628); + add_machine_instr(result, "CSG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 628); + add_machine_instr(result, "CDS", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 628); + add_machine_instr(result, "CDSY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 628); + add_machine_instr(result, "CDSG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 628); + add_machine_instr(result, "CSST", mach_format::SSF, { db_12_4_U, db_12_4_U, reg_4_U }, 630); + add_machine_instr(result, "CRT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 633); + add_machine_instr(result, "CGRT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 633); + add_machine_instr(result, "CIT", mach_format::RIE_a, { reg_4_U, imm_16_S, mask_4_U }, 633); + add_machine_instr(result, "CGIT", mach_format::RIE_a, { reg_4_U, imm_16_S, mask_4_U }, 633); + add_machine_instr(result, "CH", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 634); + add_machine_instr(result, "CHY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 634); + add_machine_instr(result, "CGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 634); + add_machine_instr(result, "CHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 634); + add_machine_instr(result, "CGHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 634); + add_machine_instr(result, "CHHSI", mach_format::SIL, { db_12_4_U, imm_16_S }, 634); + add_machine_instr(result, "CHSI", mach_format::SIL, { db_12_4_U, imm_16_S }, 634); + add_machine_instr(result, "CGHSI", mach_format::SIL, { db_12_4_U, imm_16_S }, 634); + add_machine_instr(result, "CHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 634); + add_machine_instr(result, "CGHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 634); + add_machine_instr(result, "CHHR", mach_format::RRE, { reg_4_U, reg_4_U }, 635); + add_machine_instr(result, "CHLR", mach_format::RRE, { reg_4_U, reg_4_U }, 635); + add_machine_instr(result, "CHF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 635); + add_machine_instr(result, "CIH", mach_format::RIL_a, { reg_4_U, imm_32_S }, 635); + add_machine_instr(result, "CLR", mach_format::RR, { reg_4_U, reg_4_U }, 636); + add_machine_instr(result, "CLGR", mach_format::RRE, { reg_4_U, reg_4_U }, 636); + add_machine_instr(result, "CLGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 636); + add_machine_instr(result, "CL", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 636); + add_machine_instr(result, "CLY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 636); + add_machine_instr(result, "CLG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 636); + add_machine_instr(result, "CLGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 636); add_machine_instr(result, "CLC", mach_format::SS_a, @@ -489,107 +485,107 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() db_12_8x4L_U, db_12_4_U, }, - 48, + 636); - add_machine_instr(result, "CLFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 636); - add_machine_instr(result, "CLGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 32, 636); - add_machine_instr(result, "CLI", mach_format::SI, { db_12_4_U, imm_8_U }, 48, 636); - add_machine_instr(result, "CLIY", mach_format::SIY, { db_12_4_U, imm_8_U }, 48, 636); - add_machine_instr(result, "CLFHSI", mach_format::SIL, { db_12_4_U, imm_16_U }, 48, 636); - add_machine_instr(result, "CLGHSI", mach_format::SIL, { db_12_4_U, imm_16_U }, 48, 636); - add_machine_instr(result, "CLHHSI", mach_format::SIL, { db_12_4_U, imm_16_U }, 48, 636); - add_machine_instr(result, "CLRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 637); - add_machine_instr(result, "CLGRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 637); - add_machine_instr(result, "CLGFRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 637); - add_machine_instr(result, "CLHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 637); - add_machine_instr(result, "CLGHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 637); - add_machine_instr(result, "CLRB", mach_format::RRS, { reg_4_U, reg_4_U, mask_4_U, db_12_4_U }, 48, 638); - add_machine_instr(result, "CLGRB", mach_format::RRS, { reg_4_U, reg_4_U, mask_4_U, db_12_4_U }, 48, 638); - add_machine_instr(result, "CLRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, reg_imm_16_S }, 48, 638); - add_machine_instr(result, "CLGRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, reg_imm_16_S }, 48, 638); - add_machine_instr(result, "CLIB", mach_format::RIS, { reg_4_U, imm_8_S, mask_4_U, db_12_4_U }, 48, 638); - add_machine_instr(result, "CLGIB", mach_format::RIS, { reg_4_U, imm_8_S, mask_4_U, db_12_4_U }, 48, 638); - add_machine_instr(result, "CLIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, reg_imm_16_S }, 48, 638); - add_machine_instr(result, "CLGIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, reg_imm_16_S }, 48, 638); - add_machine_instr(result, "CLRT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 32, 639); - add_machine_instr(result, "CLGRT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 32, 639); - add_machine_instr(result, "CLT", mach_format::RSY_b, { reg_4_U, mask_4_U, dxb_20_4x4_S }, 48, 639); - add_machine_instr(result, "CLGT", mach_format::RSY_b, { reg_4_U, mask_4_U, dxb_20_4x4_S }, 48, 639); - add_machine_instr(result, "CLFIT", mach_format::RIE_a, { reg_4_U, imm_16_S, mask_4_U }, 48, 640); - add_machine_instr(result, "CLGIT", mach_format::RIE_a, { reg_4_U, imm_16_S, mask_4_U }, 48, 640); - add_machine_instr(result, "CLM", mach_format::RS_b, { reg_4_U, mask_4_U, db_12_4_U }, 32, 641); - add_machine_instr(result, "CLMY", mach_format::RSY_b, { reg_4_U, mask_4_U, db_20_4_S }, 48, 641); - add_machine_instr(result, "CLMH", mach_format::RSY_b, { reg_4_U, mask_4_U, db_20_4_S }, 48, 641); - add_machine_instr(result, "CLHHR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 641); - add_machine_instr(result, "CLHLR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 641); - add_machine_instr(result, "CLHF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 641); + add_machine_instr(result, "CLFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 636); + add_machine_instr(result, "CLGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 636); + add_machine_instr(result, "CLI", mach_format::SI, { db_12_4_U, imm_8_U }, 636); + add_machine_instr(result, "CLIY", mach_format::SIY, { db_12_4_U, imm_8_U }, 636); + add_machine_instr(result, "CLFHSI", mach_format::SIL, { db_12_4_U, imm_16_U }, 636); + add_machine_instr(result, "CLGHSI", mach_format::SIL, { db_12_4_U, imm_16_U }, 636); + add_machine_instr(result, "CLHHSI", mach_format::SIL, { db_12_4_U, imm_16_U }, 636); + add_machine_instr(result, "CLRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 637); + add_machine_instr(result, "CLGRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 637); + add_machine_instr(result, "CLGFRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 637); + add_machine_instr(result, "CLHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 637); + add_machine_instr(result, "CLGHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 637); + add_machine_instr(result, "CLRB", mach_format::RRS, { reg_4_U, reg_4_U, mask_4_U, db_12_4_U }, 638); + add_machine_instr(result, "CLGRB", mach_format::RRS, { reg_4_U, reg_4_U, mask_4_U, db_12_4_U }, 638); + add_machine_instr(result, "CLRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, reg_imm_16_S }, 638); + add_machine_instr(result, "CLGRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, reg_imm_16_S }, 638); + add_machine_instr(result, "CLIB", mach_format::RIS, { reg_4_U, imm_8_S, mask_4_U, db_12_4_U }, 638); + add_machine_instr(result, "CLGIB", mach_format::RIS, { reg_4_U, imm_8_S, mask_4_U, db_12_4_U }, 638); + add_machine_instr(result, "CLIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, reg_imm_16_S }, 638); + add_machine_instr(result, "CLGIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, reg_imm_16_S }, 638); + add_machine_instr(result, "CLRT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 639); + add_machine_instr(result, "CLGRT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 639); + add_machine_instr(result, "CLT", mach_format::RSY_b, { reg_4_U, mask_4_U, dxb_20_4x4_S }, 639); + add_machine_instr(result, "CLGT", mach_format::RSY_b, { reg_4_U, mask_4_U, dxb_20_4x4_S }, 639); + add_machine_instr(result, "CLFIT", mach_format::RIE_a, { reg_4_U, imm_16_S, mask_4_U }, 640); + add_machine_instr(result, "CLGIT", mach_format::RIE_a, { reg_4_U, imm_16_S, mask_4_U }, 640); + add_machine_instr(result, "CLM", mach_format::RS_b, { reg_4_U, mask_4_U, db_12_4_U }, 641); + add_machine_instr(result, "CLMY", mach_format::RSY_b, { reg_4_U, mask_4_U, db_20_4_S }, 641); + add_machine_instr(result, "CLMH", mach_format::RSY_b, { reg_4_U, mask_4_U, db_20_4_S }, 641); + add_machine_instr(result, "CLHHR", mach_format::RRE, { reg_4_U, reg_4_U }, 641); + add_machine_instr(result, "CLHLR", mach_format::RRE, { reg_4_U, reg_4_U }, 641); + add_machine_instr(result, "CLHF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 641); add_machine_instr(result, "CLCL", mach_format::RR, { reg_4_U, reg_4_U }, 16, 642); - add_machine_instr(result, "CLIH", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 642); - add_machine_instr(result, "CLCLE", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 32, 644); - add_machine_instr(result, "CLCLU", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 647); - add_machine_instr(result, "CLST", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 650); - add_machine_instr(result, "CUSE", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 651); - add_machine_instr(result, "CMPSC", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 654); - add_machine_instr(result, "KIMD", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 672); - add_machine_instr(result, "KLMD", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 685); - add_machine_instr(result, "KMAC", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 703); - add_machine_instr(result, "CVB", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 714); - add_machine_instr(result, "CVBY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 714); - add_machine_instr(result, "CVBG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 714); - add_machine_instr(result, "CVD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 715); - add_machine_instr(result, "CVDY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 715); - add_machine_instr(result, "CVDG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 715); - add_machine_instr(result, "CU24", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 32, 715); - add_machine_instr(result, "CUUTF", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 32, 718); - add_machine_instr(result, "CU21", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 32, 718); - add_machine_instr(result, "CU42", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 722); - add_machine_instr(result, "CU41", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 725); - add_machine_instr(result, "CUTFU", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 32, 728); - add_machine_instr(result, "CU12", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 32, 728); - add_machine_instr(result, "CU14", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 32, 732); - add_machine_instr(result, "CPYA", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 736); + add_machine_instr(result, "CLIH", mach_format::RIL_a, { reg_4_U, imm_32_S }, 642); + add_machine_instr(result, "CLCLE", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 644); + add_machine_instr(result, "CLCLU", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 647); + add_machine_instr(result, "CLST", mach_format::RRE, { reg_4_U, reg_4_U }, 650); + add_machine_instr(result, "CUSE", mach_format::RRE, { reg_4_U, reg_4_U }, 651); + add_machine_instr(result, "CMPSC", mach_format::RRE, { reg_4_U, reg_4_U }, 654); + add_machine_instr(result, "KIMD", mach_format::RRE, { reg_4_U, reg_4_U }, 672); + add_machine_instr(result, "KLMD", mach_format::RRE, { reg_4_U, reg_4_U }, 685); + add_machine_instr(result, "KMAC", mach_format::RRE, { reg_4_U, reg_4_U }, 703); + add_machine_instr(result, "CVB", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 714); + add_machine_instr(result, "CVBY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 714); + add_machine_instr(result, "CVBG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 714); + add_machine_instr(result, "CVD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 715); + add_machine_instr(result, "CVDY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 715); + add_machine_instr(result, "CVDG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 715); + add_machine_instr(result, "CU24", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 715); + add_machine_instr(result, "CUUTF", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 718); + add_machine_instr(result, "CU21", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 718); + add_machine_instr(result, "CU42", mach_format::RRE, { reg_4_U, reg_4_U }, 722); + add_machine_instr(result, "CU41", mach_format::RRE, { reg_4_U, reg_4_U }, 725); + add_machine_instr(result, "CUTFU", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 728); + add_machine_instr(result, "CU12", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 728); + add_machine_instr(result, "CU14", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 732); + add_machine_instr(result, "CPYA", mach_format::RRE, { reg_4_U, reg_4_U }, 736); add_machine_instr(result, "DR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 736); - add_machine_instr(result, "D", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 736); - add_machine_instr(result, "DLR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 737); - add_machine_instr(result, "DLGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 737); - add_machine_instr(result, "DL", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 737); - add_machine_instr(result, "DLG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 737); - add_machine_instr(result, "DSGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 738); - add_machine_instr(result, "DSGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 738); - add_machine_instr(result, "DSG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 738); - add_machine_instr(result, "DSGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 738); + add_machine_instr(result, "D", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 736); + add_machine_instr(result, "DLR", mach_format::RRE, { reg_4_U, reg_4_U }, 737); + add_machine_instr(result, "DLGR", mach_format::RRE, { reg_4_U, reg_4_U }, 737); + add_machine_instr(result, "DL", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 737); + add_machine_instr(result, "DLG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 737); + add_machine_instr(result, "DSGR", mach_format::RRE, { reg_4_U, reg_4_U }, 738); + add_machine_instr(result, "DSGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 738); + add_machine_instr(result, "DSG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 738); + add_machine_instr(result, "DSGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 738); add_machine_instr(result, "XR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 738); - add_machine_instr(result, "XGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 738); - add_machine_instr(result, "XRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 738); - add_machine_instr(result, "XGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 738); - add_machine_instr(result, "X", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 738); - add_machine_instr(result, "XY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 738); - add_machine_instr(result, "XG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 738); - add_machine_instr(result, "XI", mach_format::SI, { db_12_4_U, imm_8_S }, 32, 739); - add_machine_instr(result, "XIY", mach_format::SIY, { db_20_4_S, imm_8_S }, 48, 739); - add_machine_instr(result, "XC", mach_format::SS_a, { db_12_8x4L_U, db_20_4_S }, 48, 739); - add_machine_instr(result, "EX", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 740); - add_machine_instr(result, "XIHF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 740); - add_machine_instr(result, "XILF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 740); - add_machine_instr(result, "EXRL", mach_format::RIL_b, { reg_4_U, imm_32_S }, 48, 740); - add_machine_instr(result, "EAR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 741); - add_machine_instr(result, "ECAG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 741); - add_machine_instr(result, "ECTG", mach_format::SSF, { db_12_4_U, db_12_4_U, reg_4_U }, 48, 744); - add_machine_instr(result, "EPSW", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 745); - add_machine_instr(result, "ETND", mach_format::RRE, { reg_4_U }, 32, 745); - add_machine_instr(result, "FLOGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 746); - add_machine_instr(result, "IC", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 746); - add_machine_instr(result, "ICY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 746); - add_machine_instr(result, "ICM", mach_format::RS_b, { reg_4_U, mask_4_U, db_12_4_U }, 32, 746); - add_machine_instr(result, "ICMY", mach_format::RSY_b, { reg_4_U, mask_4_U, db_20_4_S }, 48, 746); - add_machine_instr(result, "ICMH", mach_format::RSY_b, { reg_4_U, mask_4_U, db_20_4_S }, 48, 746); - add_machine_instr(result, "IIHF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 747); - add_machine_instr(result, "IIHH", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 747); - add_machine_instr(result, "IIHL", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 747); - add_machine_instr(result, "IILF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 747); - add_machine_instr(result, "IILH", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 747); - add_machine_instr(result, "IILL", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 747); - add_machine_instr(result, "IPM", mach_format::RRE, { reg_4_U }, 32, 748); + add_machine_instr(result, "XGR", mach_format::RRE, { reg_4_U, reg_4_U }, 738); + add_machine_instr(result, "XRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 738); + add_machine_instr(result, "XGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 738); + add_machine_instr(result, "X", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 738); + add_machine_instr(result, "XY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 738); + add_machine_instr(result, "XG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 738); + add_machine_instr(result, "XI", mach_format::SI, { db_12_4_U, imm_8_S }, 739); + add_machine_instr(result, "XIY", mach_format::SIY, { db_20_4_S, imm_8_S }, 739); + add_machine_instr(result, "XC", mach_format::SS_a, { db_12_8x4L_U, db_20_4_S }, 739); + add_machine_instr(result, "EX", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 740); + add_machine_instr(result, "XIHF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 740); + add_machine_instr(result, "XILF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 740); + add_machine_instr(result, "EXRL", mach_format::RIL_b, { reg_4_U, imm_32_S }, 740); + add_machine_instr(result, "EAR", mach_format::RRE, { reg_4_U, reg_4_U }, 741); + add_machine_instr(result, "ECAG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 741); + add_machine_instr(result, "ECTG", mach_format::SSF, { db_12_4_U, db_12_4_U, reg_4_U }, 744); + add_machine_instr(result, "EPSW", mach_format::RRE, { reg_4_U, reg_4_U }, 745); + add_machine_instr(result, "ETND", mach_format::RRE, { reg_4_U }, 745); + add_machine_instr(result, "FLOGR", mach_format::RRE, { reg_4_U, reg_4_U }, 746); + add_machine_instr(result, "IC", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 746); + add_machine_instr(result, "ICY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 746); + add_machine_instr(result, "ICM", mach_format::RS_b, { reg_4_U, mask_4_U, db_12_4_U }, 746); + add_machine_instr(result, "ICMY", mach_format::RSY_b, { reg_4_U, mask_4_U, db_20_4_S }, 746); + add_machine_instr(result, "ICMH", mach_format::RSY_b, { reg_4_U, mask_4_U, db_20_4_S }, 746); + add_machine_instr(result, "IIHF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 747); + add_machine_instr(result, "IIHH", mach_format::RI_a, { reg_4_U, imm_16_U }, 747); + add_machine_instr(result, "IIHL", mach_format::RI_a, { reg_4_U, imm_16_U }, 747); + add_machine_instr(result, "IILF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 747); + add_machine_instr(result, "IILH", mach_format::RI_a, { reg_4_U, imm_16_U }, 747); + add_machine_instr(result, "IILL", mach_format::RI_a, { reg_4_U, imm_16_U }, 747); + add_machine_instr(result, "IPM", mach_format::RRE, { reg_4_U }, 748); add_machine_instr(result, "LR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 748); add_machine_instr(result, "LGR", mach_format::RRE, { reg_4_U, reg_4_U }, 16, 748); add_machine_instr(result, "LGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 16, 748); @@ -601,1096 +597,1100 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() add_machine_instr(result, "LRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 16, 748); add_machine_instr(result, "LGRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 16, 748); add_machine_instr(result, "LGFRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 16, 748); - add_machine_instr(result, "LAM", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 32, 749); - add_machine_instr(result, "LAMY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 749); - add_machine_instr(result, "LA", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 750); - add_machine_instr(result, "LAY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 750); - add_machine_instr(result, "LAE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 750); - add_machine_instr(result, "LAEY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 750); - add_machine_instr(result, "LARL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 751); - add_machine_instr(result, "LAA", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 752); - add_machine_instr(result, "LAAG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 752); - add_machine_instr(result, "LAAL", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 752); - add_machine_instr(result, "LAALG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 752); - add_machine_instr(result, "LAN", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 753); - add_machine_instr(result, "LANG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 753); - add_machine_instr(result, "LAX", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 753); - add_machine_instr(result, "LAXG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 753); - add_machine_instr(result, "LAO", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 754); - add_machine_instr(result, "LAOG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 754); + add_machine_instr(result, "LAM", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 749); + add_machine_instr(result, "LAMY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 749); + add_machine_instr(result, "LA", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 750); + add_machine_instr(result, "LAY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 750); + add_machine_instr(result, "LAE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 750); + add_machine_instr(result, "LAEY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 750); + add_machine_instr(result, "LARL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 751); + add_machine_instr(result, "LAA", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 752); + add_machine_instr(result, "LAAG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 752); + add_machine_instr(result, "LAAL", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 752); + add_machine_instr(result, "LAALG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 752); + add_machine_instr(result, "LAN", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 753); + add_machine_instr(result, "LANG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 753); + add_machine_instr(result, "LAX", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 753); + add_machine_instr(result, "LAXG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 753); + add_machine_instr(result, "LAO", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 754); + add_machine_instr(result, "LAOG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 754); add_machine_instr(result, "LTR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 754); - add_machine_instr(result, "LTGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 754); - add_machine_instr(result, "LTGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 754); - add_machine_instr(result, "LT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 755); - add_machine_instr(result, "LTG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 755); - add_machine_instr(result, "LTGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 755); - add_machine_instr(result, "LAT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 755); - add_machine_instr(result, "LGAT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 755); - add_machine_instr(result, "LZRF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 755); - add_machine_instr(result, "LZRG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 755); - add_machine_instr(result, "LBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 756); - add_machine_instr(result, "LGBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 756); - add_machine_instr(result, "LB", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 756); - add_machine_instr(result, "LGB", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 756); - add_machine_instr(result, "LBH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 756); + add_machine_instr(result, "LTGR", mach_format::RRE, { reg_4_U, reg_4_U }, 754); + add_machine_instr(result, "LTGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 754); + add_machine_instr(result, "LT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 755); + add_machine_instr(result, "LTG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 755); + add_machine_instr(result, "LTGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 755); + add_machine_instr(result, "LAT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 755); + add_machine_instr(result, "LGAT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 755); + add_machine_instr(result, "LZRF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 755); + add_machine_instr(result, "LZRG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 755); + add_machine_instr(result, "LBR", mach_format::RRE, { reg_4_U, reg_4_U }, 756); + add_machine_instr(result, "LGBR", mach_format::RRE, { reg_4_U, reg_4_U }, 756); + add_machine_instr(result, "LB", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 756); + add_machine_instr(result, "LGB", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 756); + add_machine_instr(result, "LBH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 756); add_machine_instr(result, "LCR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 756); - add_machine_instr(result, "LCGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 757); - add_machine_instr(result, "LCGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 757); - add_machine_instr(result, "LCBB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U, mask_4_U }, 48, 757); - add_machine_instr(result, "LGG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 758); - add_machine_instr(result, "LLGFSG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 758); - add_machine_instr(result, "LGSC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 759); - add_machine_instr(result, "LHR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 760); - add_machine_instr(result, "LGHR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 760); - add_machine_instr(result, "LH", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 760); - add_machine_instr(result, "LHY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 760); - add_machine_instr(result, "LGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 760); - add_machine_instr(result, "LHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 760); - add_machine_instr(result, "LGHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 760); - add_machine_instr(result, "LHRL", mach_format::RIL_b, { reg_4_U, imm_32_S }, 48, 760); - add_machine_instr(result, "LGHRL", mach_format::RIL_b, { reg_4_U, imm_32_S }, 48, 760); - add_machine_instr(result, "LHH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 761); - add_machine_instr(result, "LOCHI", mach_format::RIE_g, { reg_4_U, imm_16_S, mask_4_U }, 48, 761); - add_machine_instr(result, "LOCGHI", mach_format::RIE_g, { reg_4_U, imm_16_S, mask_4_U }, 48, 761); - add_machine_instr(result, "LOCHHI", mach_format::RIE_g, { reg_4_U, imm_16_S, mask_4_U }, 48, 761); - add_machine_instr(result, "LFH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 762); - add_machine_instr(result, "LFHAT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 762); - add_machine_instr(result, "LLGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 762); - add_machine_instr(result, "LLGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 762); - add_machine_instr(result, "LLGFRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 762); - add_machine_instr(result, "LLGFAT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 763); - add_machine_instr(result, "LLCR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 763); - add_machine_instr(result, "LLGCR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 763); - add_machine_instr(result, "LLC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 763); - add_machine_instr(result, "LLGC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 763); - add_machine_instr(result, "LLZRGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 763); - add_machine_instr(result, "LLCH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 764); - add_machine_instr(result, "LLHR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 764); - add_machine_instr(result, "LLGHR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 764); - add_machine_instr(result, "LLH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 764); - add_machine_instr(result, "LLGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 764); - add_machine_instr(result, "LLHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 764); - add_machine_instr(result, "LLGHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 764); - add_machine_instr(result, "LLHH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 765); - add_machine_instr(result, "LLIHF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 765); - add_machine_instr(result, "LLIHH", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 765); - add_machine_instr(result, "LLIHL", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 765); - add_machine_instr(result, "LLILF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 765); - add_machine_instr(result, "LLILH", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 765); - add_machine_instr(result, "LLILL", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 765); - add_machine_instr(result, "LLGTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 765); - add_machine_instr(result, "LLGT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 766); - add_machine_instr(result, "LLGTAT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 766); - add_machine_instr(result, "LM", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 32, 766); - add_machine_instr(result, "LMY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 766); - add_machine_instr(result, "LMG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 766); - add_machine_instr(result, "LMD", mach_format::SS_e, { reg_4_U, reg_4_U, db_12_4_U, db_12_4_U }, 48, 767); - add_machine_instr(result, "LMH", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 767); + add_machine_instr(result, "LCGR", mach_format::RRE, { reg_4_U, reg_4_U }, 757); + add_machine_instr(result, "LCGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 757); + add_machine_instr(result, "LCBB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U, mask_4_U }, 757); + add_machine_instr(result, "LGG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 758); + add_machine_instr(result, "LLGFSG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 758); + add_machine_instr(result, "LGSC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 759); + add_machine_instr(result, "LHR", mach_format::RRE, { reg_4_U, reg_4_U }, 760); + add_machine_instr(result, "LGHR", mach_format::RRE, { reg_4_U, reg_4_U }, 760); + add_machine_instr(result, "LH", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 760); + add_machine_instr(result, "LHY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 760); + add_machine_instr(result, "LGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 760); + add_machine_instr(result, "LHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 760); + add_machine_instr(result, "LGHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 760); + add_machine_instr(result, "LHRL", mach_format::RIL_b, { reg_4_U, imm_32_S }, 760); + add_machine_instr(result, "LGHRL", mach_format::RIL_b, { reg_4_U, imm_32_S }, 760); + add_machine_instr(result, "LHH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 761); + add_machine_instr(result, "LOCHI", mach_format::RIE_g, { reg_4_U, imm_16_S, mask_4_U }, 761); + add_machine_instr(result, "LOCGHI", mach_format::RIE_g, { reg_4_U, imm_16_S, mask_4_U }, 761); + add_machine_instr(result, "LOCHHI", mach_format::RIE_g, { reg_4_U, imm_16_S, mask_4_U }, 761); + add_machine_instr(result, "LFH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 762); + add_machine_instr(result, "LFHAT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 762); + add_machine_instr(result, "LLGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 762); + add_machine_instr(result, "LLGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 762); + add_machine_instr(result, "LLGFRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 762); + add_machine_instr(result, "LLGFAT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 763); + add_machine_instr(result, "LLCR", mach_format::RRE, { reg_4_U, reg_4_U }, 763); + add_machine_instr(result, "LLGCR", mach_format::RRE, { reg_4_U, reg_4_U }, 763); + add_machine_instr(result, "LLC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 763); + add_machine_instr(result, "LLGC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 763); + add_machine_instr(result, "LLZRGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 763); + add_machine_instr(result, "LLCH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 764); + add_machine_instr(result, "LLHR", mach_format::RRE, { reg_4_U, reg_4_U }, 764); + add_machine_instr(result, "LLGHR", mach_format::RRE, { reg_4_U, reg_4_U }, 764); + add_machine_instr(result, "LLH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 764); + add_machine_instr(result, "LLGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 764); + add_machine_instr(result, "LLHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 764); + add_machine_instr(result, "LLGHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 764); + add_machine_instr(result, "LLHH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 765); + add_machine_instr(result, "LLIHF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 765); + add_machine_instr(result, "LLIHH", mach_format::RI_a, { reg_4_U, imm_16_S }, 765); + add_machine_instr(result, "LLIHL", mach_format::RI_a, { reg_4_U, imm_16_S }, 765); + add_machine_instr(result, "LLILF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 765); + add_machine_instr(result, "LLILH", mach_format::RI_a, { reg_4_U, imm_16_S }, 765); + add_machine_instr(result, "LLILL", mach_format::RI_a, { reg_4_U, imm_16_S }, 765); + add_machine_instr(result, "LLGTR", mach_format::RRE, { reg_4_U, reg_4_U }, 765); + add_machine_instr(result, "LLGT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 766); + add_machine_instr(result, "LLGTAT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 766); + add_machine_instr(result, "LM", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 766); + add_machine_instr(result, "LMY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 766); + add_machine_instr(result, "LMG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 766); + add_machine_instr(result, "LMD", mach_format::SS_e, { reg_4_U, reg_4_U, db_12_4_U, db_12_4_U }, 767); + add_machine_instr(result, "LMH", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 767); add_machine_instr(result, "LNR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 767); - add_machine_instr(result, "LNGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 767); - add_machine_instr(result, "LNGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 768); - add_machine_instr(result, "LOCFHR", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 32, 768); - add_machine_instr(result, "LOCFH", mach_format::RSY_b, { reg_4_U, db_20_4_S, mask_4_U }, 48, 768); - add_machine_instr(result, "LOCR", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 32, 768); - add_machine_instr(result, "LOCGR", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 32, 768); - add_machine_instr(result, "LOC", mach_format::RSY_b, { reg_4_U, db_20_4_S, mask_4_U }, 48, 768); - add_machine_instr(result, "LOCG", mach_format::RSY_b, { reg_4_U, db_20_4_S, mask_4_U }, 48, 768); - add_machine_instr(result, "LPD", mach_format::SSF, { reg_4_U, db_12_4_U, db_12_4_U }, 48, 769); - add_machine_instr(result, "LPDG", mach_format::SSF, { reg_4_U, db_12_4_U, db_12_4_U }, 48, 769); - add_machine_instr(result, "LPQ", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 770); + add_machine_instr(result, "LNGR", mach_format::RRE, { reg_4_U, reg_4_U }, 767); + add_machine_instr(result, "LNGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 768); + add_machine_instr(result, "LOCFHR", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 768); + add_machine_instr(result, "LOCFH", mach_format::RSY_b, { reg_4_U, db_20_4_S, mask_4_U }, 768); + add_machine_instr(result, "LOCR", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 768); + add_machine_instr(result, "LOCGR", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 768); + add_machine_instr(result, "LOC", mach_format::RSY_b, { reg_4_U, db_20_4_S, mask_4_U }, 768); + add_machine_instr(result, "LOCG", mach_format::RSY_b, { reg_4_U, db_20_4_S, mask_4_U }, 768); + add_machine_instr(result, "LPD", mach_format::SSF, { reg_4_U, db_12_4_U, db_12_4_U }, 769); + add_machine_instr(result, "LPDG", mach_format::SSF, { reg_4_U, db_12_4_U, db_12_4_U }, 769); + add_machine_instr(result, "LPQ", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 770); add_machine_instr(result, "LPR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 771); - add_machine_instr(result, "LPGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 771); - add_machine_instr(result, "LPGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 771); - add_machine_instr(result, "LRVR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 771); - add_machine_instr(result, "LRVGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 771); - add_machine_instr(result, "LRVH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 32, 771); - add_machine_instr(result, "LRV", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 32, 771); - add_machine_instr(result, "LRVG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 32, 771); - add_machine_instr(result, "MC", mach_format::SI, { db_12_4_U, imm_8_S }, 32, 772); - add_machine_instr(result, "MVC", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 48, 773); - add_machine_instr(result, "MVHHI", mach_format::SIL, { db_12_4_U, imm_16_S }, 48, 773); - add_machine_instr(result, "MVHI", mach_format::SIL, { db_12_4_U, imm_16_S }, 48, 773); - add_machine_instr(result, "MVGHI", mach_format::SIL, { db_12_4_U, imm_16_S }, 48, 773); - add_machine_instr(result, "MVI", mach_format::SI, { db_12_4_U, imm_8_U }, 32, 773); - add_machine_instr(result, "MVIY", mach_format::SIY, { db_12_4_U, imm_8_U }, 48, 773); - add_machine_instr(result, "MVCIN", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 48, 774); + add_machine_instr(result, "LPGR", mach_format::RRE, { reg_4_U, reg_4_U }, 771); + add_machine_instr(result, "LPGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 771); + add_machine_instr(result, "LRVR", mach_format::RRE, { reg_4_U, reg_4_U }, 771); + add_machine_instr(result, "LRVGR", mach_format::RRE, { reg_4_U, reg_4_U }, 771); + add_machine_instr(result, "LRVH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 771); + add_machine_instr(result, "LRV", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 771); + add_machine_instr(result, "LRVG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 771); + add_machine_instr(result, "MC", mach_format::SI, { db_12_4_U, imm_8_S }, 772); + add_machine_instr(result, "MVC", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 773); + add_machine_instr(result, "MVCRL", mach_format::SSE, { db_12_4_U, db_12_4_U }, 48, 788); + add_machine_instr(result, "MVHHI", mach_format::SIL, { db_12_4_U, imm_16_S }, 773); + add_machine_instr(result, "MVHI", mach_format::SIL, { db_12_4_U, imm_16_S }, 773); + add_machine_instr(result, "MVGHI", mach_format::SIL, { db_12_4_U, imm_16_S }, 773); + add_machine_instr(result, "MVI", mach_format::SI, { db_12_4_U, imm_8_U }, 773); + add_machine_instr(result, "MVIY", mach_format::SIY, { db_12_4_U, imm_8_U }, 773); + add_machine_instr(result, "MVCIN", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 774); add_machine_instr(result, "MVCL", mach_format::RR, { reg_4_U, reg_4_U }, 16, 774); - add_machine_instr(result, "MVCLE", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 32, 778); - add_machine_instr(result, "MVCLU", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 781); - add_machine_instr(result, "MVN", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 48, 785); - add_machine_instr(result, "MVST", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 785); - add_machine_instr(result, "MVO", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 48, 786); - add_machine_instr(result, "MVZ", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 48, 787); + add_machine_instr(result, "MVCLE", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 778); + add_machine_instr(result, "MVCLU", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 781); + add_machine_instr(result, "MVN", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 785); + add_machine_instr(result, "MVST", mach_format::RRE, { reg_4_U, reg_4_U }, 785); + add_machine_instr(result, "MVO", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 786); + add_machine_instr(result, "MVZ", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 787); add_machine_instr(result, "MR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 788); - add_machine_instr(result, "MGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 788); - add_machine_instr(result, "M", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 788); - add_machine_instr(result, "MFY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 788); - add_machine_instr(result, "MG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 788); - add_machine_instr(result, "MH", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 789); - add_machine_instr(result, "MHY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 789); - add_machine_instr(result, "MGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 789); - add_machine_instr(result, "MHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 789); - add_machine_instr(result, "MGHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 789); - add_machine_instr(result, "MLR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 790); - add_machine_instr(result, "MLGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 790); - add_machine_instr(result, "ML", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 790); - add_machine_instr(result, "MLG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 790); - add_machine_instr(result, "MSR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 791); - add_machine_instr(result, "MSRKC", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 791); - add_machine_instr(result, "MSGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 791); - add_machine_instr(result, "MSGRKC", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 791); - add_machine_instr(result, "MSGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 791); - add_machine_instr(result, "MS", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 791); - add_machine_instr(result, "MSC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 791); - add_machine_instr(result, "MSY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 791); - add_machine_instr(result, "MSG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 791); - add_machine_instr(result, "MSGC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 791); - add_machine_instr(result, "MSGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 791); - add_machine_instr(result, "MSFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 791); - add_machine_instr(result, "MSGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 791); - add_machine_instr(result, "NIAI", mach_format::IE, { imm_4_U, imm_4_U }, 32, 792); - add_machine_instr(result, "NTSTG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 794); - add_machine_instr(result, "OR", mach_format::RR, { reg_4_U, reg_4_U }, 32, 794); - add_machine_instr(result, "OGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 794); - add_machine_instr(result, "ORK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 794); - add_machine_instr(result, "OGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 794); - add_machine_instr(result, "O", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 794); - add_machine_instr(result, "OY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 32, 794); - add_machine_instr(result, "OG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 795); - add_machine_instr(result, "OI", mach_format::SI, { db_12_4_U, imm_8_U }, 48, 795); - add_machine_instr(result, "OIY", mach_format::SIY, { db_20_4_S, imm_8_U }, 48, 795); - add_machine_instr(result, "OC", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 48, 795); - add_machine_instr(result, "OIHF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 32, 796); - add_machine_instr(result, "OIHH", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 796); - add_machine_instr(result, "OIHL", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 796); - add_machine_instr(result, "OILF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 32, 796); - add_machine_instr(result, "OILH", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 796); - add_machine_instr(result, "OILL", mach_format::RI_a, { reg_4_U, imm_16_S }, 32, 796); - add_machine_instr(result, "PACK", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 32, 796); - add_machine_instr(result, "PKA", mach_format::SS_f, { db_12_4_U, db_12_8x4L_U }, 48, 797); - add_machine_instr(result, "PKU", mach_format::SS_f, { db_12_4_U, db_12_8x4L_U }, 48, 798); - add_machine_instr(result, "PCC", mach_format::RRE, {}, 32, 799); - add_machine_instr(result, "PLO", mach_format::SS_e, { reg_4_U, db_12_4_U, reg_4_U, db_12_4_U }, 48, 815); - add_machine_instr(result, "PPA", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 32, 829); - add_machine_instr(result, "PRNO", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 830); - add_machine_instr(result, "PPNO", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 830); - add_machine_instr(result, "POPCNT", mach_format::RRE, { reg_4_U, reg_4_U }, 48, 843); - add_machine_instr(result, "PFD", mach_format::RXY_b, { mask_4_U, dxb_20_4x4_S }, 48, 843); - add_machine_instr(result, "PFDRL", mach_format::RIL_c, { mask_4_U, reg_imm_32_S }, 48, 843); - add_machine_instr(result, "RLL", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 845); - add_machine_instr(result, "RLLG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 845); - add_machine_instr(result, "RNSBG", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 48, 845); - add_machine_instr(result, "RXSBG", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 48, 846); - add_machine_instr(result, "ROSBG", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 48, 846); - add_machine_instr(result, "RISBG", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 48, 847); - add_machine_instr( - result, "RISBGN", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 48, 847); - add_machine_instr( - result, "RISBHG", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 48, 848); - add_machine_instr( - result, "RISBLG", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 48, 849); - add_machine_instr(result, "SRST", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 850); - add_machine_instr(result, "SRSTU", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 852); - add_machine_instr(result, "SAR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 854); + add_machine_instr(result, "MGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 788); + add_machine_instr(result, "M", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 788); + add_machine_instr(result, "MFY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 788); + add_machine_instr(result, "MG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 788); + add_machine_instr(result, "MH", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 789); + add_machine_instr(result, "MHY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 789); + add_machine_instr(result, "MGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 789); + add_machine_instr(result, "MHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 789); + add_machine_instr(result, "MGHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 789); + add_machine_instr(result, "MLR", mach_format::RRE, { reg_4_U, reg_4_U }, 790); + add_machine_instr(result, "MLGR", mach_format::RRE, { reg_4_U, reg_4_U }, 790); + add_machine_instr(result, "ML", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 790); + add_machine_instr(result, "MLG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 790); + add_machine_instr(result, "MSR", mach_format::RRE, { reg_4_U, reg_4_U }, 791); + add_machine_instr(result, "MSRKC", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 791); + add_machine_instr(result, "MSGR", mach_format::RRE, { reg_4_U, reg_4_U }, 791); + add_machine_instr(result, "MSGRKC", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 791); + add_machine_instr(result, "MSGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 791); + add_machine_instr(result, "MS", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 791); + add_machine_instr(result, "MSC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 791); + add_machine_instr(result, "MSY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 791); + add_machine_instr(result, "MSG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 791); + add_machine_instr(result, "MSGC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 791); + add_machine_instr(result, "MSGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 791); + add_machine_instr(result, "MSFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 791); + add_machine_instr(result, "MSGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 791); + add_machine_instr(result, "NIAI", mach_format::IE, { imm_4_U, imm_4_U }, 792); + add_machine_instr(result, "NTSTG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 794); + add_machine_instr(result, "OR", mach_format::RR, { reg_4_U, reg_4_U }, 794); + add_machine_instr(result, "OGR", mach_format::RRE, { reg_4_U, reg_4_U }, 794); + add_machine_instr(result, "ORK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 794); + add_machine_instr(result, "OGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 794); + add_machine_instr(result, "O", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 794); + add_machine_instr(result, "OY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 794); + add_machine_instr(result, "OG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 795); + add_machine_instr(result, "OI", mach_format::SI, { db_12_4_U, imm_8_U }, 795); + add_machine_instr(result, "OIY", mach_format::SIY, { db_20_4_S, imm_8_U }, 795); + add_machine_instr(result, "OC", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 795); + add_machine_instr(result, "OIHF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 796); + add_machine_instr(result, "OIHH", mach_format::RI_a, { reg_4_U, imm_16_S }, 796); + add_machine_instr(result, "OIHL", mach_format::RI_a, { reg_4_U, imm_16_S }, 796); + add_machine_instr(result, "OILF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 796); + add_machine_instr(result, "OILH", mach_format::RI_a, { reg_4_U, imm_16_S }, 796); + add_machine_instr(result, "OILL", mach_format::RI_a, { reg_4_U, imm_16_S }, 796); + add_machine_instr(result, "PACK", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 796); + add_machine_instr(result, "PKA", mach_format::SS_f, { db_12_4_U, db_12_8x4L_U }, 797); + add_machine_instr(result, "PKU", mach_format::SS_f, { db_12_4_U, db_12_8x4L_U }, 798); + add_machine_instr(result, "PCC", mach_format::RRE, {}, 799); + add_machine_instr(result, "PLO", mach_format::SS_e, { reg_4_U, db_12_4_U, reg_4_U, db_12_4_U }, 815); + add_machine_instr(result, "PPA", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 829); + add_machine_instr(result, "PRNO", mach_format::RRE, { reg_4_U, reg_4_U }, 830); + add_machine_instr(result, "PPNO", mach_format::RRE, { reg_4_U, reg_4_U }, 830); + add_machine_instr(result, "POPCNT", mach_format::RRE, { reg_4_U, reg_4_U }, 843); + add_machine_instr(result, "PFD", mach_format::RXY_b, { mask_4_U, dxb_20_4x4_S }, 843); + add_machine_instr(result, "PFDRL", mach_format::RIL_c, { mask_4_U, reg_imm_32_S }, 843); + add_machine_instr(result, "RLL", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 845); + add_machine_instr(result, "RLLG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 845); + add_machine_instr(result, "RNSBG", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 845); + add_machine_instr(result, "RXSBG", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 846); + add_machine_instr(result, "ROSBG", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 846); + add_machine_instr(result, "RISBG", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 847); + add_machine_instr(result, "RISBGN", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 847); + add_machine_instr(result, "RISBHG", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 848); + add_machine_instr(result, "RISBLG", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 849); + add_machine_instr(result, "SRST", mach_format::RRE, { reg_4_U, reg_4_U }, 850); + add_machine_instr(result, "SRSTU", mach_format::RRE, { reg_4_U, reg_4_U }, 852); + add_machine_instr(result, "SAR", mach_format::RRE, { reg_4_U, reg_4_U }, 854); add_machine_instr(result, "SAM24", mach_format::E, {}, 16, 854); add_machine_instr(result, "SAM31", mach_format::E, {}, 16, 854); add_machine_instr(result, "SAM64", mach_format::E, {}, 16, 854); add_machine_instr(result, "SPM", mach_format::RR, { reg_4_U }, 16, 855); - add_machine_instr(result, "SLDA", mach_format::RS_a, { reg_4_U, db_12_4_U }, 32, 855); - add_machine_instr(result, "SLA", mach_format::RS_a, { reg_4_U, db_12_4_U }, 32, 856); - add_machine_instr(result, "SLAK", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 856); - add_machine_instr(result, "SLAG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 856); - add_machine_instr(result, "SLDL", mach_format::RS_a, { reg_4_U, db_12_4_U }, 32, 856); - add_machine_instr(result, "SLL", mach_format::RS_a, { reg_4_U, db_12_4_U }, 32, 857); - add_machine_instr(result, "SLLK", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 857); - add_machine_instr(result, "SLLG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 857); - add_machine_instr(result, "SRDA", mach_format::RS_a, { reg_4_U, db_12_4_U }, 32, 858); - add_machine_instr(result, "SRDL", mach_format::RS_a, { reg_4_U, db_12_4_U }, 32, 858); - add_machine_instr(result, "SRA", mach_format::RS_a, { reg_4_U, db_12_4_U }, 32, 859); - add_machine_instr(result, "SRAK", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 859); - add_machine_instr(result, "SRAG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 859); - add_machine_instr(result, "SRL", mach_format::RS_a, { reg_4_U, db_12_4_U }, 32, 860); - add_machine_instr(result, "SRLK", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 860); - add_machine_instr(result, "SRLG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 860); - add_machine_instr(result, "ST", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 860); - add_machine_instr(result, "STY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 861); - add_machine_instr(result, "STG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 861); - add_machine_instr(result, "STRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 861); - add_machine_instr(result, "STGRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 861); - add_machine_instr(result, "STAM", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 48, 861); - add_machine_instr(result, "STAMY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 861); - add_machine_instr(result, "STC", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 862); - add_machine_instr(result, "STCY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 862); - add_machine_instr(result, "STCH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 862); - add_machine_instr(result, "STCM", mach_format::RS_b, { reg_4_U, mask_4_U, db_12_4_U }, 32, 862); - add_machine_instr(result, "STCMY", mach_format::RSY_b, { reg_4_U, mask_4_U, db_20_4_S }, 48, 862); - add_machine_instr(result, "STCMH", mach_format::RSY_b, { reg_4_U, mask_4_U, db_20_4_S }, 48, 862); - add_machine_instr(result, "STCK", mach_format::S, { db_12_4_U }, 32, 863); - add_machine_instr(result, "STCKF", mach_format::S, { db_12_4_U }, 32, 863); - add_machine_instr(result, "STCKE", mach_format::S, { db_12_4_U }, 32, 864); - add_machine_instr(result, "STFLE", mach_format::S, { db_20_4_S }, 48, 866); - add_machine_instr(result, "STGSC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 32, 867); - add_machine_instr(result, "STH", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 867); - add_machine_instr(result, "STHY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 868); - add_machine_instr(result, "STHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 48, 868); - add_machine_instr(result, "STHH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 868); - add_machine_instr(result, "STFH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 868); - add_machine_instr(result, "STM", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 32, 869); - add_machine_instr(result, "STMY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 869); - add_machine_instr(result, "STMG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 869); - add_machine_instr(result, "STMH", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 869); - add_machine_instr(result, "STOC", mach_format::RSY_b, { reg_4_U, db_20_4_S, mask_4_U }, 48, 869); - add_machine_instr(result, "STOCG", mach_format::RSY_b, { reg_4_U, db_20_4_S, mask_4_U }, 48, 869); - add_machine_instr(result, "STOCFH", mach_format::RSY_b, { reg_4_U, db_20_4_S, mask_4_U }, 48, 870); - add_machine_instr(result, "STPQ", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 870); - add_machine_instr(result, "STRVH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 871); - add_machine_instr(result, "STRV", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 871); - add_machine_instr(result, "STRVG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 871); + add_machine_instr(result, "SLDA", mach_format::RS_a, { reg_4_U, db_12_4_U }, 855); + add_machine_instr(result, "SLA", mach_format::RS_a, { reg_4_U, db_12_4_U }, 856); + add_machine_instr(result, "SLAK", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 856); + add_machine_instr(result, "SLAG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 856); + add_machine_instr(result, "SLDL", mach_format::RS_a, { reg_4_U, db_12_4_U }, 856); + add_machine_instr(result, "SLL", mach_format::RS_a, { reg_4_U, db_12_4_U }, 857); + add_machine_instr(result, "SLLK", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 857); + add_machine_instr(result, "SLLG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 857); + add_machine_instr(result, "SRDA", mach_format::RS_a, { reg_4_U, db_12_4_U }, 858); + add_machine_instr(result, "SRDL", mach_format::RS_a, { reg_4_U, db_12_4_U }, 858); + add_machine_instr(result, "SRA", mach_format::RS_a, { reg_4_U, db_12_4_U }, 859); + add_machine_instr(result, "SRAK", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 859); + add_machine_instr(result, "SRAG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 859); + add_machine_instr(result, "SRL", mach_format::RS_a, { reg_4_U, db_12_4_U }, 860); + add_machine_instr(result, "SRLK", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 860); + add_machine_instr(result, "SRLG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 860); + add_machine_instr(result, "ST", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 860); + add_machine_instr(result, "STY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 861); + add_machine_instr(result, "STG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 861); + add_machine_instr(result, "STRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 861); + add_machine_instr(result, "STGRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 861); + add_machine_instr(result, "STAM", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 861); + add_machine_instr(result, "STAMY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 861); + add_machine_instr(result, "STC", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 862); + add_machine_instr(result, "STCY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 862); + add_machine_instr(result, "STCH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 862); + add_machine_instr(result, "STCM", mach_format::RS_b, { reg_4_U, mask_4_U, db_12_4_U }, 862); + add_machine_instr(result, "STCMY", mach_format::RSY_b, { reg_4_U, mask_4_U, db_20_4_S }, 862); + add_machine_instr(result, "STCMH", mach_format::RSY_b, { reg_4_U, mask_4_U, db_20_4_S }, 862); + add_machine_instr(result, "STCK", mach_format::S, { db_12_4_U }, 863); + add_machine_instr(result, "STCKF", mach_format::S, { db_12_4_U }, 863); + add_machine_instr(result, "STCKE", mach_format::S, { db_12_4_U }, 864); + add_machine_instr(result, "STFLE", mach_format::S, { db_20_4_S }, 866); + add_machine_instr(result, "STGSC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 867); + add_machine_instr(result, "STH", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 867); + add_machine_instr(result, "STHY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 868); + add_machine_instr(result, "STHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 868); + add_machine_instr(result, "STHH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 868); + add_machine_instr(result, "STFH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 868); + add_machine_instr(result, "STM", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 869); + add_machine_instr(result, "STMY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 869); + add_machine_instr(result, "STMG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 869); + add_machine_instr(result, "STMH", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 869); + add_machine_instr(result, "STOC", mach_format::RSY_b, { reg_4_U, db_20_4_S, mask_4_U }, 869); + add_machine_instr(result, "STOCG", mach_format::RSY_b, { reg_4_U, db_20_4_S, mask_4_U }, 869); + add_machine_instr(result, "STOCFH", mach_format::RSY_b, { reg_4_U, db_20_4_S, mask_4_U }, 870); + add_machine_instr(result, "STPQ", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 870); + add_machine_instr(result, "STRVH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 871); + add_machine_instr(result, "STRV", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 871); + add_machine_instr(result, "STRVG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 871); add_machine_instr(result, "SR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 871); - add_machine_instr(result, "SGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 871); - add_machine_instr(result, "SGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 871); - add_machine_instr(result, "SRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 871); - add_machine_instr(result, "SGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 872); - add_machine_instr(result, "S", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 872); - add_machine_instr(result, "SY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 872); - add_machine_instr(result, "SG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 872); - add_machine_instr(result, "SGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 872); - add_machine_instr(result, "SH", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 872); - add_machine_instr(result, "SHY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 872); - add_machine_instr(result, "SGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 872); - add_machine_instr(result, "SHHHR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 873); - add_machine_instr(result, "SHHLR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 873); + add_machine_instr(result, "SGR", mach_format::RRE, { reg_4_U, reg_4_U }, 871); + add_machine_instr(result, "SGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 871); + add_machine_instr(result, "SRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 871); + add_machine_instr(result, "SGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 872); + add_machine_instr(result, "S", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 872); + add_machine_instr(result, "SY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 872); + add_machine_instr(result, "SG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 872); + add_machine_instr(result, "SGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 872); + add_machine_instr(result, "SH", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 872); + add_machine_instr(result, "SHY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 872); + add_machine_instr(result, "SGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 872); + add_machine_instr(result, "SHHHR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 873); + add_machine_instr(result, "SHHLR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 873); add_machine_instr(result, "SLR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 873); - add_machine_instr(result, "SLGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 873); - add_machine_instr(result, "SLGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 873); - add_machine_instr(result, "SLRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 873); - add_machine_instr(result, "SLGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 873); - add_machine_instr(result, "SL", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 874); - add_machine_instr(result, "SLY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 874); - add_machine_instr(result, "SLG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 874); - add_machine_instr(result, "SLGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 874); - add_machine_instr(result, "SLFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 874); - add_machine_instr(result, "SLGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 48, 874); - add_machine_instr(result, "SLHHHR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 875); - add_machine_instr(result, "SLHHLR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 875); - add_machine_instr(result, "SLBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 875); - add_machine_instr(result, "SLBGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 875); - add_machine_instr(result, "SLB", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 875); - add_machine_instr(result, "SLBG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 875); + add_machine_instr(result, "SLGR", mach_format::RRE, { reg_4_U, reg_4_U }, 873); + add_machine_instr(result, "SLGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 873); + add_machine_instr(result, "SLRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 873); + add_machine_instr(result, "SLGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 873); + add_machine_instr(result, "SL", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 874); + add_machine_instr(result, "SLY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 874); + add_machine_instr(result, "SLG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 874); + add_machine_instr(result, "SLGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 874); + add_machine_instr(result, "SLFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 874); + add_machine_instr(result, "SLGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 874); + add_machine_instr(result, "SLHHHR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 875); + add_machine_instr(result, "SLHHLR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 875); + add_machine_instr(result, "SLBR", mach_format::RRE, { reg_4_U, reg_4_U }, 875); + add_machine_instr(result, "SLBGR", mach_format::RRE, { reg_4_U, reg_4_U }, 875); + add_machine_instr(result, "SLB", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 875); + add_machine_instr(result, "SLBG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 875); add_machine_instr(result, "SVC", mach_format::I, { imm_8_U }, 16, 876); - add_machine_instr(result, "TS", mach_format::SI, { db_12_4_U }, 32, 876); + add_machine_instr(result, "TS", mach_format::SI, { db_12_4_U }, 876); add_machine_instr(result, "TAM", mach_format::E, {}, 16, 876); - add_machine_instr(result, "TM", mach_format::SI, { db_12_4_U, imm_8_U }, 32, 877); - add_machine_instr(result, "TMY", mach_format::SIY, { db_20_4_S, imm_8_U }, 48, 877); - add_machine_instr(result, "TMHH", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 877); - add_machine_instr(result, "TMHL", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 877); - add_machine_instr(result, "TMH", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 877); - add_machine_instr(result, "TMLH", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 877); - add_machine_instr(result, "TML", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 877); - add_machine_instr(result, "TMLL", mach_format::RI_a, { reg_4_U, imm_16_U }, 32, 877); - add_machine_instr(result, "TABORT", mach_format::S, { db_12_4_U }, 32, 878); - add_machine_instr(result, "TBEGIN", mach_format::SIL, { db_12_4_U, imm_16_S }, 48, 879); - add_machine_instr(result, "TBEGINC", mach_format::SIL, { db_12_4_U, imm_16_S }, 48, 883); - add_machine_instr(result, "TEND", mach_format::S, {}, 32, 885); - add_machine_instr(result, "TR", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 48, 886); - add_machine_instr(result, "TRT", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 48, 887); - add_machine_instr(result, "TRTE", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 32, 887); - add_machine_instr(result, "TRTRE", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 32, 888); - add_machine_instr(result, "TRTR", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 48, 892); - add_machine_instr(result, "TRE", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 893); - add_machine_instr(result, "TROO", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 32, 895); - add_machine_instr(result, "TROT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 32, 895); - add_machine_instr(result, "TRTO", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 32, 895); - add_machine_instr(result, "TRTT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 32, 895); - add_machine_instr(result, "UNPK", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 48, 900); - add_machine_instr(result, "UNPKA", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 48, 901); - add_machine_instr(result, "UNPKU", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 48, 902); + add_machine_instr(result, "TM", mach_format::SI, { db_12_4_U, imm_8_U }, 877); + add_machine_instr(result, "TMY", mach_format::SIY, { db_20_4_S, imm_8_U }, 877); + add_machine_instr(result, "TMHH", mach_format::RI_a, { reg_4_U, imm_16_U }, 877); + add_machine_instr(result, "TMHL", mach_format::RI_a, { reg_4_U, imm_16_U }, 877); + add_machine_instr(result, "TMH", mach_format::RI_a, { reg_4_U, imm_16_U }, 877); + add_machine_instr(result, "TMLH", mach_format::RI_a, { reg_4_U, imm_16_U }, 877); + add_machine_instr(result, "TML", mach_format::RI_a, { reg_4_U, imm_16_U }, 877); + add_machine_instr(result, "TMLL", mach_format::RI_a, { reg_4_U, imm_16_U }, 877); + add_machine_instr(result, "TABORT", mach_format::S, { db_12_4_U }, 878); + add_machine_instr(result, "TBEGIN", mach_format::SIL, { db_12_4_U, imm_16_S }, 879); + add_machine_instr(result, "TBEGINC", mach_format::SIL, { db_12_4_U, imm_16_S }, 883); + add_machine_instr(result, "TEND", mach_format::S, {}, 885); + add_machine_instr(result, "TR", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 886); + add_machine_instr(result, "TRT", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 887); + add_machine_instr(result, "TRTE", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 887); + add_machine_instr(result, "TRTRE", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 888); + add_machine_instr(result, "TRTR", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 892); + add_machine_instr(result, "TRE", mach_format::RRE, { reg_4_U, reg_4_U }, 893); + add_machine_instr(result, "TROO", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 895); + add_machine_instr(result, "TROT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 895); + add_machine_instr(result, "TRTO", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 895); + add_machine_instr(result, "TRTT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 895); + add_machine_instr(result, "UNPK", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 900); + add_machine_instr(result, "UNPKA", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 901); + add_machine_instr(result, "UNPKU", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 902); add_machine_instr(result, "UPT", mach_format::E, {}, 16, 903); - add_machine_instr(result, "AP", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 48, 920); - add_machine_instr(result, "CP", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 48, 921); - add_machine_instr(result, "DP", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 48, 921); - add_machine_instr(result, "ED", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 48, 922); - add_machine_instr(result, "EDMK", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 48, 925); - add_machine_instr(result, "SRP", mach_format::SS_c, { db_12_4x4L_U, db_12_4_U, imm_4_U }, 48, 926); - add_machine_instr(result, "MP", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 48, 926); - add_machine_instr(result, "SP", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 48, 927); - add_machine_instr(result, "TP", mach_format::RSL_a, { db_12_4x4L_U }, 48, 928); - add_machine_instr(result, "ZAP", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 48, 928); - add_machine_instr(result, "THDR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 955); - add_machine_instr(result, "THDER", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 955); - add_machine_instr(result, "TBEDR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 956); - add_machine_instr(result, "TBDR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 956); - add_machine_instr(result, "CPSDR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U }, 32, 958); - add_machine_instr(result, "EFPC", mach_format::RRE, { reg_4_U }, 32, 958); + add_machine_instr(result, "AP", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 920); + add_machine_instr(result, "CP", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 921); + add_machine_instr(result, "DP", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 921); + add_machine_instr(result, "ED", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 922); + add_machine_instr(result, "EDMK", mach_format::SS_a, { db_12_8x4L_U, db_12_4_U }, 925); + add_machine_instr(result, "SRP", mach_format::SS_c, { db_12_4x4L_U, db_12_4_U, imm_4_U }, 926); + add_machine_instr(result, "MP", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 926); + add_machine_instr(result, "SP", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 927); + add_machine_instr(result, "TP", mach_format::RSL_a, { db_12_4x4L_U }, 928); + add_machine_instr(result, "ZAP", mach_format::SS_b, { db_12_4x4L_U, db_12_4x4L_U }, 928); + add_machine_instr(result, "THDR", mach_format::RRE, { reg_4_U, reg_4_U }, 955); + add_machine_instr(result, "THDER", mach_format::RRE, { reg_4_U, reg_4_U }, 955); + add_machine_instr(result, "TBEDR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 956); + add_machine_instr(result, "TBDR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 956); + add_machine_instr(result, "CPSDR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U }, 958); + add_machine_instr(result, "EFPC", mach_format::RRE, { reg_4_U }, 958); add_machine_instr(result, "LER", mach_format::RR, { reg_4_U, reg_4_U }, 16, 959); add_machine_instr(result, "LDR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 959); - add_machine_instr(result, "LXR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 959); - add_machine_instr(result, "LE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 959); - add_machine_instr(result, "LD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 959); - add_machine_instr(result, "LEY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 959); - add_machine_instr(result, "LDY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 959); - add_machine_instr(result, "LCDFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 959); - add_machine_instr(result, "LFPC", mach_format::S, { db_12_4_U }, 32, 959); - add_machine_instr(result, "LFAS", mach_format::S, { db_12_4_U }, 32, 960); - add_machine_instr(result, "LDGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 962); - add_machine_instr(result, "LGDR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 962); - add_machine_instr(result, "LNDFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 962); - add_machine_instr(result, "LPDFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 962); - add_machine_instr(result, "LZER", mach_format::RRE, { reg_4_U }, 32, 963); - add_machine_instr(result, "LZXR", mach_format::RRE, { reg_4_U }, 32, 963); - add_machine_instr(result, "LZDR", mach_format::RRE, { reg_4_U }, 32, 963); + add_machine_instr(result, "LXR", mach_format::RRE, { reg_4_U, reg_4_U }, 959); + add_machine_instr(result, "LE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 959); + add_machine_instr(result, "LD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 959); + add_machine_instr(result, "LEY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 959); + add_machine_instr(result, "LDY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 959); + add_machine_instr(result, "LCDFR", mach_format::RRE, { reg_4_U, reg_4_U }, 959); + add_machine_instr(result, "LFPC", mach_format::S, { db_12_4_U }, 959); + add_machine_instr(result, "LFAS", mach_format::S, { db_12_4_U }, 960); + add_machine_instr(result, "LDGR", mach_format::RRE, { reg_4_U, reg_4_U }, 962); + add_machine_instr(result, "LGDR", mach_format::RRE, { reg_4_U, reg_4_U }, 962); + add_machine_instr(result, "LNDFR", mach_format::RRE, { reg_4_U, reg_4_U }, 962); + add_machine_instr(result, "LPDFR", mach_format::RRE, { reg_4_U, reg_4_U }, 962); + add_machine_instr(result, "LZER", mach_format::RRE, { reg_4_U }, 963); + add_machine_instr(result, "LZXR", mach_format::RRE, { reg_4_U }, 963); + add_machine_instr(result, "LZDR", mach_format::RRE, { reg_4_U }, 963); add_machine_instr(result, "PFPO", mach_format::E, {}, 16, 963); - add_machine_instr(result, "SRNM", mach_format::S, { db_12_4_U }, 32, 975); - add_machine_instr(result, "SRNMB", mach_format::S, { db_12_4_U }, 32, 975); - add_machine_instr(result, "SRNMT", mach_format::S, { db_12_4_U }, 32, 975); - add_machine_instr(result, "SFPC", mach_format::RRE, { reg_4_U }, 32, 975); - add_machine_instr(result, "SFASR", mach_format::RRE, { reg_4_U }, 32, 976); - add_machine_instr(result, "STE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 976); - add_machine_instr(result, "STD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 976); - add_machine_instr(result, "STDY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 977); - add_machine_instr(result, "STEY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 977); - add_machine_instr(result, "STFPC", mach_format::S, { db_12_4_U }, 32, 977); - add_machine_instr(result, "BSA", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 989); - add_machine_instr(result, "BAKR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 993); - add_machine_instr(result, "BSG", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 995); - add_machine_instr(result, "CRDTE", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1, 32, 999); - add_machine_instr(result, "CSP", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1003); - add_machine_instr(result, "CSPG", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1003); - add_machine_instr(result, "ESEA", mach_format::RRE, { reg_4_U }, 32, 1006); - add_machine_instr(result, "EPAR", mach_format::RRE, { reg_4_U }, 32, 1006); - add_machine_instr(result, "EPAIR", mach_format::RRE, { reg_4_U }, 32, 1006); - add_machine_instr(result, "ESAR", mach_format::RRE, { reg_4_U }, 32, 1006); - add_machine_instr(result, "ESAIR", mach_format::RRE, { reg_4_U }, 32, 1007); - add_machine_instr(result, "EREG", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1007); - add_machine_instr(result, "EREGG", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1007); - add_machine_instr(result, "ESTA", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1008); - add_machine_instr(result, "IAC", mach_format::RRE, { reg_4_U }, 32, 1011); - add_machine_instr(result, "IPK", mach_format::S, {}, 32, 1012); - add_machine_instr(result, "IRBM", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1012); - add_machine_instr(result, "ISKE", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1012); - add_machine_instr(result, "IVSK", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1013); - add_machine_instr(result, "IDTE", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1, 32, 1014); - add_machine_instr(result, "IPTE", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 2, 32, 1019); - add_machine_instr(result, "LASP", mach_format::SSE, { db_12_4_U, db_12_4_U }, 48, 1023); - add_machine_instr(result, "LCTL", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 32, 1032); - add_machine_instr(result, "LCTLG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 1032); - add_machine_instr(result, "LPTEA", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1032); - add_machine_instr(result, "LPSW", mach_format::SI, { db_12_4_U }, 32, 1036); - add_machine_instr(result, "LPSWE", mach_format::S, { db_12_4_U }, 32, 1037); - add_machine_instr(result, "LRA", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1038); - add_machine_instr(result, "LRAY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 1038); - add_machine_instr(result, "LRAG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 48, 1038); - add_machine_instr(result, "LURA", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1042); - add_machine_instr(result, "LURAG", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1042); - add_machine_instr(result, "MSTA", mach_format::RRE, { reg_4_U }, 32, 1043); - add_machine_instr(result, "MVPG", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1044); - add_machine_instr(result, "MVCP", mach_format::SS_d, { drb_12_4x4_U, db_12_4_U, reg_4_U }, 48, 1046); - add_machine_instr(result, "MVCS", mach_format::SS_d, { drb_12_4x4_U, db_12_4_U, reg_4_U }, 48, 1046); - add_machine_instr(result, "MVCDK", mach_format::SSE, { db_12_4_U, db_12_4_U }, 48, 1048); - add_machine_instr(result, "MVCK", mach_format::SS_d, { drb_12_4x4_U, db_12_4_U, reg_4_U }, 48, 1049); - add_machine_instr(result, "MVCOS", mach_format::SSF, { db_12_4_U, db_12_4_U, reg_4_U }, 48, 1050); - add_machine_instr(result, "MVCSK", mach_format::SSE, { db_12_4_U, db_12_4_U }, 48, 1053); - add_machine_instr(result, "PGIN", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1054); - add_machine_instr(result, "PGOUT", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1055); - add_machine_instr(result, "PCKMO", mach_format::RRE, {}, 32, 1056); - add_machine_instr(result, "PFMF", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1059); + add_machine_instr(result, "SRNM", mach_format::S, { db_12_4_U }, 975); + add_machine_instr(result, "SRNMB", mach_format::S, { db_12_4_U }, 975); + add_machine_instr(result, "SRNMT", mach_format::S, { db_12_4_U }, 975); + add_machine_instr(result, "SFPC", mach_format::RRE, { reg_4_U }, 975); + add_machine_instr(result, "SFASR", mach_format::RRE, { reg_4_U }, 976); + add_machine_instr(result, "STE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 976); + add_machine_instr(result, "STD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 976); + add_machine_instr(result, "STDY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 977); + add_machine_instr(result, "STEY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 977); + add_machine_instr(result, "STFPC", mach_format::S, { db_12_4_U }, 977); + add_machine_instr(result, "BSA", mach_format::RRE, { reg_4_U, reg_4_U }, 989); + add_machine_instr(result, "BAKR", mach_format::RRE, { reg_4_U, reg_4_U }, 993); + add_machine_instr(result, "BSG", mach_format::RRE, { reg_4_U, reg_4_U }, 995); + add_machine_instr(result, "CRDTE", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1, 999); + add_machine_instr(result, "CSP", mach_format::RRE, { reg_4_U, reg_4_U }, 1003); + add_machine_instr(result, "CSPG", mach_format::RRE, { reg_4_U, reg_4_U }, 1003); + add_machine_instr(result, "ESEA", mach_format::RRE, { reg_4_U }, 1006); + add_machine_instr(result, "EPAR", mach_format::RRE, { reg_4_U }, 1006); + add_machine_instr(result, "EPAIR", mach_format::RRE, { reg_4_U }, 1006); + add_machine_instr(result, "ESAR", mach_format::RRE, { reg_4_U }, 1006); + add_machine_instr(result, "ESAIR", mach_format::RRE, { reg_4_U }, 1007); + add_machine_instr(result, "EREG", mach_format::RRE, { reg_4_U, reg_4_U }, 1007); + add_machine_instr(result, "EREGG", mach_format::RRE, { reg_4_U, reg_4_U }, 1007); + add_machine_instr(result, "ESTA", mach_format::RRE, { reg_4_U, reg_4_U }, 1008); + add_machine_instr(result, "IAC", mach_format::RRE, { reg_4_U }, 1011); + add_machine_instr(result, "IPK", mach_format::S, {}, 1012); + add_machine_instr(result, "IRBM", mach_format::RRE, { reg_4_U, reg_4_U }, 1012); + add_machine_instr(result, "ISKE", mach_format::RRE, { reg_4_U, reg_4_U }, 1012); + add_machine_instr(result, "IVSK", mach_format::RRE, { reg_4_U, reg_4_U }, 1013); + add_machine_instr(result, "IDTE", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1, 1014); + add_machine_instr(result, "IPTE", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 2, 1019); + add_machine_instr(result, "LASP", mach_format::SSE, { db_12_4_U, db_12_4_U }, 1023); + add_machine_instr(result, "LCTL", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 1032); + add_machine_instr(result, "LCTLG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 1032); + add_machine_instr(result, "LPTEA", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1032); + add_machine_instr(result, "LPSW", mach_format::SI, { db_12_4_U }, 1036); + add_machine_instr(result, "LPSWE", mach_format::S, { db_12_4_U }, 1037); + add_machine_instr(result, "LRA", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1038); + add_machine_instr(result, "LRAY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 1038); + add_machine_instr(result, "LRAG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 1038); + add_machine_instr(result, "LURA", mach_format::RRE, { reg_4_U, reg_4_U }, 1042); + add_machine_instr(result, "LURAG", mach_format::RRE, { reg_4_U, reg_4_U }, 1042); + add_machine_instr(result, "MSTA", mach_format::RRE, { reg_4_U }, 1043); + add_machine_instr(result, "MVPG", mach_format::RRE, { reg_4_U, reg_4_U }, 1044); + add_machine_instr(result, "MVCP", mach_format::SS_d, { drb_12_4x4_U, db_12_4_U, reg_4_U }, 1046); + add_machine_instr(result, "MVCS", mach_format::SS_d, { drb_12_4x4_U, db_12_4_U, reg_4_U }, 1046); + add_machine_instr(result, "MVCDK", mach_format::SSE, { db_12_4_U, db_12_4_U }, 1048); + add_machine_instr(result, "MVCK", mach_format::SS_d, { drb_12_4x4_U, db_12_4_U, reg_4_U }, 1049); + add_machine_instr(result, "MVCOS", mach_format::SSF, { db_12_4_U, db_12_4_U, reg_4_U }, 1050); + add_machine_instr(result, "MVCSK", mach_format::SSE, { db_12_4_U, db_12_4_U }, 1053); + add_machine_instr(result, "PGIN", mach_format::RRE, { reg_4_U, reg_4_U }, 1054); + add_machine_instr(result, "PGOUT", mach_format::RRE, { reg_4_U, reg_4_U }, 1055); + add_machine_instr(result, "PCKMO", mach_format::RRE, {}, 1056); + add_machine_instr(result, "PFMF", mach_format::RRE, { reg_4_U, reg_4_U }, 1059); add_machine_instr(result, "PTFF", mach_format::E, {}, 16, 1063); - add_machine_instr(result, "PTF", mach_format::RRE, { reg_4_U }, 32, 1071); - add_machine_instr(result, "PC", mach_format::S, { db_12_4_U }, 32, 1072); + add_machine_instr(result, "PTF", mach_format::RRE, { reg_4_U }, 1071); + add_machine_instr(result, "PC", mach_format::S, { db_12_4_U }, 1072); add_machine_instr(result, "PR", mach_format::E, {}, 16, 1085); - add_machine_instr(result, "PTI", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1089); - add_machine_instr(result, "PT", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1089); - add_machine_instr(result, "PALB", mach_format::RRE, {}, 32, 1098); - add_machine_instr(result, "PTLB", mach_format::S, {}, 32, 1098); - add_machine_instr(result, "RRBE", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1098); - add_machine_instr(result, "RRBM", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1099); - add_machine_instr(result, "RP", mach_format::S, { db_12_4_U }, 32, 1099); - add_machine_instr(result, "SAC", mach_format::S, { db_12_4_U }, 32, 1102); - add_machine_instr(result, "SACF", mach_format::S, { db_12_4_U }, 32, 1102); - add_machine_instr(result, "SCK", mach_format::S, { db_12_4_U }, 32, 1103); - add_machine_instr(result, "SCKC", mach_format::S, { db_12_4_U }, 32, 1104); + add_machine_instr(result, "PTI", mach_format::RRE, { reg_4_U, reg_4_U }, 1089); + add_machine_instr(result, "PT", mach_format::RRE, { reg_4_U, reg_4_U }, 1089); + add_machine_instr(result, "PALB", mach_format::RRE, {}, 1098); + add_machine_instr(result, "PTLB", mach_format::S, {}, 1098); + add_machine_instr(result, "RRBE", mach_format::RRE, { reg_4_U, reg_4_U }, 1098); + add_machine_instr(result, "RRBM", mach_format::RRE, { reg_4_U, reg_4_U }, 1099); + add_machine_instr(result, "RP", mach_format::S, { db_12_4_U }, 1099); + add_machine_instr(result, "SAC", mach_format::S, { db_12_4_U }, 1102); + add_machine_instr(result, "SACF", mach_format::S, { db_12_4_U }, 1102); + add_machine_instr(result, "SCK", mach_format::S, { db_12_4_U }, 1103); + add_machine_instr(result, "SCKC", mach_format::S, { db_12_4_U }, 1104); add_machine_instr(result, "SCKPF", mach_format::E, {}, 16, 1105); - add_machine_instr(result, "SPX", mach_format::S, { db_12_4_U }, 32, 1105); - add_machine_instr(result, "SPT", mach_format::S, { db_12_4_U }, 32, 1105); - add_machine_instr(result, "SPKA", mach_format::S, { db_12_4_U }, 32, 1106); - add_machine_instr(result, "SSAR", mach_format::RRE, { reg_4_U }, 32, 1107); - add_machine_instr(result, "SSAIR", mach_format::RRE, { reg_4_U }, 32, 1107); - add_machine_instr(result, "SSKE", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 32, 1112); - add_machine_instr(result, "SSM", mach_format::SI, { db_12_4_U }, 32, 1115); - add_machine_instr(result, "SIGP", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 32, 1115); - add_machine_instr(result, "STCKC", mach_format::S, { db_12_4_U }, 32, 1117); - add_machine_instr(result, "STCTL", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 32, 1117); - add_machine_instr(result, "STCTG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 1117); - add_machine_instr(result, "STAP", mach_format::S, { db_12_4_U }, 32, 1118); - add_machine_instr(result, "STIDP", mach_format::S, { db_12_4_U }, 32, 1118); - add_machine_instr(result, "STPT", mach_format::S, { db_12_4_U }, 32, 1120); - add_machine_instr(result, "STFL", mach_format::S, { db_12_4_U }, 32, 1120); - add_machine_instr(result, "STPX", mach_format::S, { db_12_4_U }, 32, 1121); - add_machine_instr(result, "STRAG", mach_format::SSE, { db_12_4_U, db_12_4_U }, 32, 1121); - add_machine_instr(result, "STSI", mach_format::S, { db_12_4_U }, 32, 1122); - add_machine_instr(result, "STOSM", mach_format::SI, { db_12_4_U, imm_8_S }, 32, 1146); - add_machine_instr(result, "STNSM", mach_format::SI, { db_12_4_U, imm_8_S }, 32, 1146); - add_machine_instr(result, "STURA", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1147); - add_machine_instr(result, "STURG", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1147); - add_machine_instr(result, "TAR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1147); - add_machine_instr(result, "TB", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1149); - add_machine_instr(result, "TPEI", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1151); - add_machine_instr(result, "TPROT", mach_format::SSE, { db_12_4_U, db_12_4_U }, 48, 1152); - add_machine_instr(result, "TRACE", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 32, 1155); - add_machine_instr(result, "TRACG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 48, 1155); + add_machine_instr(result, "SPX", mach_format::S, { db_12_4_U }, 1105); + add_machine_instr(result, "SPT", mach_format::S, { db_12_4_U }, 1105); + add_machine_instr(result, "SPKA", mach_format::S, { db_12_4_U }, 1106); + add_machine_instr(result, "SSAR", mach_format::RRE, { reg_4_U }, 1107); + add_machine_instr(result, "SSAIR", mach_format::RRE, { reg_4_U }, 1107); + add_machine_instr(result, "SSKE", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 1112); + add_machine_instr(result, "SSM", mach_format::SI, { db_12_4_U }, 1115); + add_machine_instr(result, "SIGP", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 1115); + add_machine_instr(result, "STCKC", mach_format::S, { db_12_4_U }, 1117); + add_machine_instr(result, "STCTL", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 1117); + add_machine_instr(result, "STCTG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 1117); + add_machine_instr(result, "STAP", mach_format::S, { db_12_4_U }, 1118); + add_machine_instr(result, "STIDP", mach_format::S, { db_12_4_U }, 1118); + add_machine_instr(result, "STPT", mach_format::S, { db_12_4_U }, 1120); + add_machine_instr(result, "STFL", mach_format::S, { db_12_4_U }, 1120); + add_machine_instr(result, "STPX", mach_format::S, { db_12_4_U }, 1121); + add_machine_instr(result, "STRAG", mach_format::SSE, { db_12_4_U, db_12_4_U }, 1121); + add_machine_instr(result, "STSI", mach_format::S, { db_12_4_U }, 1122); + add_machine_instr(result, "STOSM", mach_format::SI, { db_12_4_U, imm_8_S }, 1146); + add_machine_instr(result, "STNSM", mach_format::SI, { db_12_4_U, imm_8_S }, 1146); + add_machine_instr(result, "STURA", mach_format::RRE, { reg_4_U, reg_4_U }, 1147); + add_machine_instr(result, "STURG", mach_format::RRE, { reg_4_U, reg_4_U }, 1147); + add_machine_instr(result, "TAR", mach_format::RRE, { reg_4_U, reg_4_U }, 1147); + add_machine_instr(result, "TB", mach_format::RRE, { reg_4_U, reg_4_U }, 1149); + add_machine_instr(result, "TPEI", mach_format::RRE, { reg_4_U, reg_4_U }, 1151); + add_machine_instr(result, "TPROT", mach_format::SSE, { db_12_4_U, db_12_4_U }, 1152); + add_machine_instr(result, "TRACE", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 1155); + add_machine_instr(result, "TRACG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 1155); add_machine_instr(result, "TRAP2", mach_format::E, {}, 16, 1156); - add_machine_instr(result, "TRAP4", mach_format::S, { db_12_4_U }, 32, 1156); - add_machine_instr(result, "XSCH", mach_format::S, {}, 32, 1215); - add_machine_instr(result, "CSCH", mach_format::S, {}, 32, 1217); - add_machine_instr(result, "HSCH", mach_format::S, {}, 32, 1218); - add_machine_instr(result, "MSCH", mach_format::S, { db_12_4_U }, 32, 1219); - add_machine_instr(result, "RCHP", mach_format::S, {}, 32, 1221); - add_machine_instr(result, "RSCH", mach_format::S, {}, 32, 1222); - add_machine_instr(result, "SAL", mach_format::S, {}, 32, 1224); - add_machine_instr(result, "SCHM", mach_format::S, {}, 32, 1225); - add_machine_instr(result, "SSCH", mach_format::S, { db_12_4_U }, 32, 1227); - add_machine_instr(result, "STCPS", mach_format::S, { db_12_4_U }, 32, 1228); - add_machine_instr(result, "STCRW", mach_format::S, { db_12_4_U }, 32, 1229); - add_machine_instr(result, "STSCH", mach_format::S, { db_12_4_U }, 32, 1230); - add_machine_instr(result, "TPI", mach_format::S, { db_12_4_U }, 32, 1231); - add_machine_instr(result, "TSCH", mach_format::S, { db_12_4_U }, 32, 1232); + add_machine_instr(result, "TRAP4", mach_format::S, { db_12_4_U }, 1156); + add_machine_instr(result, "XSCH", mach_format::S, {}, 1215); + add_machine_instr(result, "CSCH", mach_format::S, {}, 1217); + add_machine_instr(result, "HSCH", mach_format::S, {}, 1218); + add_machine_instr(result, "MSCH", mach_format::S, { db_12_4_U }, 1219); + add_machine_instr(result, "RCHP", mach_format::S, {}, 1221); + add_machine_instr(result, "RSCH", mach_format::S, {}, 1222); + add_machine_instr(result, "SAL", mach_format::S, {}, 1224); + add_machine_instr(result, "SCHM", mach_format::S, {}, 1225); + add_machine_instr(result, "SSCH", mach_format::S, { db_12_4_U }, 1227); + add_machine_instr(result, "STCPS", mach_format::S, { db_12_4_U }, 1228); + add_machine_instr(result, "STCRW", mach_format::S, { db_12_4_U }, 1229); + add_machine_instr(result, "STSCH", mach_format::S, { db_12_4_U }, 1230); + add_machine_instr(result, "TPI", mach_format::S, { db_12_4_U }, 1231); + add_machine_instr(result, "TSCH", mach_format::S, { db_12_4_U }, 1232); - add_machine_instr(result, "AER", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1412); - add_machine_instr(result, "ADR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1412); - add_machine_instr(result, "AXR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1412); - add_machine_instr(result, "AE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1412); - add_machine_instr(result, "AD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1412); - add_machine_instr(result, "AWR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1413); - add_machine_instr(result, "AUR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1413); - add_machine_instr(result, "AU", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1413); - add_machine_instr(result, "AW", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1413); - add_machine_instr(result, "CER", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1414); - add_machine_instr(result, "CDR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1414); - add_machine_instr(result, "CXR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1414); - add_machine_instr(result, "CE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1414); - add_machine_instr(result, "CD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1414); - add_machine_instr(result, "CEFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1415); - add_machine_instr(result, "CDFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1415); - add_machine_instr(result, "CXFR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1415); - add_machine_instr(result, "CEGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1415); - add_machine_instr(result, "CDGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1415); - add_machine_instr(result, "CXGR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1415); - add_machine_instr(result, "CFER", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1415); - add_machine_instr(result, "CFDR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1415); - add_machine_instr(result, "CFXR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1415); - add_machine_instr(result, "CGER", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1415); - add_machine_instr(result, "CGDR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1415); - add_machine_instr(result, "CGXR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1415); - add_machine_instr(result, "DDR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1416); - add_machine_instr(result, "DER", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1416); - add_machine_instr(result, "DXR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1416); - add_machine_instr(result, "DD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1416); - add_machine_instr(result, "DE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1416); - add_machine_instr(result, "HDR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1417); - add_machine_instr(result, "HER", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1417); - add_machine_instr(result, "LTER", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1417); - add_machine_instr(result, "LTDR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1417); - add_machine_instr(result, "LTXR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1418); - add_machine_instr(result, "LCER", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1418); - add_machine_instr(result, "LCDR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1418); - add_machine_instr(result, "LCXR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1418); - add_machine_instr(result, "FIER", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1419); - add_machine_instr(result, "FIDR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1419); - add_machine_instr(result, "FIXR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1419); - add_machine_instr(result, "LDER", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1419); - add_machine_instr(result, "LXDR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1419); - add_machine_instr(result, "LXER", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1419); - add_machine_instr(result, "LDE", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1419); - add_machine_instr(result, "LXD", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1419); - add_machine_instr(result, "LXE", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1419); - add_machine_instr(result, "LNDR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1420); - add_machine_instr(result, "LNER", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1420); - add_machine_instr(result, "LPDR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1420); - add_machine_instr(result, "LPER", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1420); - add_machine_instr(result, "LNXR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1420); - add_machine_instr(result, "LPXR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1420); - add_machine_instr(result, "LEDR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1421); - add_machine_instr(result, "LDXR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1421); - add_machine_instr(result, "LRER", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1421); - add_machine_instr(result, "LRDR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1421); - add_machine_instr(result, "LEXR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1421); - add_machine_instr(result, "MEER", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1421); - add_machine_instr(result, "MDR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1421); - add_machine_instr(result, "MXR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1421); - add_machine_instr(result, "MDER", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1421); - add_machine_instr(result, "MER", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1421); - add_machine_instr(result, "MXDR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1421); - add_machine_instr(result, "MEE", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1422); - add_machine_instr(result, "MD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1422); - add_machine_instr(result, "MDE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1422); - add_machine_instr(result, "MXD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1422); - add_machine_instr(result, "ME", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1422); - add_machine_instr(result, "MAER", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1423); - add_machine_instr(result, "MADR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1423); - add_machine_instr(result, "MAD", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1423); - add_machine_instr(result, "MAE", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1423); - add_machine_instr(result, "MSER", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1423); - add_machine_instr(result, "MSDR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1423); - add_machine_instr(result, "MSE", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1423); - add_machine_instr(result, "MSD", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1423); - add_machine_instr(result, "MAYR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1424); - add_machine_instr(result, "MAYHR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1424); - add_machine_instr(result, "MAYLR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1424); - add_machine_instr(result, "MAY", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1424); - add_machine_instr(result, "MAYH", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1424); - add_machine_instr(result, "MAYL", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1424); - add_machine_instr(result, "MYR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1426); - add_machine_instr(result, "MYHR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1426); - add_machine_instr(result, "MYLR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1426); - add_machine_instr(result, "MY", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1426); - add_machine_instr(result, "MYH", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1426); - add_machine_instr(result, "MYL", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1426); - add_machine_instr(result, "SQER", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1427); - add_machine_instr(result, "SQDR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1427); - add_machine_instr(result, "SQXR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1427); - add_machine_instr(result, "SQE", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1427); - add_machine_instr(result, "SQD", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1427); - add_machine_instr(result, "SER", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1428); - add_machine_instr(result, "SDR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1428); - add_machine_instr(result, "SXR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1428); - add_machine_instr(result, "SE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1428); - add_machine_instr(result, "SD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1428); - add_machine_instr(result, "SUR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1429); - add_machine_instr(result, "SWR", mach_format::RR, { reg_4_U, reg_4_U }, 16, 1429); - add_machine_instr(result, "SU", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1429); - add_machine_instr(result, "SW", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 32, 1429); - add_machine_instr(result, "AEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1445); - add_machine_instr(result, "ADBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1445); - add_machine_instr(result, "AXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1445); - add_machine_instr(result, "AEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1445); - add_machine_instr(result, "ADB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1445); - add_machine_instr(result, "CEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1447); - add_machine_instr(result, "CDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1447); - add_machine_instr(result, "CXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1447); - add_machine_instr(result, "CDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1447); - add_machine_instr(result, "CEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1447); - add_machine_instr(result, "KEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1448); - add_machine_instr(result, "KDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1448); - add_machine_instr(result, "KXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1448); - add_machine_instr(result, "KDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1448); - add_machine_instr(result, "KEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1448); - add_machine_instr(result, "CEFBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1449); - add_machine_instr(result, "CDFBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1449); - add_machine_instr(result, "CXFBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1449); - add_machine_instr(result, "CEGBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1449); - add_machine_instr(result, "CDGBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1449); - add_machine_instr(result, "CXGBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1449); - add_machine_instr(result, "CEFBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1449); - add_machine_instr(result, "CDFBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1449); - add_machine_instr(result, "CXFBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1449); - add_machine_instr(result, "CEGBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1449); - add_machine_instr(result, "CDGBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1449); - add_machine_instr(result, "CXGBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1449); - add_machine_instr(result, "CELFBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1451); - add_machine_instr(result, "CDLFBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1451); - add_machine_instr(result, "CXLFBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1451); - add_machine_instr(result, "CELGBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1451); - add_machine_instr(result, "CDLGBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1451); - add_machine_instr(result, "CXLGBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1451); - add_machine_instr(result, "CFEBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1452); - add_machine_instr(result, "CFDBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1452); - add_machine_instr(result, "CFXBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1452); - add_machine_instr(result, "CGEBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1452); - add_machine_instr(result, "CGDBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1452); - add_machine_instr(result, "CGXBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1452); - add_machine_instr(result, "CFEBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1452); - add_machine_instr(result, "CFDBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1452); - add_machine_instr(result, "CFXBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1452); - add_machine_instr(result, "CGEBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1452); - add_machine_instr(result, "CGDBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1452); - add_machine_instr(result, "CGXBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1452); - add_machine_instr(result, "CLFEBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1455); - add_machine_instr(result, "CLFDBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1455); - add_machine_instr(result, "CLFXBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1455); - add_machine_instr(result, "CLGEBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1455); - add_machine_instr(result, "CLGDBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1455); - add_machine_instr(result, "CLGXBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1455); - add_machine_instr(result, "DEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1457); - add_machine_instr(result, "DDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1457); - add_machine_instr(result, "DXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1457); - add_machine_instr(result, "DEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1457); - add_machine_instr(result, "DDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1457); - add_machine_instr(result, "DIEBR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1458); - add_machine_instr(result, "DIDBR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1458); - add_machine_instr(result, "LTEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1461); - add_machine_instr(result, "LTDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1461); - add_machine_instr(result, "LTXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1461); - add_machine_instr(result, "LCEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1461); - add_machine_instr(result, "LCDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1461); - add_machine_instr(result, "LCXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1461); - add_machine_instr(result, "FIEBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1462); - add_machine_instr(result, "FIDBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1462); - add_machine_instr(result, "FIXBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1462); - add_machine_instr(result, "FIEBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1462); - add_machine_instr(result, "FIDBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1462); - add_machine_instr(result, "FIXBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1462); - add_machine_instr(result, "LDEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1463); - add_machine_instr(result, "LXDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1463); - add_machine_instr(result, "LXEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1463); - add_machine_instr(result, "LDEB", mach_format::RRE, { reg_4_U, reg_4_U }, 48, 1464); - add_machine_instr(result, "LXDB", mach_format::RRE, { reg_4_U, reg_4_U }, 48, 1464); - add_machine_instr(result, "LXEB", mach_format::RRE, { reg_4_U, reg_4_U }, 48, 1464); - add_machine_instr(result, "LNEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1464); - add_machine_instr(result, "LNDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1464); - add_machine_instr(result, "LNXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1464); - add_machine_instr(result, "LPEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1465); - add_machine_instr(result, "LPDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1465); - add_machine_instr(result, "LPXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1465); - add_machine_instr(result, "LEDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1465); - add_machine_instr(result, "LDXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1465); - add_machine_instr(result, "LEXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1465); - add_machine_instr(result, "LEDBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1465); - add_machine_instr(result, "LDXBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1465); - add_machine_instr(result, "LEXBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1465); - add_machine_instr(result, "MEEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1467); - add_machine_instr(result, "MDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1467); - add_machine_instr(result, "MXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1467); - add_machine_instr(result, "MDEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1467); - add_machine_instr(result, "MXDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1467); - add_machine_instr(result, "MEEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1467); - add_machine_instr(result, "MDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1467); - add_machine_instr(result, "MDEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1467); - add_machine_instr(result, "MXDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1467); - add_machine_instr(result, "MADBR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1468); - add_machine_instr(result, "MAEBR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1468); - add_machine_instr(result, "MAEB", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1468); - add_machine_instr(result, "MADB", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1468); - add_machine_instr(result, "MSEBR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1468); - add_machine_instr(result, "MSDBR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 32, 1468); - add_machine_instr(result, "MSEB", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1468); - add_machine_instr(result, "MSDB", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1468); - add_machine_instr(result, "SQEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1470); - add_machine_instr(result, "SQDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1470); - add_machine_instr(result, "SQXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1470); - add_machine_instr(result, "SQEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1470); - add_machine_instr(result, "SQDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1470); - add_machine_instr(result, "SEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1470); - add_machine_instr(result, "SDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1470); - add_machine_instr(result, "SXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1470); - add_machine_instr(result, "SEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1470); - add_machine_instr(result, "SDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1470); - add_machine_instr(result, "TCEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1471); - add_machine_instr(result, "TCDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1471); - add_machine_instr(result, "TCXB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1471); - add_machine_instr(result, "ADTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 1491); - add_machine_instr(result, "AXTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 1491); - add_machine_instr(result, "ADTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1491); - add_machine_instr(result, "AXTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1491); - add_machine_instr(result, "CDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1494); - add_machine_instr(result, "CXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1494); - add_machine_instr(result, "KDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1495); - add_machine_instr(result, "KXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1495); - add_machine_instr(result, "CEDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1495); - add_machine_instr(result, "CEXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1495); - add_machine_instr(result, "CDGTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1496); - add_machine_instr(result, "CXGTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1496); - add_machine_instr(result, "CDGTRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1496); - add_machine_instr(result, "CXGTRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1496); - add_machine_instr(result, "CDFTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1496); - add_machine_instr(result, "CXFTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1496); - add_machine_instr(result, "CDLGTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1497); - add_machine_instr(result, "CXLGTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1497); - add_machine_instr(result, "CDLFTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1497); - add_machine_instr(result, "CXLFTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1497); - add_machine_instr(result, "CDPT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 48, 1498); - add_machine_instr(result, "CXPT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 48, 1498); - add_machine_instr(result, "CDSTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1500); - add_machine_instr(result, "CXSTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1500); - add_machine_instr(result, "CDUTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1500); - add_machine_instr(result, "CXUTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1500); - add_machine_instr(result, "CDZT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 48, 1501); - add_machine_instr(result, "CXZT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 48, 1501); - add_machine_instr(result, "CGDTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1501); - add_machine_instr(result, "CGXTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 32, 1501); - add_machine_instr(result, "CGDTRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1502); - add_machine_instr(result, "CGXTRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1502); - add_machine_instr(result, "CFDTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1502); - add_machine_instr(result, "CFXTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1502); - add_machine_instr(result, "CLGDTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1504); - add_machine_instr(result, "CLGXTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1504); - add_machine_instr(result, "CLFDTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1504); - add_machine_instr(result, "CLFXTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1504); - add_machine_instr(result, "CPDT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 48, 1505); - add_machine_instr(result, "CPXT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 48, 1505); - add_machine_instr(result, "CSDTR", mach_format::RRF_d, { reg_4_U, reg_4_U, mask_4_U }, 32, 1507); - add_machine_instr(result, "CSXTR", mach_format::RRF_d, { reg_4_U, reg_4_U, mask_4_U }, 32, 1507); - add_machine_instr(result, "CUDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1507); - add_machine_instr(result, "CUXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1507); - add_machine_instr(result, "CZDT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 48, 1508); - add_machine_instr(result, "CZXT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 48, 1508); - add_machine_instr(result, "DDTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 1509); - add_machine_instr(result, "DXTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 1509); - add_machine_instr(result, "DDTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1509); - add_machine_instr(result, "DXTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1509); - add_machine_instr(result, "EEXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1511); - add_machine_instr(result, "EEDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1511); - add_machine_instr(result, "ESDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1511); - add_machine_instr(result, "ESXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1511); - add_machine_instr(result, "IEDTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U }, 32, 1512); - add_machine_instr(result, "IEXTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U }, 32, 1512); - add_machine_instr(result, "LTDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1513); - add_machine_instr(result, "LTXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1513); - add_machine_instr(result, "FIDTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1514); - add_machine_instr(result, "FIXTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1514); - add_machine_instr(result, "LDETR", mach_format::RRF_d, { reg_4_U, reg_4_U, mask_4_U }, 32, 1517); - add_machine_instr(result, "LXDTR", mach_format::RRF_d, { reg_4_U, reg_4_U, mask_4_U }, 32, 1517); - add_machine_instr(result, "LEDTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1518); - add_machine_instr(result, "LDXTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 32, 1518); - add_machine_instr(result, "MDTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 1519); - add_machine_instr(result, "MXTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 1519); - add_machine_instr(result, "MDTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1520); - add_machine_instr(result, "MXTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1520); - add_machine_instr(result, "QADTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1521); - add_machine_instr(result, "QAXTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1521); - add_machine_instr(result, "RRDTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1524); - add_machine_instr(result, "RRXTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1524); - add_machine_instr(result, "SLDT", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1526); - add_machine_instr(result, "SLXT", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1526); - add_machine_instr(result, "SRDT", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1526); - add_machine_instr(result, "SRXT", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 48, 1526); - add_machine_instr(result, "SDTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 1527); - add_machine_instr(result, "SXTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 32, 1527); - add_machine_instr(result, "SDTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1527); - add_machine_instr(result, "SXTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 32, 1527); - add_machine_instr(result, "TDCET", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1528); - add_machine_instr(result, "TDCDT", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1528); - add_machine_instr(result, "TDCXT", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1528); - add_machine_instr(result, "TDGET", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1529); - add_machine_instr(result, "TDGDT", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1529); - add_machine_instr(result, "TDGXT", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 48, 1529); - add_machine_instr(result, "VBPERM", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1536); - add_machine_instr(result, "VGEF", mach_format::VRV, { vec_reg_4_U, dvb_12_4x4_U, mask_4_U }, 48, 1536); - add_machine_instr(result, "VGEG", mach_format::VRV, { vec_reg_4_U, dvb_12_4x4_U, mask_4_U }, 48, 1536); - add_machine_instr(result, "VGBM", mach_format::VRI_a, { vec_reg_4_U, imm_16_U }, 48, 1537); - add_machine_instr(result, "VGM", mach_format::VRI_b, { vec_reg_4_U, imm_8_U, imm_8_U, mask_4_U }, 48, 1537); - add_machine_instr(result, "VL", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1, 48, 1538); - add_machine_instr(result, "VLREP", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 48, 1538); - add_machine_instr(result, "VLR", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U }, 48, 1538); - add_machine_instr(result, "VLEB", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 48, 1538); - add_machine_instr(result, "VLEH", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 48, 1539); - add_machine_instr(result, "VLEIH", mach_format::VRI_a, { vec_reg_4_U, imm_16_S, mask_4_U }, 48, 1539); - add_machine_instr(result, "VLEF", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 48, 1539); - add_machine_instr(result, "VLEIF", mach_format::VRI_a, { vec_reg_4_U, imm_16_S, mask_4_U }, 48, 1539); - add_machine_instr(result, "VLEG", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 48, 1539); - add_machine_instr(result, "VLEIG", mach_format::VRI_a, { vec_reg_4_U, imm_16_S, mask_4_U }, 48, 1539); - add_machine_instr(result, "VLEIB", mach_format::VRI_a, { vec_reg_4_U, imm_16_S, mask_4_U }, 48, 1539); - add_machine_instr(result, "VLGV", mach_format::VRS_c, { reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 48, 1539); - add_machine_instr(result, "VLLEZ", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 48, 1540); - add_machine_instr( - result, "VLM", mach_format::VRS_a, { vec_reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 1, 48, 1541); - add_machine_instr(result, "VLRLR", mach_format::VRS_d, { vec_reg_4_U, reg_4_U, db_12_4_U }, 48, 1541); - add_machine_instr(result, "VLRL", mach_format::VSI, { vec_reg_4_U, db_12_4_U, imm_8_U }, 48, 1541); - add_machine_instr(result, "VLBB", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 48, 1542); - add_machine_instr(result, "VLVG", mach_format::VRS_b, { vec_reg_4_U, reg_4_U, db_12_4_U, mask_4_U }, 48, 1543); - add_machine_instr(result, "VLVGP", mach_format::VRR_f, { vec_reg_4_U, reg_4_U, reg_4_U }, 48, 1543); - add_machine_instr(result, "VLL", mach_format::VRS_b, { vec_reg_4_U, reg_4_U, db_12_4_U }, 48, 1543); - add_machine_instr( - result, "VMRH", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1544); - add_machine_instr( - result, "VMRL", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1544); - add_machine_instr(result, "VPK", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1545); - add_machine_instr( - result, "VPKS", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 48, 1545); - add_machine_instr( - result, "VPKLS", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 48, 1546); - add_machine_instr( - result, "VPERM", mach_format::VRR_e, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1547); - add_machine_instr( - result, "VPDI", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1547); - add_machine_instr(result, "VREP", mach_format::VRI_c, { vec_reg_4_U, vec_reg_4_U, imm_16_U, mask_4_U }, 48, 1547); - add_machine_instr(result, "VREPI", mach_format::VRI_a, { vec_reg_4_U, imm_16_S, mask_4_U }, 48, 1548); - add_machine_instr(result, "VSCEF", mach_format::VRV, { vec_reg_4_U, dvb_12_4x4_U, mask_4_U }, 48, 1548); - add_machine_instr(result, "VSCEG", mach_format::VRV, { vec_reg_4_U, dvb_12_4x4_U, mask_4_U }, 48, 1548); - add_machine_instr( - result, "VSEL", mach_format::VRR_e, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1549); - add_machine_instr(result, "VSEG", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1549); - add_machine_instr(result, "VST", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1, 48, 1550); - add_machine_instr(result, "VSTEB", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 48, 1550); - add_machine_instr(result, "VSTEH", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 48, 1550); - add_machine_instr(result, "VSTEF", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 48, 1550); - add_machine_instr(result, "VSTEG", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 48, 1550); - add_machine_instr( - result, "VSTM", mach_format::VRS_a, { vec_reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 1, 48, 1551); - add_machine_instr(result, "VSTRLR", mach_format::VRS_d, { vec_reg_4_U, reg_4_U, db_12_4_U }, 48, 1551); - add_machine_instr(result, "VSTRL", mach_format::VSI, { vec_reg_4_U, db_12_4_U, imm_8_U }, 48, 1551); - add_machine_instr(result, "VSTL", mach_format::VRS_b, { vec_reg_4_U, reg_4_U, db_12_4_U }, 48, 1552); - add_machine_instr(result, "VUPH", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1552); - add_machine_instr(result, "VUPL", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1553); - add_machine_instr(result, "VUPLH", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1553); - add_machine_instr(result, "VUPLL", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1554); - add_machine_instr(result, "VA", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1557); - add_machine_instr( - result, "VACC", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1558); - add_machine_instr( - result, "VAC", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1558); + add_machine_instr(result, "AER", mach_format::RR, { reg_4_U, reg_4_U }, 1412); + add_machine_instr(result, "ADR", mach_format::RR, { reg_4_U, reg_4_U }, 1412); + add_machine_instr(result, "AXR", mach_format::RR, { reg_4_U, reg_4_U }, 1412); + add_machine_instr(result, "AE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1412); + add_machine_instr(result, "AD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1412); + add_machine_instr(result, "AWR", mach_format::RR, { reg_4_U, reg_4_U }, 1413); + add_machine_instr(result, "AUR", mach_format::RR, { reg_4_U, reg_4_U }, 1413); + add_machine_instr(result, "AU", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1413); + add_machine_instr(result, "AW", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1413); + add_machine_instr(result, "CER", mach_format::RR, { reg_4_U, reg_4_U }, 1414); + add_machine_instr(result, "CDR", mach_format::RR, { reg_4_U, reg_4_U }, 1414); + add_machine_instr(result, "CXR", mach_format::RRE, { reg_4_U, reg_4_U }, 1414); + add_machine_instr(result, "CE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1414); + add_machine_instr(result, "CD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1414); + add_machine_instr(result, "CEFR", mach_format::RRE, { reg_4_U, reg_4_U }, 1415); + add_machine_instr(result, "CDFR", mach_format::RRE, { reg_4_U, reg_4_U }, 1415); + add_machine_instr(result, "CXFR", mach_format::RRE, { reg_4_U, reg_4_U }, 1415); + add_machine_instr(result, "CEGR", mach_format::RRE, { reg_4_U, reg_4_U }, 1415); + add_machine_instr(result, "CDGR", mach_format::RRE, { reg_4_U, reg_4_U }, 1415); + add_machine_instr(result, "CXGR", mach_format::RRE, { reg_4_U, reg_4_U }, 1415); + add_machine_instr(result, "CFER", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1415); + add_machine_instr(result, "CFDR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1415); + add_machine_instr(result, "CFXR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1415); + add_machine_instr(result, "CGER", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1415); + add_machine_instr(result, "CGDR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1415); + add_machine_instr(result, "CGXR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1415); + add_machine_instr(result, "DDR", mach_format::RR, { reg_4_U, reg_4_U }, 1416); + add_machine_instr(result, "DER", mach_format::RR, { reg_4_U, reg_4_U }, 1416); + add_machine_instr(result, "DXR", mach_format::RRE, { reg_4_U, reg_4_U }, 1416); + add_machine_instr(result, "DD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1416); + add_machine_instr(result, "DE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1416); + add_machine_instr(result, "HDR", mach_format::RR, { reg_4_U, reg_4_U }, 1417); + add_machine_instr(result, "HER", mach_format::RR, { reg_4_U, reg_4_U }, 1417); + add_machine_instr(result, "LTER", mach_format::RR, { reg_4_U, reg_4_U }, 1417); + add_machine_instr(result, "LTDR", mach_format::RR, { reg_4_U, reg_4_U }, 1417); + add_machine_instr(result, "LTXR", mach_format::RRE, { reg_4_U, reg_4_U }, 1418); + add_machine_instr(result, "LCER", mach_format::RR, { reg_4_U, reg_4_U }, 1418); + add_machine_instr(result, "LCDR", mach_format::RR, { reg_4_U, reg_4_U }, 1418); + add_machine_instr(result, "LCXR", mach_format::RRE, { reg_4_U, reg_4_U }, 1418); + add_machine_instr(result, "FIER", mach_format::RRE, { reg_4_U, reg_4_U }, 1419); + add_machine_instr(result, "FIDR", mach_format::RRE, { reg_4_U, reg_4_U }, 1419); + add_machine_instr(result, "FIXR", mach_format::RRE, { reg_4_U, reg_4_U }, 1419); + add_machine_instr(result, "LDER", mach_format::RRE, { reg_4_U, reg_4_U }, 1419); + add_machine_instr(result, "LXDR", mach_format::RRE, { reg_4_U, reg_4_U }, 1419); + add_machine_instr(result, "LXER", mach_format::RRE, { reg_4_U, reg_4_U }, 1419); + add_machine_instr(result, "LDE", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1419); + add_machine_instr(result, "LXD", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1419); + add_machine_instr(result, "LXE", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1419); + add_machine_instr(result, "LNDR", mach_format::RR, { reg_4_U, reg_4_U }, 1420); + add_machine_instr(result, "LNER", mach_format::RR, { reg_4_U, reg_4_U }, 1420); + add_machine_instr(result, "LPDR", mach_format::RR, { reg_4_U, reg_4_U }, 1420); + add_machine_instr(result, "LPER", mach_format::RR, { reg_4_U, reg_4_U }, 1420); + add_machine_instr(result, "LNXR", mach_format::RRE, { reg_4_U, reg_4_U }, 1420); + add_machine_instr(result, "LPXR", mach_format::RRE, { reg_4_U, reg_4_U }, 1420); + add_machine_instr(result, "LEDR", mach_format::RR, { reg_4_U, reg_4_U }, 1421); + add_machine_instr(result, "LDXR", mach_format::RR, { reg_4_U, reg_4_U }, 1421); + add_machine_instr(result, "LRER", mach_format::RR, { reg_4_U, reg_4_U }, 1421); + add_machine_instr(result, "LRDR", mach_format::RR, { reg_4_U, reg_4_U }, 1421); + add_machine_instr(result, "LEXR", mach_format::RRE, { reg_4_U, reg_4_U }, 1421); + add_machine_instr(result, "MEER", mach_format::RRE, { reg_4_U, reg_4_U }, 1421); + add_machine_instr(result, "MDR", mach_format::RR, { reg_4_U, reg_4_U }, 1421); + add_machine_instr(result, "MXR", mach_format::RR, { reg_4_U, reg_4_U }, 1421); + add_machine_instr(result, "MDER", mach_format::RR, { reg_4_U, reg_4_U }, 1421); + add_machine_instr(result, "MER", mach_format::RR, { reg_4_U, reg_4_U }, 1421); + add_machine_instr(result, "MXDR", mach_format::RR, { reg_4_U, reg_4_U }, 1421); + add_machine_instr(result, "MEE", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1422); + add_machine_instr(result, "MD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1422); + add_machine_instr(result, "MDE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1422); + add_machine_instr(result, "MXD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1422); + add_machine_instr(result, "ME", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1422); + add_machine_instr(result, "MAER", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1423); + add_machine_instr(result, "MADR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1423); + add_machine_instr(result, "MAD", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1423); + add_machine_instr(result, "MAE", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1423); + add_machine_instr(result, "MSER", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1423); + add_machine_instr(result, "MSDR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1423); + add_machine_instr(result, "MSE", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1423); + add_machine_instr(result, "MSD", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1423); + add_machine_instr(result, "MAYR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1424); + add_machine_instr(result, "MAYHR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1424); + add_machine_instr(result, "MAYLR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1424); + add_machine_instr(result, "MAY", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1424); + add_machine_instr(result, "MAYH", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1424); + add_machine_instr(result, "MAYL", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1424); + add_machine_instr(result, "MYR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1426); + add_machine_instr(result, "MYHR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1426); + add_machine_instr(result, "MYLR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1426); + add_machine_instr(result, "MY", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1426); + add_machine_instr(result, "MYH", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1426); + add_machine_instr(result, "MYL", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1426); + add_machine_instr(result, "NCGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 522); + add_machine_instr(result, "NCRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 522); + add_machine_instr(result, "NNRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 796); + add_machine_instr(result, "NNGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 796); + add_machine_instr(result, "NOGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 799); + add_machine_instr(result, "NORK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 799); + add_machine_instr(result, "NXRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 799); + add_machine_instr(result, "NXGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 799); + add_machine_instr(result, "OCGRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 802); + add_machine_instr(result, "OCRK", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 802); + add_machine_instr(result, "SELFHR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 864); + add_machine_instr(result, "SELR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 864); + add_machine_instr(result, "SELGR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 864); + add_machine_instr(result, "SORTL", mach_format::RRE, { reg_4_U, reg_4_U }, 19); + add_machine_instr(result, "SQER", mach_format::RRE, { reg_4_U, reg_4_U }, 1427); + add_machine_instr(result, "SQDR", mach_format::RRE, { reg_4_U, reg_4_U }, 1427); + add_machine_instr(result, "SQXR", mach_format::RRE, { reg_4_U, reg_4_U }, 1427); + add_machine_instr(result, "SQE", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1427); + add_machine_instr(result, "SQD", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1427); + add_machine_instr(result, "SER", mach_format::RR, { reg_4_U, reg_4_U }, 1428); + add_machine_instr(result, "SDR", mach_format::RR, { reg_4_U, reg_4_U }, 1428); + add_machine_instr(result, "SXR", mach_format::RR, { reg_4_U, reg_4_U }, 1428); + add_machine_instr(result, "SE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1428); + add_machine_instr(result, "SD", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1428); + add_machine_instr(result, "SUR", mach_format::RR, { reg_4_U, reg_4_U }, 1429); + add_machine_instr(result, "SWR", mach_format::RR, { reg_4_U, reg_4_U }, 1429); + add_machine_instr(result, "SU", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1429); + add_machine_instr(result, "SW", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 1429); + add_machine_instr(result, "AEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1445); + add_machine_instr(result, "ADBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1445); + add_machine_instr(result, "AXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1445); + add_machine_instr(result, "AEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1445); + add_machine_instr(result, "ADB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1445); + add_machine_instr(result, "CEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1447); + add_machine_instr(result, "CDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1447); + add_machine_instr(result, "CXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1447); + add_machine_instr(result, "CDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1447); + add_machine_instr(result, "CEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1447); + add_machine_instr(result, "KEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1448); + add_machine_instr(result, "KDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1448); + add_machine_instr(result, "KXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1448); + add_machine_instr(result, "KDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1448); + add_machine_instr(result, "KDSA", mach_format::RRE, { reg_4_U, reg_4_U }, 32, 1700); + add_machine_instr(result, "KEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1448); + add_machine_instr(result, "CEFBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1449); + add_machine_instr(result, "CDFBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1449); + add_machine_instr(result, "CXFBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1449); + add_machine_instr(result, "CEGBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1449); + add_machine_instr(result, "CDGBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1449); + add_machine_instr(result, "CXGBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1449); + add_machine_instr(result, "CEFBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1449); + add_machine_instr(result, "CDFBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1449); + add_machine_instr(result, "CXFBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1449); + add_machine_instr(result, "CEGBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1449); + add_machine_instr(result, "CDGBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1449); + add_machine_instr(result, "CXGBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1449); + add_machine_instr(result, "CELFBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1451); + add_machine_instr(result, "CDLFBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1451); + add_machine_instr(result, "CXLFBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1451); + add_machine_instr(result, "CELGBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1451); + add_machine_instr(result, "CDLGBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1451); + add_machine_instr(result, "CXLGBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1451); + add_machine_instr(result, "CFEBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1452); + add_machine_instr(result, "CFDBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1452); + add_machine_instr(result, "CFXBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1452); + add_machine_instr(result, "CGEBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1452); + add_machine_instr(result, "CGDBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1452); + add_machine_instr(result, "CGXBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1452); + add_machine_instr(result, "CFEBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1452); + add_machine_instr(result, "CFDBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1452); + add_machine_instr(result, "CFXBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1452); + add_machine_instr(result, "CGEBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1452); + add_machine_instr(result, "CGDBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1452); + add_machine_instr(result, "CGXBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1452); + add_machine_instr(result, "CLFEBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1455); + add_machine_instr(result, "CLFDBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1455); + add_machine_instr(result, "CLFXBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1455); + add_machine_instr(result, "CLGEBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1455); + add_machine_instr(result, "CLGDBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1455); + add_machine_instr(result, "CLGXBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1455); + add_machine_instr(result, "DEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1457); + add_machine_instr(result, "DDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1457); + add_machine_instr(result, "DXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1457); + add_machine_instr(result, "DEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1457); + add_machine_instr(result, "DFLTCC", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 1714); + add_machine_instr(result, "DDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1457); + add_machine_instr(result, "DIEBR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1458); + add_machine_instr(result, "DIDBR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1458); + add_machine_instr(result, "DISCS", mach_format::S, { db_12_4_U }, 265); + add_machine_instr(result, "ECPGA", mach_format::RRE, { reg_4_U, reg_4_U }, 39); + add_machine_instr(result, "ECCTR", mach_format::RRE, { reg_4_U, reg_4_U }, 39); + add_machine_instr(result, "EPCTR", mach_format::RRE, { reg_4_U, reg_4_U }, 39); + add_machine_instr(result, "LTEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1461); + add_machine_instr(result, "LTDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1461); + add_machine_instr(result, "LTXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1461); + add_machine_instr(result, "LCEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1461); + add_machine_instr(result, "LCDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1461); + add_machine_instr(result, "LCXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1461); + add_machine_instr(result, "FIEBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1462); + add_machine_instr(result, "FIDBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1462); + add_machine_instr(result, "FIXBR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1462); + add_machine_instr(result, "FIEBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1462); + add_machine_instr(result, "FIDBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1462); + add_machine_instr(result, "FIXBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1462); + add_machine_instr(result, "LDEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1463); + add_machine_instr(result, "LXDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1463); + add_machine_instr(result, "LXEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1463); + add_machine_instr(result, "LDEB", mach_format::RRE, { reg_4_U, reg_4_U }, 1464); + add_machine_instr(result, "LXDB", mach_format::RRE, { reg_4_U, reg_4_U }, 1464); + add_machine_instr(result, "LXEB", mach_format::RRE, { reg_4_U, reg_4_U }, 1464); + add_machine_instr(result, "LNEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1464); + add_machine_instr(result, "LNDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1464); + add_machine_instr(result, "LNXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1464); + add_machine_instr(result, "LPEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1465); + add_machine_instr(result, "LPDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1465); + add_machine_instr(result, "LPXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1465); + add_machine_instr(result, "LEDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1465); + add_machine_instr(result, "LDXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1465); + add_machine_instr(result, "LEXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1465); + add_machine_instr(result, "LEDBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1465); + add_machine_instr(result, "LDXBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1465); + add_machine_instr(result, "LEXBRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1465); + add_machine_instr(result, "MEEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1467); + add_machine_instr(result, "MDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1467); + add_machine_instr(result, "MXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1467); + add_machine_instr(result, "MDEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1467); + add_machine_instr(result, "MXDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1467); + add_machine_instr(result, "MEEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1467); + add_machine_instr(result, "MDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1467); + add_machine_instr(result, "MDEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1467); + add_machine_instr(result, "MXDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1467); + add_machine_instr(result, "MADBR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1468); + add_machine_instr(result, "MAEBR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1468); + add_machine_instr(result, "MAEB", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1468); + add_machine_instr(result, "MADB", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1468); + add_machine_instr(result, "MSEBR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1468); + add_machine_instr(result, "MSDBR", mach_format::RRD, { reg_4_U, reg_4_U, reg_4_U }, 1468); + add_machine_instr(result, "MSEB", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1468); + add_machine_instr(result, "MSDB", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1468); + add_machine_instr(result, "SQEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1470); + add_machine_instr(result, "SQDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1470); + add_machine_instr(result, "SQXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1470); + add_machine_instr(result, "SQEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1470); + add_machine_instr(result, "SQDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1470); + add_machine_instr(result, "SEBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1470); + add_machine_instr(result, "SDBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1470); + add_machine_instr(result, "SXBR", mach_format::RRE, { reg_4_U, reg_4_U }, 1470); + add_machine_instr(result, "SEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1470); + add_machine_instr(result, "SDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1470); + add_machine_instr(result, "TCEB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1471); + add_machine_instr(result, "TCDB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1471); + add_machine_instr(result, "TCXB", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1471); + add_machine_instr(result, "ADTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 1491); + add_machine_instr(result, "AXTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 1491); + add_machine_instr(result, "ADTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1491); + add_machine_instr(result, "AXTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1491); + add_machine_instr(result, "CDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1494); + add_machine_instr(result, "CXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1494); + add_machine_instr(result, "KDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1495); + add_machine_instr(result, "KXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1495); + add_machine_instr(result, "CEDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1495); + add_machine_instr(result, "CEXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1495); + add_machine_instr(result, "CDGTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1496); + add_machine_instr(result, "CXGTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1496); + add_machine_instr(result, "CDGTRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1496); + add_machine_instr(result, "CXGTRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1496); + add_machine_instr(result, "CDFTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1496); + add_machine_instr(result, "CXFTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1496); + add_machine_instr(result, "CDLGTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1497); + add_machine_instr(result, "CXLGTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1497); + add_machine_instr(result, "CDLFTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1497); + add_machine_instr(result, "CXLFTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1497); + add_machine_instr(result, "CDPT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 1498); + add_machine_instr(result, "CXPT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 1498); + add_machine_instr(result, "CDSTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1500); + add_machine_instr(result, "CXSTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1500); + add_machine_instr(result, "CDUTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1500); + add_machine_instr(result, "CXUTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1500); + add_machine_instr(result, "CDZT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 1501); + add_machine_instr(result, "CXZT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 1501); + add_machine_instr(result, "CGDTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1501); + add_machine_instr(result, "CGXTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U }, 1501); + add_machine_instr(result, "CGDTRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1502); + add_machine_instr(result, "CGXTRA", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1502); + add_machine_instr(result, "CFDTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1502); + add_machine_instr(result, "CFXTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1502); + add_machine_instr(result, "CLGDTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1504); + add_machine_instr(result, "CLGXTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1504); + add_machine_instr(result, "CLFDTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1504); + add_machine_instr(result, "CLFXTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1504); + add_machine_instr(result, "CPDT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 1505); + add_machine_instr(result, "CPXT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 1505); + add_machine_instr(result, "CSDTR", mach_format::RRF_d, { reg_4_U, reg_4_U, mask_4_U }, 1507); + add_machine_instr(result, "CSXTR", mach_format::RRF_d, { reg_4_U, reg_4_U, mask_4_U }, 1507); + add_machine_instr(result, "CUDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1507); + add_machine_instr(result, "CUXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1507); + add_machine_instr(result, "CZDT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 1508); + add_machine_instr(result, "CZXT", mach_format::RSL_b, { reg_4_U, db_12_8x4L_U, mask_4_U }, 1508); + add_machine_instr(result, "DDTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 1509); + add_machine_instr(result, "DXTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 1509); + add_machine_instr(result, "DDTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1509); + add_machine_instr(result, "DXTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1509); + add_machine_instr(result, "EEXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1511); + add_machine_instr(result, "EEDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1511); + add_machine_instr(result, "ESDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1511); + add_machine_instr(result, "ESXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1511); + add_machine_instr(result, "IEDTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U }, 1512); + add_machine_instr(result, "IEXTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U }, 1512); + add_machine_instr(result, "LTDTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1513); + add_machine_instr(result, "LTXTR", mach_format::RRE, { reg_4_U, reg_4_U }, 1513); + add_machine_instr(result, "FIDTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1514); + add_machine_instr(result, "FIXTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1514); + add_machine_instr(result, "LDETR", mach_format::RRF_d, { reg_4_U, reg_4_U, mask_4_U }, 1517); + add_machine_instr(result, "LXDTR", mach_format::RRF_d, { reg_4_U, reg_4_U, mask_4_U }, 1517); + add_machine_instr(result, "LEDTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1518); + add_machine_instr(result, "LDXTR", mach_format::RRF_e, { reg_4_U, mask_4_U, reg_4_U, mask_4_U }, 1518); + add_machine_instr(result, "MDTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 1519); + add_machine_instr(result, "MXTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 1519); + add_machine_instr(result, "MDTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1520); + add_machine_instr(result, "MXTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1520); + add_machine_instr(result, "QADTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1521); + add_machine_instr(result, "QAXTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1521); + add_machine_instr(result, "RRDTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1524); + add_machine_instr(result, "RRXTR", mach_format::RRF_b, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1524); + add_machine_instr(result, "SLDT", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1526); + add_machine_instr(result, "SLXT", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1526); + add_machine_instr(result, "SRDT", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1526); + add_machine_instr(result, "SRXT", mach_format::RXF, { reg_4_U, reg_4_U, dxb_12_4x4_U }, 1526); + add_machine_instr(result, "SDTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 1527); + add_machine_instr(result, "SXTR", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U }, 1527); + add_machine_instr(result, "SDTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1527); + add_machine_instr(result, "SXTRA", mach_format::RRF_a, { reg_4_U, reg_4_U, reg_4_U, mask_4_U }, 1527); + add_machine_instr(result, "TDCET", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1528); + add_machine_instr(result, "TDCDT", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1528); + add_machine_instr(result, "TDCXT", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1528); + add_machine_instr(result, "TDGET", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1529); + add_machine_instr(result, "TDGDT", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1529); + add_machine_instr(result, "TDGXT", mach_format::RXE, { reg_4_U, dxb_12_4x4_U }, 1529); + add_machine_instr(result, "VBPERM", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1536); + add_machine_instr( + result, "VCFPS", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 1641); + add_machine_instr(result, "VGEF", mach_format::VRV, { vec_reg_4_U, dvb_12_4x4_U, mask_4_U }, 1536); + add_machine_instr(result, "VGEG", mach_format::VRV, { vec_reg_4_U, dvb_12_4x4_U, mask_4_U }, 1536); + add_machine_instr(result, "VGBM", mach_format::VRI_a, { vec_reg_4_U, imm_16_U }, 1537); + add_machine_instr(result, "VGM", mach_format::VRI_b, { vec_reg_4_U, imm_8_U, imm_8_U, mask_4_U }, 1537); + add_machine_instr(result, "VL", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1, 1538); + add_machine_instr(result, "VLBR", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1563); + add_machine_instr(result, "VLBRREP", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1562); + add_machine_instr(result, "VLREP", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1538); + add_machine_instr(result, "VLR", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U }, 1538); + add_machine_instr(result, "VLEB", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1538); + add_machine_instr(result, "VLEBRH", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1561); + add_machine_instr(result, "VLEBRF", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1561); + add_machine_instr(result, "VLEBRG", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1561); + add_machine_instr(result, "VLEH", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1539); + add_machine_instr(result, "VLEIH", mach_format::VRI_a, { vec_reg_4_U, imm_16_S, mask_4_U }, 1539); + add_machine_instr(result, "VLEF", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1539); + add_machine_instr(result, "VLEIF", mach_format::VRI_a, { vec_reg_4_U, imm_16_S, mask_4_U }, 1539); + add_machine_instr(result, "VLEG", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1539); + add_machine_instr(result, "VLEIG", mach_format::VRI_a, { vec_reg_4_U, imm_16_S, mask_4_U }, 1539); + add_machine_instr(result, "VLEIB", mach_format::VRI_a, { vec_reg_4_U, imm_16_S, mask_4_U }, 1539); + add_machine_instr(result, "VLGV", mach_format::VRS_c, { reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 1539); + add_machine_instr(result, "VLLEZ", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1540); + add_machine_instr(result, "VLM", mach_format::VRS_a, { vec_reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 1, 1541); + add_machine_instr(result, "VLRLR", mach_format::VRS_d, { vec_reg_4_U, reg_4_U, db_12_4_U }, 1541); + add_machine_instr(result, "VLRL", mach_format::VSI, { vec_reg_4_U, db_12_4_U, imm_8_U }, 1541); + add_machine_instr(result, "VLBB", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1542); + add_machine_instr(result, "VLVG", mach_format::VRS_b, { vec_reg_4_U, reg_4_U, db_12_4_U, mask_4_U }, 1543); + add_machine_instr(result, "VLVGP", mach_format::VRR_f, { vec_reg_4_U, reg_4_U, reg_4_U }, 1543); + add_machine_instr(result, "VLL", mach_format::VRS_b, { vec_reg_4_U, reg_4_U, db_12_4_U }, 1543); + add_machine_instr(result, "VMRH", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1544); + add_machine_instr(result, "VMRL", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1544); + add_machine_instr(result, "VPK", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1545); + add_machine_instr( + result, "VPKS", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1545); + add_machine_instr( + result, "VPKLS", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1546); + add_machine_instr( + result, "VPERM", mach_format::VRR_e, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1547); + add_machine_instr(result, "VPDI", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1547); + add_machine_instr(result, "VREP", mach_format::VRI_c, { vec_reg_4_U, vec_reg_4_U, imm_16_U, mask_4_U }, 1547); + add_machine_instr(result, "VREPI", mach_format::VRI_a, { vec_reg_4_U, imm_16_S, mask_4_U }, 1548); + add_machine_instr(result, "VSCEF", mach_format::VRV, { vec_reg_4_U, dvb_12_4x4_U, mask_4_U }, 1548); + add_machine_instr(result, "VSCEG", mach_format::VRV, { vec_reg_4_U, dvb_12_4x4_U, mask_4_U }, 1548); + add_machine_instr(result, "VSEL", mach_format::VRR_e, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1549); + add_machine_instr(result, "VSEG", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1549); + add_machine_instr(result, "VST", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1, 1550); + add_machine_instr(result, "VSTEB", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1550); + add_machine_instr(result, "VSTEH", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1550); + add_machine_instr(result, "VSTEF", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1550); + add_machine_instr(result, "VSTEG", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1550); + add_machine_instr(result, "VSTM", mach_format::VRS_a, { vec_reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 1, 1551); + add_machine_instr(result, "VSTEBRH", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1576); + add_machine_instr(result, "VSTEBRF", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1576); + add_machine_instr(result, "VSTEBRG", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1576); + add_machine_instr(result, "VSTRLR", mach_format::VRS_d, { vec_reg_4_U, reg_4_U, db_12_4_U }, 1551); + add_machine_instr(result, "VSTRL", mach_format::VSI, { vec_reg_4_U, db_12_4_U, imm_8_U }, 1551); + add_machine_instr(result, "VSTL", mach_format::VRS_b, { vec_reg_4_U, reg_4_U, db_12_4_U }, 1552); + add_machine_instr(result, "VUPH", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1552); + add_machine_instr(result, "VUPL", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1553); + add_machine_instr(result, "VUPLH", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1553); + add_machine_instr(result, "VUPLL", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1554); + add_machine_instr(result, "VA", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1557); + add_machine_instr(result, "VACC", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1558); + add_machine_instr( + result, "VAC", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1558); add_machine_instr(result, "VACCC", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, - 48, + 1559); - add_machine_instr(result, "VN", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1559); - add_machine_instr(result, "VNC", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1559); add_machine_instr( - result, "VAVG", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1560); + result, "VCFPL", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 43); + add_machine_instr(result, "VN", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1559); + add_machine_instr(result, "VNC", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1559); + add_machine_instr(result, "VAVG", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1560); + add_machine_instr(result, "VAVGL", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1560); + add_machine_instr(result, "VCKSM", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1560); + add_machine_instr(result, "VEC", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1561); + add_machine_instr(result, "VECL", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1561); add_machine_instr( - result, "VAVGL", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1560); - add_machine_instr(result, "VCKSM", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1560); - add_machine_instr(result, "VEC", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1561); - add_machine_instr(result, "VECL", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1561); + result, "VCEQ", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1561); add_machine_instr( - result, "VCEQ", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 48, 1561); + result, "VCH", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1562); add_machine_instr( - result, "VCH", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 48, 1562); + result, "VCHL", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1563); add_machine_instr( - result, "VCHL", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 48, 1563); - add_machine_instr(result, "VCLZ", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1564); - add_machine_instr(result, "VCTZ", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1564); - add_machine_instr( - result, "VGFM", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1565); - add_machine_instr(result, "VX", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1565); - add_machine_instr(result, "VLC", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1566); + result, "VCLFP", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 1611); + add_machine_instr(result, "VCLZ", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1564); + add_machine_instr(result, "VCTZ", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1564); + add_machine_instr(result, "VGFM", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1565); + add_machine_instr(result, "VX", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1565); + add_machine_instr(result, "VLC", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1566); add_machine_instr(result, "VGFMA", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, - 48, + 1566); - add_machine_instr(result, "VLP", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1566); - add_machine_instr(result, "VMX", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1567); - add_machine_instr( - result, "VMXL", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1567); - add_machine_instr(result, "VMN", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1567); - add_machine_instr( - result, "VMNL", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1568); + add_machine_instr(result, "VLP", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1566); + add_machine_instr(result, "VMX", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1567); + add_machine_instr(result, "VMXL", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1567); + add_machine_instr(result, "VMN", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1567); + add_machine_instr(result, "VMNL", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1568); add_machine_instr( - result, "VMAL", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1568); + result, "VMAL", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1568); add_machine_instr( - result, "VMAH", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1569); + result, "VMAH", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1569); add_machine_instr(result, "VMALH", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, - 48, + 1569); add_machine_instr( - result, "VMAE", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1569); + result, "VMAE", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1569); add_machine_instr(result, "VMALE", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, - 48, + 1569); add_machine_instr( - result, "VMAO", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1570); + result, "VMAO", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1570); add_machine_instr(result, "VMALO", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, - 48, + 1570); - add_machine_instr(result, "VMH", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1570); - add_machine_instr( - result, "VMLH", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1571); - add_machine_instr(result, "VML", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1571); - add_machine_instr(result, "VME", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1572); - add_machine_instr( - result, "VMLE", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1572); - add_machine_instr(result, "VMO", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1572); - add_machine_instr( - result, "VMLO", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1572); + add_machine_instr(result, "VMH", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1570); + add_machine_instr(result, "VMLH", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1571); + add_machine_instr(result, "VML", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1571); + add_machine_instr(result, "VME", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1572); + add_machine_instr(result, "VMLE", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1572); + add_machine_instr(result, "VMO", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1572); + add_machine_instr(result, "VMLO", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1572); add_machine_instr(result, "VMSL", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, - 48, 1573); - add_machine_instr(result, "VNN", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1574); - add_machine_instr(result, "VNO", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1574); + add_machine_instr(result, "VNN", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1574); + add_machine_instr(result, "VNO", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1574); result.insert(std::pair("VNOT", std::make_unique("VNOT", mach_format::VRR_c, std::vector { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, - 48, 1574))); - add_machine_instr(result, "VNX", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1574); - add_machine_instr(result, "VO", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1574); - add_machine_instr(result, "VOC", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1575); - add_machine_instr(result, "VPOPCT", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1575); - add_machine_instr( - result, "VERLLV", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1575); - add_machine_instr(result, "VERLL", mach_format::VRS_a, { vec_reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 48, 1575); - add_machine_instr( - result, "VERIM", mach_format::VRI_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 48, 1576); - add_machine_instr( - result, "VESLV", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1577); - add_machine_instr(result, "VESL", mach_format::VRS_a, { vec_reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 48, 1577); - add_machine_instr( - result, "VESRAV", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1577); - add_machine_instr(result, "VESRA", mach_format::VRS_a, { vec_reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 48, 1577); - add_machine_instr( - result, "VESRLV", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1578); - add_machine_instr(result, "VESRL", mach_format::VRS_a, { vec_reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 48, 1578); - add_machine_instr( - result, "VSLDB", mach_format::VRI_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U }, 48, 1579); - add_machine_instr(result, "VSL", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1579); - add_machine_instr(result, "VSLB", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1579); - add_machine_instr(result, "VSRA", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1579); - add_machine_instr(result, "VSRAB", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1580); - add_machine_instr(result, "VSRL", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1580); - add_machine_instr(result, "VSRLB", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 48, 1580); - add_machine_instr(result, "VS", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1580); - add_machine_instr( - result, "VSCBI", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1581); - add_machine_instr( - result, "VSBI", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1581); + add_machine_instr(result, "VNX", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1574); + add_machine_instr(result, "VO", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1574); + add_machine_instr(result, "VOC", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1575); + add_machine_instr(result, "VPOPCT", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1575); + add_machine_instr(result, "VERLLV", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1575); + add_machine_instr(result, "VERLL", mach_format::VRS_a, { vec_reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 1575); + add_machine_instr( + result, "VERIM", mach_format::VRI_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 1576); + add_machine_instr(result, "VESLV", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1577); + add_machine_instr(result, "VESL", mach_format::VRS_a, { vec_reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 1577); + add_machine_instr(result, "VESRAV", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1577); + add_machine_instr(result, "VESRA", mach_format::VRS_a, { vec_reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 1577); + add_machine_instr(result, "VESRLV", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1578); + add_machine_instr(result, "VESRL", mach_format::VRS_a, { vec_reg_4_U, vec_reg_4_U, db_12_4_U, mask_4_U }, 1578); + add_machine_instr(result, "VSLDB", mach_format::VRI_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U }, 1579); + add_machine_instr(result, "VSLD", mach_format::VRI_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U }, 1607); + add_machine_instr(result, "VSL", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1579); + add_machine_instr(result, "VSLB", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1579); + add_machine_instr(result, "VSRA", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1579); + add_machine_instr(result, "VSRAB", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1580); + add_machine_instr(result, "VSRL", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1580); + add_machine_instr(result, "VSRD", mach_format::VRI_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U }, 1608); + add_machine_instr(result, "VSRLB", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U }, 1580); + add_machine_instr(result, "VS", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1580); + add_machine_instr(result, "VSCBI", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1581); + add_machine_instr( + result, "VSBI", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1581); add_machine_instr(result, "VSBCBI", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, - 48, + 1582); + add_machine_instr(result, "VSUMG", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1582); + add_machine_instr(result, "VSUMQ", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1583); + add_machine_instr(result, "VSUM", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 1583); + add_machine_instr(result, "VTM", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U }, 1584); add_machine_instr( - result, "VSUMG", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1582); - add_machine_instr( - result, "VSUMQ", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1583); + result, "VFAE", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1, 1585); add_machine_instr( - result, "VSUM", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1583); - add_machine_instr(result, "VTM", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U }, 48, 1584); + result, "VFEE", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1, 1587); add_machine_instr( - result, "VFAE", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1, 48, 1585); - add_machine_instr( - result, "VFEE", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1, 48, 1587); - add_machine_instr(result, - "VFENE", - mach_format::VRR_b, - { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, - 1, - 48, - 1588); - add_machine_instr( - result, "VISTR", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1, 48, 1589); + result, "VFENE", mach_format::VRR_b, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1, 1588); + add_machine_instr(result, "VISTR", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1, 1589); add_machine_instr(result, "VSTRC", mach_format::VRR_d, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1, - 48, 1590); + add_machine_instr(result, "VSTBR", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1576); + add_machine_instr(result, + "VSTRS", + mach_format::VRR_d, + { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, + 1, + 1622); add_machine_instr( - result, "VFA", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 48, 1595); - add_machine_instr(result, "WFC", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 48, 1599); - add_machine_instr(result, "WFK", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 48, 1600); + result, "VFA", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1595); + add_machine_instr(result, "WFC", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1599); + add_machine_instr(result, "WFK", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1600); add_machine_instr(result, "VFCE", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, - 48, 1601); add_machine_instr(result, "VFCH", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, - 48, + 1603); add_machine_instr(result, "VFCHE", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, - 48, + 1605); add_machine_instr( - result, "VCDG", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 48, 1607); - add_machine_instr( - result, "VCDLG", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 48, 1608); - add_machine_instr( - result, "VCGD", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 48, 1609); + result, "VFD", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1613); add_machine_instr( - result, "VCLGD", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 48, 1611); + result, "VFI", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 1615); + add_machine_instr(result, "VFLL", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1617); add_machine_instr( - result, "VFD", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 48, 1613); - add_machine_instr( - result, "VFI", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 48, 1615); - add_machine_instr(result, "VFLL", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 48, 1617); - add_machine_instr( - result, "VFLR", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 48, 1618); + result, "VFLR", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 1618); add_machine_instr(result, "VFMAX", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, - 48, + 1619); add_machine_instr(result, "VFMIN", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, - 48, + 1625); add_machine_instr( - result, "VFM", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 48, 1631); + result, "VFM", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1631); add_machine_instr(result, "VFMA", mach_format::VRR_e, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, - 48, + 1633); add_machine_instr(result, "VFMS", mach_format::VRR_e, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, - 48, + 1633); add_machine_instr(result, "VFNMA", mach_format::VRR_e, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, - 48, + 1633); add_machine_instr(result, "VFNMS", mach_format::VRR_e, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, - 48, + 1633); add_machine_instr( - result, "VFPSO", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 48, 1635); - add_machine_instr(result, "VFSQ", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 48, 1636); + result, "VFPSO", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 35); + add_machine_instr(result, "VFSQ", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 36); add_machine_instr( - result, "VFS", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 48, 1637); + result, "VFS", mach_format::VRR_c, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 37); add_machine_instr( - result, "VFTCI", mach_format::VRI_e, { vec_reg_4_U, vec_reg_4_U, imm_12_S, mask_4_U, mask_4_U }, 48, 1638); + result, "VFTCI", mach_format::VRI_e, { vec_reg_4_U, vec_reg_4_U, imm_12_S, mask_4_U, mask_4_U }, 38); add_machine_instr( - result, "VAP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 48, 1643); - add_machine_instr(result, "VCP", mach_format::VRR_h, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1644); - add_machine_instr(result, "VCVB", mach_format::VRR_i, { reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1645); - add_machine_instr(result, "VCVBG", mach_format::VRR_i, { reg_4_U, vec_reg_4_U, mask_4_U }, 48, 1645); - add_machine_instr(result, "VCVD", mach_format::VRI_i, { vec_reg_4_U, reg_4_U, imm_8_S, mask_4_U }, 48, 1646); - add_machine_instr(result, "VCVDG", mach_format::VRI_i, { vec_reg_4_U, reg_4_U, imm_8_S, mask_4_U }, 48, 1646); + result, "VAP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 43); + add_machine_instr(result, "VCP", mach_format::VRR_h, { vec_reg_4_U, vec_reg_4_U, mask_4_U }, 44); + add_machine_instr(result, "VCVB", mach_format::VRR_i, { reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1, 45); + add_machine_instr(result, "VCVBG", mach_format::VRR_i, { reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U }, 1, 45); + add_machine_instr(result, "VCVD", mach_format::VRI_i, { vec_reg_4_U, reg_4_U, imm_8_S, mask_4_U }, 46); + add_machine_instr(result, "VCVDG", mach_format::VRI_i, { vec_reg_4_U, reg_4_U, imm_8_S, mask_4_U }, 46); add_machine_instr( - result, "VDP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 48, 1648); + result, "VDP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 48); + add_machine_instr(result, "VLLEBRZ", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1562); add_machine_instr( - result, "VMP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 48, 1650); + result, "VMP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 1650); add_machine_instr( - result, "VMSP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 48, 1651); + result, "VMSP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 1651); add_machine_instr( - result, "VRP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 48, 1654); + result, "VRP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 1654); add_machine_instr( - result, "VSDP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 48, 1656); + result, "VSDP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 1656); add_machine_instr( - result, "VSP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 48, 1658); - add_machine_instr(result, "VLIP", mach_format::VRI_h, { vec_reg_4_U, imm_16_S, imm_4_U }, 48, 1649); - add_machine_instr(result, "VPKZ", mach_format::VSI, { vec_reg_4_U, db_12_4_U, imm_8_U }, 48, 1652); + result, "VSP", mach_format::VRI_f, { vec_reg_4_U, vec_reg_4_U, vec_reg_4_U, imm_8_U, mask_4_U }, 1658); + add_machine_instr(result, "VLIP", mach_format::VRI_h, { vec_reg_4_U, imm_16_S, imm_4_U }, 1649); + add_machine_instr(result, "VPKZ", mach_format::VSI, { vec_reg_4_U, db_12_4_U, imm_8_U }, 1652); add_machine_instr( - result, "VPSOP", mach_format::VRI_g, { vec_reg_4_U, vec_reg_4_U, imm_8_U, imm_8_U, mask_4_U }, 48, 1653); + result, "VPSOP", mach_format::VRI_g, { vec_reg_4_U, vec_reg_4_U, imm_8_U, imm_8_U, mask_4_U }, 1653); add_machine_instr( - result, "VSRP", mach_format::VRI_g, { vec_reg_4_U, vec_reg_4_U, imm_8_U, imm_8_S, mask_4_U }, 48, 1657); - add_machine_instr(result, "VTP", mach_format::VRR_g, { vec_reg_4_U }, 48, 1660); - add_machine_instr(result, "VUPKZ", mach_format::VSI, { vec_reg_4_U, db_12_4_U, imm_8_U }, 48, 1660); + result, "VSRP", mach_format::VRI_g, { vec_reg_4_U, vec_reg_4_U, imm_8_U, imm_8_S, mask_4_U }, 1657); + add_machine_instr(result, "VTP", mach_format::VRR_g, { vec_reg_4_U }, 1660); + add_machine_instr(result, "VUPKZ", mach_format::VSI, { vec_reg_4_U, db_12_4_U, imm_8_U }, 1660); + add_machine_instr( + result, "VCSFP", mach_format::VRR_a, { vec_reg_4_U, vec_reg_4_U, mask_4_U, mask_4_U, mask_4_U }, 1644); + add_machine_instr(result, "VSTER", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1578); + add_machine_instr(result, "VLER", mach_format::VRX, { vec_reg_4_U, dxb_12_4x4_U, mask_4_U }, 1564); return result; } @@ -1805,10 +1805,27 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "JXHG", { "BRXHG", {} }); add_mnemonic_code(result, "JXLE", { "BRXLE", {} }); add_mnemonic_code(result, "JXLEG", { "BRXLG", {} }); + add_mnemonic_code(result, "LHHR", { "RISBHGZ", { { 2, 0 }, { 3, 31 } } }); + add_mnemonic_code(result, "LHLR", { "RISBHGZ", { { 2, 0 }, { 3, 31 }, { 4, 32 } } }); + add_mnemonic_code(result, "LLHHHR", { "RISBHGZ", { { 2, 16 }, { 3, 31 } } }); + add_mnemonic_code(result, "LLHHLR", { "RISBHGZ", { { 2, 16 }, { 3, 31 }, { 4, 32 } } }); + add_mnemonic_code(result, "LLCHHR", { "RISBHGZ", { { 2, 24 }, { 3, 31 } } }); + add_mnemonic_code(result, "LLCHLR", { "RISBHGZ", { { 2, 24 }, { 3, 31 }, { 4, 32 } } }); + add_mnemonic_code(result, "LLHFR", { "RISBLGZ", { { 2, 0 }, { 3, 31 }, { 4, 32 } } }); + add_mnemonic_code(result, "LLHLHR", { "RISBLGZ", { { 2, 16 }, { 3, 31 }, { 4, 32 } } }); + add_mnemonic_code(result, "LLCLHR", { "RISBLGZ", { { 2, 24 }, { 3, 31 }, { 4, 32 } } }); + add_mnemonic_code(result, "NHLR", { "RNSBG", { { 2, 0 }, { 3, 31 }, { 4, 32 } } }); + add_mnemonic_code(result, "NHHR", { "RNSBG", { { 2, 0 }, { 3, 31 } } }); + add_mnemonic_code(result, "NLHR", { "RNSBG", { { 2, 32 }, { 3, 63 }, { 4, 32 } } }); + add_mnemonic_code(result, "OHLR", { "ROSBG", { { 2, 0 }, { 3, 31 }, { 4, 32 } } }); + add_mnemonic_code(result, "OHHR", { "ROSBG", { { 2, 0 }, { 3, 31 } } }); + add_mnemonic_code(result, "OLHR", { "ROSBG", { { 2, 32 }, { 3, 63 }, { 4, 32 } } }); add_mnemonic_code(result, "BIO", { "BIC", { { 0, 1 } } }); add_mnemonic_code(result, "BIP", { "BIC", { { 0, 2 } } }); add_mnemonic_code(result, "BIH", { "BIC", { { 0, 2 } } }); add_mnemonic_code(result, "BIM", { "BIC", { { 0, 4 } } }); + add_mnemonic_code(result, "LDRV", { "VLLEBRZ", { { 2, 3 } } }); + add_mnemonic_code(result, "LERV", { "VLLEBRZ", { { 2, 6 } } }); add_mnemonic_code(result, "BIL", { "BIC", { { 0, 4 } } }); add_mnemonic_code(result, "BINZ", { "BIC", { { 0, 7 } } }); add_mnemonic_code(result, "BINE", { "BIC", { { 0, 7 } } }); @@ -1820,6 +1837,33 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "BINH", { "BIC", { { 0, 13 } } }); add_mnemonic_code(result, "BINO", { "BIC", { { 0, 14 } } }); add_mnemonic_code(result, "BI", { "BIC", { { 0, 15 } } }); + add_mnemonic_code(result, "STERV", { "VSTEBRF", { { 2, 0 } } }); + add_mnemonic_code(result, "STDRV", { "VSTEBRG", { { 2, 0 } } }); + add_mnemonic_code(result, "SELFHRE", { "SELFHR", { { 3, 8 } } }); + add_mnemonic_code(result, "SELFHRH", { "SELFHR", { { 3, 2 } } }); + add_mnemonic_code(result, "SELFHRL", { "SELFHR", { { 3, 4 } } }); + add_mnemonic_code(result, "SELFHRNE", { "SELFHR", { { 3, 7 } } }); + add_mnemonic_code(result, "SELFHRNH", { "SELFHR", { { 3, 13 } } }); + add_mnemonic_code(result, "SELFHRNL", { "SELFHR", { { 3, 11 } } }); + add_mnemonic_code(result, "SELFHRNO", { "SELFHR", { { 3, 14 } } }); + add_mnemonic_code(result, "SELFHRO", { "SELFHR", { { 3, 1 } } }); + + add_mnemonic_code(result, "SELGRE", { "SELGR", { { 3, 8 } } }); + add_mnemonic_code(result, "SELGRH", { "SELGR", { { 3, 2 } } }); + add_mnemonic_code(result, "SELGRL", { "SELGR", { { 3, 4 } } }); + add_mnemonic_code(result, "SELGRNE", { "SELGR", { { 3, 7 } } }); + add_mnemonic_code(result, "SELGRNH", { "SELGR", { { 3, 13 } } }); + add_mnemonic_code(result, "SELGRNL", { "SELGR", { { 3, 11 } } }); + add_mnemonic_code(result, "SELGRNO", { "SELGR", { { 3, 14 } } }); + add_mnemonic_code(result, "SELGRO", { "SELGR", { { 3, 1 } } }); + add_mnemonic_code(result, "SELRE", { "SELR", { { 3, 8 } } }); + add_mnemonic_code(result, "SELRH", { "SELR", { { 3, 2 } } }); + add_mnemonic_code(result, "SELRL", { "SELR", { { 3, 4 } } }); + add_mnemonic_code(result, "SELRNE", { "SELR", { { 3, 7 } } }); + add_mnemonic_code(result, "SELRNH", { "SELR", { { 3, 13 } } }); + add_mnemonic_code(result, "SELRNL", { "SELR", { { 3, 11 } } }); + add_mnemonic_code(result, "SELRNO", { "SELR", { { 3, 14 } } }); + add_mnemonic_code(result, "SELRO", { "SELR", { { 3, 1 } } }); add_mnemonic_code(result, "VZERO", { "VGBM", { { 0, 1 } } }); add_mnemonic_code(result, "VONE", { "VGBM", { { 1, 65535 } } }); add_mnemonic_code(result, "VGMB", { "VGM", { { 3, 0 } } }); @@ -1839,6 +1883,10 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "VLLEZF", { "VLLEZ", { { 2, 2 } } }); add_mnemonic_code(result, "VLLEZG", { "VLLEZ", { { 2, 3 } } }); add_mnemonic_code(result, "VLLEZLF", { "VLLEZ", { { 2, 6 } } }); + add_mnemonic_code(result, "VLLEBRZH", { "VLLEBRZ", { { 2, 1 } } }); + add_mnemonic_code(result, "VLLEBRZF", { "VLLEBRZ", { { 2, 2 } } }); + add_mnemonic_code(result, "VLLEBRZG", { "VLLEBRZ", { { 2, 3 } } }); + add_mnemonic_code(result, "VLLEBRZE", { "VLLEBRZ", { { 2, 6 } } }); add_mnemonic_code(result, "VLVGB", { "VLVG", { { 3, 0 } } }); add_mnemonic_code(result, "VLVGH", { "VLVG", { { 3, 1 } } }); add_mnemonic_code(result, "VLVGF", { "VLVG", { { 3, 2 } } }); @@ -1851,6 +1899,9 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "VMRLH", { "VMRL", { { 3, 1 } } }); add_mnemonic_code(result, "VMRLF", { "VMRL", { { 3, 2 } } }); add_mnemonic_code(result, "VMRLG", { "VMRL", { { 3, 3 } } }); + add_mnemonic_code(result, "VPKF", { "VPK", { { 3, 2 } } }); + add_mnemonic_code(result, "VPKG", { "VPK", { { 3, 3 } } }); + add_mnemonic_code(result, "VPKH", { "VPK", { { 3, 1 } } }); add_mnemonic_code(result, "VPKSH", { "VPKS", { { 3, 1 }, { 4, 0 } } }); add_mnemonic_code(result, "VPKSF", { "VPKS", { { 3, 2 }, { 4, 0 } } }); add_mnemonic_code(result, "VPKSG", { "VPKS", { { 3, 3 }, { 4, 0 } } }); @@ -1878,7 +1929,7 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "VUPHH", { "VUPH", { { 2, 1 } } }); add_mnemonic_code(result, "VUPHF", { "VUPH", { { 2, 2 } } }); add_mnemonic_code(result, "VUPLHB", { "VUPLH", { { 2, 0 } } }); - add_mnemonic_code(result, "VUPLHG", { "VUPLH", { { 2, 1 } } }); + add_mnemonic_code(result, "VUPLHH", { "VUPLH", { { 2, 1 } } }); add_mnemonic_code(result, "VUPLHF", { "VUPLH", { { 2, 2 } } }); add_mnemonic_code(result, "VUPLB", { "VUPL", { { 2, 0 } } }); add_mnemonic_code(result, "VUPLHW", { "VUPL", { { 2, 1 } } }); @@ -1923,6 +1974,7 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "VCEQFS", { "VCEQ", { { 3, 2 }, { 4, 1 } } }); add_mnemonic_code(result, "VCEQGS", { "VCEQ", { { 3, 3 }, { 4, 1 } } }); add_mnemonic_code(result, "VCHB", { "VCH", { { 3, 0 }, { 4, 0 } } }); + add_mnemonic_code(result, "VCELFB", { "VCFPL", { { 2, 0 } } }); add_mnemonic_code(result, "VCHH", { "VCH", { { 3, 1 }, { 4, 0 } } }); add_mnemonic_code(result, "VCHF", { "VCH", { { 3, 2 }, { 4, 0 } } }); add_mnemonic_code(result, "VCHG", { "VCH", { { 3, 3 }, { 4, 0 } } }); @@ -1938,6 +1990,8 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "VCHLHS", { "VCHL", { { 3, 1 }, { 4, 1 } } }); add_mnemonic_code(result, "VCHLFS", { "VCHL", { { 3, 2 }, { 4, 1 } } }); add_mnemonic_code(result, "VCHLGS", { "VCHL", { { 3, 3 }, { 4, 1 } } }); + add_mnemonic_code(result, "VCFEB", { "VCSFP", { { 2, 2 } } }); + add_mnemonic_code(result, "VCLFEB", { "VCLFP", { { 2, 0 } } }); add_mnemonic_code(result, "VCLZB", { "VCLZ", { { 2, 0 } } }); add_mnemonic_code(result, "VCLZH", { "VCLZ", { { 2, 1 } } }); add_mnemonic_code(result, "VCLZF", { "VCLZ", { { 2, 2 } } }); @@ -2075,6 +2129,13 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "VSUMGF", { "VSUMG", { { 3, 2 } } }); add_mnemonic_code(result, "VSUMB", { "VSUM", { { 3, 0 } } }); add_mnemonic_code(result, "VSUMH", { "VSUM", { { 3, 1 } } }); + add_mnemonic_code(result, "VSTERH", { "VSTER", { { 2, 1 } } }); + add_mnemonic_code(result, "VSTERF", { "VSTER", { { 2, 2 } } }); + add_mnemonic_code(result, "VSTERG", { "VSTER", { { 2, 3 } } }); + add_mnemonic_code(result, "VSTBRF", { "VSTBR", { { 2, 2 } } }); + add_mnemonic_code(result, "VSTBRH", { "VSTBR", { { 2, 1 } } }); + add_mnemonic_code(result, "VSTBRG", { "VSTBR", { { 2, 3 } } }); + add_mnemonic_code(result, "VSTBRQ", { "VSTBR", { { 2, 4 } } }); add_mnemonic_code(result, "VFAEB", { "VFAE", { { 3, 0 } } }); add_mnemonic_code(result, "VFAEH", { "VFAE", { { 3, 1 } } }); add_mnemonic_code(result, "VFAEF", { "VFAE", { { 3, 2 } } }); @@ -2111,6 +2172,12 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "VSTRCB", { "VSTRC", { { 4, 0 } } }); add_mnemonic_code(result, "VSTRCH", { "VSTRC", { { 4, 1 } } }); add_mnemonic_code(result, "VSTRCF", { "VSTRC", { { 4, 2 } } }); + add_mnemonic_code(result, "VSTRSB", { "VSTRS", { { 4, 0 } } }); + add_mnemonic_code(result, "VSTRSH", { "VSTRS", { { 4, 1 } } }); + add_mnemonic_code(result, "VSTRSF", { "VSTRS", { { 4, 2 } } }); + add_mnemonic_code(result, "VSTRSZB", { "VSTRS", { { 4, 0 }, { 5, 2 } } }); + add_mnemonic_code(result, "VSTRSZH", { "VSTRS", { { 4, 1 }, { 5, 2 } } }); + add_mnemonic_code(result, "VSTRSZF", { "VSTRS", { { 4, 2 }, { 5, 2 } } }); add_mnemonic_code(result, "VFASB", { "VFA", { { 3, 2 }, { 4, 0 } } }); add_mnemonic_code(result, "VFADB", { "VFA", { { 3, 3 }, { 4, 0 } } }); add_mnemonic_code(result, "WFASB", { "VFA", { { 3, 2 }, { 4, 8 } } }); @@ -2121,7 +2188,7 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "WFCXB", { "WFC", { { 3, 4 }, { 4, 0 } } }); add_mnemonic_code(result, "WFKSB", { "WFK", { { 3, 2 }, { 4, 0 } } }); add_mnemonic_code(result, "WFKDB", { "WFK", { { 3, 3 }, { 4, 0 } } }); - add_mnemonic_code(result, "WFKXB", { "WFK", { { 3, 4 }, { 4, 0 } } }); + add_mnemonic_code(result, "WFKXc", { "WFK", { { 3, 4 }, { 4, 0 } } }); add_mnemonic_code(result, "VFCESB", { "VFCE", { { 3, 2 }, { 4, 0 }, { 5, 0 } } }); add_mnemonic_code(result, "VFCESBS", { "VFCE", { { 3, 2 }, { 4, 0 }, { 5, 1 } } }); add_mnemonic_code(result, "VFCEDB", { "VFCE", { { 3, 3 }, { 4, 0 }, { 5, 0 } } }); @@ -2181,10 +2248,11 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "WFKHEDB", { "VFCHE", { { 3, 3 }, { 4, 12 }, { 5, 0 } } }); add_mnemonic_code(result, "WFKHEDBS", { "VFCHE", { { 3, 3 }, { 4, 12 }, { 5, 1 } } }); add_mnemonic_code(result, "WFKHEXB", { "VFCHE", { { 3, 4 }, { 4, 12 }, { 5, 0 } } }); - add_mnemonic_code(result, "VCDGB", { "VCDG", { { 2, 3 } } }); - add_mnemonic_code(result, "VCDLGB", { "VCDLG", { { 2, 3 } } }); - add_mnemonic_code(result, "VCGDB", { "VCGD", { { 2, 3 } } }); - add_mnemonic_code(result, "VCLGDB", { "VCLGD", { { 2, 3 } } }); + add_mnemonic_code(result, "WFKHEXBS", { "VFCHE", { { 3, 4 }, { 4, 12 }, { 5, 1 } } }); + add_mnemonic_code(result, "VCDGB", { "VCFPS", { { 2, 3 } } }); + add_mnemonic_code(result, "VCDLGB", { "VCFPL", { { 2, 3 } } }); + add_mnemonic_code(result, "VCGDB", { "VCSFP", { { 2, 3 } } }); + add_mnemonic_code(result, "VCLGDB", { "VCLFP", { { 2, 3 } } }); add_mnemonic_code(result, "VFDSB", { "VFD", { { 3, 2 }, { 4, 0 } } }); add_mnemonic_code(result, "WFDSB", { "VFD", { { 3, 2 }, { 4, 8 } } }); add_mnemonic_code(result, "VFDDB", { "VFD", { { 3, 3 }, { 4, 0 } } }); @@ -2192,6 +2260,13 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "WFDXB", { "VFD", { { 3, 4 }, { 4, 8 } } }); add_mnemonic_code(result, "VFISB", { "VFI", { { 2, 2 } } }); add_mnemonic_code(result, "VFIDB", { "VFI", { { 2, 3 } } }); + add_mnemonic_code(result, "VLBRH", { "VLBR", { { 2, 1 } } }); + add_mnemonic_code(result, "VLBRF", { "VLBR", { { 2, 2 } } }); + add_mnemonic_code(result, "VLBRG", { "VLBR", { { 2, 3 } } }); + add_mnemonic_code(result, "VLBRQ", { "VLBR", { { 2, 4 } } }); + add_mnemonic_code(result, "VLBRREPH", { "VLBRREP", { { 2, 1 } } }); + add_mnemonic_code(result, "VLBRREPF", { "VLBRREP", { { 2, 2 } } }); + add_mnemonic_code(result, "VLBRREPG", { "VLBRREP", { { 2, 3 } } }); add_mnemonic_code(result, "VLDE", { "VFLL", {} }); add_mnemonic_code(result, "VLDEB", { "VFLL", { { 2, 2 }, { 3, 0 } } }); add_mnemonic_code(result, "WLDEB", { "VFLL", { { 2, 2 }, { 3, 8 } } }); @@ -2200,6 +2275,9 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "WFLLD", { "VFLL", { { 2, 3 }, { 3, 8 } } }); add_mnemonic_code(result, "VLED", { "VFLR", {} }); add_mnemonic_code(result, "VLEDB", { "VFLR", { { 2, 3 } } }); + add_mnemonic_code(result, "VLERH", { "VLER", { { 2, 1 } } }); + add_mnemonic_code(result, "VLERF", { "VLER", { { 2, 2 } } }); + add_mnemonic_code(result, "VLERG", { "VLER", { { 2, 3 } } }); add_mnemonic_code(result, "VFLRD", { "VFLR", { { 2, 3 } } }); add_mnemonic_code(result, "VFMAXSB", { "VFMAX", { { 3, 2 }, { 4, 0 } } }); add_mnemonic_code(result, "VFMAXDB", { "VFMAX", { { 3, 3 }, { 4, 0 } } }); @@ -2271,6 +2349,10 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "WFTCISB", { "VFTCI", { { 3, 2 }, { 4, 8 } } }); add_mnemonic_code(result, "WFTCIDB", { "VFTCI", { { 3, 3 }, { 4, 8 } } }); add_mnemonic_code(result, "WFTCIXB", { "VFTCI", { { 3, 4 }, { 4, 8 } } }); + add_mnemonic_code(result, "VCEFB", { "VCFPS", { { 2, 0 } } }); + add_mnemonic_code(result, "XHLR", { "RXSBG", { { 2, 0 }, { 3, 31 }, { 4, 32 } } }); + add_mnemonic_code(result, "XLHR", { "RXSBG", { { 2, 32 }, { 3, 63 }, { 4, 32 } } }); + add_mnemonic_code(result, "XHHR", { "RXSBG", { { 2, 0 }, { 3, 31 } } }); // instruction under this position contain an OR operation not marked in this list // in case the operand is ommited, the OR number should be assigned to the value of the ommited operand @@ -2296,13 +2378,29 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "WFISB", { "VFI", { { 2, 2 } } }); // operand with index 3 ORed with 8 add_mnemonic_code(result, "WFIDB", { "VFI", { { 2, 3 } } }); // operand with index 3 ORed with 8 add_mnemonic_code(result, "WFIXB", { "VFI", { { 2, 4 } } }); // operand with index 3 ORed with 8 - add_mnemonic_code(result, "WCDGB", { "VCDG", { { 2, 3 } } }); // operand with index 3 ORed with 8 - add_mnemonic_code(result, "WCDLGB", { "VCDLG", { { 2, 3 } } }); // operand with index 3 ORed with 8 - add_mnemonic_code(result, "WCGDB", { "VCGD", { { 2, 3 } } }); // operand with index 3 ORed with 8 - add_mnemonic_code(result, "WCLGDB", { "VCLGD", { { 2, 3 } } }); // operand with index 3 ORed with 8 + add_mnemonic_code(result, "WCDGB", { "VCFPS", { { 2, 3 } } }); // operand with index 3 ORed with 8 + add_mnemonic_code(result, "WCDLGB", { "VCFPL", { { 2, 3 } } }); // operand with index 3 ORed with 8 + add_mnemonic_code(result, "WCGDB", { "VCSFP", { { 2, 3 } } }); // operand with index 3 ORed with 8 + add_mnemonic_code(result, "WCLGDB", { "VCLFP", { { 2, 3 } } }); // operand with index 3 ORed with 8 add_mnemonic_code(result, "WLEDB", { "VFLR", { { 2, 3 } } }); // operand with index 3 ORed with 8 add_mnemonic_code(result, "WFLRD", { "VFLR", { { 2, 3 } } }); // operand with index 3 ORed with 8 add_mnemonic_code(result, "WFLRX", { "VFLR", { { 2, 4 } } }); // operand with index 3 ORed with 8 + add_mnemonic_code(result, "WCEFB", { "VCFPS", { { 2, 2 } } }); // operand with index 3 ORed with 8 + add_mnemonic_code(result, "WCELFB", { "VCFPL", { { 2, 2 } } }); // operand with index 3 ORed with 8 + add_mnemonic_code(result, "WCLFEB", { "VCLFP", { { 2, 2 } } }); // operand with index 3 ORed with 8 + add_mnemonic_code(result, "WCFEB", { "VCSFP", { { 2, 2 } } }); // operand with index 3 ORed with 8 + + // instruction under this position contain an add operation not marked in this list + add_mnemonic_code(result, + "RISBGZ", + { "RISBG", {} }); // operand with index 3 added with 128(RISBGZ R1,R2,I3,I4,I5 RISBG R1,R2,I3,I4+128,I5) + add_mnemonic_code(result, "RISBGNZ", { "RISBGN", {} }); // operand with index 3 added with 128 + add_mnemonic_code(result, "RISBHGZ", { "RISBHG", {} }); // operand with index 3 added with 128 + add_mnemonic_code(result, "RISBLGZ", { "RISBLG", {} }); // operand with index 3 added with 128 + add_mnemonic_code(result, "RNSBGT", { "RNSBG", {} }); // operand with index 3 added with 128 + add_mnemonic_code(result, "ROSBGT", { "ROSBG", {} }); // operand with index 3 added with 128 + add_mnemonic_code(result, "RXSBGT", { "RXSBGT", {} }); // operand with index 3 added with 128 + // mnemonics not in principles add_mnemonic_code(result, "CIJE", { "CIJ", { { 2, 8 } } }); add_mnemonic_code(result, "CIJH", { "CIJ", { { 2, 2 } } }); @@ -2460,6 +2558,66 @@ std::map hlasm_plugin::parser_library::context add_mnemonic_code(result, "CRTNE", { "CRT", { { 2, 6 } } }); add_mnemonic_code(result, "CRTNH", { "CRT", { { 2, 12 } } }); add_mnemonic_code(result, "CRTNL", { "CRT", { { 2, 10 } } }); + add_mnemonic_code(result, "LOCO", { "LOC", { { 2, 1 } } }); + add_mnemonic_code(result, "LOCNO", { "LOC", { { 2, 14 } } }); + add_mnemonic_code(result, "LOCGO", { "LOCG", { { 2, 1 } } }); + add_mnemonic_code(result, "LOCGNO", { "LOCG", { { 2, 14 } } }); + add_mnemonic_code(result, "LOCGHIH", { "LOCGHI", { { 2, 2 } } }); + add_mnemonic_code(result, "LOCGHIL", { "LOCGHI", { { 2, 4 } } }); + add_mnemonic_code(result, "LOCGHIE", { "LOCGHI", { { 2, 8 } } }); + add_mnemonic_code(result, "LOCGHINE", { "LOCGHI", { { 2, 7 } } }); + add_mnemonic_code(result, "LOCGHINL", { "LOCGHI", { { 2, 11 } } }); + add_mnemonic_code(result, "LOCGHINH", { "LOCGHI", { { 2, 13 } } }); + add_mnemonic_code(result, "LOCGHINO", { "LOCGHI", { { 2, 14 } } }); + add_mnemonic_code(result, "LOCGHIO", { "LOCGHI", { { 2, 1 } } }); + add_mnemonic_code(result, "LOCGRO", { "LOCGR", { { 2, 1 } } }); + add_mnemonic_code(result, "LOCGRNO", { "LOCGR", { { 2, 14 } } }); + add_mnemonic_code(result, "LOCHHIE", { "LOCHHI", { { 2, 8 } } }); + add_mnemonic_code(result, "LOCHHIH", { "LOCHHI", { { 2, 2 } } }); + add_mnemonic_code(result, "LOCHHIL", { "LOCHHI", { { 2, 4 } } }); + add_mnemonic_code(result, "LOCHHINE", { "LOCHHI", { { 2, 7 } } }); + add_mnemonic_code(result, "LOCHHINH", { "LOCHHI", { { 2, 13 } } }); + add_mnemonic_code(result, "LOCHHINL", { "LOCHHI", { { 2, 11 } } }); + add_mnemonic_code(result, "LOCHHINO", { "LOCHHI", { { 2, 14 } } }); + add_mnemonic_code(result, "LOCHHIO", { "LOCHHI", { { 2, 1 } } }); + add_mnemonic_code(result, "LOCHIE", { "LOCHI", { { 2, 8 } } }); + add_mnemonic_code(result, "LOCHIH", { "LOCHI", { { 2, 2 } } }); + add_mnemonic_code(result, "LOCHIL", { "LOCHI", { { 2, 4 } } }); + add_mnemonic_code(result, "LOCHINE", { "LOCHI", { { 2, 7 } } }); + add_mnemonic_code(result, "LOCHINH", { "LOCHI", { { 2, 13 } } }); + add_mnemonic_code(result, "LOCHINL", { "LOCHI", { { 2, 11 } } }); + add_mnemonic_code(result, "LOCHINO", { "LOCHI", { { 2, 14 } } }); + add_mnemonic_code(result, "LOCHIO", { "LOCHI", { { 2, 1 } } }); + add_mnemonic_code(result, "LOCRNO", { "LOCR", { { 2, 14 } } }); + add_mnemonic_code(result, "LOCRO", { "LOCR", { { 2, 1 } } }); + add_mnemonic_code(result, "LOCFHE", { "LOCFH", { { 2, 8 } } }); + add_mnemonic_code(result, "LOCFHH", { "LOCFH", { { 2, 2 } } }); + add_mnemonic_code(result, "LOCFHL", { "LOCFH", { { 2, 4 } } }); + add_mnemonic_code(result, "LOCFHNE", { "LOCFH", { { 2, 7 } } }); + add_mnemonic_code(result, "LOCFHNH", { "LOCFH", { { 2, 13 } } }); + add_mnemonic_code(result, "LOCFHNL", { "LOCFH", { { 2, 11 } } }); + add_mnemonic_code(result, "LOCFHNO", { "LOCFH", { { 2, 14 } } }); + add_mnemonic_code(result, "LOCFHO", { "LOCFH", { { 2, 1 } } }); + add_mnemonic_code(result, "LOCFHRH", { "LOCFHR", { { 2, 2 } } }); + add_mnemonic_code(result, "LOCFHRL", { "LOCFHR", { { 2, 4 } } }); + add_mnemonic_code(result, "LOCFHRE", { "LOCFHR", { { 2, 8 } } }); + add_mnemonic_code(result, "LOCFHRNE", { "LOCFHR", { { 2, 7 } } }); + add_mnemonic_code(result, "LOCFHRNH", { "LOCFHR", { { 2, 13 } } }); + add_mnemonic_code(result, "LOCFHRNL", { "LOCFHR", { { 2, 11 } } }); + add_mnemonic_code(result, "LOCFHRNO", { "LOCFHR", { { 2, 14 } } }); + add_mnemonic_code(result, "LOCFHRO", { "LOCFHR", { { 2, 1 } } }); + add_mnemonic_code(result, "STOCFHE", { "STOCFH", { { 2, 8 } } }); + add_mnemonic_code(result, "STOCFHH", { "STOCFH", { { 2, 2 } } }); + add_mnemonic_code(result, "STOCFHL", { "STOCFH", { { 2, 4 } } }); + add_mnemonic_code(result, "STOCFHNE", { "STOCFH", { { 2, 7 } } }); + add_mnemonic_code(result, "STOCFHNH", { "STOCFH", { { 2, 13 } } }); + add_mnemonic_code(result, "STOCFHNL", { "STOCFH", { { 2, 11 } } }); + add_mnemonic_code(result, "STOCFHNO", { "STOCFH", { { 2, 14 } } }); + add_mnemonic_code(result, "STOCFHO", { "STOCFH", { { 2, 1 } } }); + add_mnemonic_code(result, "STOCGNO", { "STOCG", { { 2, 14 } } }); + add_mnemonic_code(result, "STOCGO", { "STOCG", { { 2, 1 } } }); + add_mnemonic_code(result, "STOCNO", { "STOC", { { 2, 14 } } }); + add_mnemonic_code(result, "STOCO", { "STOC", { { 2, 1 } } }); add_mnemonic_code(result, "LOCGE", { "LOCG", { { 2, 8 } } }); add_mnemonic_code(result, "LOCGH", { "LOCG", { { 2, 2 } } }); add_mnemonic_code(result, "LOCGL", { "LOCG", { { 2, 4 } } }); diff --git a/parser_library/src/context/instruction.h b/parser_library/src/context/instruction.h index f9a8a0786..78629c974 100644 --- a/parser_library/src/context/instruction.h +++ b/parser_library/src/context/instruction.h @@ -32,84 +32,84 @@ namespace context { // all mach_format types for operands of machine instructions: enum class mach_format { - E, - I, - IE, - MII, - RI_a, - RI_b, - RI_c, - RIE_a, - RIE_b, - RIE_c, - RIE_d, - RIE_e, - RIE_f, - RIE_g, - RIL_a, - RIL_b, - RIL_c, - RIS, - RR, - RRD, - RRE, - RRF_a, - RRF_b, - RRF_c, - RRF_d, - RRF_e, - RRS, - RS_a, - RS_b, - RSI, - RSL_a, - RSL_b, - RSY_a, - RSY_b, - RX_a, - RX_b, - RXE, - RXF, - RXY_a, - RXY_b, - S, - SI, - SIL, - SIY, - SMI, - SS_a, - SS_b, - SS_c, - SS_d, - SS_e, - SS_f, - SSE, - SSF, - VRI_a, - VRI_b, - VRI_c, - VRI_d, - VRI_e, - VRI_f, - VRR_a, - VRR_b, - VRR_c, - VRR_d, - VRR_e, - VRR_f, - VRS_a, - VRS_b, + E = 16, + I = 16, + IE = 32, + MII = 48, + RI_a = 32, + RI_b = 32, + RI_c = 32, + RIE_a = 48, + RIE_b = 48, + RIE_c = 48, + RIE_d = 48, + RIE_e = 48, + RIE_f = 48, + RIE_g = 48, + RIL_a = 48, + RIL_b = 48, + RIL_c = 48, + RIS = 48, + RR = 16, + RRD = 32, + RRE = 32, + RRF_a = 32, + RRF_b = 32, + RRF_c = 32, + RRF_d = 32, + RRF_e = 32, + RRS = 48, + RS_a = 32, + RS_b = 32, + RSI = 32, + RSL_a = 48, + RSL_b = 48, + RSY_a = 48, + RSY_b = 48, + RX_a = 32, + RX_b = 32, + RXE = 48, + RXF = 48, + RXY_a = 48, + RXY_b = 48, + S = 32, + SI = 32, + SIL = 48, + SIY = 48, + SMI = 48, + SS_a = 48, + SS_b = 48, + SS_c = 48, + SS_d = 48, + SS_e = 48, + SS_f = 48, + SSE = 48, + SSF = 48, + VRI_a = 48, + VRI_b = 48, + VRI_c = 48, + VRI_d = 48, + VRI_e = 48, + VRI_f = 48, + VRR_a = 48, + VRR_b = 48, + VRR_c = 48, + VRR_d = 48, + VRR_e = 48, + VRR_f = 48, + VRS_a = 48, + VRS_b = 48, VRS_c, - VRV, - VRX, - VRI_g, - VRI_h, - VRI_i, - VRR_g, - VRR_h, - VRR_i, - VRS_d, - VSI + VRV = 48, + VRX = 48, + VRI_g = 48, + VRI_h = 48, + VRI_i = 48, + VRR_g = 48, + VRR_h = 48, + VRR_i = 48, + VRS_d = 48, + VSI = 48 }; const checking::parameter empty = { false, 0, checking::machine_operand_type::NONE }; @@ -185,20 +185,18 @@ class machine_instruction mach_format format, std::vector operands, int no_optional, - size_t size, size_t page_no) : instr_name(name) , format(format) , operands(operands) - , size_for_alloc(size) + , size_for_alloc((size_t)format) , no_optional(no_optional) , page_no(page_no) {}; machine_instruction(const std::string& name, mach_format format, std::vector operands, - size_t size, size_t page_no) - : machine_instruction(name, format, operands, 0, size, page_no) + : machine_instruction(name, format, operands, 0, page_no) {} bool check_nth_operand(size_t place, const checking::machine_operand* operand); From 6d141b8f506a6deee9258ad529eca34d7c352a5a Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Thu, 15 Apr 2021 12:26:03 +0200 Subject: [PATCH 02/37] Draft Signed-off-by: Sweta Shah --- parser_library/src/checking/instr_operand.cpp | 23 ++++++++++++++++- parser_library/src/checking/instr_operand.h | 3 ++- parser_library/src/diagnostic.cpp | 25 ++++++++++++++++++- parser_library/src/diagnostic.h | 6 +++++ .../src/semantics/operand_impls.cpp | 4 +++ 5 files changed, 58 insertions(+), 3 deletions(-) diff --git a/parser_library/src/checking/instr_operand.cpp b/parser_library/src/checking/instr_operand.cpp index 0012e4ec3..478ee4add 100644 --- a/parser_library/src/checking/instr_operand.cpp +++ b/parser_library/src/checking/instr_operand.cpp @@ -216,6 +216,8 @@ hlasm_plugin::parser_library::diagnostic_op machine_operand::get_simple_operand_ return diagnostic_op::error_M113(instr_name, operand_range); case machine_operand_type::VEC_REG: // V return diagnostic_op::error_M114(instr_name, operand_range); + case machine_operand_type::RELOC_IMM: // RI + return diagnostic_op::error_M115(instr_name, operand_range); } assert(false); return diagnostic_op::error_I999(instr_name, stmt_range); @@ -286,9 +288,18 @@ bool one_operand::check( return false; } return true; + } + else + { + if (to_check.identifier.type == machine_operand_type::RELOC_IMM && operand_identifier != "RELOC") { + diag = diagnostic_op::warn_D031(operand_range, instr_name); + return false; + } } // it is a simple operand + + if (to_check.identifier.is_signed && !is_size_corresponding_signed(value, to_check.identifier.size)) { auto boundary = 1ll << (to_check.identifier.size - 1); @@ -300,9 +311,12 @@ bool one_operand::check( case machine_operand_type::REG_IMM: diag = diagnostic_op::error_M123(instr_name, -boundary, boundary - 1, operand_range); break; + case machine_operand_type::RELOC_IMM: + diag = diagnostic_op::error_M125(instr_name, -boundary, boundary - 1, operand_range); + break; default: assert(false); - } + } return false; } if (!to_check.identifier.is_signed && !is_size_corresponding_unsigned(value, to_check.identifier.size)) @@ -322,6 +336,9 @@ bool one_operand::check( case machine_operand_type::VEC_REG: diag = diagnostic_op::error_M124(instr_name, operand_range); break; + case machine_operand_type::RELOC_IMM: + diag = diagnostic_op::error_M125(instr_name, 0, boundary, operand_range); + break; default: assert(false); } @@ -370,6 +387,10 @@ std::string parameter::to_string() const ret_val = "L"; break; } + case machine_operand_type::RELOC_IMM: { + ret_val = "RI"; + break; + } case machine_operand_type::VEC_REG: return "V"; case machine_operand_type::DIS_REG: diff --git a/parser_library/src/checking/instr_operand.h b/parser_library/src/checking/instr_operand.h index 08325fe7d..519abea49 100644 --- a/parser_library/src/checking/instr_operand.h +++ b/parser_library/src/checking/instr_operand.h @@ -74,7 +74,8 @@ enum class machine_operand_type : uint8_t BASE, LENGTH, VEC_REG, - DIS_REG + DIS_REG, + RELOC_IMM }; // Describes a component of machine operand format. Specifies allowed values. diff --git a/parser_library/src/diagnostic.cpp b/parser_library/src/diagnostic.cpp index 9c69a8319..c5da98a9a 100644 --- a/parser_library/src/diagnostic.cpp +++ b/parser_library/src/diagnostic.cpp @@ -1235,6 +1235,7 @@ diagnostic_op diagnostic_op::error_M113(const std::string& instr_name, const ran range); } + diagnostic_op diagnostic_op::error_M114(const std::string& instr_name, const range& range) { return diagnostic_op(diagnostic_severity::error, @@ -1242,7 +1243,13 @@ diagnostic_op diagnostic_op::error_M114(const std::string& instr_name, const ran "Error at " + instr_name + " instruction: operand must be an absolute vector register value", range); } - +diagnostic_op diagnostic_op::error_M115(const std::string& instr_name, const range& range) +{ + return diagnostic_op(diagnostic_severity::error, + "M115", + "Error at " + instr_name + " instruction: operand must be relocatable symbol or an absolute immediate value", + range); +} diagnostic_op diagnostic_op::error_M120(const std::string& instr_name, const range& range) { return diagnostic_op(diagnostic_severity::error, @@ -1285,6 +1292,14 @@ diagnostic_op diagnostic_op::error_M124(const std::string& instr_name, const ran range); } +diagnostic_op diagnostic_op::error_M125(const std::string& instr_name, long long from, long long to, const range& range) +{ + return diagnostic_op(diagnostic_severity::error, + "M125", + "Error at " + instr_name + " instruction: relocatable symbol or immediate operand absolute value must be between " + + std::to_string(from) + " and " + std::to_string(to), + range); +} diagnostic_op diagnostic_op::error_M130(const std::string& instr_name, long long from, long long to, const range& range) { return diagnostic_op(diagnostic_severity::error, @@ -1477,6 +1492,14 @@ diagnostic_op diagnostic_op::warn_D025(const range& range, const std::string& ty return diagnostic_op( diagnostic_severity::warning, "D025", "The " + modifier + " modifier is ignored with type " + type, range); } +diagnostic_op diagnostic_op::warn_D031(const range& range, const std::string& instr) +{ + return diagnostic_op(diagnostic_severity::warning, + "D031", + " Operand value must be relocatable symbol with instruction " + instr, + + range); +} diagnostic_op diagnostic_op::error_D026(const range& range) { diff --git a/parser_library/src/diagnostic.h b/parser_library/src/diagnostic.h index 5e2e1aa45..59241e9ee 100644 --- a/parser_library/src/diagnostic.h +++ b/parser_library/src/diagnostic.h @@ -439,6 +439,8 @@ struct diagnostic_op static diagnostic_op error_D023(const range& range); static diagnostic_op error_D024(const range& range, const std::string& type); static diagnostic_op warn_D025(const range& range, const std::string& type, const std::string& modifier); + + static diagnostic_op warn_D031(const range& range, const std::string& modifier); static diagnostic_op error_D026(const range& range); static diagnostic_op error_D027(const range& range); static diagnostic_op error_D028(const range& range); @@ -461,6 +463,8 @@ struct diagnostic_op static diagnostic_op error_M114(const std::string& instr_name, const range& range); + static diagnostic_op error_M115(const std::string& instr_name, const range& range); + static diagnostic_op error_M120(const std::string& instr_name, const range& range); static diagnostic_op error_M121(const std::string& instr_name, const range& range); @@ -471,6 +475,8 @@ struct diagnostic_op static diagnostic_op error_M124(const std::string& instr_name, const range& range); + static diagnostic_op error_M125(const std::string& instr_name, long long from, long long to, const range& range); + static diagnostic_op error_M130(const std::string& instr_name, long long from, long long to, const range& range); static diagnostic_op error_M131(const std::string& instr_name, const range& range); diff --git a/parser_library/src/semantics/operand_impls.cpp b/parser_library/src/semantics/operand_impls.cpp index 0916b244d..e332c2067 100644 --- a/parser_library/src/semantics/operand_impls.cpp +++ b/parser_library/src/semantics/operand_impls.cpp @@ -90,12 +90,16 @@ std::unique_ptr make_check_operand(expressions::mach_evaluate { return std::make_unique(res.get_abs()); } + else if ((res.value_kind() == context::symbol_value_kind::RELOC)) { + return std::make_unique("RELOC", 0); + } else { if (type_hint && *type_hint == checking::machine_operand_type::REG_IMM) { return std::make_unique(0); } + else { return std::make_unique( From 825794b02066be9715cf01ae38528ba3f9f239e3 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Thu, 15 Apr 2021 14:24:12 +0200 Subject: [PATCH 03/37] Instructions affected by this bug added Signed-off-by: Sweta Shah --- parser_library/src/context/instruction.cpp | 88 +++++++++++----------- parser_library/src/context/instruction.h | 8 ++ 2 files changed, 52 insertions(+), 44 deletions(-) diff --git a/parser_library/src/context/instruction.cpp b/parser_library/src/context/instruction.cpp index 5028e8f59..38f868c59 100644 --- a/parser_library/src/context/instruction.cpp +++ b/parser_library/src/context/instruction.cpp @@ -348,18 +348,18 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() 526); add_machine_instr(result, "BPP", mach_format::SMI, { mask_4_U, reg_imm_16_S, db_12_4_U }, 527); - add_machine_instr(result, "BPRP", mach_format::MII, { mask_4_U, reg_imm_12_S, reg_imm_24_S }, 527); - add_machine_instr(result, "BRAS", mach_format::RI_b, { reg_4_U, reg_imm_16_S }, 530); - add_machine_instr(result, "BRASL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 530); - add_machine_instr(result, "BRC", mach_format::RI_c, { mask_4_U, reg_imm_16_S }, 530); - add_machine_instr(result, "BRCL", mach_format::RIL_c, { mask_4_U, reg_imm_32_S }, 530); - add_machine_instr(result, "BRCT", mach_format::RI_b, { reg_4_U, reg_imm_16_S }, 531); - add_machine_instr(result, "BRCTG", mach_format::RI_b, { reg_4_U, reg_imm_16_S }, 531); - add_machine_instr(result, "BRCTH", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 531); - add_machine_instr(result, "BRXH", mach_format::RSI, { reg_4_U, reg_4_U, reg_imm_16_S }, 532); - add_machine_instr(result, "BRXHG", mach_format::RIE_e, { reg_4_U, reg_4_U, reg_imm_16_S }, 532); - add_machine_instr(result, "BRXLE", mach_format::RSI, { reg_4_U, reg_4_U, reg_imm_16_S }, 532); - add_machine_instr(result, "BRXLG", mach_format::RIE_e, { reg_4_U, reg_4_U, reg_imm_16_S }, 532); + add_machine_instr(result, "BPRP", mach_format::MII, { mask_4_U, rel_addr_imm_12_S, rel_addr_imm_24_S }, 527); + add_machine_instr(result, "BRAS", mach_format::RI_b, { reg_4_U, rel_addr_imm_16_S }, 530); + add_machine_instr(result, "BRASL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 530); + add_machine_instr(result, "BRC", mach_format::RI_c, { mask_4_U, rel_addr_imm_16_S }, 530); + add_machine_instr(result, "BRCL", mach_format::RIL_c, { mask_4_U, rel_addr_imm_32_S }, 530); + add_machine_instr(result, "BRCT", mach_format::RI_b, { reg_4_U, rel_addr_imm_16_S }, 531); + add_machine_instr(result, "BRCTG", mach_format::RI_b, { reg_4_U, rel_addr_imm_16_S }, 531); + add_machine_instr(result, "BRCTH", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 531); + add_machine_instr(result, "BRXH", mach_format::RSI, { reg_4_U, reg_4_U, rel_addr_imm_16_S }, 532); + add_machine_instr(result, "BRXHG", mach_format::RIE_e, { reg_4_U, reg_4_U, rel_addr_imm_16_S }, 532); + add_machine_instr(result, "BRXLE", mach_format::RSI, { reg_4_U, reg_4_U, rel_addr_imm_16_S }, 532); + add_machine_instr(result, "BRXLG", mach_format::RIE_e, { reg_4_U, reg_4_U, rel_addr_imm_16_S }, 532); add_machine_instr(result, "CKSM", mach_format::RRE, { reg_4_U, reg_4_U }, 533); add_machine_instr(result, "KM", mach_format::RRE, { reg_4_U, reg_4_U }, 537); add_machine_instr(result, "KMC", mach_format::RRE, { reg_4_U, reg_4_U }, 537); @@ -376,13 +376,13 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() add_machine_instr(result, "CGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 618); add_machine_instr(result, "CFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 618); add_machine_instr(result, "CGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 619); - add_machine_instr(result, "CRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 619); - add_machine_instr(result, "CGRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 619); - add_machine_instr(result, "CGFRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 619); + add_machine_instr(result, "CRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 619); + add_machine_instr(result, "CGRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 619); + add_machine_instr(result, "CGFRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 619); add_machine_instr(result, "CRB", mach_format::RRS, { reg_4_U, reg_4_U, mask_4_U, db_12_4_U }, 619); add_machine_instr(result, "CGRB", mach_format::RRS, { reg_4_U, reg_4_U, mask_4_U, db_12_4_U }, 619); - add_machine_instr(result, "CRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, reg_imm_16_S }, 619); - add_machine_instr(result, "CGRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, reg_imm_16_S }, 620); + add_machine_instr(result, "CRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, rel_addr_imm_16_S }, 619); + add_machine_instr(result, "CGRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, rel_addr_imm_16_S }, 620); add_machine_instr(result, "CIB", mach_format::RIS, @@ -405,8 +405,8 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() }, 620); - add_machine_instr(result, "CIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, reg_imm_16_S }, 620); - add_machine_instr(result, "CGIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, reg_imm_16_S }, 620); + add_machine_instr(result, "CIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, rel_addr_imm_16_S }, 620); + add_machine_instr(result, "CGIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, rel_addr_imm_16_S }, 620); add_machine_instr(result, "CFC", mach_format::S, { db_12_4_U }, 621); add_machine_instr(result, "CS", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 628); add_machine_instr(result, "CSY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 628); @@ -427,8 +427,8 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() add_machine_instr(result, "CHHSI", mach_format::SIL, { db_12_4_U, imm_16_S }, 634); add_machine_instr(result, "CHSI", mach_format::SIL, { db_12_4_U, imm_16_S }, 634); add_machine_instr(result, "CGHSI", mach_format::SIL, { db_12_4_U, imm_16_S }, 634); - add_machine_instr(result, "CHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 634); - add_machine_instr(result, "CGHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 634); + add_machine_instr(result, "CHRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 634); + add_machine_instr(result, "CGHRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 634); add_machine_instr(result, "CHHR", mach_format::RRE, { reg_4_U, reg_4_U }, 635); add_machine_instr(result, "CHLR", mach_format::RRE, { reg_4_U, reg_4_U }, 635); add_machine_instr(result, "CHF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 635); @@ -456,19 +456,19 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() add_machine_instr(result, "CLFHSI", mach_format::SIL, { db_12_4_U, imm_16_U }, 636); add_machine_instr(result, "CLGHSI", mach_format::SIL, { db_12_4_U, imm_16_U }, 636); add_machine_instr(result, "CLHHSI", mach_format::SIL, { db_12_4_U, imm_16_U }, 636); - add_machine_instr(result, "CLRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 637); - add_machine_instr(result, "CLGRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 637); - add_machine_instr(result, "CLGFRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 637); - add_machine_instr(result, "CLHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 637); - add_machine_instr(result, "CLGHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 637); + add_machine_instr(result, "CLRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 637); + add_machine_instr(result, "CLGRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 637); + add_machine_instr(result, "CLGFRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 637); + add_machine_instr(result, "CLHRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 637); + add_machine_instr(result, "CLGHRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 637); add_machine_instr(result, "CLRB", mach_format::RRS, { reg_4_U, reg_4_U, mask_4_U, db_12_4_U }, 638); add_machine_instr(result, "CLGRB", mach_format::RRS, { reg_4_U, reg_4_U, mask_4_U, db_12_4_U }, 638); - add_machine_instr(result, "CLRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, reg_imm_16_S }, 638); - add_machine_instr(result, "CLGRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, reg_imm_16_S }, 638); + add_machine_instr(result, "CLRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, rel_addr_imm_16_S }, 638); + add_machine_instr(result, "CLGRJ", mach_format::RIE_b, { reg_4_U, reg_4_U, mask_4_U, rel_addr_imm_16_S }, 638); add_machine_instr(result, "CLIB", mach_format::RIS, { reg_4_U, imm_8_S, mask_4_U, db_12_4_U }, 638); add_machine_instr(result, "CLGIB", mach_format::RIS, { reg_4_U, imm_8_S, mask_4_U, db_12_4_U }, 638); - add_machine_instr(result, "CLIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, reg_imm_16_S }, 638); - add_machine_instr(result, "CLGIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, reg_imm_16_S }, 638); + add_machine_instr(result, "CLIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, rel_addr_imm_16_S }, 638); + add_machine_instr(result, "CLGIJ", mach_format::RIE_c, { reg_4_U, imm_8_S, mask_4_U, rel_addr_imm_16_S }, 638); add_machine_instr(result, "CLRT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 639); add_machine_instr(result, "CLGRT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 639); add_machine_instr(result, "CLT", mach_format::RSY_b, { reg_4_U, mask_4_U, dxb_20_4x4_S }, 639); @@ -541,7 +541,7 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() add_machine_instr(result, "EX", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 740); add_machine_instr(result, "XIHF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 740); add_machine_instr(result, "XILF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 740); - add_machine_instr(result, "EXRL", mach_format::RIL_b, { reg_4_U, imm_32_S }, 740); + add_machine_instr(result, "EXRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 740); add_machine_instr(result, "EAR", mach_format::RRE, { reg_4_U, reg_4_U }, 741); add_machine_instr(result, "ECAG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 741); add_machine_instr(result, "ECTG", mach_format::SSF, { db_12_4_U, db_12_4_U, reg_4_U }, 744); @@ -568,16 +568,16 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() add_machine_instr(result, "LG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 748); add_machine_instr(result, "LGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 748); add_machine_instr(result, "LGFI", mach_format::RIL_a, { reg_4_U, imm_32_S }, 748); - add_machine_instr(result, "LRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 748); - add_machine_instr(result, "LGRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 748); - add_machine_instr(result, "LGFRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 748); + add_machine_instr(result, "LRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 748); + add_machine_instr(result, "LGRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 748); + add_machine_instr(result, "LGFRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 748); add_machine_instr(result, "LAM", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 749); add_machine_instr(result, "LAMY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 749); add_machine_instr(result, "LA", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 750); add_machine_instr(result, "LAY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 750); add_machine_instr(result, "LAE", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 750); add_machine_instr(result, "LAEY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 750); - add_machine_instr(result, "LARL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 751); + add_machine_instr(result, "LARL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 751); add_machine_instr(result, "LAA", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 752); add_machine_instr(result, "LAAG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 752); add_machine_instr(result, "LAAL", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 752); @@ -617,8 +617,8 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() add_machine_instr(result, "LGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 760); add_machine_instr(result, "LHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 760); add_machine_instr(result, "LGHI", mach_format::RI_a, { reg_4_U, imm_16_S }, 760); - add_machine_instr(result, "LHRL", mach_format::RIL_b, { reg_4_U, imm_32_S }, 760); - add_machine_instr(result, "LGHRL", mach_format::RIL_b, { reg_4_U, imm_32_S }, 760); + add_machine_instr(result, "LHRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 760); + add_machine_instr(result, "LGHRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 760); add_machine_instr(result, "LHH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 761); add_machine_instr(result, "LOCHI", mach_format::RIE_g, { reg_4_U, imm_16_S, mask_4_U }, 761); add_machine_instr(result, "LOCGHI", mach_format::RIE_g, { reg_4_U, imm_16_S, mask_4_U }, 761); @@ -627,7 +627,7 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() add_machine_instr(result, "LFHAT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 762); add_machine_instr(result, "LLGFR", mach_format::RRE, { reg_4_U, reg_4_U }, 762); add_machine_instr(result, "LLGF", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 762); - add_machine_instr(result, "LLGFRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 762); + add_machine_instr(result, "LLGFRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 762); add_machine_instr(result, "LLGFAT", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 763); add_machine_instr(result, "LLCR", mach_format::RRE, { reg_4_U, reg_4_U }, 763); add_machine_instr(result, "LLGCR", mach_format::RRE, { reg_4_U, reg_4_U }, 763); @@ -639,8 +639,8 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() add_machine_instr(result, "LLGHR", mach_format::RRE, { reg_4_U, reg_4_U }, 764); add_machine_instr(result, "LLH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 764); add_machine_instr(result, "LLGH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 764); - add_machine_instr(result, "LLHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 764); - add_machine_instr(result, "LLGHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 764); + add_machine_instr(result, "LLHRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 764); + add_machine_instr(result, "LLGHRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 764); add_machine_instr(result, "LLHH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 765); add_machine_instr(result, "LLIHF", mach_format::RIL_a, { reg_4_U, imm_32_S }, 765); add_machine_instr(result, "LLIHH", mach_format::RI_a, { reg_4_U, imm_16_S }, 765); @@ -757,7 +757,7 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() add_machine_instr(result, "PPNO", mach_format::RRE, { reg_4_U, reg_4_U }, 830); add_machine_instr(result, "POPCNT", mach_format::RRF_c, { reg_4_U, reg_4_U, mask_4_U }, 1, 853); add_machine_instr(result, "PFD", mach_format::RXY_b, { mask_4_U, dxb_20_4x4_S }, 843); - add_machine_instr(result, "PFDRL", mach_format::RIL_c, { mask_4_U, reg_imm_32_S }, 843); + add_machine_instr(result, "PFDRL", mach_format::RIL_c, { mask_4_U, rel_addr_imm_32_S }, 843); add_machine_instr(result, "RLL", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 845); add_machine_instr(result, "RLLG", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 845); add_machine_instr(result, "RNSBG", mach_format::RIE_f, { reg_4_U, reg_4_U, imm_8_S, imm_8_S, imm_8_S }, 1, 845); @@ -800,8 +800,8 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() add_machine_instr(result, "ST", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 860); add_machine_instr(result, "STY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 861); add_machine_instr(result, "STG", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 861); - add_machine_instr(result, "STRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 861); - add_machine_instr(result, "STGRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 861); + add_machine_instr(result, "STRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 861); + add_machine_instr(result, "STGRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 861); add_machine_instr(result, "STAM", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 861); add_machine_instr(result, "STAMY", mach_format::RSY_a, { reg_4_U, reg_4_U, db_20_4_S }, 861); add_machine_instr(result, "STC", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 862); @@ -817,7 +817,7 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() add_machine_instr(result, "STGSC", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 867); add_machine_instr(result, "STH", mach_format::RX_a, { reg_4_U, dxb_12_4x4_U }, 867); add_machine_instr(result, "STHY", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 868); - add_machine_instr(result, "STHRL", mach_format::RIL_b, { reg_4_U, reg_imm_32_S }, 868); + add_machine_instr(result, "STHRL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 868); add_machine_instr(result, "STHH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 868); add_machine_instr(result, "STFH", mach_format::RXY_a, { reg_4_U, dxb_20_4x4_S }, 868); add_machine_instr(result, "STM", mach_format::RS_a, { reg_4_U, reg_4_U, db_12_4_U }, 869); diff --git a/parser_library/src/context/instruction.h b/parser_library/src/context/instruction.h index e41c8cc77..30fa4c30b 100644 --- a/parser_library/src/context/instruction.h +++ b/parser_library/src/context/instruction.h @@ -137,6 +137,10 @@ const checking::parameter reg_imm_12s = { true, 12, checking::machine_operand_ty const checking::parameter reg_imm_16s = { true, 16, checking::machine_operand_type::REG_IMM }; const checking::parameter reg_imm_24s = { true, 24, checking::machine_operand_type::REG_IMM }; const checking::parameter reg_imm_32s = { true, 32, checking::machine_operand_type::REG_IMM }; +const checking::parameter reladdr_imm_12s = { true, 12, checking::machine_operand_type::RELOC_IMM }; +const checking::parameter reladdr_imm_16s = { true, 16, checking::machine_operand_type::RELOC_IMM }; +const checking::parameter reladdr_imm_24s = { true, 24, checking::machine_operand_type::RELOC_IMM }; +const checking::parameter reladdr_imm_32s = { true, 32, checking::machine_operand_type::RELOC_IMM }; /* Rules for displacement operands: @@ -170,6 +174,10 @@ const checking::machine_operand_format reg_imm_12_S = checking::machine_operand_ const checking::machine_operand_format reg_imm_16_S = checking::machine_operand_format(reg_imm_16s, empty, empty); const checking::machine_operand_format reg_imm_24_S = checking::machine_operand_format(reg_imm_24s, empty, empty); const checking::machine_operand_format reg_imm_32_S = checking::machine_operand_format(reg_imm_32s, empty, empty); +const checking::machine_operand_format rel_addr_imm_12_S = checking::machine_operand_format(reladdr_imm_12s, empty, empty); +const checking::machine_operand_format rel_addr_imm_16_S = checking::machine_operand_format(reladdr_imm_16s, empty, empty); +const checking::machine_operand_format rel_addr_imm_24_S = checking::machine_operand_format(reladdr_imm_24s, empty, empty); +const checking::machine_operand_format rel_addr_imm_32_S = checking::machine_operand_format(reladdr_imm_32s, empty, empty); // intervals dividing formats based on length const int length_sixteen_interval = 3; const int length_thirtytwo_interval = 21; From e7e122fa246eb39f3e53698d0073a296ce2073d2 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Mon, 19 Apr 2021 16:10:00 +0200 Subject: [PATCH 04/37] fix Signed-off-by: Sweta Shah --- parser_library/src/checking/instr_operand.cpp | 22 +++++++++---------- parser_library/src/diagnostic.h | 1 - .../src/semantics/operand_impls.cpp | 7 +++--- 3 files changed, 14 insertions(+), 16 deletions(-) diff --git a/parser_library/src/checking/instr_operand.cpp b/parser_library/src/checking/instr_operand.cpp index 478ee4add..1899ff765 100644 --- a/parser_library/src/checking/instr_operand.cpp +++ b/parser_library/src/checking/instr_operand.cpp @@ -217,7 +217,7 @@ hlasm_plugin::parser_library::diagnostic_op machine_operand::get_simple_operand_ case machine_operand_type::VEC_REG: // V return diagnostic_op::error_M114(instr_name, operand_range); case machine_operand_type::RELOC_IMM: // RI - return diagnostic_op::error_M115(instr_name, operand_range); + return diagnostic_op::error_M115(instr_name, operand_range); } assert(false); return diagnostic_op::error_I999(instr_name, stmt_range); @@ -288,17 +288,18 @@ bool one_operand::check( return false; } return true; - } - else + } + // simple operand with relocatable symbol or immediate value + + if (to_check.identifier.type == machine_operand_type::RELOC_IMM && operand_identifier != "RELOC") { - if (to_check.identifier.type == machine_operand_type::RELOC_IMM && operand_identifier != "RELOC") { - diag = diagnostic_op::warn_D031(operand_range, instr_name); - return false; - } + diag = diagnostic_op::warn_D031(operand_range, instr_name); + return false; } + // it is a simple operand - + if (to_check.identifier.is_signed && !is_size_corresponding_signed(value, to_check.identifier.size)) { @@ -316,7 +317,7 @@ bool one_operand::check( break; default: assert(false); - } + } return false; } if (!to_check.identifier.is_signed && !is_size_corresponding_unsigned(value, to_check.identifier.size)) @@ -336,9 +337,6 @@ bool one_operand::check( case machine_operand_type::VEC_REG: diag = diagnostic_op::error_M124(instr_name, operand_range); break; - case machine_operand_type::RELOC_IMM: - diag = diagnostic_op::error_M125(instr_name, 0, boundary, operand_range); - break; default: assert(false); } diff --git a/parser_library/src/diagnostic.h b/parser_library/src/diagnostic.h index 59241e9ee..2ce9aacf1 100644 --- a/parser_library/src/diagnostic.h +++ b/parser_library/src/diagnostic.h @@ -439,7 +439,6 @@ struct diagnostic_op static diagnostic_op error_D023(const range& range); static diagnostic_op error_D024(const range& range, const std::string& type); static diagnostic_op warn_D025(const range& range, const std::string& type, const std::string& modifier); - static diagnostic_op warn_D031(const range& range, const std::string& modifier); static diagnostic_op error_D026(const range& range); static diagnostic_op error_D027(const range& range); diff --git a/parser_library/src/semantics/operand_impls.cpp b/parser_library/src/semantics/operand_impls.cpp index e332c2067..fcfe7590a 100644 --- a/parser_library/src/semantics/operand_impls.cpp +++ b/parser_library/src/semantics/operand_impls.cpp @@ -90,8 +90,9 @@ std::unique_ptr make_check_operand(expressions::mach_evaluate { return std::make_unique(res.get_abs()); } - else if ((res.value_kind() == context::symbol_value_kind::RELOC)) { - return std::make_unique("RELOC", 0); + else if ((res.value_kind() == context::symbol_value_kind::RELOC)) + { + return std::make_unique("RELOC", res.get_reloc().offset()); } else { @@ -99,7 +100,7 @@ std::unique_ptr make_check_operand(expressions::mach_evaluate { return std::make_unique(0); } - + else { return std::make_unique( From b13fd23a13ee71d106f6d691233058de7eb78ed9 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 20 Apr 2021 10:14:44 +0200 Subject: [PATCH 05/37] Cleanup Signed-off-by: Sweta Shah --- parser_library/src/checking/instr_operand.cpp | 12 ----------- parser_library/src/context/instruction.cpp | 2 +- parser_library/src/context/instruction.h | 8 -------- parser_library/src/diagnostic.cpp | 20 +------------------ parser_library/src/diagnostic.h | 4 ---- .../src/semantics/operand_impls.cpp | 15 ++++---------- .../test/checking/mach_instr_diag_test.cpp | 16 +++++++-------- parser_library/test/context/ord_sym_test.cpp | 3 +++ .../test/diagnostics_check_test.cpp | 4 ++-- 9 files changed, 19 insertions(+), 65 deletions(-) diff --git a/parser_library/src/checking/instr_operand.cpp b/parser_library/src/checking/instr_operand.cpp index 1899ff765..e42f7e1d3 100644 --- a/parser_library/src/checking/instr_operand.cpp +++ b/parser_library/src/checking/instr_operand.cpp @@ -212,8 +212,6 @@ hlasm_plugin::parser_library::diagnostic_op machine_operand::get_simple_operand_ return diagnostic_op::error_M111(instr_name, operand_range); case machine_operand_type::IMM: // I return diagnostic_op::error_M112(instr_name, operand_range); - case machine_operand_type::REG_IMM: // RI - return diagnostic_op::error_M113(instr_name, operand_range); case machine_operand_type::VEC_REG: // V return diagnostic_op::error_M114(instr_name, operand_range); case machine_operand_type::RELOC_IMM: // RI @@ -297,10 +295,7 @@ bool one_operand::check( return false; } - // it is a simple operand - - if (to_check.identifier.is_signed && !is_size_corresponding_signed(value, to_check.identifier.size)) { auto boundary = 1ll << (to_check.identifier.size - 1); @@ -309,9 +304,6 @@ bool one_operand::check( case machine_operand_type::IMM: diag = diagnostic_op::error_M122(instr_name, -boundary, boundary - 1, operand_range); break; - case machine_operand_type::REG_IMM: - diag = diagnostic_op::error_M123(instr_name, -boundary, boundary - 1, operand_range); - break; case machine_operand_type::RELOC_IMM: diag = diagnostic_op::error_M125(instr_name, -boundary, boundary - 1, operand_range); break; @@ -365,10 +357,6 @@ std::string parameter::to_string() const return "M"; case machine_operand_type::REG: return "R"; - case machine_operand_type::REG_IMM: { - ret_val = "RI"; - break; - } case machine_operand_type::IMM: { ret_val = "I"; break; diff --git a/parser_library/src/context/instruction.cpp b/parser_library/src/context/instruction.cpp index 38f868c59..8baef7bd3 100644 --- a/parser_library/src/context/instruction.cpp +++ b/parser_library/src/context/instruction.cpp @@ -347,7 +347,7 @@ hlasm_plugin::parser_library::context::instruction::get_machine_instructions() }, 526); - add_machine_instr(result, "BPP", mach_format::SMI, { mask_4_U, reg_imm_16_S, db_12_4_U }, 527); + add_machine_instr(result, "BPP", mach_format::SMI, { mask_4_U, rel_addr_imm_16_S, db_12_4_U }, 527); add_machine_instr(result, "BPRP", mach_format::MII, { mask_4_U, rel_addr_imm_12_S, rel_addr_imm_24_S }, 527); add_machine_instr(result, "BRAS", mach_format::RI_b, { reg_4_U, rel_addr_imm_16_S }, 530); add_machine_instr(result, "BRASL", mach_format::RIL_b, { reg_4_U, rel_addr_imm_32_S }, 530); diff --git a/parser_library/src/context/instruction.h b/parser_library/src/context/instruction.h index 4e83999a9..3431e638c 100644 --- a/parser_library/src/context/instruction.h +++ b/parser_library/src/context/instruction.h @@ -136,10 +136,6 @@ const checking::parameter imm_24s = { true, 24, checking::machine_operand_type:: const checking::parameter imm_32s = { true, 32, checking::machine_operand_type::IMM }; const checking::parameter imm_32u = { false, 32, checking::machine_operand_type::IMM }; const checking::parameter vec_reg = { false, 4, checking::machine_operand_type::VEC_REG }; -const checking::parameter reg_imm_12s = { true, 12, checking::machine_operand_type::REG_IMM }; -const checking::parameter reg_imm_16s = { true, 16, checking::machine_operand_type::REG_IMM }; -const checking::parameter reg_imm_24s = { true, 24, checking::machine_operand_type::REG_IMM }; -const checking::parameter reg_imm_32s = { true, 32, checking::machine_operand_type::REG_IMM }; const checking::parameter reladdr_imm_12s = { true, 12, checking::machine_operand_type::RELOC_IMM }; const checking::parameter reladdr_imm_16s = { true, 16, checking::machine_operand_type::RELOC_IMM }; const checking::parameter reladdr_imm_24s = { true, 24, checking::machine_operand_type::RELOC_IMM }; @@ -173,10 +169,6 @@ const checking::machine_operand_format imm_32_U = checking::machine_operand_form const checking::machine_operand_format vec_reg_4_U = checking::machine_operand_format(vec_reg, empty, empty); const checking::machine_operand_format db_12_8x4L_U = checking::machine_operand_format(dis_12u, length_8, base_); const checking::machine_operand_format db_12_4x4L_U = checking::machine_operand_format(dis_12u, length_4, base_); -const checking::machine_operand_format reg_imm_12_S = checking::machine_operand_format(reg_imm_12s, empty, empty); -const checking::machine_operand_format reg_imm_16_S = checking::machine_operand_format(reg_imm_16s, empty, empty); -const checking::machine_operand_format reg_imm_24_S = checking::machine_operand_format(reg_imm_24s, empty, empty); -const checking::machine_operand_format reg_imm_32_S = checking::machine_operand_format(reg_imm_32s, empty, empty); const checking::machine_operand_format rel_addr_imm_12_S = checking::machine_operand_format(reladdr_imm_12s, empty, empty); const checking::machine_operand_format rel_addr_imm_16_S = checking::machine_operand_format(reladdr_imm_16s, empty, empty); const checking::machine_operand_format rel_addr_imm_24_S = checking::machine_operand_format(reladdr_imm_24s, empty, empty); diff --git a/parser_library/src/diagnostic.cpp b/parser_library/src/diagnostic.cpp index c5da98a9a..9348588b3 100644 --- a/parser_library/src/diagnostic.cpp +++ b/parser_library/src/diagnostic.cpp @@ -1227,15 +1227,6 @@ diagnostic_op diagnostic_op::error_M112(const std::string& instr_name, const ran range); } -diagnostic_op diagnostic_op::error_M113(const std::string& instr_name, const range& range) -{ - return diagnostic_op(diagnostic_severity::error, - "M113", - "Error at " + instr_name + " instruction: operand must be an absolute register immediate value", - range); -} - - diagnostic_op diagnostic_op::error_M114(const std::string& instr_name, const range& range) { return diagnostic_op(diagnostic_severity::error, @@ -1275,15 +1266,6 @@ diagnostic_op diagnostic_op::error_M122(const std::string& instr_name, long long range); } -diagnostic_op diagnostic_op::error_M123(const std::string& instr_name, long long from, long long to, const range& range) -{ - return diagnostic_op(diagnostic_severity::error, - "M123", - "Error at " + instr_name + " instruction: register immediate operand absolute value must be between " - + std::to_string(from) + " and " + std::to_string(to), - range); -} - diagnostic_op diagnostic_op::error_M124(const std::string& instr_name, const range& range) { return diagnostic_op(diagnostic_severity::error, @@ -1296,7 +1278,7 @@ diagnostic_op diagnostic_op::error_M125(const std::string& instr_name, long long { return diagnostic_op(diagnostic_severity::error, "M125", - "Error at " + instr_name + " instruction: relocatable symbol or immediate operand absolute value must be between " + "Error at " + instr_name + " instruction: relocatable symbol or immediate absolute value must be between " + std::to_string(from) + " and " + std::to_string(to), range); } diff --git a/parser_library/src/diagnostic.h b/parser_library/src/diagnostic.h index 2ce9aacf1..22f6275ed 100644 --- a/parser_library/src/diagnostic.h +++ b/parser_library/src/diagnostic.h @@ -458,8 +458,6 @@ struct diagnostic_op static diagnostic_op error_M112(const std::string& instr_name, const range& range); - static diagnostic_op error_M113(const std::string& instr_name, const range& range); - static diagnostic_op error_M114(const std::string& instr_name, const range& range); static diagnostic_op error_M115(const std::string& instr_name, const range& range); @@ -470,8 +468,6 @@ struct diagnostic_op static diagnostic_op error_M122(const std::string& instr_name, long long from, long long to, const range& range); - static diagnostic_op error_M123(const std::string& instr_name, long long from, long long to, const range& range); - static diagnostic_op error_M124(const std::string& instr_name, const range& range); static diagnostic_op error_M125(const std::string& instr_name, long long from, long long to, const range& range); diff --git a/parser_library/src/semantics/operand_impls.cpp b/parser_library/src/semantics/operand_impls.cpp index fcfe7590a..92506d9c7 100644 --- a/parser_library/src/semantics/operand_impls.cpp +++ b/parser_library/src/semantics/operand_impls.cpp @@ -90,22 +90,15 @@ std::unique_ptr make_check_operand(expressions::mach_evaluate { return std::make_unique(res.get_abs()); } - else if ((res.value_kind() == context::symbol_value_kind::RELOC)) + else if ((res.value_kind() == context::symbol_value_kind::RELOC && type_hint + && *type_hint == checking::machine_operand_type::RELOC_IMM)) { return std::make_unique("RELOC", res.get_reloc().offset()); } else { - if (type_hint && *type_hint == checking::machine_operand_type::REG_IMM) - { - return std::make_unique(0); - } - - else - { - return std::make_unique( - checking::address_state::UNRES, 0, 0, 0, checking::operand_state::ONE_OP); - } + return std::make_unique( + checking::address_state::UNRES, 0, 0, 0, checking::operand_state::ONE_OP); } } diff --git a/parser_library/test/checking/mach_instr_diag_test.cpp b/parser_library/test/checking/mach_instr_diag_test.cpp index fb2f413b1..c57c8e079 100644 --- a/parser_library/test/checking/mach_instr_diag_test.cpp +++ b/parser_library/test/checking/mach_instr_diag_test.cpp @@ -224,18 +224,20 @@ TEST(diagnostics, immS_out_of_range) ASSERT_EQ(a.diags().at(0).code, "M122"); } -TEST(diagnostics, regImmS_out_of_range) +TEST(diagnostics, reloc_ImmS_out_of_range) { std::string input( R"( - BPRP 1,2333,3 + BRAS 1,DISP +LEN123 DS CL(64444) +DISP MVC 0(1),1 )"); analyzer a(input); a.analyze(); a.collect_diags(); ASSERT_EQ(a.parser().getNumberOfSyntaxErrors(), (size_t)0); ASSERT_EQ(a.diags().size(), (size_t)1); - ASSERT_EQ(a.diags().at(0).code, "M123"); + ASSERT_EQ(a.diags().at(0).code, "M125"); } TEST(diagnostics, mask_out_of_range) @@ -307,21 +309,19 @@ TEST(diagnostics, imm_expected) ASSERT_EQ(a.diags().size(), (size_t)1); ASSERT_EQ(a.diags().at(0).code, "M112"); } - -TEST(diagnostics, regImm_expected) +TEST(diagnostics, relocImm_expected) { std::string input( R"( - BPP 1,2(2,2),111 + EXRL 1,0(1) )"); analyzer a(input); a.analyze(); a.collect_diags(); ASSERT_EQ(a.parser().getNumberOfSyntaxErrors(), (size_t)0); ASSERT_EQ(a.diags().size(), (size_t)1); - ASSERT_EQ(a.diags().at(0).code, "M113"); + ASSERT_EQ(a.diags().at(0).code, "M115"); } - TEST(diagnostics, vecReg_expected) { std::string input( diff --git a/parser_library/test/context/ord_sym_test.cpp b/parser_library/test/context/ord_sym_test.cpp index 1067d9c81..e4847efc3 100644 --- a/parser_library/test/context/ord_sym_test.cpp +++ b/parser_library/test/context/ord_sym_test.cpp @@ -225,6 +225,9 @@ Y2 LR 1,1 C CSECT U EQU X1+X2 V EQU Y1+Y2 + + + F EQU V-U LR F,F diff --git a/parser_library/test/diagnostics_check_test.cpp b/parser_library/test/diagnostics_check_test.cpp index 3f76dcdee..76319e268 100644 --- a/parser_library/test/diagnostics_check_test.cpp +++ b/parser_library/test/diagnostics_check_test.cpp @@ -36,7 +36,7 @@ TEST(diagnostics, overall_correctness) ASSERT_EQ(a.parser().getNumberOfSyntaxErrors(), (size_t)0); - ASSERT_EQ(dynamic_cast(&a)->diags().size(), (size_t)0); + ASSERT_EQ(dynamic_cast(&a)->diags().size(), (size_t)1); } TEST(diagnostics, string_substitution) @@ -236,7 +236,7 @@ TEST(diagnostics, mnemonics) ASSERT_EQ(a.parser().getNumberOfSyntaxErrors(), (size_t)0); - ASSERT_EQ(dynamic_cast(&a)->diags().size(), (size_t)0); + ASSERT_EQ(dynamic_cast(&a)->diags().size(), (size_t)20); } TEST(diagnostics, From d58536d989d22b76c32ec48cadce040d6aa94787 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 20 Apr 2021 10:21:20 +0200 Subject: [PATCH 06/37] format Signed-off-by: Sweta Shah --- parser_library/src/context/instruction.h | 12 ++++++++---- parser_library/src/diagnostic.cpp | 4 ++-- parser_library/src/semantics/operand_impls.cpp | 4 ++-- 3 files changed, 12 insertions(+), 8 deletions(-) diff --git a/parser_library/src/context/instruction.h b/parser_library/src/context/instruction.h index 3431e638c..a9a724a43 100644 --- a/parser_library/src/context/instruction.h +++ b/parser_library/src/context/instruction.h @@ -169,10 +169,14 @@ const checking::machine_operand_format imm_32_U = checking::machine_operand_form const checking::machine_operand_format vec_reg_4_U = checking::machine_operand_format(vec_reg, empty, empty); const checking::machine_operand_format db_12_8x4L_U = checking::machine_operand_format(dis_12u, length_8, base_); const checking::machine_operand_format db_12_4x4L_U = checking::machine_operand_format(dis_12u, length_4, base_); -const checking::machine_operand_format rel_addr_imm_12_S = checking::machine_operand_format(reladdr_imm_12s, empty, empty); -const checking::machine_operand_format rel_addr_imm_16_S = checking::machine_operand_format(reladdr_imm_16s, empty, empty); -const checking::machine_operand_format rel_addr_imm_24_S = checking::machine_operand_format(reladdr_imm_24s, empty, empty); -const checking::machine_operand_format rel_addr_imm_32_S = checking::machine_operand_format(reladdr_imm_32s, empty, empty); +const checking::machine_operand_format rel_addr_imm_12_S = + checking::machine_operand_format(reladdr_imm_12s, empty, empty); +const checking::machine_operand_format rel_addr_imm_16_S = + checking::machine_operand_format(reladdr_imm_16s, empty, empty); +const checking::machine_operand_format rel_addr_imm_24_S = + checking::machine_operand_format(reladdr_imm_24s, empty, empty); +const checking::machine_operand_format rel_addr_imm_32_S = + checking::machine_operand_format(reladdr_imm_32s, empty, empty); // machine instruction representation for checking diff --git a/parser_library/src/diagnostic.cpp b/parser_library/src/diagnostic.cpp index 9348588b3..dd244aaf1 100644 --- a/parser_library/src/diagnostic.cpp +++ b/parser_library/src/diagnostic.cpp @@ -1478,8 +1478,8 @@ diagnostic_op diagnostic_op::warn_D031(const range& range, const std::string& in { return diagnostic_op(diagnostic_severity::warning, "D031", - " Operand value must be relocatable symbol with instruction " + instr, - + " Operand value must be relocatable symbol with instruction " + instr, + range); } diff --git a/parser_library/src/semantics/operand_impls.cpp b/parser_library/src/semantics/operand_impls.cpp index 92506d9c7..dcfd9f5fe 100644 --- a/parser_library/src/semantics/operand_impls.cpp +++ b/parser_library/src/semantics/operand_impls.cpp @@ -97,8 +97,8 @@ std::unique_ptr make_check_operand(expressions::mach_evaluate } else { - return std::make_unique( - checking::address_state::UNRES, 0, 0, 0, checking::operand_state::ONE_OP); + return std::make_unique( + checking::address_state::UNRES, 0, 0, 0, checking::operand_state::ONE_OP); } } From 4c073c059f42cae4e6d343e9c639c08b3f794e9b Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 20 Apr 2021 13:23:34 +0200 Subject: [PATCH 07/37] Sonar scan Signed-off-by: Sweta Shah --- parser_library/src/semantics/operand_impls.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/parser_library/src/semantics/operand_impls.cpp b/parser_library/src/semantics/operand_impls.cpp index dcfd9f5fe..06680ba2d 100644 --- a/parser_library/src/semantics/operand_impls.cpp +++ b/parser_library/src/semantics/operand_impls.cpp @@ -90,8 +90,8 @@ std::unique_ptr make_check_operand(expressions::mach_evaluate { return std::make_unique(res.get_abs()); } - else if ((res.value_kind() == context::symbol_value_kind::RELOC && type_hint - && *type_hint == checking::machine_operand_type::RELOC_IMM)) + else if (res.value_kind() == context::symbol_value_kind::RELOC && type_hint + && *type_hint == checking::machine_operand_type::RELOC_IMM) { return std::make_unique("RELOC", res.get_reloc().offset()); } From 7c7cb0333f2c1b43b5753832e0f8877cb60ecf89 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 20 Apr 2021 13:25:52 +0200 Subject: [PATCH 08/37] .. Signed-off-by: Sweta Shah --- parser_library/src/semantics/operand_impls.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/parser_library/src/semantics/operand_impls.cpp b/parser_library/src/semantics/operand_impls.cpp index 06680ba2d..cf96b2e3f 100644 --- a/parser_library/src/semantics/operand_impls.cpp +++ b/parser_library/src/semantics/operand_impls.cpp @@ -91,7 +91,7 @@ std::unique_ptr make_check_operand(expressions::mach_evaluate return std::make_unique(res.get_abs()); } else if (res.value_kind() == context::symbol_value_kind::RELOC && type_hint - && *type_hint == checking::machine_operand_type::RELOC_IMM) + && *type_hint == checking::machine_operand_type::RELOC_IMM) { return std::make_unique("RELOC", res.get_reloc().offset()); } From d8b793119a390ae69ede47c7911848f283f94751 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 20 Apr 2021 15:38:22 +0200 Subject: [PATCH 09/37] Cleanup Signed-off-by: Sweta Shah --- parser_library/src/checking/instr_operand.h | 1 - parser_library/test/context/ord_sym_test.cpp | 3 --- 2 files changed, 4 deletions(-) diff --git a/parser_library/src/checking/instr_operand.h b/parser_library/src/checking/instr_operand.h index 519abea49..16d060ecc 100644 --- a/parser_library/src/checking/instr_operand.h +++ b/parser_library/src/checking/instr_operand.h @@ -67,7 +67,6 @@ enum class machine_operand_type : uint8_t { MASK, REG, - REG_IMM, IMM, NONE, DISPLC, diff --git a/parser_library/test/context/ord_sym_test.cpp b/parser_library/test/context/ord_sym_test.cpp index e4847efc3..1067d9c81 100644 --- a/parser_library/test/context/ord_sym_test.cpp +++ b/parser_library/test/context/ord_sym_test.cpp @@ -225,9 +225,6 @@ Y2 LR 1,1 C CSECT U EQU X1+X2 V EQU Y1+Y2 - - - F EQU V-U LR F,F From d3b6f26355f02449b43b487c2905b92ee4234d21 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Thu, 13 May 2021 16:54:21 +0200 Subject: [PATCH 10/37] Requested Changes Signed-off-by: Sweta Shah --- parser_library/src/checking/instr_operand.cpp | 14 ++------ parser_library/src/diagnostic.cpp | 33 ++++++++++--------- parser_library/src/diagnostic.h | 10 +++--- .../src/expressions/mach_operator.h | 32 ++++++++++++++++-- parser_library/src/parsing/parser_impl.cpp | 19 +++++++++++ parser_library/src/parsing/parser_impl.h | 1 + .../low_language_processor.cpp | 1 - parser_library/src/semantics/collector.cpp | 4 ++- parser_library/src/semantics/collector.h | 3 +- .../src/semantics/operand_impls.cpp | 23 ++++++++++--- 10 files changed, 99 insertions(+), 41 deletions(-) diff --git a/parser_library/src/checking/instr_operand.cpp b/parser_library/src/checking/instr_operand.cpp index e42f7e1d3..abb417973 100644 --- a/parser_library/src/checking/instr_operand.cpp +++ b/parser_library/src/checking/instr_operand.cpp @@ -215,7 +215,7 @@ hlasm_plugin::parser_library::diagnostic_op machine_operand::get_simple_operand_ case machine_operand_type::VEC_REG: // V return diagnostic_op::error_M114(instr_name, operand_range); case machine_operand_type::RELOC_IMM: // RI - return diagnostic_op::error_M115(instr_name, operand_range); + return diagnostic_op::error_M113(instr_name, operand_range); } assert(false); return diagnostic_op::error_I999(instr_name, stmt_range); @@ -265,7 +265,6 @@ one_operand::one_operand(const one_operand& op) value = op.value; is_default = op.is_default; }; - bool one_operand::check( diagnostic_op& diag, const machine_operand_format to_check, const std::string& instr_name, const range&) const { @@ -287,17 +286,10 @@ bool one_operand::check( } return true; } - // simple operand with relocatable symbol or immediate value - - if (to_check.identifier.type == machine_operand_type::RELOC_IMM && operand_identifier != "RELOC") - { - diag = diagnostic_op::warn_D031(operand_range, instr_name); - return false; - } - // it is a simple operand if (to_check.identifier.is_signed && !is_size_corresponding_signed(value, to_check.identifier.size)) { + auto boundary = 1ll << (to_check.identifier.size - 1); switch (to_check.identifier.type) { @@ -305,7 +297,7 @@ bool one_operand::check( diag = diagnostic_op::error_M122(instr_name, -boundary, boundary - 1, operand_range); break; case machine_operand_type::RELOC_IMM: - diag = diagnostic_op::error_M125(instr_name, -boundary, boundary - 1, operand_range); + diag = diagnostic_op::error_M123(std::to_string(value), -boundary, boundary - 1, operand_range); break; default: assert(false); diff --git a/parser_library/src/diagnostic.cpp b/parser_library/src/diagnostic.cpp index dd244aaf1..8cbf8690d 100644 --- a/parser_library/src/diagnostic.cpp +++ b/parser_library/src/diagnostic.cpp @@ -1227,20 +1227,22 @@ diagnostic_op diagnostic_op::error_M112(const std::string& instr_name, const ran range); } -diagnostic_op diagnostic_op::error_M114(const std::string& instr_name, const range& range) +diagnostic_op diagnostic_op::error_M113(const std::string& instr_name, const range& range) { return diagnostic_op(diagnostic_severity::error, - "M114", - "Error at " + instr_name + " instruction: operand must be an absolute vector register value", + "M113", + "Error at " + instr_name + " instruction: operand must be relocatable symbol or an absolute immediate value", range); } -diagnostic_op diagnostic_op::error_M115(const std::string& instr_name, const range& range) + +diagnostic_op diagnostic_op::error_M114(const std::string& instr_name, const range& range) { return diagnostic_op(diagnostic_severity::error, - "M115", - "Error at " + instr_name + " instruction: operand must be relocatable symbol or an absolute immediate value", + "M114", + "Error at " + instr_name + " instruction: operand must be an absolute vector register value", range); } + diagnostic_op diagnostic_op::error_M120(const std::string& instr_name, const range& range) { return diagnostic_op(diagnostic_severity::error, @@ -1266,22 +1268,23 @@ diagnostic_op diagnostic_op::error_M122(const std::string& instr_name, long long range); } -diagnostic_op diagnostic_op::error_M124(const std::string& instr_name, const range& range) +diagnostic_op diagnostic_op::error_M123(const std::string& instr_name, long long from, long long to, const range& range) { return diagnostic_op(diagnostic_severity::error, - "M124", - "Error at " + instr_name + " instruction: vector register operand absolute value must be between 0 and 15", + "M123", + "Error at " + instr_name + " instruction: relocatable symbol or immediate absolute value must be between " + + std::to_string(from) + " and " + std::to_string(to), range); } -diagnostic_op diagnostic_op::error_M125(const std::string& instr_name, long long from, long long to, const range& range) +diagnostic_op diagnostic_op::error_M124(const std::string& instr_name, const range& range) { return diagnostic_op(diagnostic_severity::error, - "M125", - "Error at " + instr_name + " instruction: relocatable symbol or immediate absolute value must be between " - + std::to_string(from) + " and " + std::to_string(to), + "M124", + "Error at " + instr_name + " instruction: vector register operand absolute value must be between 0 and 15", range); } + diagnostic_op diagnostic_op::error_M130(const std::string& instr_name, long long from, long long to, const range& range) { return diagnostic_op(diagnostic_severity::error, @@ -1474,11 +1477,11 @@ diagnostic_op diagnostic_op::warn_D025(const range& range, const std::string& ty return diagnostic_op( diagnostic_severity::warning, "D025", "The " + modifier + " modifier is ignored with type " + type, range); } -diagnostic_op diagnostic_op::warn_D031(const range& range, const std::string& instr) +diagnostic_op diagnostic_op::warn_D031(const range& range, const std::string& operand_value) { return diagnostic_op(diagnostic_severity::warning, "D031", - " Operand value must be relocatable symbol with instruction " + instr, + " Operand value " + operand_value + " should be relocatable symbol. ", range); } diff --git a/parser_library/src/diagnostic.h b/parser_library/src/diagnostic.h index 22f6275ed..581f8cf8f 100644 --- a/parser_library/src/diagnostic.h +++ b/parser_library/src/diagnostic.h @@ -439,12 +439,12 @@ struct diagnostic_op static diagnostic_op error_D023(const range& range); static diagnostic_op error_D024(const range& range, const std::string& type); static diagnostic_op warn_D025(const range& range, const std::string& type, const std::string& modifier); - static diagnostic_op warn_D031(const range& range, const std::string& modifier); static diagnostic_op error_D026(const range& range); static diagnostic_op error_D027(const range& range); static diagnostic_op error_D028(const range& range); static diagnostic_op error_D029(const range& range); static diagnostic_op error_D030(const range& range, const std::string& type); + static diagnostic_op warn_D031(const range& range, const std::string& modifier); static diagnostic_op error_M102(const std::string& instr_name, const range& range); @@ -458,9 +458,9 @@ struct diagnostic_op static diagnostic_op error_M112(const std::string& instr_name, const range& range); - static diagnostic_op error_M114(const std::string& instr_name, const range& range); + static diagnostic_op error_M113(const std::string& instr_name, const range& range); - static diagnostic_op error_M115(const std::string& instr_name, const range& range); + static diagnostic_op error_M114(const std::string& instr_name, const range& range); static diagnostic_op error_M120(const std::string& instr_name, const range& range); @@ -468,9 +468,9 @@ struct diagnostic_op static diagnostic_op error_M122(const std::string& instr_name, long long from, long long to, const range& range); - static diagnostic_op error_M124(const std::string& instr_name, const range& range); + static diagnostic_op error_M123(const std::string& instr_name, long long from, long long to, const range& range); - static diagnostic_op error_M125(const std::string& instr_name, long long from, long long to, const range& range); + static diagnostic_op error_M124(const std::string& instr_name, const range& range); static diagnostic_op error_M130(const std::string& instr_name, long long from, long long to, const range& range); diff --git a/parser_library/src/expressions/mach_operator.h b/parser_library/src/expressions/mach_operator.h index 688c66858..941db98ff 100644 --- a/parser_library/src/expressions/mach_operator.h +++ b/parser_library/src/expressions/mach_operator.h @@ -107,7 +107,12 @@ struct sub static std::string sign_char_begin() { return "-"; } static std::string sign_char_end() { return ""; } }; - +struct rel_addr +{ + static std::string sign_char() { return "-"; } + static std::string sign_char_begin() { return "-"; } + static std::string sign_char_end() { return ""; } +}; struct mul { static std::string sign_char() { return "*"; } @@ -137,7 +142,24 @@ inline mach_expression::value_t mach_expr_binary::evaluate(mach_evaluate_in { return left_->evaluate(info) - right_->evaluate(info); } - +template<> +inline mach_expression::value_t mach_expr_binary::evaluate(mach_evaluate_info info) const +{ + auto lc = left_->evaluate(info); + auto symb = right_->evaluate(info); + if (symb.value_kind() == context::symbol_value_kind::ABS) + { + add_diagnostic(diagnostic_op::warn_D031(get_range(), std::to_string(right_->evaluate(info).get_abs()))); + return right_->evaluate(info); + } + else + { + if (lc.get_reloc().offset() > symb.get_reloc().offset()) + return (left_->evaluate(info) - right_->evaluate(info)); + else + return (right_->evaluate(info) - left_->evaluate(info)); + } +} template<> inline mach_expression::value_t mach_expr_binary::evaluate(mach_evaluate_info info) const { @@ -198,7 +220,11 @@ inline context::dependency_collector mach_expr_binary::get_dependencies(mac { return left_->get_dependencies(info) - right_->get_dependencies(info); } - +template<> +inline context::dependency_collector mach_expr_binary::get_dependencies(mach_evaluate_info info) const +{ + return left_->get_dependencies(info) - right_->get_dependencies(info); +} template<> inline context::dependency_collector mach_expr_binary::get_dependencies(mach_evaluate_info info) const { diff --git a/parser_library/src/parsing/parser_impl.cpp b/parser_library/src/parsing/parser_impl.cpp index c38527e96..fba6b501a 100644 --- a/parser_library/src/parsing/parser_impl.cpp +++ b/parser_library/src/parsing/parser_impl.cpp @@ -503,6 +503,24 @@ void parser_impl::process_lookahead() parse_lookahead_operands(std::move(*look_lab_instr->op_text), look_lab_instr->op_range); } } +void parser_impl::transform_imm_reg_operands(semantics::collector& col, id_index instruction) +{ + auto opernds = &col.current_operands().value; + int position = 0; + for (auto& operand : *opernds) + { + auto type = context::instruction::machine_instructions.at(*instruction)->operands[position].identifier.type; + if (type == checking::machine_operand_type::RELOC_IMM && operand.get()->access_mach() != nullptr + && operand.get()->access_mach()->kind == mach_kind::EXPR) + { + auto range = operand.get()->access_mach()->access_expr()->expression.get()->get_range(); + mach_expr_ptr& transformed_exp = operand.get()->access_mach()->access_expr()->expression; + transformed_exp = std::make_unique>( + std::make_unique(range), std::move(transformed_exp), range); + } + position++; + } +} void parser_impl::parse_operands(const std::string& text, range text_range) { @@ -561,6 +579,7 @@ void parser_impl::parse_operands(const std::string& text, range text_range) break; case processing::processing_form::MACH: h.parser->op_rem_body_mach(); + transform_imm_reg_operands(h.parser->collector, opcode.value); break; case processing::processing_form::DAT: h.parser->op_rem_body_dat(); diff --git a/parser_library/src/parsing/parser_impl.h b/parser_library/src/parsing/parser_impl.h index d5f5f781b..1ac162067 100644 --- a/parser_library/src/parsing/parser_impl.h +++ b/parser_library/src/parsing/parser_impl.h @@ -133,6 +133,7 @@ class parser_impl : public antlr4::Parser, void parse_operands(const std::string& text, range text_range); void parse_lookahead_operands(const std::string& text, range text_range); + void transform_imm_reg_operands(semantics::collector& col, context::id_index instruction); antlr4::misc::IntervalSet getExpectedTokens() override; }; diff --git a/parser_library/src/processing/instruction_sets/low_language_processor.cpp b/parser_library/src/processing/instruction_sets/low_language_processor.cpp index 401f32de4..7a7d01f54 100644 --- a/parser_library/src/processing/instruction_sets/low_language_processor.cpp +++ b/parser_library/src/processing/instruction_sets/low_language_processor.cpp @@ -201,7 +201,6 @@ low_language_processor::transform_result low_language_processor::transform_mnemo auto mnemonic = context::instruction::mnemonic_codes.at(instr_name); // the machine instruction structure associated with the given instruction name auto curr_instr = &context::instruction::machine_instructions.at(mnemonic.instruction); - // check whether substituted mnemonic values are ok // check size of mnemonic operands diff --git a/parser_library/src/semantics/collector.cpp b/parser_library/src/semantics/collector.cpp index 93116190c..2312c635a 100644 --- a/parser_library/src/semantics/collector.cpp +++ b/parser_library/src/semantics/collector.cpp @@ -36,7 +36,9 @@ const instruction_si& collector::current_instruction() { return *instr_; } bool collector::has_instruction() const { return instr_.has_value(); } -const operands_si& collector::current_operands() { return *op_; } + +const operands_si& collector::current_operands() const { return *op_; } +operands_si& collector::current_operands() { return *op_; } const remarks_si& collector::current_remarks() { return *rem_; } diff --git a/parser_library/src/semantics/collector.h b/parser_library/src/semantics/collector.h index d3edc855d..12e4ce9ea 100644 --- a/parser_library/src/semantics/collector.h +++ b/parser_library/src/semantics/collector.h @@ -34,7 +34,8 @@ class collector bool has_label() const; const instruction_si& current_instruction(); bool has_instruction() const; - const operands_si& current_operands(); + const operands_si& current_operands() const; + operands_si& current_operands(); const remarks_si& current_remarks(); void set_label_field(range symbol_range); diff --git a/parser_library/src/semantics/operand_impls.cpp b/parser_library/src/semantics/operand_impls.cpp index cf96b2e3f..ba2cc357e 100644 --- a/parser_library/src/semantics/operand_impls.cpp +++ b/parser_library/src/semantics/operand_impls.cpp @@ -14,9 +14,12 @@ #include "operand_impls.h" +#include + #include "expressions/conditional_assembly/terms/ca_var_sym.h" #include "expressions/mach_expr_term.h" #include "operand_visitor.h" +using namespace hlasm_plugin::parser_library::expressions; namespace hlasm_plugin::parser_library::semantics { @@ -90,10 +93,19 @@ std::unique_ptr make_check_operand(expressions::mach_evaluate { return std::make_unique(res.get_abs()); } - else if (res.value_kind() == context::symbol_value_kind::RELOC && type_hint - && *type_hint == checking::machine_operand_type::RELOC_IMM) + else { - return std::make_unique("RELOC", res.get_reloc().offset()); + return std::make_unique( + checking::address_state::UNRES, 0, 0, 0, checking::operand_state::ONE_OP); + } +} +std::unique_ptr check_operand( + expressions::mach_evaluate_info info, const expressions::mach_expression& expr) +{ + auto res = expr.evaluate(info); + if (res.value_kind() == context::symbol_value_kind::ABS) + { + return std::make_unique(std::to_string(res.get_abs()), res.get_abs()); } else { @@ -101,7 +113,6 @@ std::unique_ptr make_check_operand(expressions::mach_evaluate checking::address_state::UNRES, 0, 0, 0, checking::operand_state::ONE_OP); } } - //***************** expr_machine_operand ********************* expr_machine_operand::expr_machine_operand(expressions::mach_expr_ptr expression, range operand_range) @@ -118,6 +129,10 @@ std::unique_ptr expr_machine_operand::get_operand_value(expre std::unique_ptr expr_machine_operand::get_operand_value( expressions::mach_evaluate_info info, checking::machine_operand_type type_hint) const { + if (type_hint == checking::machine_operand_type::RELOC_IMM) + { + return check_operand(info, *expression); + } return make_check_operand(info, *expression, type_hint); } From 2ae7f02a7c83e947eba0c2e1fccb1cd8dc9398ad Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Thu, 13 May 2021 16:57:57 +0200 Subject: [PATCH 11/37] Test failing Signed-off-by: Sweta Shah --- parser_library/test/checking/mach_instr_diag_test.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/parser_library/test/checking/mach_instr_diag_test.cpp b/parser_library/test/checking/mach_instr_diag_test.cpp index c57c8e079..c9f0c75af 100644 --- a/parser_library/test/checking/mach_instr_diag_test.cpp +++ b/parser_library/test/checking/mach_instr_diag_test.cpp @@ -237,7 +237,7 @@ DISP MVC 0(1),1 a.collect_diags(); ASSERT_EQ(a.parser().getNumberOfSyntaxErrors(), (size_t)0); ASSERT_EQ(a.diags().size(), (size_t)1); - ASSERT_EQ(a.diags().at(0).code, "M125"); + ASSERT_EQ(a.diags().at(0).code, "M123"); } TEST(diagnostics, mask_out_of_range) @@ -320,7 +320,7 @@ TEST(diagnostics, relocImm_expected) a.collect_diags(); ASSERT_EQ(a.parser().getNumberOfSyntaxErrors(), (size_t)0); ASSERT_EQ(a.diags().size(), (size_t)1); - ASSERT_EQ(a.diags().at(0).code, "M115"); + ASSERT_EQ(a.diags().at(0).code, "M113"); } TEST(diagnostics, vecReg_expected) { From 8c7aa06e64ee8668125b3ca628bcfd352bd93cc2 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Thu, 13 May 2021 17:04:40 +0200 Subject: [PATCH 12/37] cleanup --- o | 0 parser_library/src/checking/instr_operand.cpp | 2 +- 2 files changed, 1 insertion(+), 1 deletion(-) create mode 100644 o diff --git a/o b/o new file mode 100644 index 000000000..e69de29bb diff --git a/parser_library/src/checking/instr_operand.cpp b/parser_library/src/checking/instr_operand.cpp index abb417973..15e6ae181 100644 --- a/parser_library/src/checking/instr_operand.cpp +++ b/parser_library/src/checking/instr_operand.cpp @@ -297,7 +297,7 @@ bool one_operand::check( diag = diagnostic_op::error_M122(instr_name, -boundary, boundary - 1, operand_range); break; case machine_operand_type::RELOC_IMM: - diag = diagnostic_op::error_M123(std::to_string(value), -boundary, boundary - 1, operand_range); + diag = diagnostic_op::error_M123(instr_name, -boundary, boundary - 1, operand_range); break; default: assert(false); From 630575c9dc3607c8643a5fa8180a7b682c49c189 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Fri, 14 May 2021 10:40:50 +0200 Subject: [PATCH 13/37] Update parser_library/src/diagnostic.cpp Co-authored-by: slavek-kucera <53339291+slavek-kucera@users.noreply.github.com> --- parser_library/src/diagnostic.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/parser_library/src/diagnostic.cpp b/parser_library/src/diagnostic.cpp index 8cbf8690d..58a4ba4ba 100644 --- a/parser_library/src/diagnostic.cpp +++ b/parser_library/src/diagnostic.cpp @@ -1481,8 +1481,7 @@ diagnostic_op diagnostic_op::warn_D031(const range& range, const std::string& op { return diagnostic_op(diagnostic_severity::warning, "D031", - " Operand value " + operand_value + " should be relocatable symbol. ", - + "Operand value " + operand_value + " should be a relocatable symbol", range); } From b14b8e24ad7d8cefe76ce7eefd72418d7ec601bc Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 18 May 2021 07:14:40 +0200 Subject: [PATCH 14/37] mnemonics not working fix --- .../src/expressions/mach_operator.h | 16 ++---- parser_library/src/parsing/parser_impl.cpp | 18 ++++++- .../test/checking/mach_instr_diag_test.cpp | 12 +++++ .../test/diagnostics_check_test.cpp | 49 ++++++++++--------- 4 files changed, 60 insertions(+), 35 deletions(-) diff --git a/parser_library/src/expressions/mach_operator.h b/parser_library/src/expressions/mach_operator.h index 941db98ff..cdeffc97c 100644 --- a/parser_library/src/expressions/mach_operator.h +++ b/parser_library/src/expressions/mach_operator.h @@ -145,20 +145,14 @@ inline mach_expression::value_t mach_expr_binary::evaluate(mach_evaluate_in template<> inline mach_expression::value_t mach_expr_binary::evaluate(mach_evaluate_info info) const { - auto lc = left_->evaluate(info); - auto symb = right_->evaluate(info); - if (symb.value_kind() == context::symbol_value_kind::ABS) + auto location = left_->evaluate(info); + auto target = right_->evaluate(info); + if (target.value_kind() == context::symbol_value_kind::ABS) { add_diagnostic(diagnostic_op::warn_D031(get_range(), std::to_string(right_->evaluate(info).get_abs()))); - return right_->evaluate(info); - } - else - { - if (lc.get_reloc().offset() > symb.get_reloc().offset()) - return (left_->evaluate(info) - right_->evaluate(info)); - else - return (right_->evaluate(info) - left_->evaluate(info)); + return target; } + return target - location; } template<> inline mach_expression::value_t mach_expr_binary::evaluate(mach_evaluate_info info) const diff --git a/parser_library/src/parsing/parser_impl.cpp b/parser_library/src/parsing/parser_impl.cpp index fba6b501a..ae68f2633 100644 --- a/parser_library/src/parsing/parser_impl.cpp +++ b/parser_library/src/parsing/parser_impl.cpp @@ -505,11 +505,27 @@ void parser_impl::process_lookahead() } void parser_impl::transform_imm_reg_operands(semantics::collector& col, id_index instruction) { + std::string instruction_name; + instruction_name = *instruction; + std::vector> replaced; auto opernds = &col.current_operands().value; + auto mnem_tmp = context::instruction::mnemonic_codes.find(*instruction); + if (mnem_tmp != context::instruction::mnemonic_codes.end()) + { + instruction_name = context::instruction::mnemonic_codes.at(*instruction).instruction; + replaced = context::instruction::mnemonic_codes.at(*instruction).replaced; + } int position = 0; for (auto& operand : *opernds) { - auto type = context::instruction::machine_instructions.at(*instruction)->operands[position].identifier.type; + // replaced operands are skipped being immediate values + if (replaced.size() != 0 && replaced.at(position).first == position) + { + position++; + } + + auto type = context::instruction::machine_instructions.at(instruction_name)->operands[position].identifier.type; + if (type == checking::machine_operand_type::RELOC_IMM && operand.get()->access_mach() != nullptr && operand.get()->access_mach()->kind == mach_kind::EXPR) { diff --git a/parser_library/test/checking/mach_instr_diag_test.cpp b/parser_library/test/checking/mach_instr_diag_test.cpp index c9f0c75af..6977780d6 100644 --- a/parser_library/test/checking/mach_instr_diag_test.cpp +++ b/parser_library/test/checking/mach_instr_diag_test.cpp @@ -334,4 +334,16 @@ TEST(diagnostics, vecReg_expected) ASSERT_EQ(a.parser().getNumberOfSyntaxErrors(), (size_t)0); ASSERT_EQ(a.diags().size(), (size_t)1); ASSERT_EQ(a.diags().at(0).code, "M114"); +} +TEST(diagnostics, relocSymbol_expected) +{ + std::string input( + R"( + EXRL 1,12 +)"); + analyzer a(input); + a.analyze(); + a.collect_diags(); + ASSERT_EQ(a.diags().size(), (size_t)1); + ASSERT_EQ(a.diags().at(0).code, "D031"); } \ No newline at end of file diff --git a/parser_library/test/diagnostics_check_test.cpp b/parser_library/test/diagnostics_check_test.cpp index 76319e268..fe6936159 100644 --- a/parser_library/test/diagnostics_check_test.cpp +++ b/parser_library/test/diagnostics_check_test.cpp @@ -21,13 +21,14 @@ TEST(diagnostics, overall_correctness) { std::string input( R"( - J 5 + J LABEL ACONTROL COMPAT(CASE) CATTR DEFLOAD,FILL(3) CATTR FILL(3) AINSERT 'abc',BACK &x setc 'abc' AINSERT '&x',BACK +LABEL EQU *+1 )"); analyzer a(input); a.analyze(); @@ -36,7 +37,7 @@ TEST(diagnostics, overall_correctness) ASSERT_EQ(a.parser().getNumberOfSyntaxErrors(), (size_t)0); - ASSERT_EQ(dynamic_cast(&a)->diags().size(), (size_t)1); + ASSERT_EQ(dynamic_cast(&a)->diags().size(), (size_t)0); } TEST(diagnostics, string_substitution) @@ -189,44 +190,46 @@ TEST(diagnostics, mnemonics) R"( B 10(2,2) BR 4 - J 30000 + J LABEL1 NOP 10(2,2) NOPR 4 - JNOP 30000 + JNOP LABEL1 BH 10(2,2) BHR 4 - JH 30000 + JH LABEL1 BL 10(2,2) BLR 4 - JL 30000 + JL LABEL1 BE 10(2,2) BER 4 - JE 30000 + JE LABEL1 BNH 10(2,2) BNHR 4 - JNH 30000 + JNH LABEL1 BNL 10(2,2) BNLR 4 - JNL 30000 + JNL LABEL1 BNE 10(2,2) BNER 4 - JNE 30000 + JNE LABEL1 BO 10(2,2) BOR 4 - JO 30000 + JO LABEL1 BNO 10(2,2) BNOR 4 - JNO 30000 - BRUL 80000 - BRHL 80000 - BRLL 80000 - BREL 80000 - BRNHL 80000 - BRNLL 80000 - BRNEL 80000 - BROL 80000 - BRNOL 80000 - JLNOP 80000 + JNO LABEL1 + BRUL LABEL2 + BRHL LABEL2 + BRLL LABEL2 + BREL LABEL2 + BRNHL LABEL2 + BRNLL LABEL2 + BRNEL LABEL2 + BROL LABEL2 + BRNOL LABEL2 + JLNOP LABEL2 +LABEL1 EQU *+19000 +LABEL2 equ *+79000 )"); analyzer a(input); @@ -236,7 +239,7 @@ TEST(diagnostics, mnemonics) ASSERT_EQ(a.parser().getNumberOfSyntaxErrors(), (size_t)0); - ASSERT_EQ(dynamic_cast(&a)->diags().size(), (size_t)20); + ASSERT_EQ(dynamic_cast(&a)->diags().size(), (size_t)0); } TEST(diagnostics, From 28aef6b4bdaec86e583f3f77ee1c96555dc9b70f Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 18 May 2021 07:23:36 +0200 Subject: [PATCH 15/37] format Signed-off-by: Sweta Shah --- parser_library/src/checking/instr_operand.cpp | 1 - .../src/processing/instruction_sets/low_language_processor.cpp | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/parser_library/src/checking/instr_operand.cpp b/parser_library/src/checking/instr_operand.cpp index 15e6ae181..65ddab681 100644 --- a/parser_library/src/checking/instr_operand.cpp +++ b/parser_library/src/checking/instr_operand.cpp @@ -289,7 +289,6 @@ bool one_operand::check( // it is a simple operand if (to_check.identifier.is_signed && !is_size_corresponding_signed(value, to_check.identifier.size)) { - auto boundary = 1ll << (to_check.identifier.size - 1); switch (to_check.identifier.type) { diff --git a/parser_library/src/processing/instruction_sets/low_language_processor.cpp b/parser_library/src/processing/instruction_sets/low_language_processor.cpp index d1d2bdd29..5d0fc7a29 100644 --- a/parser_library/src/processing/instruction_sets/low_language_processor.cpp +++ b/parser_library/src/processing/instruction_sets/low_language_processor.cpp @@ -202,7 +202,7 @@ low_language_processor::transform_result low_language_processor::transform_mnemo // the machine instruction structure associated with the given instruction name auto curr_instr = mnemonic.instruction; - + // check whether substituted mnemonic values are ok // check size of mnemonic operands From 78775616e7c5d42de414de22028cddd533c63ea5 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 18 May 2021 08:51:22 +0200 Subject: [PATCH 16/37] Conflicts causing build failure Signed-off-by: Sweta Shah --- parser_library/src/parsing/parser_impl.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/parser_library/src/parsing/parser_impl.cpp b/parser_library/src/parsing/parser_impl.cpp index a57cc0daa..35b0a379c 100644 --- a/parser_library/src/parsing/parser_impl.cpp +++ b/parser_library/src/parsing/parser_impl.cpp @@ -546,7 +546,7 @@ void parser_impl::transform_imm_reg_operands(semantics::collector& col, id_index auto mnem_tmp = context::instruction::mnemonic_codes.find(*instruction); if (mnem_tmp != context::instruction::mnemonic_codes.end()) { - instruction_name = context::instruction::mnemonic_codes.at(*instruction).instruction; + instruction_name = context::instruction::mnemonic_codes.at(*instruction).instruction->instr_name; replaced = context::instruction::mnemonic_codes.at(*instruction).replaced; } int position = 0; @@ -558,7 +558,7 @@ void parser_impl::transform_imm_reg_operands(semantics::collector& col, id_index position++; } - auto type = context::instruction::machine_instructions.at(instruction_name)->operands[position].identifier.type; + auto type = context::instruction::machine_instructions.at(instruction_name).operands[position].identifier.type; if (type == checking::machine_operand_type::RELOC_IMM && operand.get()->access_mach() != nullptr && operand.get()->access_mach()->kind == mach_kind::EXPR) From 330d4e524e181470a5a33d7a6511cbfa34497907 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 18 May 2021 09:22:43 +0200 Subject: [PATCH 17/37] Cleanup --- parser_library/src/expressions/mach_operator.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/parser_library/src/expressions/mach_operator.h b/parser_library/src/expressions/mach_operator.h index cdeffc97c..f47e39926 100644 --- a/parser_library/src/expressions/mach_operator.h +++ b/parser_library/src/expressions/mach_operator.h @@ -149,7 +149,7 @@ inline mach_expression::value_t mach_expr_binary::evaluate(mach_evalua auto target = right_->evaluate(info); if (target.value_kind() == context::symbol_value_kind::ABS) { - add_diagnostic(diagnostic_op::warn_D031(get_range(), std::to_string(right_->evaluate(info).get_abs()))); + add_diagnostic(diagnostic_op::warn_D031(get_range(), std::to_string(target.get_abs()))); return target; } return target - location; From 39cfb167aa5e14544787cb85df635d95a715f37c Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Wed, 19 May 2021 12:42:29 +0200 Subject: [PATCH 18/37] length of 2 bytes error check Signed-off-by: Sweta Shah --- parser_library/src/diagnostic.cpp | 4 ++++ parser_library/src/diagnostic.h | 4 +++- parser_library/src/expressions/mach_operator.h | 5 ++++- 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/parser_library/src/diagnostic.cpp b/parser_library/src/diagnostic.cpp index 17272bbf7..4db09a12e 100644 --- a/parser_library/src/diagnostic.cpp +++ b/parser_library/src/diagnostic.cpp @@ -1864,6 +1864,10 @@ diagnostic_op diagnostic_op::error_ME002(const range& range) return diagnostic_op(diagnostic_severity::error, "ME002", "multiplication or division of address", range); } +diagnostic_op diagnostic_op::error_ME003(const range& range) +{ + return diagnostic_op(diagnostic_severity::error, "ME003", "Relative Immediate Operand value must be signed number of halfwords.", range); +} diagnostic_op diagnostic_op::error_CE001(const range& range) { return diagnostic_op(diagnostic_severity::error, "CE001", "Operator expected", range); diff --git a/parser_library/src/diagnostic.h b/parser_library/src/diagnostic.h index d13c4a46f..dae850efb 100644 --- a/parser_library/src/diagnostic.h +++ b/parser_library/src/diagnostic.h @@ -93,7 +93,7 @@ M1xx - format problems M2xx - custom instruction problems - M200 - VNOT instruction, last too operands are not equal - + - M201 - RI operand instructions, relative_address not aligned to halfword I999 - should never happen - implementation problem */ @@ -592,6 +592,8 @@ struct diagnostic_op static diagnostic_op error_ME002(const range& range); + static diagnostic_op error_ME003(const range& range); + static diagnostic_op error_CE001(const range& range); static diagnostic_op error_CE002(const std::string& message, const range& range); diff --git a/parser_library/src/expressions/mach_operator.h b/parser_library/src/expressions/mach_operator.h index f47e39926..2d901ec81 100644 --- a/parser_library/src/expressions/mach_operator.h +++ b/parser_library/src/expressions/mach_operator.h @@ -152,7 +152,10 @@ inline mach_expression::value_t mach_expr_binary::evaluate(mach_evalua add_diagnostic(diagnostic_op::warn_D031(get_range(), std::to_string(target.get_abs()))); return target; } - return target - location; + + if ((target - location).get_abs() % 2 != 0) + add_diagnostic(diagnostic_op::error_ME003(get_range())); + return target - location; } template<> inline mach_expression::value_t mach_expr_binary::evaluate(mach_evaluate_info info) const From cdfbf7efe0974314a3b18510c3e6a08ac64fc4f6 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Wed, 19 May 2021 15:38:13 +0200 Subject: [PATCH 19/37] format --- parser_library/src/diagnostic.cpp | 5 ++++- parser_library/src/expressions/mach_operator.h | 4 ++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/parser_library/src/diagnostic.cpp b/parser_library/src/diagnostic.cpp index 4db09a12e..471815918 100644 --- a/parser_library/src/diagnostic.cpp +++ b/parser_library/src/diagnostic.cpp @@ -1866,7 +1866,10 @@ diagnostic_op diagnostic_op::error_ME002(const range& range) diagnostic_op diagnostic_op::error_ME003(const range& range) { - return diagnostic_op(diagnostic_severity::error, "ME003", "Relative Immediate Operand value must be signed number of halfwords.", range); + return diagnostic_op(diagnostic_severity::error, + "ME003", + "Relative Immediate Operand value must be signed number of halfwords.", + range); } diagnostic_op diagnostic_op::error_CE001(const range& range) { diff --git a/parser_library/src/expressions/mach_operator.h b/parser_library/src/expressions/mach_operator.h index 2d901ec81..d5712f6c0 100644 --- a/parser_library/src/expressions/mach_operator.h +++ b/parser_library/src/expressions/mach_operator.h @@ -152,10 +152,10 @@ inline mach_expression::value_t mach_expr_binary::evaluate(mach_evalua add_diagnostic(diagnostic_op::warn_D031(get_range(), std::to_string(target.get_abs()))); return target; } - + if ((target - location).get_abs() % 2 != 0) add_diagnostic(diagnostic_op::error_ME003(get_range())); - return target - location; + return target - location; } template<> inline mach_expression::value_t mach_expr_binary::evaluate(mach_evaluate_info info) const From 1a7c3c23c3eaf7499cd0af4e083d8f4106e6bf52 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Wed, 19 May 2021 18:01:07 +0200 Subject: [PATCH 20/37] Exception for undefined symbol --- parser_library/src/expressions/mach_operator.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/parser_library/src/expressions/mach_operator.h b/parser_library/src/expressions/mach_operator.h index d5712f6c0..71c4c2fe7 100644 --- a/parser_library/src/expressions/mach_operator.h +++ b/parser_library/src/expressions/mach_operator.h @@ -153,7 +153,7 @@ inline mach_expression::value_t mach_expr_binary::evaluate(mach_evalua return target; } - if ((target - location).get_abs() % 2 != 0) + if ((target - location).value_kind() == context::symbol_value_kind::ABS && (target - location).get_abs() % 2 != 0) add_diagnostic(diagnostic_op::error_ME003(get_range())); return target - location; } From 8563685277c50750538e98b7a42d0e29d1db2e39 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Thu, 20 May 2021 07:48:05 +0200 Subject: [PATCH 21/37] ... Signed-off-by: Sweta Shah --- parser_library/src/parsing/parser_impl.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/parser_library/src/parsing/parser_impl.cpp b/parser_library/src/parsing/parser_impl.cpp index 35b0a379c..3f33c3771 100644 --- a/parser_library/src/parsing/parser_impl.cpp +++ b/parser_library/src/parsing/parser_impl.cpp @@ -546,7 +546,7 @@ void parser_impl::transform_imm_reg_operands(semantics::collector& col, id_index auto mnem_tmp = context::instruction::mnemonic_codes.find(*instruction); if (mnem_tmp != context::instruction::mnemonic_codes.end()) { - instruction_name = context::instruction::mnemonic_codes.at(*instruction).instruction->instr_name; + instruction_name = context::instruction::mnemonic_codes.at(*instruction).instruction->instr_name; replaced = context::instruction::mnemonic_codes.at(*instruction).replaced; } int position = 0; From c47064f91aa1afc3467f1f9405527b8b940d9d58 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Thu, 20 May 2021 13:31:31 +0200 Subject: [PATCH 22/37] Failing test due to alignement --- parser_library/test/diagnostics_check_test.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/parser_library/test/diagnostics_check_test.cpp b/parser_library/test/diagnostics_check_test.cpp index 618e69033..103f374f1 100644 --- a/parser_library/test/diagnostics_check_test.cpp +++ b/parser_library/test/diagnostics_check_test.cpp @@ -28,7 +28,7 @@ TEST(diagnostics, overall_correctness) AINSERT ' sam64',BACK &x setc ' sam64' AINSERT '&x',BACK -LABEL EQU *+1 +LABEL EQU *+2 )"); analyzer a(input); a.analyze(); From 1585fff411dbf6cc12658e06dba07d7afa89fd62 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Thu, 20 May 2021 13:35:22 +0200 Subject: [PATCH 23/37] Update diagnostic.h --- parser_library/src/diagnostic.h | 1 - 1 file changed, 1 deletion(-) diff --git a/parser_library/src/diagnostic.h b/parser_library/src/diagnostic.h index dae850efb..cd67d4430 100644 --- a/parser_library/src/diagnostic.h +++ b/parser_library/src/diagnostic.h @@ -93,7 +93,6 @@ M1xx - format problems M2xx - custom instruction problems - M200 - VNOT instruction, last too operands are not equal - - M201 - RI operand instructions, relative_address not aligned to halfword I999 - should never happen - implementation problem */ From f0caacad4b62c39f835305d8764c0b33665d7026 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Thu, 20 May 2021 13:36:17 +0200 Subject: [PATCH 24/37] Update diagnostic.h --- parser_library/src/diagnostic.h | 1 + 1 file changed, 1 insertion(+) diff --git a/parser_library/src/diagnostic.h b/parser_library/src/diagnostic.h index cd67d4430..6d84148bb 100644 --- a/parser_library/src/diagnostic.h +++ b/parser_library/src/diagnostic.h @@ -93,6 +93,7 @@ M1xx - format problems M2xx - custom instruction problems - M200 - VNOT instruction, last too operands are not equal + I999 - should never happen - implementation problem */ From f1cbd38cd24428f65dd4d94257bba2509d0e034c Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Mon, 24 May 2021 11:31:04 +0200 Subject: [PATCH 25/37] code smell and missing test --- parser_library/src/parsing/parser_impl.cpp | 14 +++--- parser_library/src/parsing/parser_impl.h | 2 +- .../src/semantics/operand_impls.cpp | 7 ++- .../test/checking/mach_instr_diag_test.cpp | 50 +++++++++++++++++++ 4 files changed, 61 insertions(+), 12 deletions(-) diff --git a/parser_library/src/parsing/parser_impl.cpp b/parser_library/src/parsing/parser_impl.cpp index 3f33c3771..ba2726995 100644 --- a/parser_library/src/parsing/parser_impl.cpp +++ b/parser_library/src/parsing/parser_impl.cpp @@ -543,24 +543,24 @@ void parser_impl::transform_imm_reg_operands(semantics::collector& col, id_index instruction_name = *instruction; std::vector> replaced; auto opernds = &col.current_operands().value; - auto mnem_tmp = context::instruction::mnemonic_codes.find(*instruction); - if (mnem_tmp != context::instruction::mnemonic_codes.end()) + if (auto mnem_tmp = context::instruction::mnemonic_codes.find(*instruction); + mnem_tmp != context::instruction::mnemonic_codes.end()) { instruction_name = context::instruction::mnemonic_codes.at(*instruction).instruction->instr_name; replaced = context::instruction::mnemonic_codes.at(*instruction).replaced; } int position = 0; - for (auto& operand : *opernds) + for (const auto& operand : *opernds) { // replaced operands are skipped being immediate values - if (replaced.size() != 0 && replaced.at(position).first == position) + if (!replaced.empty() && replaced.at(position).first == position) { position++; } - auto type = context::instruction::machine_instructions.at(instruction_name).operands[position].identifier.type; - - if (type == checking::machine_operand_type::RELOC_IMM && operand.get()->access_mach() != nullptr + if (auto type = + context::instruction::machine_instructions.at(instruction_name).operands[position].identifier.type; + type == checking::machine_operand_type::RELOC_IMM && operand.get()->access_mach() != nullptr && operand.get()->access_mach()->kind == mach_kind::EXPR) { auto range = operand.get()->access_mach()->access_expr()->expression.get()->get_range(); diff --git a/parser_library/src/parsing/parser_impl.h b/parser_library/src/parsing/parser_impl.h index 86fc67ab8..820480b98 100644 --- a/parser_library/src/parsing/parser_impl.h +++ b/parser_library/src/parsing/parser_impl.h @@ -137,7 +137,7 @@ class parser_impl : public antlr4::Parser, void parse_operands(const std::string& text, range text_range); void parse_lookahead_operands(const std::string& text, range text_range); - void transform_imm_reg_operands(semantics::collector& col, context::id_index instruction); + static void transform_imm_reg_operands(semantics::collector& col, context::id_index instruction); antlr4::misc::IntervalSet getExpectedTokens() override; diff --git a/parser_library/src/semantics/operand_impls.cpp b/parser_library/src/semantics/operand_impls.cpp index ba2cc357e..171dd597c 100644 --- a/parser_library/src/semantics/operand_impls.cpp +++ b/parser_library/src/semantics/operand_impls.cpp @@ -84,9 +84,8 @@ address_machine_operand* machine_operand::access_address() return kind == mach_kind::ADDR ? static_cast(this) : nullptr; } -std::unique_ptr make_check_operand(expressions::mach_evaluate_info info, - const expressions::mach_expression& expr, - std::optional type_hint = std::nullopt) +std::unique_ptr make_check_operand( + expressions::mach_evaluate_info info, const expressions::mach_expression& expr) { auto res = expr.evaluate(info); if (res.value_kind() == context::symbol_value_kind::ABS) @@ -133,7 +132,7 @@ std::unique_ptr expr_machine_operand::get_operand_value( { return check_operand(info, *expression); } - return make_check_operand(info, *expression, type_hint); + return make_check_operand(info, *expression); } // suppress MSVC warning 'inherits via dominance' diff --git a/parser_library/test/checking/mach_instr_diag_test.cpp b/parser_library/test/checking/mach_instr_diag_test.cpp index 6977780d6..08b103448 100644 --- a/parser_library/test/checking/mach_instr_diag_test.cpp +++ b/parser_library/test/checking/mach_instr_diag_test.cpp @@ -322,6 +322,56 @@ TEST(diagnostics, relocImm_expected) ASSERT_EQ(a.diags().size(), (size_t)1); ASSERT_EQ(a.diags().at(0).code, "M113"); } + +TEST(diagnostics, invalid_reloc_operand) +{ + std::string input( + R"( +SIZE EQU 5 + EXRL 1,LENGTH+LENGTH +LENGTH DS CL(SIZE) +)"); + + analyzer a(input); + a.analyze(); + a.collect_diags(); + + ASSERT_EQ(a.diags().size(), (size_t)1); + ASSERT_EQ(a.diags().at(0).code, "M113"); +} + +TEST(diagnostics, valid_reloc_operand) +{ + std::string input( + R"( +SIZE EQU 5 + EXRL 1,LENGTH+4 +LENGTH DS CL(SIZE) +)"); + + analyzer a(input); + a.analyze(); + a.collect_diags(); + + ASSERT_EQ(a.diags().size(), (size_t)0); +} + +TEST(diagnostics, reloc_operand_halfword_o_error) +{ + std::string input( + R"( + EXRL 1,LEN120 +LENGTH DS CL(5) +LEN120 DS CL1 +)"); + + analyzer a(input); + a.analyze(); + a.collect_diags(); + + ASSERT_EQ(a.diags().size(), (size_t)1); + ASSERT_EQ(a.diags().at(0).code, "ME003"); +} TEST(diagnostics, vecReg_expected) { std::string input( From 3999b01211330098dcb408173961441cb4901deb Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Mon, 24 May 2021 16:21:08 +0200 Subject: [PATCH 26/37] Position for replaced index not found correctly fix --- parser_library/src/parsing/parser_impl.cpp | 27 ++++++++++++---------- 1 file changed, 15 insertions(+), 12 deletions(-) diff --git a/parser_library/src/parsing/parser_impl.cpp b/parser_library/src/parsing/parser_impl.cpp index ba2726995..0ea7b4291 100644 --- a/parser_library/src/parsing/parser_impl.cpp +++ b/parser_library/src/parsing/parser_impl.cpp @@ -539,29 +539,32 @@ void parser_impl::process_lookahead() } void parser_impl::transform_imm_reg_operands(semantics::collector& col, id_index instruction) { - std::string instruction_name; - instruction_name = *instruction; + const machine_instruction* instr; std::vector> replaced; auto opernds = &col.current_operands().value; if (auto mnem_tmp = context::instruction::mnemonic_codes.find(*instruction); mnem_tmp != context::instruction::mnemonic_codes.end()) { - instruction_name = context::instruction::mnemonic_codes.at(*instruction).instruction->instr_name; - replaced = context::instruction::mnemonic_codes.at(*instruction).replaced; + auto mnemonic = context::instruction::mnemonic_codes.at(*instruction); + instr = mnemonic.instruction; + replaced = mnemonic.replaced; + } + else + { + instr = &context::instruction::machine_instructions.at(*instruction); } int position = 0; for (const auto& operand : *opernds) { - // replaced operands are skipped being immediate values - if (!replaced.empty() && replaced.at(position).first == position) + for (int index = 0; index < replaced.size(); index++) { - position++; + if (replaced.at(index).first == position) + { + position++; + } } - - if (auto type = - context::instruction::machine_instructions.at(instruction_name).operands[position].identifier.type; - type == checking::machine_operand_type::RELOC_IMM && operand.get()->access_mach() != nullptr - && operand.get()->access_mach()->kind == mach_kind::EXPR) + if (auto type = instr->operands[position].identifier.type; type == checking::machine_operand_type::RELOC_IMM + && operand.get()->access_mach() != nullptr && operand.get()->access_mach()->kind == mach_kind::EXPR) { auto range = operand.get()->access_mach()->access_expr()->expression.get()->get_range(); mach_expr_ptr& transformed_exp = operand.get()->access_mach()->access_expr()->expression; From f1d4749d072b9f3da70108db9dcb4f2e6ad8b12c Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 25 May 2021 10:06:55 +0200 Subject: [PATCH 27/37] Delete o --- o | 0 1 file changed, 0 insertions(+), 0 deletions(-) delete mode 100644 o diff --git a/o b/o deleted file mode 100644 index e69de29bb..000000000 From 004287623d1ce84800323ab9f9586df05101cc04 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 25 May 2021 10:56:15 +0200 Subject: [PATCH 28/37] code smell --- parser_library/src/parsing/parser_impl.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/parser_library/src/parsing/parser_impl.cpp b/parser_library/src/parsing/parser_impl.cpp index 0ea7b4291..8ed385fa9 100644 --- a/parser_library/src/parsing/parser_impl.cpp +++ b/parser_library/src/parsing/parser_impl.cpp @@ -545,7 +545,7 @@ void parser_impl::transform_imm_reg_operands(semantics::collector& col, id_index if (auto mnem_tmp = context::instruction::mnemonic_codes.find(*instruction); mnem_tmp != context::instruction::mnemonic_codes.end()) { - auto mnemonic = context::instruction::mnemonic_codes.at(*instruction); + const auto& mnemonic = context::instruction::mnemonic_codes.at(*instruction); instr = mnemonic.instruction; replaced = mnemonic.replaced; } @@ -556,9 +556,9 @@ void parser_impl::transform_imm_reg_operands(semantics::collector& col, id_index int position = 0; for (const auto& operand : *opernds) { - for (int index = 0; index < replaced.size(); index++) + for (const auto& replaced_member : replaced) { - if (replaced.at(index).first == position) + if (replaced_member.first == position) { position++; } From f5ad18e83b7277312cb7e5100595472ffa0ec532 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 25 May 2021 12:11:16 +0200 Subject: [PATCH 29/37] ... --- parser_library/src/parsing/parser_impl.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/parser_library/src/parsing/parser_impl.cpp b/parser_library/src/parsing/parser_impl.cpp index 8ed385fa9..775f7effe 100644 --- a/parser_library/src/parsing/parser_impl.cpp +++ b/parser_library/src/parsing/parser_impl.cpp @@ -556,9 +556,9 @@ void parser_impl::transform_imm_reg_operands(semantics::collector& col, id_index int position = 0; for (const auto& operand : *opernds) { - for (const auto& replaced_member : replaced) + for (const auto& [index, value] : replaced) { - if (replaced_member.first == position) + if (index == position) { position++; } From 5be1b3ba3deb2a9a2ea51fe1e2abe488bd4885de Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Wed, 2 Jun 2021 11:46:49 +0200 Subject: [PATCH 30/37] Fix for substitution operands and missing test --- parser_library/src/parsing/parser_impl.cpp | 13 +++-- parser_library/src/parsing/parser_impl.h | 3 +- .../test/checking/mach_instr_diag_test.cpp | 49 ++++++++++++++++++- 3 files changed, 58 insertions(+), 7 deletions(-) diff --git a/parser_library/src/parsing/parser_impl.cpp b/parser_library/src/parsing/parser_impl.cpp index 775f7effe..0c6b56b4f 100644 --- a/parser_library/src/parsing/parser_impl.cpp +++ b/parser_library/src/parsing/parser_impl.cpp @@ -162,6 +162,10 @@ std::pair parser_impl::parse_oper break; case processing::processing_form::MACH: line = std::move(h.parser->op_rem_body_mach_r()->line); + if (after_substitution) + { + transform_imm_reg_operands(line.operands, opcode.value); + } break; case processing::processing_form::DAT: line = std::move(h.parser->op_rem_body_dat_r()->line); @@ -537,11 +541,12 @@ void parser_impl::process_lookahead() parse_lookahead_operands(std::move(*look_lab_instr->op_text), look_lab_instr->op_range); } } -void parser_impl::transform_imm_reg_operands(semantics::collector& col, id_index instruction) +void parser_impl::transform_imm_reg_operands(semantics::operand_list& op_list, id_index instruction) { + if (instruction->empty()) + return; const machine_instruction* instr; std::vector> replaced; - auto opernds = &col.current_operands().value; if (auto mnem_tmp = context::instruction::mnemonic_codes.find(*instruction); mnem_tmp != context::instruction::mnemonic_codes.end()) { @@ -554,7 +559,7 @@ void parser_impl::transform_imm_reg_operands(semantics::collector& col, id_index instr = &context::instruction::machine_instructions.at(*instruction); } int position = 0; - for (const auto& operand : *opernds) + for (const auto& operand : op_list) { for (const auto& [index, value] : replaced) { @@ -632,7 +637,7 @@ void parser_impl::parse_operands(const std::string& text, range text_range) break; case processing::processing_form::MACH: h.parser->op_rem_body_mach(); - transform_imm_reg_operands(h.parser->collector, opcode.value); + transform_imm_reg_operands(h.parser->collector.current_operands().value, opcode.value); break; case processing::processing_form::DAT: h.parser->op_rem_body_dat(); diff --git a/parser_library/src/parsing/parser_impl.h b/parser_library/src/parsing/parser_impl.h index 820480b98..5e80aa495 100644 --- a/parser_library/src/parsing/parser_impl.h +++ b/parser_library/src/parsing/parser_impl.h @@ -137,8 +137,7 @@ class parser_impl : public antlr4::Parser, void parse_operands(const std::string& text, range text_range); void parse_lookahead_operands(const std::string& text, range text_range); - static void transform_imm_reg_operands(semantics::collector& col, context::id_index instruction); - + static void transform_imm_reg_operands(semantics::operand_list& op_list, context::id_index instruction); antlr4::misc::IntervalSet getExpectedTokens() override; bool input_tokens_invalidated = false; diff --git a/parser_library/test/checking/mach_instr_diag_test.cpp b/parser_library/test/checking/mach_instr_diag_test.cpp index 08b103448..5997e360f 100644 --- a/parser_library/test/checking/mach_instr_diag_test.cpp +++ b/parser_library/test/checking/mach_instr_diag_test.cpp @@ -396,4 +396,51 @@ TEST(diagnostics, relocSymbol_expected) a.collect_diags(); ASSERT_EQ(a.diags().size(), (size_t)1); ASSERT_EQ(a.diags().at(0).code, "D031"); -} \ No newline at end of file +} +TEST(diagnostics, setc_variable_mnemonic_reloc_operand) +{ + std::string input( + R"( +&RRR SETC 'NAME' + J &RRR +&RRR DS 0H +)"); + + analyzer a(input); + a.analyze(); + a.collect_diags(); + ASSERT_EQ(a.parser().getNumberOfSyntaxErrors(), (size_t)0); + ASSERT_EQ(a.diags().size(), (size_t)0); +} +TEST(diagnostics, setc_variable_reloc_operand) +{ + std::string input( + R"( +TEST CSECT +&OPS SETC '0,TEST' + LARL &OPS + END TEST +)"); + + analyzer a(input); + a.analyze(); + a.collect_diags(); + ASSERT_EQ(a.parser().getNumberOfSyntaxErrors(), (size_t)0); + ASSERT_EQ(a.diags().size(), (size_t)0); +} +TEST(diagnostics, setc_variable_reloc_symbol_expected_warn) +{ + std::string input( + R"( +TEST CSECT +&OPS SETC '0,1' + LARL &OPS + END TEST +)"); + + analyzer a(input); + a.analyze(); + a.collect_diags(); + ASSERT_EQ(a.diags().size(), (size_t)1); + ASSERT_EQ(a.diags().at(0).code, "D031"); +} From 2f36a6d5a1094e4a815a4dd0a3eeca73ed2eb6a6 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Wed, 2 Jun 2021 12:19:22 +0200 Subject: [PATCH 31/37] Update low_language_processor.cpp --- .../src/processing/instruction_sets/low_language_processor.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/parser_library/src/processing/instruction_sets/low_language_processor.cpp b/parser_library/src/processing/instruction_sets/low_language_processor.cpp index 5d0fc7a29..fb01e4f4d 100644 --- a/parser_library/src/processing/instruction_sets/low_language_processor.cpp +++ b/parser_library/src/processing/instruction_sets/low_language_processor.cpp @@ -200,7 +200,6 @@ low_language_processor::transform_result low_language_processor::transform_mnemo // the associated mnemonic structure with the given name auto mnemonic = context::instruction::mnemonic_codes.at(instr_name); // the machine instruction structure associated with the given instruction name - auto curr_instr = mnemonic.instruction; // check whether substituted mnemonic values are ok From 0f56a6fda75f0409e154c9ba8958119399fc02ff Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Wed, 2 Jun 2021 13:31:21 +0200 Subject: [PATCH 32/37] Cleanup --- parser_library/src/semantics/operand_impls.cpp | 3 --- 1 file changed, 3 deletions(-) diff --git a/parser_library/src/semantics/operand_impls.cpp b/parser_library/src/semantics/operand_impls.cpp index 171dd597c..e9d50bfb9 100644 --- a/parser_library/src/semantics/operand_impls.cpp +++ b/parser_library/src/semantics/operand_impls.cpp @@ -14,12 +14,9 @@ #include "operand_impls.h" -#include - #include "expressions/conditional_assembly/terms/ca_var_sym.h" #include "expressions/mach_expr_term.h" #include "operand_visitor.h" -using namespace hlasm_plugin::parser_library::expressions; namespace hlasm_plugin::parser_library::semantics { From 92410cfee82ffbeca76fb80ce1295109284677a9 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 8 Jun 2021 17:10:07 +0200 Subject: [PATCH 33/37] Macro operands not transformed for RI operands --- parser_library/src/parsing/parser_impl.cpp | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/parser_library/src/parsing/parser_impl.cpp b/parser_library/src/parsing/parser_impl.cpp index 0c6b56b4f..b45d9d322 100644 --- a/parser_library/src/parsing/parser_impl.cpp +++ b/parser_library/src/parsing/parser_impl.cpp @@ -162,10 +162,7 @@ std::pair parser_impl::parse_oper break; case processing::processing_form::MACH: line = std::move(h.parser->op_rem_body_mach_r()->line); - if (after_substitution) - { - transform_imm_reg_operands(line.operands, opcode.value); - } + transform_imm_reg_operands(line.operands, opcode.value); break; case processing::processing_form::DAT: line = std::move(h.parser->op_rem_body_dat_r()->line); From 4c80e8f0a720c492a29c5be8433e3ed37890f4a1 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Tue, 8 Jun 2021 17:43:04 +0200 Subject: [PATCH 34/37] .. --- parser_library/src/parsing/parser_impl.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/parser_library/src/parsing/parser_impl.cpp b/parser_library/src/parsing/parser_impl.cpp index b45d9d322..7e7445481 100644 --- a/parser_library/src/parsing/parser_impl.cpp +++ b/parser_library/src/parsing/parser_impl.cpp @@ -162,7 +162,7 @@ std::pair parser_impl::parse_oper break; case processing::processing_form::MACH: line = std::move(h.parser->op_rem_body_mach_r()->line); - transform_imm_reg_operands(line.operands, opcode.value); + transform_imm_reg_operands(line.operands, opcode.value); break; case processing::processing_form::DAT: line = std::move(h.parser->op_rem_body_dat_r()->line); From 36c86b31c011adcbe0372387f643e62e586e830b Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Wed, 9 Jun 2021 14:19:52 +0200 Subject: [PATCH 35/37] Test for RI operands called through macro --- .../test/checking/mach_instr_diag_test.cpp | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/parser_library/test/checking/mach_instr_diag_test.cpp b/parser_library/test/checking/mach_instr_diag_test.cpp index 5997e360f..eaac50621 100644 --- a/parser_library/test/checking/mach_instr_diag_test.cpp +++ b/parser_library/test/checking/mach_instr_diag_test.cpp @@ -444,3 +444,56 @@ TEST CSECT ASSERT_EQ(a.diags().size(), (size_t)1); ASSERT_EQ(a.diags().at(0).code, "D031"); } +TEST(diagnostics, reloc_parsed_in_macro_valid) +{ + std::string input( + R"( + MACRO + CALLRIOPERAND +LABEL BRAS 0,*+12 + MEND + CALLRIOPERAND +)"); + + analyzer a(input); + a.analyze(); + a.collect_diags(); + ASSERT_EQ(a.parser().getNumberOfSyntaxErrors(), (size_t)0); + ASSERT_EQ(a.diags().size(), (size_t)0); +} +TEST(diagnostics, reloc_parsed_in_macro_with_immValue) +{ + std::string input( + R"( + MACRO + CALLRIOPERAND +LABEL BRAS 0,12 + MEND + CALLRIOPERAND +)"); + + analyzer a(input); + a.analyze(); + a.collect_diags(); + ASSERT_EQ(a.diags().size(), (size_t)1); + ASSERT_EQ(a.diags().at(0).code, "D031"); +} +TEST(diagnostics, reloc_parsed_in_macro_alignment_error) +{ + std::string input( + R"( + MACRO + CALLRIOPERAND + EXRL 1,LEN120 +LENGTH DS CL(5) +LEN120 DS CL1 + MEND + CALLRIOPERAND +)"); + + analyzer a(input); + a.analyze(); + a.collect_diags(); + ASSERT_EQ(a.diags().size(), (size_t)1); + ASSERT_EQ(a.diags().at(0).code, "ME003"); +} \ No newline at end of file From 0e30cb72f6b784422992418d56ea7344237e5349 Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Wed, 9 Jun 2021 15:42:20 +0200 Subject: [PATCH 36/37] Update parser_library/src/diagnostic.cpp Co-authored-by: Michal Bali <38988507+michalbali256@users.noreply.github.com> --- parser_library/src/diagnostic.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/parser_library/src/diagnostic.cpp b/parser_library/src/diagnostic.cpp index 471815918..06f337f23 100644 --- a/parser_library/src/diagnostic.cpp +++ b/parser_library/src/diagnostic.cpp @@ -1481,7 +1481,7 @@ diagnostic_op diagnostic_op::warn_D031(const range& range, const std::string& op { return diagnostic_op(diagnostic_severity::warning, "D031", - "Operand value " + operand_value + " should be a relocatable symbol", + "Using absolute value '" + operand_value + "' as relative immediate value", range); } From 980bcc581acc802a593ea5ba6b1f2c0ad980fe4d Mon Sep 17 00:00:00 2001 From: Sweta Shah Date: Wed, 9 Jun 2021 15:53:37 +0200 Subject: [PATCH 37/37] Requested Changes --- parser_library/src/diagnostic.cpp | 6 ++---- parser_library/src/semantics/operand_impls.cpp | 4 ++-- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/parser_library/src/diagnostic.cpp b/parser_library/src/diagnostic.cpp index 471815918..d78aa82ea 100644 --- a/parser_library/src/diagnostic.cpp +++ b/parser_library/src/diagnostic.cpp @@ -1866,10 +1866,8 @@ diagnostic_op diagnostic_op::error_ME002(const range& range) diagnostic_op diagnostic_op::error_ME003(const range& range) { - return diagnostic_op(diagnostic_severity::error, - "ME003", - "Relative Immediate Operand value must be signed number of halfwords.", - range); + return diagnostic_op( + diagnostic_severity::error, "ME003", "Relative Immediate operand must evaluate into an even offset.", range); } diagnostic_op diagnostic_op::error_CE001(const range& range) { diff --git a/parser_library/src/semantics/operand_impls.cpp b/parser_library/src/semantics/operand_impls.cpp index e9d50bfb9..34e3c92c1 100644 --- a/parser_library/src/semantics/operand_impls.cpp +++ b/parser_library/src/semantics/operand_impls.cpp @@ -95,7 +95,7 @@ std::unique_ptr make_check_operand( checking::address_state::UNRES, 0, 0, 0, checking::operand_state::ONE_OP); } } -std::unique_ptr check_operand( +std::unique_ptr make_rel_imm_operand( expressions::mach_evaluate_info info, const expressions::mach_expression& expr) { auto res = expr.evaluate(info); @@ -127,7 +127,7 @@ std::unique_ptr expr_machine_operand::get_operand_value( { if (type_hint == checking::machine_operand_type::RELOC_IMM) { - return check_operand(info, *expression); + return make_rel_imm_operand(info, *expression); } return make_check_operand(info, *expression); }