From 5ac0b19966901735f8adf53a5da8df5ac3515976 Mon Sep 17 00:00:00 2001 From: Kris Bahnsen Date: Tue, 12 Mar 2019 17:03:28 -0700 Subject: [PATCH 1/3] video: fbdev: st7565p: Add kernel driver half for SPI LCD [ commit 2121d7fae0f621109d24febd52841abe324fe874 in 4.9.y ] Bring in support for st7565p LCD using the driver shim and userspace companion tool. Signed-off-by: Kris Bahnsen --- drivers/video/fbdev/Kconfig | 16 + drivers/video/fbdev/Makefile | 1 + drivers/video/fbdev/ts-st7565p-fb.c | 561 ++++++++++++++++++++++++++++ 3 files changed, 578 insertions(+) create mode 100644 drivers/video/fbdev/ts-st7565p-fb.c diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig index 4f02db65dedec..5d32572880c73 100644 --- a/drivers/video/fbdev/Kconfig +++ b/drivers/video/fbdev/Kconfig @@ -2206,6 +2206,22 @@ config FB_SIMPLE Configuration re: surface address, size, and format must be provided through device tree, or plain old platform data. +config FB_ST7565P + tristate "ST7565P Virtual Frame Buffer support" + depends on FB + select FB_SYS_FILLRECT + select FB_SYS_COPYAREA + select FB_SYS_IMAGEBLIT + select FB_SYS_FOPS + help + This is a `virtual' frame buffer device specifically for the + ST7565P LCD display device when attached to a + Technologic Systems TS-7553-V2 + board. + + This driver also requires a userspace program ("lcd-helper") to communicate + with the ST7565P via SPI. + config FB_SSD1307 tristate "Solomon SSD1307 framebuffer support" depends on FB && I2C diff --git a/drivers/video/fbdev/Makefile b/drivers/video/fbdev/Makefile index 477b9624b7033..0327cc30865d8 100644 --- a/drivers/video/fbdev/Makefile +++ b/drivers/video/fbdev/Makefile @@ -129,6 +129,7 @@ obj-$(CONFIG_FB_MX3) += mx3fb.o obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o obj-$(CONFIG_FB_SSD1307) += ssd1307fb.o obj-$(CONFIG_FB_SIMPLE) += simplefb.o +obj-$(CONFIG_FB_ST7565P) += ts-st7565p-fb.o # the test framebuffer is last obj-$(CONFIG_FB_VIRTUAL) += vfb.o diff --git a/drivers/video/fbdev/ts-st7565p-fb.c b/drivers/video/fbdev/ts-st7565p-fb.c new file mode 100644 index 0000000000000..2430041455593 --- /dev/null +++ b/drivers/video/fbdev/ts-st7565p-fb.c @@ -0,0 +1,561 @@ +/* + * linux/drivers/video/ts-st7565p-.c -- Virtual frame buffer device for + * the Technologic Systems 4600 with attached ST7565P LCD display + * + * This driver is based on the vfb.c file. + * + * Copyright (C) 2002 James Simmons + * + * Copyright (C) 1997 Geert Uytterhoeven + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + + /* + * RAM we reserve for the frame buffer. This defines the maximum screen + * size + * + * The default can be overridden if the driver is compiled as a module + */ +#define VIDEOMEMSIZE 4096 +static void *videomemory; +static u_long videomemorysize = VIDEOMEMSIZE; +module_param(videomemorysize, ulong, 0); + +/********************************************************************** + * + * Memory management + * + **********************************************************************/ +static void *rvmalloc(unsigned long size) +{ + void *mem; + unsigned long adr; + + size = PAGE_ALIGN(size); + mem = vmalloc_32(size); + if (!mem) + return NULL; + + memset(mem, 0, size); /* Clear the ram out, no junk to the user */ + adr = (unsigned long) mem; + while (size > 0) { + SetPageReserved(vmalloc_to_page((void *)adr)); + adr += PAGE_SIZE; + size -= PAGE_SIZE; + } + + return mem; +} + +static void rvfree(void *mem, unsigned long size) +{ + unsigned long adr; + + if (!mem) + return; + + adr = (unsigned long) mem; + while ((long) size > 0) { + ClearPageReserved(vmalloc_to_page((void *)adr)); + adr += PAGE_SIZE; + size -= PAGE_SIZE; + } + vfree(mem); +} + + +static struct fb_var_screeninfo st7565p_default __initdata = { + .xres = 128, + .yres = 64, + .xres_virtual = 128, + .yres_virtual = 64, + .bits_per_pixel = 1, + .red = { 0, 1, 0 }, + .green = { 0, 1, 0 }, + .blue = { 0, 1, 0 }, + .activate = FB_ACTIVATE_TEST, + .height = -1, + .width = -1, + .pixclock = 3800000, + .left_margin = 0, + .right_margin = 0, + .upper_margin = 0, + .lower_margin = 0, + .hsync_len = 1, + .vsync_len = 1, + .vmode = FB_VMODE_NONINTERLACED, +}; + +static struct fb_fix_screeninfo st7565p_fix __initdata = { + .id = "ST7565P FB", + .type = FB_TYPE_PACKED_PIXELS, + .visual = FB_VISUAL_PSEUDOCOLOR, + .xpanstep = 1, + .ypanstep = 1, + .ywrapstep = 1, + .accel = FB_ACCEL_NONE, + .line_length = 16 +}; + +static int st7565p_check_var(struct fb_var_screeninfo *var, + struct fb_info *info); +static int st7565p_set_par(struct fb_info *info); +static int st7565p_setcolreg(u_int regno, u_int red, u_int green, u_int blue, + u_int transp, struct fb_info *info); +static int st7565p_mmap(struct fb_info *info, + struct vm_area_struct *vma); + +static struct fb_ops st7565p_ops = { + .fb_read = fb_sys_read, + .fb_write = fb_sys_write, + .fb_check_var = st7565p_check_var, + .fb_set_par = st7565p_set_par, + .fb_setcolreg = st7565p_setcolreg, + .fb_fillrect = sys_fillrect, + .fb_copyarea = sys_copyarea, + .fb_imageblit = sys_imageblit, + .fb_mmap = st7565p_mmap, +}; + + /* + * Internal routines + */ + +static u_long get_line_length(int xres_virtual, int bpp) +{ + u_long length; + + length = xres_virtual * bpp; + length = (length + 31) & ~31; + length >>= 3; + + return (length); +} + + /* + * Setting the video mode has been split into two parts. + * First part, xxxfb_check_var, must not write anything + * to hardware, it should only verify and adjust var. + * This means it doesn't alter par but it does use hardware + * data from it to check this var. + */ + +static int st7565p_check_var(struct fb_var_screeninfo *var, + struct fb_info *info) +{ + u_long line_length; + + /* + * FB_VMODE_CONUPDATE and FB_VMODE_SMOOTH_XPAN are equal! + * as FB_VMODE_SMOOTH_XPAN is only used internally + */ + + if (var->vmode & FB_VMODE_CONUPDATE) { + var->vmode |= FB_VMODE_YWRAP; + var->xoffset = info->var.xoffset; + var->yoffset = info->var.yoffset; + } + + /* + * Some very basic checks + */ + if (!var->xres) + var->xres = 1; + if (!var->yres) + var->yres = 1; + if (var->xres > var->xres_virtual) + var->xres_virtual = var->xres; + if (var->yres > var->yres_virtual) + var->yres_virtual = var->yres; + if (var->bits_per_pixel <= 1) + var->bits_per_pixel = 1; + else if (var->bits_per_pixel <= 8) + var->bits_per_pixel = 8; + else if (var->bits_per_pixel <= 16) + var->bits_per_pixel = 16; + else if (var->bits_per_pixel <= 24) + var->bits_per_pixel = 24; + else if (var->bits_per_pixel <= 32) + var->bits_per_pixel = 32; + else + return -EINVAL; + + if (var->xres_virtual < var->xoffset + var->xres) + var->xres_virtual = var->xoffset + var->xres; + if (var->yres_virtual < var->yoffset + var->yres) + var->yres_virtual = var->yoffset + var->yres; + + /* + * Memory limit + */ + line_length = + get_line_length(var->xres_virtual, var->bits_per_pixel); + if (line_length * var->yres_virtual > videomemorysize) + return -ENOMEM; + + /* + * Now that we checked it we alter var. The reason being is that the video + * mode passed in might not work but slight changes to it might make it + * work. This way we let the user know what is acceptable. + */ + switch (var->bits_per_pixel) { + case 1: + case 8: + var->red.offset = 0; + var->red.length = 8; + var->green.offset = 0; + var->green.length = 8; + var->blue.offset = 0; + var->blue.length = 8; + var->transp.offset = 0; + var->transp.length = 0; + break; + case 16: /* RGBA 5551 */ + if (var->transp.length) { + var->red.offset = 0; + var->red.length = 5; + var->green.offset = 5; + var->green.length = 5; + var->blue.offset = 10; + var->blue.length = 5; + var->transp.offset = 15; + var->transp.length = 1; + } else { /* RGB 565 */ + var->red.offset = 0; + var->red.length = 5; + var->green.offset = 5; + var->green.length = 6; + var->blue.offset = 11; + var->blue.length = 5; + var->transp.offset = 0; + var->transp.length = 0; + } + break; + case 24: /* RGB 888 */ + var->red.offset = 0; + var->red.length = 8; + var->green.offset = 8; + var->green.length = 8; + var->blue.offset = 16; + var->blue.length = 8; + var->transp.offset = 0; + var->transp.length = 0; + break; + case 32: /* RGBA 8888 */ + var->red.offset = 0; + var->red.length = 8; + var->green.offset = 8; + var->green.length = 8; + var->blue.offset = 16; + var->blue.length = 8; + var->transp.offset = 24; + var->transp.length = 8; + break; + } + var->red.msb_right = 0; + var->green.msb_right = 0; + var->blue.msb_right = 0; + var->transp.msb_right = 0; + + return 0; +} + +/* This routine actually sets the video mode. It's in here where we + * the hardware state info->par and fix which can be affected by the + * change in par. For this driver it doesn't do much. + */ +static int st7565p_set_par(struct fb_info *info) +{ + info->fix.line_length = get_line_length(info->var.xres_virtual, + info->var.bits_per_pixel); + + return 0; +} + + /* + * Set a single color register. The values supplied are already + * rounded down to the hardware's capabilities (according to the + * entries in the var structure). Return != 0 for invalid regno. + */ + +static int st7565p_setcolreg(u_int regno, u_int red, u_int green, u_int blue, + u_int transp, struct fb_info *info) +{ + if (regno >= 256) /* no. of hw registers */ + return 1; + /* + * Program hardware... do anything you want with transp + */ + + /* grayscale works only partially under directcolor */ + if (info->var.grayscale) { + /* grayscale = 0.30*R + 0.59*G + 0.11*B */ + red = green = blue = + (red * 77 + green * 151 + blue * 28) >> 8; + } + + /* Directcolor: + * var->{color}.offset contains start of bitfield + * var->{color}.length contains length of bitfield + * {hardwarespecific} contains width of RAMDAC + * cmap[X] is programmed to (X << red.offset) | (X << green.offset) | (X << blue.offset) + * RAMDAC[X] is programmed to (red, green, blue) + * + * Pseudocolor: + * uses offset = 0 && length = RAMDAC register width. + * var->{color}.offset is 0 + * var->{color}.length contains widht of DAC + * cmap is not used + * RAMDAC[X] is programmed to (red, green, blue) + * Truecolor: + * does not use DAC. Usually 3 are present. + * var->{color}.offset contains start of bitfield + * var->{color}.length contains length of bitfield + * cmap is programmed to (red << red.offset) | (green << green.offset) | + * (blue << blue.offset) | (transp << transp.offset) + * RAMDAC does not exist + */ +#define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16) + switch (info->fix.visual) { + case FB_VISUAL_TRUECOLOR: + case FB_VISUAL_PSEUDOCOLOR: + red = CNVT_TOHW(red, info->var.red.length); + green = CNVT_TOHW(green, info->var.green.length); + blue = CNVT_TOHW(blue, info->var.blue.length); + transp = CNVT_TOHW(transp, info->var.transp.length); + break; + case FB_VISUAL_DIRECTCOLOR: + red = CNVT_TOHW(red, 8); /* expect 8 bit DAC */ + green = CNVT_TOHW(green, 8); + blue = CNVT_TOHW(blue, 8); + /* hey, there is bug in transp handling... */ + transp = CNVT_TOHW(transp, 8); + break; + } +#undef CNVT_TOHW + /* Truecolor has hardware independent palette */ + if (info->fix.visual == FB_VISUAL_TRUECOLOR) { + u32 v; + + if (regno >= 16) + return 1; + + v = (red << info->var.red.offset) | + (green << info->var.green.offset) | + (blue << info->var.blue.offset) | + (transp << info->var.transp.offset); + switch (info->var.bits_per_pixel) { + case 8: + break; + case 16: + ((u32 *) (info->pseudo_palette))[regno] = v; + break; + case 24: + case 32: + ((u32 *) (info->pseudo_palette))[regno] = v; + break; + } + return 0; + } + return 0; +} + + /* + * Most drivers don't need their own mmap function + */ + +static int st7565p_mmap(struct fb_info *info, + struct vm_area_struct *vma) +{ + unsigned long start = vma->vm_start; + unsigned long size = vma->vm_end - vma->vm_start; + unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; + unsigned long page, pos; + + if (offset + size > info->fix.smem_len) { + return -EINVAL; + } + + pos = (unsigned long)info->fix.smem_start + offset; + + while (size > 0) { + page = vmalloc_to_pfn((void *)pos); + if (remap_pfn_range(vma, start, page, PAGE_SIZE, PAGE_SHARED)) { + return -EAGAIN; + } + start += PAGE_SIZE; + pos += PAGE_SIZE; + if (size > PAGE_SIZE) + size -= PAGE_SIZE; + else + size = 0; + } + + vma->vm_flags |= (VM_DONTEXPAND | VM_DONTDUMP); /* avoid to swap out this VMA */ + return 0; + +} + +#ifndef MODULE +static int __init st7565p_setup(char *options) +{ + char *this_opt; + + if (!options || !*options) + return 1; + + while ((this_opt = strsep(&options, ",")) != NULL) { + if (!*this_opt) + continue; + } + return 1; +} +#endif /* MODULE */ + + /* + * Initialisation + */ + +static int __init st7565p_probe(struct platform_device *dev) +{ + struct fb_info *info; + int retval = -ENOMEM; + + /* + * For real video cards we use ioremap. + */ + if (!(videomemory = rvmalloc(videomemorysize))) + return retval; + + /* + * ST7565P must clear memory to prevent kernel info + * leakage into userspace + * VGA-based drivers MUST NOT clear memory if + * they want to be able to take over vgacon + */ + memset(videomemory, 0, videomemorysize); + + info = framebuffer_alloc(sizeof(u32) * 256, &dev->dev); + if (!info) + goto err; + + info->screen_base = (char __iomem *)videomemory; + info->fbops = &st7565p_ops; + + retval = fb_find_mode(&info->var, info, NULL, + NULL, 0, NULL, 8); + + if (!retval || (retval == 4)) + info->var = st7565p_default; + st7565p_fix.smem_start = (unsigned long) videomemory; + st7565p_fix.smem_len = videomemorysize; + info->fix = st7565p_fix; + info->pseudo_palette = info->par; + info->par = NULL; + info->flags = FBINFO_FLAG_DEFAULT; + + retval = fb_alloc_cmap(&info->cmap, 256, 0); + if (retval < 0) + goto err1; + + retval = register_framebuffer(info); + if (retval < 0) + goto err2; + platform_set_drvdata(dev, info); + + printk(KERN_INFO + "fb%d: Virtual frame buffer device, using %ldK of video memory\n", + info->node, videomemorysize >> 10); + return 0; +err2: + fb_dealloc_cmap(&info->cmap); +err1: + framebuffer_release(info); +err: + rvfree(videomemory, videomemorysize); + return retval; +} + +static int st7565p_remove(struct platform_device *dev) +{ + struct fb_info *info = platform_get_drvdata(dev); + + if (info) { + unregister_framebuffer(info); + rvfree(videomemory, videomemorysize); + framebuffer_release(info); + } + return 0; +} + +static struct platform_driver st7565p_driver = { + .probe = st7565p_probe, + .remove = st7565p_remove, + .driver = { + .name = "st7565p", + }, +}; + +static struct platform_device *st7565p_device; + +static int __init st7565p_init(void) +{ + int ret = 0; + +#ifndef MODULE + char *option = NULL; + + if (fb_get_options("st7565p", &option)) + return -ENODEV; + st7565p_setup(option); +#endif + + ret = platform_driver_register(&st7565p_driver); + + if (!ret) { + st7565p_device = platform_device_alloc("st7565p", 0); + + if (st7565p_device) + ret = platform_device_add(st7565p_device); + else + ret = -ENOMEM; + + if (ret) { + platform_device_put(st7565p_device); + platform_driver_unregister(&st7565p_driver); + } + } + + return ret; +} + +module_init(st7565p_init); + +#ifdef MODULE +static void __exit st7565p_exit(void) +{ + platform_device_unregister(st7565p_device); + platform_driver_unregister(&st7565p_driver); +} + +module_exit(st7565p_exit); + +MODULE_LICENSE("GPL"); +#endif /* MODULE */ From af8213d7d1df8d6e3ce3e17f9d158d233eec02ca Mon Sep 17 00:00:00 2001 From: Kris Bahnsen Date: Tue, 8 Mar 2022 13:42:55 -0800 Subject: [PATCH 2/3] ARM: dts: imx6ul: Add TS-7553-V2 support Add initial support of the i.MX6UL based TS-7553-V2 platform. Signed-off-by: Kris Bahnsen --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6ul-ts7553v2.dts | 692 ++++++++++++++++++++++++++ 2 files changed, 693 insertions(+) create mode 100644 arch/arm/boot/dts/imx6ul-ts7553v2.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a293eb667a974..2e81b79d622e2 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -628,6 +628,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ul-pico-hobbit.dtb \ imx6ul-pico-pi.dtb \ imx6ul-phytec-segin-ff-rdk-nand.dtb \ + imx6ul-ts7553v2.dtb \ imx6ul-tx6ul-0010.dtb \ imx6ul-tx6ul-0011.dtb \ imx6ul-tx6ul-mainboard.dtb \ diff --git a/arch/arm/boot/dts/imx6ul-ts7553v2.dts b/arch/arm/boot/dts/imx6ul-ts7553v2.dts new file mode 100644 index 0000000000000..f49ce18e39921 --- /dev/null +++ b/arch/arm/boot/dts/imx6ul-ts7553v2.dts @@ -0,0 +1,692 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 +/* + * Copyright (C) 2023 Technologic Systems, Inc. dba embeddedTS + */ + +/dts-v1/; +#include +#include +#include "imx6ul.dtsi" + +/ { + model = "embeddedTS i.MX6UL TS-7553-V2"; + compatible = "technologic,ts7553v2", "fsl,imx6ul"; + + chosen { + stdout-path = &uart1; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0>; /* will be filled by U-Boot */ + }; + + led-controller { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + led-0 { + color = ; + function = LED_FUNCTION_POWER; + gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + + led-1 { + color = ; + function = LED_FUNCTION_INDICATOR; + gpios = <&gpio4 19 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>; + + /* + * The keypad may be oriented in one of two ways (depending on + * how the HMI enclosure is rotated when mounted) resulting + * in the swapping of left/right and up/down. The following + * keycodes assume the unit is mounted with the keypad above + * the LCD. With a wall mount of the HMI enclosure, this would + * put the TS-7553-V2 I/O connectors pointing toward the ground. + */ + key-0 { + label = "GPIO Key RIGHT"; + gpios = <&gpio4 21 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <20>; + wakeup-source; + }; + + key-1 { + label = "GPIO Key DOWN"; + gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <20>; + wakeup-source; + }; + + key-2 { + label = "GPIO Key UP"; + gpios = <&gpio4 23 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <20>; + wakeup-source; + }; + + key-3 { + label = "GPIO Key LEFT"; + gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <20>; + wakeup-source; + }; + }; + + reg_sd1_vmmc: regulator-sd1-vmmc { + compatible = "regulator-fixed"; + regulator-name = "SD1_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_enet_phy_3v3: regulator-phy { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet_3v3>; + regulator-name = "ENET_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 10 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_flexcan_3v3: regulator-can-3v3 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan_3v3>; + regulator-name = "CAN_EN"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio5 9 GPIO_ACTIVE_LOW>; + }; + + i2c_gpio: i2c { + compatible = "i2c-gpio"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2cgpio>; + sda-gpios = <&gpio5 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio5 4 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + + mpu9250a: imu@68 { + compatible = "invensense,mpu9250"; + reg = <0x68>; + interrupt-parent = <&gpio3>; + interrupts = <1 IRQ_TYPE_EDGE_RISING>; + i2c-gate { + #address-cells = <1>; + #size-cells = <0>; + magnetometer@c { + compatible = "asahi-kasei,ak8975"; + reg = <0xc>; + }; + }; + }; + }; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_flexcan_3v3>; + status = "okay"; +}; + +&can2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + xceiver-supply = <®_flexcan_3v3>; + status = "okay"; +}; + +&ecspi3 { + num-cs = <3>; + cs-gpios = <&gpio4 12 GPIO_ACTIVE_LOW + &gpio2 15 GPIO_ACTIVE_LOW + &gpio5 6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + status = "okay"; + + /* CS# 0 is SPI LCD interface */ + spidevlcd: spi@0 { + compatible = "spidev"; + reg = <0>; + spi-max-frequency = <5000000>; + }; + + /* CS# 1 is HD1 pin header SPI interface */ + hd1_spidev: spidev@1 { + compatible = "spidev"; + reg = <1>; + }; + + fm25l16b: eeprom@2 { + compatible = "atmel,at25"; + reg = <2>; + spi-max-frequency = <20000000>; + size = <0x800>; + address-width = <16>; + pagesize = <64>; + }; +}; + +&ecspi4 { + num-cs = <1>; + cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi4>; + status = "okay"; + + wilc: wifi@0 { + compatible = "microchip,wilc3000"; + reg = <0>; + spi-max-frequency = <18000000>; + reset-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; + chip_en-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; + interrupt-parent = <&gpio5>; + interrupts = <1 GPIO_ACTIVE_HIGH>; + }; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + phy-supply = <®_enet_phy_3v3>; + /* These are needed in 5.10 and should probably go away upstream */ + phy-reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + status = "okay"; + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <2>; + micrel,led-mode = <1>; + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; + /* The above reset stuff should be replaced with these + * reset-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + * reset-assert-us = <10000>; + * reset-deassert-us = <100>; + */ + }; + }; +}; + +&gpio1 { + gpio-line-names = "", "USB_5V_EN", "", "", "", "", "", "", + "MODEM_5V_EN", "XBEE_3V3_EN", "", "", "", "", "", "", "", "", + "", "", "", "", "", "RS232_XCEIVER_EN"; +}; + +&gpio2 { + gpio-line-names = "", "", "", "", "", "", "", "", + "XBEE_PIN_9", "XBEE_PIN_16", "", "", "", "", + "XBEE_PIN_12"; + + /* + * Let the main 5 V reg automatically switch between PWM and PFM modes. + * This saves ~60 mW of power across various states at 12 V input. + * Note that PFM mode could cause issues with fast transients, PWM mode + * doesn't kick in until ~700 mA consumption on the regulator. Setting + * this to output-high; will force PWM mode + */ + vreg-mode-hog { + gpio-hog; + gpios = <13 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "VREG_MODE"; + }; +}; + +&gpio3 { + gpio-line-names = "USB_HUB_RESET#", "", "", "", "", "", "", + "USB_MUX_CPU_OTG", "", "", "", "NO_CHRG_JMP#", "", "", "", "", + "", "SD_BOOT_JMP#", "PUSH_SW_CPU#", "U_BOOT_JMP#", "XBEE_RESET#", + "", "", "RES_STRAP_0", "RES_STRAP_1", "", "", + "RES_STRAP_2", "RES-STRAP_3"; +}; + +&gpio5 { + gpio-line-names = "POWER_FAIL#", "", "EMMC_PWR_EN", "", "", "", "", + "XBEE_USB_EN#", "RELAY_EN"; + + vdd-soc-in-v-hog { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "VDD_SOC_IN_V"; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clock-frequency = <400000>; + status = "okay"; + + m41t00s: rtc@68 { + compatible = "st,m41t00"; + reg = <0x68>; + }; +}; + +&i2c3 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_hog: hoggrp { + fsl,pins = < + /* Reserved signals */ + MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x1b020 + MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO12 0x1a020 + MX6UL_PAD_LCD_DATA03__GPIO3_IO08 0x1a020 + MX6UL_PAD_LCD_DATA04__GPIO3_IO09 0x1a020 + MX6UL_PAD_LCD_DATA05__GPIO3_IO10 0x1a020 + MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x13020 + MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x1b020 + MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x1b020 + MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x1b020 + MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x1b020 + MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x1a020 + MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15 0x1b020 + + + /* Has hardware pull resistor */ + MX6UL_PAD_LCD_DATA14__GPIO3_IO19 0x1a020 /* U_BOOT_JMP#_ */ + MX6UL_PAD_LCD_DATA06__GPIO3_IO11 0x1a020 /* NO_CHRG_JMP# */ + MX6UL_PAD_LCD_DATA12__GPIO3_IO17 0x1a020 /* SD_BOOT_JMP# */ + MX6UL_PAD_LCD_DATA02__GPIO3_IO07 0x1a020 /* 6UL_TO_USB_DEV */ + MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x1a020 /* MODEM 5 v */ + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x1a020 /* XBee 3.3 v */ + MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1a020 /* eMMC En. */ + MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x1b0a0 + + /* Needs internal pull resistor */ + MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x1b020 /* RES_STRAP_0 */ + MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x1b020 /* RES_STRAP_1 */ + MX6UL_PAD_LCD_DATA22__GPIO3_IO27 0x1b020 /* RES_STRAP_2 */ + MX6UL_PAD_LCD_DATA23__GPIO3_IO28 0x1b020 /* RES_STRAP_3 */ + MX6UL_PAD_LCD_DATA15__GPIO3_IO20 0x1b020 /* XBEE_RESET# */ + MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x1b020 /* XBEE_USB_EN# */ + MX6UL_PAD_ENET2_TX_CLK__GPIO2_IO14 0x1b020 /* XBEE_DIO_8 */ + MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x1b020 /* XBEE_DIO_7 */ + MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x1b020 /* XBEE_DIO_6 */ + MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x1a020 /* RELAY_EN */ + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x1b020 /* USB 5v EN */ + MX6UL_PAD_LCD_CLK__GPIO3_IO00 0x1b020 /* USB_HUB_RESET# */ + MX6UL_PAD_ENET2_TX_DATA0__REF_CLK_24M 0x1b020 /* USB hub */ + MX6UL_PAD_LCD_DATA13__GPIO3_IO18 0x1a020 /* PUSH_SW_CPU# */ + MX6UL_PAD_UART2_RTS_B__GPIO1_IO23 0x1b020 /* 232_TRANS_EN */ + MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b020 /* POWER_FAIL */ + >; + }; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX6UL_PAD_CSI_DATA04__GPIO4_IO25 0x1b020 /* LCD_BKLT */ + MX6UL_PAD_NAND_WP_B__GPIO4_IO11 0x1b020 /* LCD_RESET# */ + MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x1b020 /* LCD_CMD# */ + MX6UL_PAD_NAND_CE0_B__ECSPI3_SCLK 0x1b020 /* SPI_3_CLK */ + MX6UL_PAD_NAND_CE1_B__ECSPI3_MOSI 0x1b020 /* SPI_3_MOSI */ + MX6UL_PAD_NAND_CLE__ECSPI3_MISO 0x1b820 /* SPI_3_MISO */ + MX6UL_PAD_NAND_READY_B__GPIO4_IO12 0x1b020 /* LCD CS0# */ + MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b020 /* HD1 CS1# */ + MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x1b020 /* FRAM CS2# */ + >; + }; + + pinctrl_ecspi4: ecspi4grp { + fsl,pins = < + MX6UL_PAD_NAND_DATA04__ECSPI4_SCLK 0x1b020 + MX6UL_PAD_NAND_DATA05__ECSPI4_MOSI 0x1b020 + MX6UL_PAD_NAND_DATA06__ECSPI4_MISO 0x1b020 + MX6UL_PAD_NAND_DATA07__GPIO4_IO09 0x1b020 /* WIFI CS# */ + MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x1b020 /* WIFI IRQ# */ + MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x1b020 /* WIFI RST# */ + MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x1b020 /* WIFI EN */ + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0 + MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + /* Should be 0x4001b010 or 0x4001b000 for noise */ + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b010 + >; + }; + + pinctrl_enet_3v3: enet3v3grp { + fsl,pins = < + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x1b0b0 + >; + }; + + pinctrl_flexcan1: flexcan1grp{ + fsl,pins = < + MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX 0x1b020 + MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX 0x1b020 + >; + }; + + pinctrl_flexcan2: flexcan2grp{ + fsl,pins = < + MX6UL_PAD_LCD_DATA10__FLEXCAN2_TX 0x1b020 + MX6UL_PAD_LCD_DATA11__FLEXCAN2_RX 0x1b020 + >; + }; + + pinctrl_flexcan_3v3: flexcan3v3grp { + fsl,pins = < + MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b020 /* CAN En. */ + >; + }; + + pinctrl_gpio_keys: gpiokeysgrp { + fsl,pins = < + MX6UL_PAD_CSI_DATA00__GPIO4_IO21 0x1a020 /* Right */ + MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x1a020 /* Down */ + MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x1a020 /* Up */ + MX6UL_PAD_CSI_DATA03__GPIO4_IO24 0x1a020 /* Left */ + >; + }; + + pinctrl_gpio_leds: gpioledgrp { + fsl,pins = < + MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b020 /* Red LED */ + MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b020 /* Grn LED */ + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO02__I2C1_SCL 0x4001a8b0 + MX6UL_PAD_GPIO1_IO03__I2C1_SDA 0x4001a8b0 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA01__I2C3_SCL 0x4001a8b0 + MX6UL_PAD_LCD_DATA00__I2C3_SDA 0x4001a8b0 + >; + }; + + pinctrl_i2cgpio: i2cgpiogrp { + fsl,pins = < + MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x4001a8b0 + MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x4001a8b0 + MX6UL_PAD_LCD_ENABLE__GPIO3_IO01 0x13020 /* IMU IRQ */ + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 + MX6UL_PAD_UART2_CTS_B__GPIO1_IO22 0x1b0b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1 + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 + MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1 + MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1 + MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1 + >; + }; + + pinctrl_uart5: uart5grp { + fsl,pins = < + MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x1b0b1 + MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1 + >; + }; + + pinctrl_uart6: uart6grp { + fsl,pins = < + MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x1b0b1 + MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b1 + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x1b0b1 + >; + }; + + pinctrl_uart7: uart7grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x1b0b1 + MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x1b0b1 + >; + }; + + pinctrl_uart8: uart8grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA21__UART8_DCE_RX 0x1b0b1 + MX6UL_PAD_LCD_DATA20__UART8_DCE_TX 0x1b0b1 + >; + }; + + pinctrl_usb_otg1_id: usbotg1idgrp { + /* Wired always high for device mode on TS-7553-V2 */ + fsl,pins = < + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x16059 + >; + }; + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + /* hysteresis, en 47k PU */ + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + MX6UL_PAD_LCD_DATA07__GPIO3_IO12 0x17059 /* EN_SD_POWER */ + MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + >; + }; + + pinctrl_wdog1: wdog1grp { + fsl,pins = < + MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0xb8b0 + >; + }; +}; + +/* Unused, enabled for backward compatibility with ts7553v2-utils */ +&snvs_pwrkey { + status = "okay"; +}; + +&snvs_rtc { + status = "disabled"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + /* + * Need to use GPIO for TXEN even though CTS is available on this port. + * All instances of the UART2 RTS signal have other uses therefore leaving + * the UART module RTS_B input unconnected which generates spurious IRQs. + * If the imx.c driver is ever adjusted to allow configuration of RTSDEN + * then it may be possible to use real CTS here if RTS IRQs are disabled. + */ + rts-gpios = <&gpio1 22 GPIO_ACTIVE_LOW>; + linux,rs485-enabled-at-boot-time; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5>; + status = "okay"; +}; + +&uart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6>; + cts-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; + rts-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&uart7 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart7>; + status = "okay"; +}; + +&uart8 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart8>; + status = "okay"; +}; + +&usbotg1 { + dr_mode = "peripheral"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_otg1_id>; + srp-disable; + hnp-disable; + adp-disable; + disable-over-current; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + disable-wp; + broken-cd; + vmmc-supply = <®_sd1_vmmc>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + no-1-8-v; + disable-wp; + broken-cd; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog1>; + fsl,ext-reset-output; +}; From 07e9f064d010a48d6644e2695f8ef391b465d534 Mon Sep 17 00:00:00 2001 From: Kris Bahnsen Date: Mon, 23 Jan 2023 18:04:20 -0700 Subject: [PATCH 3/3] ARM: ts_defconfig: Changes for TS-7553-V2 support Specifically adds IIO drivers, mono LCD driver, adds SNVS power key as a builtin for compatibility with `keypad-test` demo in ts7553v2-utils.git. The framebuffer console is needed for TPC platforms, it causes some issues in the TS-7553-V2 that will be resolved later. Also removes drivers that would never be used, moves a few from builtin to module, adds some other features/drivers in as a module for potential future support. Signed-off-by: Kris Bahnsen --- arch/arm/configs/ts_defconfig | 454 +++++++++++++++++++--------------- 1 file changed, 255 insertions(+), 199 deletions(-) diff --git a/arch/arm/configs/ts_defconfig b/arch/arm/configs/ts_defconfig index 0401c2d9950d0..1206ff503de1f 100644 --- a/arch/arm/configs/ts_defconfig +++ b/arch/arm/configs/ts_defconfig @@ -5,6 +5,8 @@ CONFIG_USELIB=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_PREEMPT=y +CONFIG_IKCONFIG=m +CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=18 CONFIG_CGROUPS=y CONFIG_MEMCG=y @@ -56,6 +58,8 @@ CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y CONFIG_ARM_IMX6Q_CPUFREQ=y CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_IDLE_GOV_TEO=y CONFIG_ARM_CPUIDLE=y CONFIG_ARM_PSCI_CPUIDLE=y CONFIG_VFP=y @@ -79,6 +83,8 @@ CONFIG_PACKET=y CONFIG_PACKET_DIAG=m CONFIG_UNIX=y CONFIG_UNIX_DIAG=m +CONFIG_TLS=m +CONFIG_TLS_DEVICE=y CONFIG_XFRM_USER=m CONFIG_XFRM_SUB_POLICY=y CONFIG_XFRM_STATISTICS=y @@ -134,6 +140,7 @@ CONFIG_IPV6_ILA=m CONFIG_IPV6_VTI=m CONFIG_IPV6_SIT=m CONFIG_IPV6_SIT_6RD=y +CONFIG_IPV6_GRE=m CONFIG_IPV6_MULTIPLE_TABLES=y CONFIG_IPV6_SUBTREES=y CONFIG_IPV6_MROUTE=y @@ -290,6 +297,26 @@ CONFIG_IP_NF_RAW=m CONFIG_IP_NF_ARPTABLES=m CONFIG_IP_NF_ARPFILTER=m CONFIG_IP_NF_ARP_MANGLE=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_RPFILTER=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_MATCH_SRH=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_TARGET_SYNPROXY=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_RAW=m +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +CONFIG_IP6_NF_TARGET_NPT=m CONFIG_DECNET_NF_GRABULATOR=m CONFIG_NF_TABLES_BRIDGE=m CONFIG_NFT_BRIDGE_META=m @@ -435,7 +462,10 @@ CONFIG_NET_NCSI=y CONFIG_CGROUP_NET_PRIO=y CONFIG_BPF_JIT=y CONFIG_CAN=y +CONFIG_CAN_J1939=m +CONFIG_CAN_ISOTP=m CONFIG_CAN_VCAN=m +CONFIG_CAN_VXCAN=m CONFIG_CAN_SLCAN=m CONFIG_CAN_FLEXCAN=y CONFIG_CAN_8DEV_USB=m @@ -444,24 +474,27 @@ CONFIG_CAN_ESD_USB2=m CONFIG_CAN_GS_USB=m CONFIG_CAN_KVASER_USB=m CONFIG_CAN_PEAK_USB=m +CONFIG_CAN_UCAN=m CONFIG_BT=m CONFIG_BT_RFCOMM=y CONFIG_BT_RFCOMM_TTY=y CONFIG_BT_BNEP=y CONFIG_BT_BNEP_MC_FILTER=y CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_CMTP=m CONFIG_BT_HIDP=y +CONFIG_BT_HS=y CONFIG_BT_6LOWPAN=m CONFIG_BT_LEDS=y CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIBTUSB_MTK=y CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_NOKIA=m CONFIG_BT_HCIUART_BCSP=y CONFIG_BT_HCIUART_ATH3K=y CONFIG_BT_HCIUART_LL=y -CONFIG_BT_HCIUART_3WIRE=y CONFIG_BT_HCIUART_INTEL=y CONFIG_BT_HCIUART_BCM=y +CONFIG_BT_HCIUART_RTL=y CONFIG_BT_HCIUART_QCA=y CONFIG_BT_HCIUART_AG6XX=y CONFIG_BT_HCIUART_MRVL=y @@ -472,10 +505,7 @@ CONFIG_BT_HCIVHCI=m CONFIG_BT_MRVL=m CONFIG_BT_ATH3K=m CONFIG_CFG80211=m -CONFIG_NL80211_TESTMODE=y -CONFIG_CFG80211_CERTIFICATION_ONUS=y -CONFIG_CFG80211_REG_CELLULAR_HINTS=y -CONFIG_CFG80211_REG_RELAX_NO_IR=y +# CONFIG_CFG80211_DEFAULT_PS is not set CONFIG_MAC80211=m CONFIG_MAC80211_MESH=y CONFIG_MAC80211_MESSAGE_TRACING=y @@ -491,9 +521,27 @@ CONFIG_NFC_NCI_SPI=m CONFIG_NFC_NCI_UART=m CONFIG_NFC_HCI=m CONFIG_NFC_SHDLC=y +CONFIG_NFC_TRF7970A=m +CONFIG_NFC_SIM=m CONFIG_NFC_PORT100=m +CONFIG_NFC_FDP=m +CONFIG_NFC_FDP_I2C=m +CONFIG_NFC_PN544_I2C=m CONFIG_NFC_PN533_USB=m +CONFIG_NFC_PN533_I2C=m +CONFIG_NFC_PN532_UART=m +CONFIG_NFC_MICROREAD_I2C=m CONFIG_NFC_MRVL_USB=m +CONFIG_NFC_MRVL_UART=m +CONFIG_NFC_MRVL_I2C=m +CONFIG_NFC_MRVL_SPI=m +CONFIG_NFC_ST21NFCA_I2C=m +CONFIG_NFC_ST_NCI_I2C=m +CONFIG_NFC_ST_NCI_SPI=m +CONFIG_NFC_NXP_NCI=m +CONFIG_NFC_NXP_NCI_I2C=m +CONFIG_NFC_S3FWRN5_I2C=m +CONFIG_NFC_ST95HF=m CONFIG_PCI=y CONFIG_PCI_MSI=y CONFIG_PCI_IMX6=y @@ -505,23 +553,27 @@ CONFIG_EXTRA_FIRMWARE_DIR="firmware" CONFIG_FW_LOADER_USER_HELPER=y CONFIG_IMX_WEIM=y CONFIG_CONNECTOR=y -CONFIG_MTD=y -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_OF_PARTS=m -CONFIG_MTD_BLOCK=y -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_DATAFLASH=y -CONFIG_MTD_SST25L=y -CONFIG_MTD_SPI_NOR=y +CONFIG_GNSS=m +CONFIG_GNSS_MTK_SERIAL=m +CONFIG_GNSS_SIRF_SERIAL=m +CONFIG_GNSS_UBX_SERIAL=m +CONFIG_MTD=m +CONFIG_MTD_CMDLINE_PARTS=m +CONFIG_MTD_BLOCK=m +CONFIG_MTD_CFI=m +CONFIG_MTD_JEDECPROBE=m +CONFIG_MTD_CFI_INTELEXT=m +CONFIG_MTD_CFI_AMDSTD=m +CONFIG_MTD_CFI_STAA=m +CONFIG_MTD_DATAFLASH=m +CONFIG_MTD_MCHP23K256=m +CONFIG_MTD_SST25L=m +CONFIG_MTD_SPI_NOR=m +CONFIG_OF_OVERLAY=y CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_NBD=y +CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=65536 -CONFIG_CDROM_PKTCDVD=m CONFIG_ATA_OVER_ETH=m CONFIG_BLK_DEV_NVME=m CONFIG_NVME_TARGET=m @@ -536,7 +588,6 @@ CONFIG_BLK_DEV_SD=y CONFIG_CHR_DEV_ST=m CONFIG_BLK_DEV_SR=m CONFIG_CHR_DEV_SG=m -CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y CONFIG_SCSI_FC_ATTRS=m @@ -573,9 +624,15 @@ CONFIG_DM_LOG_WRITES=m CONFIG_NETDEVICES=y CONFIG_BONDING=m CONFIG_DUMMY=m +CONFIG_WIREGUARD=m CONFIG_EQUALIZER=m CONFIG_IFB=m CONFIG_NET_TEAM=m +CONFIG_NET_TEAM_MODE_BROADCAST=m +CONFIG_NET_TEAM_MODE_ROUNDROBIN=m +CONFIG_NET_TEAM_MODE_RANDOM=m +CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m +CONFIG_NET_TEAM_MODE_LOADBALANCE=m CONFIG_MACVLAN=m CONFIG_MACVTAP=m CONFIG_IPVLAN=m @@ -589,56 +646,99 @@ CONFIG_TUN=m CONFIG_VETH=m CONFIG_NLMON=m CONFIG_NET_VRF=m -CONFIG_ARCNET=m -CONFIG_ARCNET_1201=m -CONFIG_ARCNET_1051=m -CONFIG_ARCNET_RAW=m -CONFIG_ARCNET_CAP=m -CONFIG_ARCNET_COM90xx=m -CONFIG_ARCNET_COM90xxIO=m -CONFIG_ARCNET_RIM_I=m -CONFIG_ARCNET_COM20020=m -CONFIG_ATM_TCP=m +# CONFIG_ATM_DRIVERS is not set CONFIG_NET_DSA_MV88E6060=m CONFIG_NET_DSA_MV88E6XXX=m # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_ADAPTEC is not set # CONFIG_NET_VENDOR_AGERE is not set +# CONFIG_NET_VENDOR_ALACRITECH is not set # CONFIG_NET_VENDOR_ALTEON is not set +# CONFIG_NET_VENDOR_AMAZON is not set # CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set # CONFIG_NET_VENDOR_ARC is not set CONFIG_ATL2=m CONFIG_ATL1=m CONFIG_ATL1E=m CONFIG_ATL1C=m CONFIG_ALX=m +# CONFIG_NET_VENDOR_AURORA is not set # CONFIG_NET_VENDOR_BROADCOM is not set -CONFIG_CS89x0=y -CONFIG_CS89x0_PLATFORM=y +# CONFIG_NET_VENDOR_BROCADE is not set +# CONFIG_NET_VENDOR_CADENCE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CHELSIO is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_CISCO is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_NET_VENDOR_DEC is not set +# CONFIG_NET_VENDOR_DLINK is not set +# CONFIG_NET_VENDOR_EMULEX is not set +# CONFIG_NET_VENDOR_EZCHIP is not set # CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_GOOGLE is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_I825XX is not set CONFIG_IGB=y # CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set # CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_MICROCHIP is not set +CONFIG_LAN743X=m +# CONFIG_NET_VENDOR_MICROSEMI is not set +# CONFIG_NET_VENDOR_MYRI is not set # CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETERION is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_NI is not set +# CONFIG_NET_VENDOR_NVIDIA is not set +# CONFIG_NET_VENDOR_OKI is not set +CONFIG_ETHOC=m +# CONFIG_NET_VENDOR_PACKET_ENGINES is not set +# CONFIG_NET_VENDOR_PENSANDO is not set +# CONFIG_NET_VENDOR_QLOGIC is not set +CONFIG_QCA7000_SPI=m +CONFIG_QCA7000_UART=m +# CONFIG_NET_VENDOR_RDC is not set CONFIG_8139CP=m CONFIG_8139TOO=m CONFIG_R8169=m +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set # CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SILAN is not set +# CONFIG_NET_VENDOR_SIS is not set CONFIG_SMC91X=m CONFIG_EPIC100=m CONFIG_SMC911X=m CONFIG_SMSC911X=m CONFIG_SMSC9420=m +# CONFIG_NET_VENDOR_SOCIONEXT is not set # CONFIG_NET_VENDOR_STMICRO is not set -CONFIG_TLAN=m +# CONFIG_NET_VENDOR_SUN is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_TEHUTI is not set +# CONFIG_NET_VENDOR_TI is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_XILINX_AXI_EMAC=m +CONFIG_XILINX_LL_TEMAC=m CONFIG_FDDI=m CONFIG_DEFXX=m CONFIG_SKFP=m CONFIG_MICREL_PHY=y +CONFIG_MICROCHIP_PHY=y +CONFIG_REALTEK_PHY=y +CONFIG_SMSC_PHY=y +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_GPIO=y CONFIG_PPP=m CONFIG_PPP_BSDCOMP=m CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y CONFIG_PPP_MPPE=m CONFIG_PPPOATM=m CONFIG_PPPOE=m @@ -678,8 +778,11 @@ CONFIG_USB_IPHETH=m CONFIG_USB_SIERRA_NET=m CONFIG_USB_VL600=m CONFIG_USB_NET_CH9200=m +# CONFIG_WLAN_VENDOR_ADMTEK is not set CONFIG_ATH5K=m CONFIG_ATH9K=m +# CONFIG_ATH9K_PCOEM is not set +CONFIG_ATH9K_PCI_NO_EEPROM=m CONFIG_ATH9K_HTC=m CONFIG_CARL9170=m CONFIG_ATH6KL=m @@ -698,6 +801,7 @@ CONFIG_BRCMSMAC=m CONFIG_BRCMFMAC=m CONFIG_BRCMFMAC_USB=y CONFIG_BRCMFMAC_PCIE=y +# CONFIG_WLAN_VENDOR_CISCO is not set CONFIG_IPW2100=m CONFIG_IPW2100_MONITOR=y CONFIG_IPW2200=m @@ -735,6 +839,7 @@ CONFIG_MWIFIEX_PCIE=m CONFIG_MWIFIEX_USB=m CONFIG_MWL8K=m CONFIG_MT7601U=m +# CONFIG_WLAN_VENDOR_MICROCHIP is not set CONFIG_RT2X00=m CONFIG_RT2400PCI=m CONFIG_RT2500PCI=m @@ -756,58 +861,32 @@ CONFIG_WLCORE_SDIO=m # CONFIG_WILINK_PLATFORM_DATA is not set CONFIG_USB_ZD1201=m CONFIG_ZD1211RW=m -CONFIG_MAC80211_HWSIM=m CONFIG_USB_NET_RNDIS_WLAN=m -CONFIG_WAN=y -CONFIG_HDLC=m -CONFIG_HDLC_RAW=m -CONFIG_HDLC_RAW_ETH=m -CONFIG_HDLC_CISCO=m -CONFIG_HDLC_FR=m -CONFIG_HDLC_PPP=m -CONFIG_HDLC_X25=m -CONFIG_PCI200SYN=m -CONFIG_WANXL=m -CONFIG_PC300TOO=m -CONFIG_FARSYNC=m -CONFIG_SLIC_DS26522=m -CONFIG_DLCI=m -CONFIG_LAPBETHER=m -CONFIG_X25_ASY=m CONFIG_IEEE802154_FAKELB=m CONFIG_IEEE802154_AT86RF230=m CONFIG_IEEE802154_MRF24J40=m CONFIG_IEEE802154_CC2520=m CONFIG_IEEE802154_ATUSB=m CONFIG_IEEE802154_ADF7242=m -CONFIG_ISDN=y -CONFIG_MISDN=m -CONFIG_MISDN_DSP=m -CONFIG_MISDN_L1OIP=m -CONFIG_MISDN_HFCPCI=m -CONFIG_MISDN_HFCMULTI=m -CONFIG_MISDN_HFCUSB=m -CONFIG_MISDN_AVMFRITZ=m -CONFIG_MISDN_SPEEDFAX=m -CONFIG_MISDN_INFINEON=m -CONFIG_MISDN_W6692=m -CONFIG_MISDN_NETJET=m -CONFIG_INPUT_SPARSEKMAP=m -CONFIG_INPUT_MATRIXKMAP=y -CONFIG_INPUT_MOUSEDEV=m CONFIG_INPUT_JOYDEV=m CONFIG_INPUT_EVDEV=y -CONFIG_KEYBOARD_GPIO=y +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=m CONFIG_KEYBOARD_GPIO_POLLED=m +CONFIG_KEYBOARD_MATRIX=m +CONFIG_KEYBOARD_SNVS_PWRKEY=y +CONFIG_KEYBOARD_IMX=m # CONFIG_MOUSE_PS2 is not set CONFIG_MOUSE_SERIAL=m CONFIG_MOUSE_APPLETOUCH=m CONFIG_MOUSE_BCM5974=m CONFIG_MOUSE_GPIO=m +CONFIG_MOUSE_SYNAPTICS_I2C=m CONFIG_MOUSE_SYNAPTICS_USB=m CONFIG_INPUT_JOYSTICK=y CONFIG_JOYSTICK_ANALOG=m CONFIG_JOYSTICK_A3D=m +CONFIG_JOYSTICK_ADC=m CONFIG_JOYSTICK_ADI=m CONFIG_JOYSTICK_COBRA=m CONFIG_JOYSTICK_GF2K=m @@ -832,6 +911,10 @@ CONFIG_JOYSTICK_JOYDUMP=m CONFIG_JOYSTICK_XPAD=m CONFIG_JOYSTICK_XPAD_FF=y CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_JOYSTICK_PSXPAD_SPI=m +CONFIG_JOYSTICK_PSXPAD_SPI_FF=y +CONFIG_JOYSTICK_PXRC=m +CONFIG_JOYSTICK_FSIA6B=m CONFIG_INPUT_TABLET=y CONFIG_TABLET_USB_ACECAD=m CONFIG_TABLET_USB_AIPTEK=m @@ -841,14 +924,24 @@ CONFIG_TABLET_USB_KBTAB=m CONFIG_TABLET_USB_PEGASUS=m CONFIG_TABLET_SERIAL_WACOM4=m CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_TOUCHSCREEN_ADS7846=y -CONFIG_TOUCHSCREEN_TSC2004=y -CONFIG_TOUCHSCREEN_TSC2005=y -CONFIG_TOUCHSCREEN_TSC2007=y +CONFIG_TOUCHSCREEN_ADS7846=m +CONFIG_TOUCHSCREEN_ADC=m +CONFIG_TOUCHSCREEN_PIXCIR=m +CONFIG_TOUCHSCREEN_TSC2004=m +CONFIG_TOUCHSCREEN_TSC2005=m +CONFIG_TOUCHSCREEN_TSC2007=m +CONFIG_TOUCHSCREEN_TSC2007_IIO=y CONFIG_INPUT_MISC=y +CONFIG_INPUT_MMA8450=m CONFIG_SERIO_SERPORT=m # CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_MAX3100_TS=y +CONFIG_SERIAL_8250=m +# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set +# CONFIG_SERIAL_8250_16550A_VARIANTS is not set +CONFIG_SERIAL_8250_NR_UARTS=24 +CONFIG_SERIAL_8250_RUNTIME_UARTS=24 +CONFIG_SERIAL_OF_PLATFORM=m +CONFIG_SERIAL_MAX3100_TS=m CONFIG_SERIAL_IMX=y CONFIG_SERIAL_IMX_CONSOLE=y CONFIG_SERIAL_FSL_LPUART=y @@ -856,7 +949,6 @@ CONFIG_SERIAL_FSL_LPUART_CONSOLE=y CONFIG_SERIAL_DEV_BUS=y # CONFIG_I2C_COMPAT is not set CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MUX=y CONFIG_I2C_MUX_GPIO=y CONFIG_I2C_MUX_PINCTRL=y CONFIG_I2C_MUX_REG=y @@ -866,6 +958,7 @@ CONFIG_I2C_ALGOPCF=m CONFIG_I2C_ALGOPCA=m CONFIG_I2C_GPIO=y CONFIG_I2C_IMX=y +CONFIG_I2C_OCORES=m CONFIG_SPI=y CONFIG_SPI_FSL_QUADSPI=y CONFIG_SPI_GPIO=y @@ -881,9 +974,11 @@ CONFIG_GPIO_MAX732X=m CONFIG_GPIO_PCA953X=m CONFIG_GPIO_PCF857X=m CONFIG_GPIO_TS4900=y +CONFIG_GPIO_74X164=m CONFIG_GPIO_PISOSR=m CONFIG_W1=m CONFIG_W1_MASTER_DS2490=m +CONFIG_W1_MASTER_MXC=m CONFIG_W1_MASTER_GPIO=m CONFIG_W1_SLAVE_THERM=m CONFIG_W1_SLAVE_SMEM=m @@ -896,37 +991,24 @@ CONFIG_W1_SLAVE_DS2433=m CONFIG_W1_SLAVE_DS2780=m CONFIG_W1_SLAVE_DS2781=m CONFIG_W1_SLAVE_DS28E04=m +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON_POWEROFF=y CONFIG_THERMAL_STATISTICS=y CONFIG_THERMAL_WRITABLE_TRIPS=y CONFIG_CPU_THERMAL=y CONFIG_IMX_THERMAL=y CONFIG_WATCHDOG=y -CONFIG_RN5T618_WATCHDOG=y CONFIG_IMX2_WDT=y -CONFIG_MFD_DA9052_I2C=y -CONFIG_MFD_DA9062=y -CONFIG_MFD_DA9063=y -CONFIG_MFD_MC13XXX_SPI=y -CONFIG_MFD_MC13XXX_I2C=y -CONFIG_MFD_RN5T618=y -CONFIG_MFD_STMPE=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_ANATOP=y -CONFIG_REGULATOR_DA9052=y -CONFIG_REGULATOR_DA9062=y -CONFIG_REGULATOR_DA9063=y CONFIG_REGULATOR_GPIO=y -CONFIG_REGULATOR_MC13783=y -CONFIG_REGULATOR_MC13892=y -CONFIG_REGULATOR_PFUZE100=y -CONFIG_REGULATOR_RN5T618=y -CONFIG_RC_CORE=y -CONFIG_RC_MAP=m +CONFIG_RC_CORE=m CONFIG_RC_DEVICES=y CONFIG_RC_ATI_REMOTE=m CONFIG_IR_HIX5HD2=m CONFIG_IR_IMON=m +CONFIG_IR_IMON_RAW=m CONFIG_IR_MCEUSB=m CONFIG_IR_REDRAT3=m CONFIG_IR_STREAMZAP=m @@ -935,9 +1017,16 @@ CONFIG_IR_IGUANA=m CONFIG_IR_TTUSBIR=m CONFIG_RC_LOOPBACK=m CONFIG_IR_GPIO_CIR=m +CONFIG_IR_SERIAL=m +CONFIG_IR_SERIAL_TRANSMITTER=y +CONFIG_IR_SIR=m +CONFIG_RC_XBOX_DVD=m +CONFIG_IR_TOY=m CONFIG_MEDIA_SUPPORT=y -CONFIG_VIDEO_ADV_DEBUG=y -CONFIG_VIDEO_FIXED_MINOR_RANGES=y +CONFIG_MEDIA_SUBDRV_AUTOSELECT=y +CONFIG_VIDEO_DEV=m +# CONFIG_DVB_NET is not set +# CONFIG_DVB_DYNAMIC_MINORS is not set CONFIG_MEDIA_USB_SUPPORT=y CONFIG_USB_VIDEO_CLASS=m CONFIG_USB_M5602=m @@ -1040,9 +1129,11 @@ CONFIG_DVB_USB_AZ6007=m CONFIG_DVB_USB_CE6230=m CONFIG_DVB_USB_EC168=m CONFIG_DVB_USB_GL861=m +CONFIG_DVB_USB_LME2510=m CONFIG_DVB_USB_MXL111SF=m CONFIG_DVB_USB_RTL28XXU=m CONFIG_DVB_USB_DVBSKY=m +CONFIG_DVB_USB_ZD1301=m CONFIG_DVB_TTUSB_BUDGET=m CONFIG_DVB_TTUSB_DEC=m CONFIG_SMS_USB_DRV=m @@ -1055,75 +1146,69 @@ CONFIG_VIDEO_EM28XX_DVB=m CONFIG_USB_AIRSPY=m CONFIG_USB_HACKRF=m CONFIG_USB_MSI2500=m -CONFIG_MEDIA_PCI_SUPPORT=y -CONFIG_VIDEO_SOLO6X10=m -CONFIG_VIDEO_TW5864=m -CONFIG_VIDEO_TW68=m -CONFIG_VIDEO_TW686X=m -CONFIG_VIDEO_HEXIUM_GEMINI=m -CONFIG_VIDEO_HEXIUM_ORION=m -CONFIG_VIDEO_MXB=m -CONFIG_VIDEO_DT3155=m -CONFIG_VIDEO_CX25821=m -CONFIG_VIDEO_CX25821_ALSA=m -CONFIG_VIDEO_SAA7134=m -CONFIG_VIDEO_SAA7134_ALSA=m -CONFIG_VIDEO_SAA7134_DVB=m -CONFIG_VIDEO_SAA7134_GO7007=m -CONFIG_VIDEO_SAA7164=m -CONFIG_DVB_AV7110=m -CONFIG_DVB_BUDGET_CORE=m -CONFIG_DVB_BUDGET=m -CONFIG_DVB_BUDGET_AV=m -CONFIG_DVB_BUDGET_PATCH=m -CONFIG_DVB_B2C2_FLEXCOP_PCI=m -CONFIG_DVB_PLUTO2=m -CONFIG_DVB_PT1=m -CONFIG_DVB_PT3=m -CONFIG_DVB_NGENE=m -CONFIG_DVB_DDBRIDGE=m -CONFIG_DVB_NETUP_UNIDVB=m -CONFIG_RADIO_SI4713=m -CONFIG_USB_SI4713=m -CONFIG_PLATFORM_SI4713=m -CONFIG_USB_MR800=m -CONFIG_USB_DSBR=m -CONFIG_RADIO_MAXIRADIO=m -CONFIG_RADIO_SHARK=m -CONFIG_RADIO_SHARK2=m -CONFIG_USB_KEENE=m -CONFIG_USB_RAREMONO=m -CONFIG_USB_MA901=m -CONFIG_RADIO_TEA5764=m -CONFIG_RADIO_SAA7706H=m -CONFIG_RADIO_TEF6862=m +# CONFIG_RADIO_ADAPTERS is not set CONFIG_V4L_PLATFORM_DRIVERS=y -CONFIG_VIDEO_MUX=y +CONFIG_VIDEO_MUX=m CONFIG_V4L_MEM2MEM_DRIVERS=y CONFIG_VIDEO_CODA=m +CONFIG_VIDEO_IMX_PXP=m CONFIG_VIDEO_ADV7180=m CONFIG_VIDEO_OV2680=m CONFIG_VIDEO_OV5640=m CONFIG_VIDEO_OV5645=m +CONFIG_CXD2880_SPI_DRV=m +CONFIG_MEDIA_TUNER_MT2131=m +CONFIG_MEDIA_TUNER_M88RS6000T=m +CONFIG_MEDIA_TUNER_MXL301RF=m +CONFIG_MEDIA_TUNER_QM1D1B0004=m +CONFIG_DVB_STV0910=m +CONFIG_DVB_STV6111=m +CONFIG_DVB_MXL5XX=m +CONFIG_DVB_CX24110=m +CONFIG_DVB_ZL10036=m +CONFIG_DVB_TDA8261=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_TUA6100=m +CONFIG_DVB_CX24117=m +CONFIG_DVB_MB86A16=m +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_S5H1432=m +CONFIG_DVB_L64781=m +CONFIG_DVB_DIB9000=m +CONFIG_DVB_STV0367=m +CONFIG_DVB_CXD2880=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_OR51211=m +CONFIG_DVB_OR51132=m +CONFIG_DVB_MN88443X=m +CONFIG_DVB_LNBH25=m +CONFIG_DVB_LNBH29=m +CONFIG_DVB_ISL6405=m +CONFIG_DVB_LGS8GL5=m +CONFIG_DVB_TDA665x=m +CONFIG_DVB_HORUS3A=m +CONFIG_DVB_ASCOT2E=m +CONFIG_DVB_HELENE=m +CONFIG_DVB_CXD2099=m +# CONFIG_VGA_ARB is not set CONFIG_IMX_IPUV3_CORE=y CONFIG_DRM=y CONFIG_DRM_PANEL_LVDS=y CONFIG_DRM_PANEL_SIMPLE=y -CONFIG_DRM_PANEL_SEIKO_43WVF1G=y CONFIG_DRM_TI_TFP410=y CONFIG_DRM_DW_HDMI_AHB_AUDIO=m CONFIG_DRM_DW_HDMI_CEC=y CONFIG_DRM_IMX=y CONFIG_DRM_IMX_PARALLEL_DISPLAY=y -CONFIG_DRM_IMX_TVE=y CONFIG_DRM_IMX_LDB=y CONFIG_DRM_IMX_HDMI=y CONFIG_DRM_ETNAVIV=y CONFIG_DRM_MXSFB=y CONFIG_FB_MODE_HELPERS=y # CONFIG_FB_MX3 is not set +CONFIG_FB_ST7565P=m CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_L4F00242T03=y CONFIG_LCD_PLATFORM=y CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_PWM=y @@ -1131,8 +1216,9 @@ CONFIG_BACKLIGHT_GPIO=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_LOGO=y CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_HRTIMER=y +CONFIG_SND=m +CONFIG_SND_HRTIMER=m +# CONFIG_SND_PCI is not set CONFIG_SND_USB_AUDIO=m CONFIG_SND_USB_UA101=m CONFIG_SND_USB_CAIAQ=m @@ -1143,19 +1229,15 @@ CONFIG_SND_USB_POD=m CONFIG_SND_USB_PODHD=m CONFIG_SND_USB_TONEPORT=m CONFIG_SND_USB_VARIAX=m -CONFIG_SND_SOC=y -CONFIG_SND_IMX_SOC=y -CONFIG_SND_SOC_IMX_SGTL5000=y -CONFIG_SND_SOC_FSL_ASOC_CARD=y -CONFIG_SND_SOC_AC97_CODEC=y -CONFIG_SND_SOC_CS42XX8_I2C=y -CONFIG_SND_SOC_ES8328_I2C=y -CONFIG_SND_SOC_ES8328_SPI=y -CONFIG_SND_SOC_TLV320AIC23_I2C=y -CONFIG_SND_SOC_TLV320AIC3X=y -CONFIG_SND_SOC_WM8960=y -CONFIG_SND_SOC_WM8962=y -CONFIG_SND_SIMPLE_CARD=y +CONFIG_SND_SOC=m +CONFIG_SND_IMX_SOC=m +CONFIG_SND_SOC_IMX_SGTL5000=m +CONFIG_SND_SOC_FSL_ASOC_CARD=m +CONFIG_SND_SOC_AC97_CODEC=m +CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m +CONFIG_SND_SOC_TLV320AIC23_I2C=m +CONFIG_SND_SOC_TLV320AIC3X=m +CONFIG_SND_SIMPLE_CARD=m CONFIG_UHID=m CONFIG_HID_A4TECH=m CONFIG_HID_ACRUX=m @@ -1231,8 +1313,9 @@ CONFIG_USB_OTG_FSM=y CONFIG_USB_LEDS_TRIGGER_USBPORT=y CONFIG_USB_MON=m CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_FSL=y CONFIG_USB_EHCI_MXC=y -CONFIG_USB_HCD_TEST_MODE=y +CONFIG_USB_OHCI_HCD=y CONFIG_USB_PRINTER=m CONFIG_USB_STORAGE=y CONFIG_USB_STORAGE_REALTEK=m @@ -1251,9 +1334,6 @@ CONFIG_USB_STORAGE_ENE_UB6250=m CONFIG_USB_UAS=m CONFIG_USB_MDC800=m CONFIG_USB_MICROTEK=m -CONFIG_USBIP_CORE=m -CONFIG_USBIP_VHCI_HCD=m -CONFIG_USBIP_HOST=m CONFIG_USB_MUSB_HDRC=m CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA_UDC=y @@ -1338,6 +1418,7 @@ CONFIG_USB_SPEEDTOUCH=m CONFIG_USB_CXACRU=m CONFIG_USB_UEAGLEATM=m CONFIG_USB_XUSBATM=m +CONFIG_FSL_USB2_OTG=y CONFIG_NOP_USB_XCEIV=y CONFIG_USB_MXS_PHY=y CONFIG_USB_GADGET=y @@ -1381,6 +1462,7 @@ CONFIG_USB_G_WEBCAM=m CONFIG_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ESDHC=y CONFIG_MMC_SDHCI_ESDHC_IMX=y CONFIG_LEDS_CLASS=y CONFIG_LEDS_GPIO=y @@ -1397,19 +1479,15 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y CONFIG_LEDS_TRIGGER_TRANSIENT=y CONFIG_LEDS_TRIGGER_CAMERA=y CONFIG_LEDS_TRIGGER_PANIC=y -CONFIG_INFINIBAND=m +CONFIG_LEDS_TRIGGER_NETDEV=y +CONFIG_LEDS_TRIGGER_PATTERN=y +CONFIG_LEDS_TRIGGER_AUDIO=y CONFIG_RTC_CLASS=y CONFIG_RTC_INTF_DEV_UIE_EMUL=y CONFIG_RTC_DRV_DS1307=y CONFIG_RTC_DRV_ISL12022=y -CONFIG_RTC_DRV_PCF8523=y -CONFIG_RTC_DRV_PCF8563=y CONFIG_RTC_DRV_M41T80=y -CONFIG_RTC_DRV_RC5T619=y -CONFIG_RTC_DRV_DA9063=y -CONFIG_RTC_DRV_MC13XXX=y CONFIG_RTC_DRV_MXC=y -CONFIG_RTC_DRV_MXC_V2=y CONFIG_RTC_DRV_SNVS=y CONFIG_DMADEVICES=y CONFIG_FSL_EDMA=y @@ -1430,29 +1508,25 @@ CONFIG_R8188EU=m CONFIG_RTS5208=m CONFIG_VT6655=m CONFIG_STAGING_MEDIA=y -CONFIG_VIDEO_IMX_MEDIA=y +CONFIG_VIDEO_IMX_MEDIA=m CONFIG_COMMON_CLK_PWM=y -CONFIG_CLK_IMX8MM=y -CONFIG_CLK_IMX8MN=y -CONFIG_CLK_IMX8MP=y -CONFIG_CLK_IMX8MQ=y # CONFIG_IOMMU_SUPPORT is not set CONFIG_IMX_GPCV2_PM_DOMAINS=y -CONFIG_SOC_IMX8M=y CONFIG_EXTCON_ADC_JACK=m CONFIG_EXTCON_GPIO=m CONFIG_EXTCON_USB_GPIO=m CONFIG_IIO=y -CONFIG_IIO_BUFFER_CB=m +CONFIG_IIO_TRIGGERED_BUFFER=y CONFIG_IIO_SW_DEVICE=m CONFIG_IIO_SW_TRIGGER=m CONFIG_MMA8452=m -CONFIG_IMX7D_ADC=y -CONFIG_RN5T618_ADC=y -CONFIG_VF610_ADC=y -CONFIG_SENSORS_ISL29018=y -CONFIG_MAG3110=y -CONFIG_MPL3115=y +CONFIG_VF610_ADC=m +CONFIG_INV_MPU6050_I2C=m +CONFIG_AK8975=m +CONFIG_IIO_HRTIMER_TRIGGER=m +CONFIG_IIO_INTERRUPT_TRIGGER=m +CONFIG_IIO_TIGHTLOOP_TRIGGER=m +CONFIG_IIO_SYSFS_TRIGGER=m CONFIG_PWM=y CONFIG_PWM_FSL_FTM=y CONFIG_PWM_IMX27=y @@ -1461,9 +1535,7 @@ CONFIG_NVMEM_IMX_OCOTP=y CONFIG_NVMEM_SNVS_LPGPR=y CONFIG_TEE=y CONFIG_OPTEE=y -CONFIG_MUX_MMIO=y -CONFIG_SIOX=m -CONFIG_SIOX_BUS_GPIO=m +CONFIG_MUX_MMIO=m CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y @@ -1490,6 +1562,7 @@ CONFIG_NILFS2_FS=m CONFIG_F2FS_FS=m CONFIG_F2FS_FS_SECURITY=y CONFIG_F2FS_CHECK_FS=y +CONFIG_FANOTIFY=y CONFIG_QUOTA_NETLINK_INTERFACE=y # CONFIG_PRINT_QUOTA_WARNING is not set CONFIG_QFMT_V2=m @@ -1506,31 +1579,13 @@ CONFIG_VFAT_FS=m CONFIG_NTFS_FS=m CONFIG_NTFS_RW=y CONFIG_TMPFS_POSIX_ACL=y -CONFIG_ORANGEFS_FS=m -CONFIG_ADFS_FS=m -CONFIG_AFFS_FS=m -CONFIG_ECRYPT_FS=m CONFIG_HFS_FS=m CONFIG_HFSPLUS_FS=m -CONFIG_BEFS_FS=m -CONFIG_BFS_FS=m -CONFIG_EFS_FS=m -CONFIG_JFFS2_FS=m CONFIG_CRAMFS=m CONFIG_SQUASHFS=m CONFIG_SQUASHFS_LZ4=y CONFIG_SQUASHFS_LZO=y CONFIG_SQUASHFS_XZ=y -CONFIG_VXFS_FS=m -CONFIG_MINIX_FS=m -CONFIG_OMFS_FS=m -CONFIG_HPFS_FS=m -CONFIG_QNX4FS_FS=m -CONFIG_QNX6FS_FS=m -CONFIG_ROMFS_FS=m -CONFIG_PSTORE=m -CONFIG_SYSV_FS=m -CONFIG_UFS_FS=m CONFIG_NFS_FS=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=m @@ -1631,6 +1686,7 @@ CONFIG_CRYPTO_DEV_MXS_DCP=y CONFIG_CRC7=m CONFIG_LIBCRC32C=y CONFIG_CMA_SIZE_MBYTES=128 +CONFIG_IRQ_POLL=y CONFIG_PRINTK_TIME=y CONFIG_DYNAMIC_DEBUG=y CONFIG_MAGIC_SYSRQ=y