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RISC-V toolchain can be currently installed with ./litex_setup.py gcc and provides an easy way for users to install the RISC-V GCC toolchain while also being convenient for CI regression tests of the CPUs.
We should also provide installation support for the other supported CPUs.
The text was updated successfully, but these errors were encountered:
Just FYI, there are a bunch of packaging efforts - like cross compilers needed for soft-CPUs used in like LiteX under the https://github.com/hdl organization. This includes distribution with things like conda, containers, native packages and static binaries.
On MSYS2, I know several "popular" architectures are supported (arm-none-eabi, avr, m68k-apple-macos, powerpc-apple-macos, riscv64-unknown-elf). I do use the riscv64 to compile software for NEORV32. However, I don't maintain those packages on MINGW-packages. That's done by other people in the MSYS2 community.
On hdl/containers, we don't provide software compilation tooling yet. I am focused on HDL's, and FPGAs, slowly introducing ASIC tooling. Providing images for other HDLs/languages/frameworks such as LiteX, Chisel or SpinalHDL falls within my scope (see hdl/containers#16), but building software toolchains is not something I can add to my list. Nevertheless, contributions and shared maintenance would be welcome in that area.
RISC-V toolchain can be currently installed with
./litex_setup.py gcc
and provides an easy way for users to install the RISC-V GCC toolchain while also being convenient for CI regression tests of the CPUs.We should also provide installation support for the other supported CPUs.
The text was updated successfully, but these errors were encountered: