diff --git a/Project.toml b/Project.toml
index 5414dc3..ef2ebd6 100644
--- a/Project.toml
+++ b/Project.toml
@@ -1,7 +1,7 @@
 name = "SIMD"
 uuid = "fdea26ae-647d-5447-a871-4b548cad5224"
 authors = ["Erik Schnetter <schnetter@gmail.com>", "Kristoffer Carlsson <kristoffer.carlsson@juliahub.com>"]
-version = "3.4.7"
+version = "3.5.0"
 
 [deps]
 PrecompileTools = "aea7be01-6a6a-4083-8856-8a6e6704d82a"
diff --git a/src/LLVM_intrinsics.jl b/src/LLVM_intrinsics.jl
index a84530d..f7eebab 100644
--- a/src/LLVM_intrinsics.jl
+++ b/src/LLVM_intrinsics.jl
@@ -28,7 +28,7 @@ const d = Dict{DataType, String}(
     UInt64       => "i64",
     UInt128      => "i128",
 
-    #Float16     => "half",
+    Float16      => "half",
     Float32      => "float",
     Float64      => "double",
 )
diff --git a/src/SIMD.jl b/src/SIMD.jl
index 12f9f97..1bf0a17 100644
--- a/src/SIMD.jl
+++ b/src/SIMD.jl
@@ -14,7 +14,7 @@ const BIntTypes     = Union{IntTypes, Bool}
 const UIntTypes     = Union{UInt8, UInt16, UInt32, UInt64}
 const IntegerTypes  = Union{IntTypes, UIntTypes}
 const BIntegerTypes = Union{IntegerTypes, Bool}
-const FloatingTypes = Union{Float32, Float64} # Float16 support is non-native in Julia and gets passed as an i16
+const FloatingTypes = Union{Float16, Float32, Float64}
 const ScalarTypes   = Union{IntegerTypes, FloatingTypes}
 const VecTypes      = Union{ScalarTypes, Ptr, Bool}
 include("LLVM_intrinsics.jl")
diff --git a/src/simdvec.jl b/src/simdvec.jl
index 2d9249c..2eebf5b 100644
--- a/src/simdvec.jl
+++ b/src/simdvec.jl
@@ -167,6 +167,7 @@ Base.abs(v::Vec{N, T}) where {N, T} = Vec(vifelse(v < zero(T), -v, v))
 Base.:!(v1::Vec{N,Bool}) where {N} = ~v1
 Base.inv(v::Vec{N, T}) where {N, T<:FloatingTypes} = one(T) / v
 
+_unsigned(::Type{Float16}) = UInt16
 _unsigned(::Type{Float32}) = UInt32
 _unsigned(::Type{Float64}) = UInt64
 function Base.issubnormal(x::Vec{N, T}) where {N, T<:FloatingTypes}
@@ -300,6 +301,7 @@ end
     vifelse(signbit(v2), -v1, v1)
 @inline Base.copysign(v1::Vec{N,T}, v2::Vec{N,T}) where {N,T<:IntTypes} =
     vifelse(signbit(v2), -abs(v1), abs(v1))
+_signed(::Type{Float16}) = Int16
 _signed(::Type{Float32}) = Int32
 _signed(::Type{Float64}) = Int64
 @inline Base.signbit(x::Vec{N, T}) where {N, T <:FloatingTypes} =
diff --git a/test/runtests.jl b/test/runtests.jl
index 1379ccd..cf21ec3 100644
--- a/test/runtests.jl
+++ b/test/runtests.jl
@@ -882,7 +882,7 @@ llvm_ir(f, args) = sprint(code_llvm, f, Base.typesof(args...))
 
     @testset "Vector shuffles" begin
 
-        for T in (Int8,UInt8,Int16,UInt16,Int32,UInt32,Int64,UInt64,Float32,Float64)
+        for T in (Int8,UInt8,Int16,UInt16,Int32,UInt32,Int64,UInt64,Float16,Float32,Float64)
             a = Vec{4,T}((1,2,3,4))
             b = Vec{4,T}((5,6,7,8))
             @test shufflevector(a, b, Val((2,3,4,5))) === Vec{4,T}((3,4,5,6))
@@ -905,7 +905,7 @@ llvm_ir(f, args) = sprint(code_llvm, f, Base.typesof(args...))
             @test shufflevector(a, b, Val((2,3,4,5))) === Vec{4,Bool}((true,false,false,false))
         end
 
-        for T in (Int8,UInt8,Int16,UInt16,Int32,UInt32,Int64,UInt64,Float32,Float64)
+        for T in (Int8,UInt8,Int16,UInt16,Int32,UInt32,Int64,UInt64,Float16,Float32,Float64)
             a = Vec{4,T}((1,2,3,4))
             b = Vec{4,T}((5,6,7,8))
             @test shufflevector(a, b, Val((2,3,4,5))) === Vec{4,T}((3,4,5,6))