From 1963c54a1b6fbec33ea7936b23ea68be6554f113 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Tue, 27 Aug 2024 10:48:38 +0200 Subject: [PATCH] Prefer `cfg_if` --- documentation/API-GUIDELINES.md | 1 + esp-hal-embassy/src/executor/thread.rs | 1 + esp-hal/src/aes/mod.rs | 7 +- esp-hal/src/analog/adc/mod.rs | 9 ++- esp-hal/src/clock/mod.rs | 3 +- esp-hal/src/dma/mod.rs | 7 +- esp-hal/src/gpio/mod.rs | 7 ++ esp-hal/src/i2c.rs | 9 ++- esp-hal/src/interrupt/mod.rs | 6 +- esp-hal/src/ledc/mod.rs | 2 + esp-hal/src/mcpwm/mod.rs | 24 ++++-- esp-hal/src/peripheral.rs | 2 + esp-hal/src/rmt.rs | 10 ++- esp-hal/src/rom/md5.rs | 7 +- esp-hal/src/rtc_cntl/mod.rs | 11 ++- esp-hal/src/soc/esp32/efuse/mod.rs | 14 ++-- esp-hal/src/soc/esp32c2/efuse/mod.rs | 11 +-- esp-hal/src/soc/esp32c3/efuse/mod.rs | 12 +-- esp-hal/src/soc/esp32c6/efuse/mod.rs | 12 +-- esp-hal/src/soc/esp32h2/efuse/mod.rs | 12 +-- esp-hal/src/soc/esp32s2/efuse/mod.rs | 8 +- esp-hal/src/soc/esp32s3/efuse/mod.rs | 12 +-- esp-hal/src/spi/master.rs | 18 +++-- esp-hal/src/spi/slave.rs | 5 ++ esp-hal/src/timer/mod.rs | 2 + esp-hal/src/timer/systimer.rs | 9 ++- esp-hal/src/timer/timg.rs | 73 ++++++++----------- esp-hal/src/twai/filter.rs | 13 +++- esp-hal/src/twai/mod.rs | 17 +++-- esp-hal/src/usb_serial_jtag.rs | 3 + examples/src/bin/embassy_multiprio.rs | 19 +++-- examples/src/bin/embassy_serial.rs | 17 +++-- examples/src/bin/embassy_spi.rs | 7 +- examples/src/bin/gpio_interrupt.rs | 21 ++++-- examples/src/bin/hello_rgb.rs | 13 +++- examples/src/bin/hello_world.rs | 17 +++-- examples/src/bin/ieee802154_sniffer.rs | 7 +- examples/src/bin/mcpwm.rs | 13 +++- examples/src/bin/qspi_flash.rs | 8 +- examples/src/bin/serial_interrupts.rs | 17 +++-- examples/src/bin/sleep_timer_rtcio.rs | 8 +- examples/src/bin/spi_loopback_dma.rs | 7 +- examples/src/bin/wifi_ble.rs | 13 ++-- examples/src/bin/wifi_embassy_access_point.rs | 18 ++--- .../bin/wifi_embassy_access_point_with_sta.rs | 18 ++--- examples/src/bin/wifi_embassy_bench.rs | 18 ++--- examples/src/bin/wifi_embassy_ble.rs | 30 ++++---- examples/src/bin/wifi_embassy_dhcp.rs | 18 ++--- examples/src/bin/wifi_embassy_esp_now.rs | 18 ++--- .../src/bin/wifi_embassy_esp_now_duplex.rs | 18 ++--- hil-test/tests/clock_monitor.rs | 25 +++++-- hil-test/tests/dma_mem2mem.rs | 48 +++++++++--- hil-test/tests/gpio.rs | 9 --- hil-test/tests/rsa.rs | 9 +-- 54 files changed, 426 insertions(+), 297 deletions(-) diff --git a/documentation/API-GUIDELINES.md b/documentation/API-GUIDELINES.md index 093ac5a2775..985c11a3b40 100644 --- a/documentation/API-GUIDELINES.md +++ b/documentation/API-GUIDELINES.md @@ -52,6 +52,7 @@ The following paragraphs contain additional recommendations. - If you are porting code from ESP-IDF (or anything else), please include a link WITH the commit hash in it, and please highlight the relevant line(s) of code - If necessary provide further context as comments (consider linking to code, PRs, TRM - make sure to use permanent links, e.g. include the hash when linking to a Git repository, include the revision, page number etc. when linking to TRMs) - Generally, follow common "good practices" and idiomatic Rust style +- Prefer `cfg_if!` over multiple exclusive `#[cfg]` attributes. `cfg_if!` visually divides the options, often results in simpler conditions and simplifies adding new branches in the future. ## Modules Documentation diff --git a/esp-hal-embassy/src/executor/thread.rs b/esp-hal-embassy/src/executor/thread.rs index 7ac8807ae20..b90d00a3425 100644 --- a/esp-hal-embassy/src/executor/thread.rs +++ b/esp-hal-embassy/src/executor/thread.rs @@ -71,6 +71,7 @@ impl Executor { #[cfg_attr( multi_core, doc = r#" + This will use software-interrupt 3 which isn't available for anything else to wake the other core(s). "# diff --git a/esp-hal/src/aes/mod.rs b/esp-hal/src/aes/mod.rs index f360b39111c..a547cb79b8d 100644 --- a/esp-hal/src/aes/mod.rs +++ b/esp-hal/src/aes/mod.rs @@ -1,12 +1,14 @@ //! # Advanced Encryption Standard (AES). //! //! ## Overview +//! //! The AES accelerator is a hardware device that speeds up computation //! using AES algorithm significantly, compared to AES algorithms implemented //! solely in software. The AES accelerator has two working modes, which are //! Typical AES and AES-DMA. //! //! ## Configuration +//! //! The AES peripheral can be configured to encrypt or decrypt data using //! different encryption/decryption modes. //! @@ -14,8 +16,11 @@ //! cipher modes such as ECB, CBC, OFB, CTR, CFB8, and CFB128. //! //! ## Examples -//! ### Encrypting and Decrypting a Message +//! +//! ### Encrypting and decrypting a message +//! //! Simple example of encrypting and decrypting a message using AES-128: +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::aes::{Aes, Mode}; diff --git a/esp-hal/src/analog/adc/mod.rs b/esp-hal/src/analog/adc/mod.rs index ff9981d62be..27a43269d5c 100644 --- a/esp-hal/src/analog/adc/mod.rs +++ b/esp-hal/src/analog/adc/mod.rs @@ -1,11 +1,13 @@ //! # Analog to Digital Converter (ADC) //! //! ## Overview +//! //! The ADC is integrated on the chip, and is capable of measuring analog //! signals from specific analog I/O pins. One or more ADC units are available, //! depending on the device being used. //! //! ## Configuration +//! //! The ADC can be configured to measure analog signals from specific pins. The //! configuration includes the resolution of the ADC, the attenuation of the //! input signal, and the pins to be measured. @@ -15,10 +17,13 @@ //! schemes can be used to improve the accuracy of the ADC readings. //! //! ## Usage +//! //! The ADC driver implements the `embedded-hal@0.2.x` ADC traits. //! -//! ## Examples -//! #### Read an analog signal from a pin +//! ## Example +//! +//! ### Read an analog signal from a pin +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::analog::adc::AdcConfig; diff --git a/esp-hal/src/clock/mod.rs b/esp-hal/src/clock/mod.rs index 67b68dfebc9..48a00279354 100644 --- a/esp-hal/src/clock/mod.rs +++ b/esp-hal/src/clock/mod.rs @@ -1,6 +1,7 @@ -//! # Clock Control +//! # CPU Clock Control //! //! ## Overview +//! //! Clocks are mainly sourced from oscillator (OSC), RC, and PLL circuits, and //! then processed by the dividers or selectors, which allows most functional //! modules to select their working clock according to their power consumption diff --git a/esp-hal/src/dma/mod.rs b/esp-hal/src/dma/mod.rs index 1c174166402..2c326cce978 100644 --- a/esp-hal/src/dma/mod.rs +++ b/esp-hal/src/dma/mod.rs @@ -1,6 +1,7 @@ //! # Direct Memory Access (DMA) //! //! ## Overview +//! //! The DMA driver provides an interface to efficiently transfer data between //! different memory regions and peripherals within the ESP microcontroller //! without involving the CPU. The DMA controller is responsible for managing @@ -10,8 +11,10 @@ //! `ESP32-S2` are using older `PDMA` controller, whenever other chips are using //! newer `GDMA` controller. //! -//! ## Examples -//! ### Initialize and Utilize DMA Controller in `SPI` +//! ## Example +//! +//! ### Initialize and utilize DMA controller in `SPI` +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::dma_buffers; diff --git a/esp-hal/src/gpio/mod.rs b/esp-hal/src/gpio/mod.rs index bd781cb0156..cee5b5db9a5 100644 --- a/esp-hal/src/gpio/mod.rs +++ b/esp-hal/src/gpio/mod.rs @@ -1,16 +1,19 @@ //! # General Purpose I/Os (GPIO) //! //! ## Overview +//! //! Each pin can be used as a general-purpose I/O, or be connected to an //! internal peripheral signal. //! //! ## Configuration +//! //! This driver supports various operations on GPIO pins, including setting the //! pin mode, direction, and manipulating the pin state (setting high/low, //! toggling). It provides an interface to interact with GPIO pins on ESP chips, //! allowing developers to control and read the state of the pins. //! //! ## Usage +//! //! This module also implements a number of traits from [embedded-hal] to //! provide a common interface for GPIO pins. //! @@ -18,6 +21,7 @@ //! designed struct from the pac struct `GPIO` and `IO_MUX` using `Io::new`. //! //! ### Pin Types +//! //! - [Input] pins can be used as digital inputs. //! - [Output] and [OutputOpenDrain] pins can be used as digital outputs. //! - [Flex] pin is a pin that can be used as an input and output pin. @@ -27,7 +31,9 @@ //! but real pin cannot be used. //! //! ## Examples +//! //! ### Set up a GPIO as an Output +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::gpio::{Io, Level, Output}; @@ -37,6 +43,7 @@ //! ``` //! //! ### Blink an LED +//! //! See the [Commonly Used Setup] section of the crate documentation. //! //! ### Inverting a signal using `AnyPin` diff --git a/esp-hal/src/i2c.rs b/esp-hal/src/i2c.rs index b4c72604fea..139f88e794c 100644 --- a/esp-hal/src/i2c.rs +++ b/esp-hal/src/i2c.rs @@ -1069,12 +1069,15 @@ pub trait Instance: crate::private::Sealed { self.set_filter(Some(7), Some(7)); // Configure frequency - #[cfg(esp32)] + cfg_if::cfg_if! { + if #[cfg(esp32)] { self.set_frequency(clocks.i2c_clock.convert(), frequency, timeout); - #[cfg(esp32s2)] + } else if #[cfg(esp32s2)] { self.set_frequency(clocks.apb_clock.convert(), frequency, timeout); - #[cfg(not(any(esp32, esp32s2)))] + } else { self.set_frequency(clocks.xtal_clock.convert(), frequency, timeout); + } + } self.update_config(); diff --git a/esp-hal/src/interrupt/mod.rs b/esp-hal/src/interrupt/mod.rs index b2d05788cdb..d082f93d81f 100644 --- a/esp-hal/src/interrupt/mod.rs +++ b/esp-hal/src/interrupt/mod.rs @@ -24,8 +24,10 @@ //! We reserve a number of CPU interrupts, which cannot be used; see //! [`RESERVED_INTERRUPTS`]. //! -//! ## Examples -//! ### Using the Peripheral Driver to Register an Interrupt Handler +//! ## Example +//! +//! ### Using the peripheral driver to register an interrupt handler +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use core::cell::RefCell; diff --git a/esp-hal/src/ledc/mod.rs b/esp-hal/src/ledc/mod.rs index c935daec320..f37af1fbef2 100644 --- a/esp-hal/src/ledc/mod.rs +++ b/esp-hal/src/ledc/mod.rs @@ -1,6 +1,7 @@ //! # LED Controller (LEDC) //! //! ## Overview +//! //! The LEDC peripheral is primarily designed to control the intensity of LEDs, //! although it can also be used to generate PWM signals for other purposes. It //! has multiple channels which can generate independent waveforms that can be @@ -15,6 +16,7 @@ //! supported chips. //! //! ## Examples +//! //! ### Low Speed Channel //! The following will configure the Low Speed Channel0 to 24kHz output with //! 10% duty using the ABPClock diff --git a/esp-hal/src/mcpwm/mod.rs b/esp-hal/src/mcpwm/mod.rs index 43b58667b39..53c631c8ecf 100644 --- a/esp-hal/src/mcpwm/mod.rs +++ b/esp-hal/src/mcpwm/mod.rs @@ -1,6 +1,7 @@ //! # Motor Control Pulse Width Modulator (MCPWM) //! //! ## Overview +//! //! The MCPWM peripheral is a versatile PWM generator, which contains various //! submodules to make it a key element in power electronic applications like //! motor control, digital power, and so on. Typically, the MCPWM peripheral can @@ -13,6 +14,7 @@ //! - Generate Space Vector PWM (SVPWM) signals for Field Oriented Control (FOC) //! //! ## Configuration +//! //! * PWM Timers 0, 1 and 2 //! * Every PWM timer has a dedicated 8-bit clock prescaler. //! * The 16-bit counter in the PWM timer can work in count-up mode, @@ -201,14 +203,17 @@ impl<'a> PeripheralClockConfig<'a> { /// The peripheral clock frequency is calculated as: /// `peripheral_clock = input_clock / (prescaler + 1)` pub fn with_prescaler(clocks: &'a Clocks<'a>, prescaler: u8) -> Self { - #[cfg(esp32)] + cfg_if::cfg_if! { + if #[cfg(esp32)] { let source_clock = clocks.pwm_clock; - #[cfg(esp32c6)] + } else if #[cfg(esp32c6)] { let source_clock = clocks.crypto_clock; - #[cfg(esp32s3)] + } else if #[cfg(esp32s3)] { let source_clock = clocks.crypto_pwm_clock; - #[cfg(esp32h2)] + } else if #[cfg(esp32h2)] { let source_clock = clocks.xtal_clock; + } + } Self { frequency: source_clock / (prescaler as u32 + 1), @@ -235,14 +240,17 @@ impl<'a> PeripheralClockConfig<'a> { clocks: &'a Clocks<'a>, target_freq: HertzU32, ) -> Result { - #[cfg(esp32)] + cfg_if::cfg_if! { + if #[cfg(esp32)] { let source_clock = clocks.pwm_clock; - #[cfg(esp32c6)] + } else if #[cfg(esp32c6)] { let source_clock = clocks.crypto_clock; - #[cfg(esp32s3)] + } else if #[cfg(esp32s3)] { let source_clock = clocks.crypto_pwm_clock; - #[cfg(esp32h2)] + } else if #[cfg(esp32h2)] { let source_clock = clocks.xtal_clock; + } + } if target_freq.raw() == 0 || target_freq > source_clock { return Err(FrequencyError); diff --git a/esp-hal/src/peripheral.rs b/esp-hal/src/peripheral.rs index 323187f3b18..1077dce9e38 100644 --- a/esp-hal/src/peripheral.rs +++ b/esp-hal/src/peripheral.rs @@ -1,12 +1,14 @@ //! # Exclusive peripheral access //! //! ## Overview +//! //! The Peripheral module provides an exclusive access mechanism to peripherals //! on ESP chips. It includes the `PeripheralRef` struct, which represents an //! exclusive reference to a peripheral. It offers memory efficiency benefits //! for zero-sized types. //! //! ## Configuration +//! //! The `PeripheralRef` struct is used to access and interact with peripherals. //! It implements the `Deref` and `DerefMut` traits, allowing you to dereference //! it to access the underlying peripheral. It also provides methods for cloning diff --git a/esp-hal/src/rmt.rs b/esp-hal/src/rmt.rs index 99929bc44fd..ef54a5f4306 100644 --- a/esp-hal/src/rmt.rs +++ b/esp-hal/src/rmt.rs @@ -228,11 +228,13 @@ where PeripheralClockControl::reset(crate::system::Peripheral::Rmt); PeripheralClockControl::enable(crate::system::Peripheral::Rmt); - #[cfg(not(any(esp32, esp32s2)))] + cfg_if::cfg_if! { + if #[cfg(any(esp32, esp32s2))] { + self::chip_specific::configure_clock(); + } else { me.configure_clock(frequency, _clocks)?; - - #[cfg(any(esp32, esp32s2))] - self::chip_specific::configure_clock(); + } + } Ok(me) } diff --git a/esp-hal/src/rom/md5.rs b/esp-hal/src/rom/md5.rs index 1ef90c86de7..cfae6ebba9c 100644 --- a/esp-hal/src/rom/md5.rs +++ b/esp-hal/src/rom/md5.rs @@ -25,7 +25,9 @@ //! than it would be if you included an MD5 implementation in your project. //! //! ## Examples -//! ## Compute a Full Digest From a Single Buffer +//! +//! ### Compute a Full Digest From a Single Buffer +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::rom::md5; @@ -40,7 +42,8 @@ //! writeln!(uart0, "{}", d); //! # } //! ``` -//! ## Compute a Digest Over Multiple Buffers +//! +//! ### Compute a Digest Over Multiple Buffers //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::rom::md5; diff --git a/esp-hal/src/rtc_cntl/mod.rs b/esp-hal/src/rtc_cntl/mod.rs index 505e2cbe4e2..cfbf13f0756 100644 --- a/esp-hal/src/rtc_cntl/mod.rs +++ b/esp-hal/src/rtc_cntl/mod.rs @@ -1,13 +1,16 @@ -//! # Real-Time Clock Control and Low-power Management (RTC_CNTL) +//! # Real-Time Control and Low-power Management (RTC_CNTL) //! //! ## Overview -//! The RTC_CNTL peripheral is responsible for managing the real-time clock and -//! low-power modes on the chip. +//! +//! The RTC_CNTL peripheral is responsible for managing the low-power modes on +//! the chip. //! //! ## Configuration -//! It also includes the necessary configurations and constants for clock +//! +//! It also includes the necessary configurations and constants for clock //! sources and low-power management. The driver provides the following features //! and functionalities: +//! //! * Clock Configuration //! * Calibration //! * Low-Power Management diff --git a/esp-hal/src/soc/esp32/efuse/mod.rs b/esp-hal/src/soc/esp32/efuse/mod.rs index bf16993fc9e..63eff59fb7c 100644 --- a/esp-hal/src/soc/esp32/efuse/mod.rs +++ b/esp-hal/src/soc/esp32/efuse/mod.rs @@ -1,13 +1,15 @@ //! # Reading of eFuses (ESP32) //! //! ## Overview +//! //! The `efuse` module provides functionality for reading eFuse data //! from the `ESP32` chip, allowing access to various chip-specific information -//! such as : +//! such as: +//! //! * MAC address -//! * core count -//! * CPU frequency -//! * chip type +//! * Chip type, revision +//! * Core count +//! * Max CPU frequency //! //! and more. It is useful for retrieving chip-specific configuration and //! identification data during runtime. @@ -15,8 +17,10 @@ //! The `Efuse` struct represents the eFuse peripheral and is responsible for //! reading various eFuse fields and values. //! -//! ## Examples +//! ## Example +//! //! ### Read chip's MAC address from the eFuse storage. +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::efuse::Efuse; diff --git a/esp-hal/src/soc/esp32c2/efuse/mod.rs b/esp-hal/src/soc/esp32c2/efuse/mod.rs index 7ead2a94903..93db7e33dca 100644 --- a/esp-hal/src/soc/esp32c2/efuse/mod.rs +++ b/esp-hal/src/soc/esp32c2/efuse/mod.rs @@ -3,11 +3,10 @@ //! ## Overview //! The `efuse` module provides functionality for reading eFuse data //! from the `ESP32-C2` chip, allowing access to various chip-specific -//! information such as : +//! information such as: +//! //! * MAC address -//! * core count -//! * CPU frequency -//! * chip type +//! * ADC calibration information //! //! and more. It is useful for retrieving chip-specific configuration and //! identification data during runtime. @@ -15,8 +14,10 @@ //! The `Efuse` struct represents the eFuse peripheral and is responsible for //! reading various eFuse fields and values. //! -//! ## Examples +//! ## Example +//! //! ### Read chip's MAC address from the eFuse storage. +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::efuse::Efuse; diff --git a/esp-hal/src/soc/esp32c3/efuse/mod.rs b/esp-hal/src/soc/esp32c3/efuse/mod.rs index 2d326c6aa16..08d81adf092 100644 --- a/esp-hal/src/soc/esp32c3/efuse/mod.rs +++ b/esp-hal/src/soc/esp32c3/efuse/mod.rs @@ -1,13 +1,13 @@ //! # Reading of eFuses (ESP32-C3) //! //! ## Overview +//! //! The `efuse` module provides functionality for reading eFuse data //! from the `ESP32-C3` chip, allowing access to various chip-specific -//! information such as : +//! information such as: +//! //! * MAC address -//! * core count -//! * CPU frequency -//! * chip type +//! * ADC calibration data //! //! and more. It is useful for retrieving chip-specific configuration and //! identification data during runtime. @@ -15,8 +15,10 @@ //! The `Efuse` struct represents the eFuse peripheral and is responsible for //! reading various eFuse fields and values. //! -//! ## Examples +//! ## Example +//! //! ### Read chip's MAC address from the eFuse storage. +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::efuse::Efuse; diff --git a/esp-hal/src/soc/esp32c6/efuse/mod.rs b/esp-hal/src/soc/esp32c6/efuse/mod.rs index e56293ba3cc..a49f21870c1 100644 --- a/esp-hal/src/soc/esp32c6/efuse/mod.rs +++ b/esp-hal/src/soc/esp32c6/efuse/mod.rs @@ -3,11 +3,11 @@ //! ## Overview //! The `efuse` module provides functionality for reading eFuse data //! from the `ESP32-C6` chip, allowing access to various chip-specific -//! information such as : +//! information such as: +//! //! * MAC address -//! * core count -//! * CPU frequency -//! * chip type +//! * ADC calibration data +//! * Chip version //! //! and more. It is useful for retrieving chip-specific configuration and //! identification data during runtime. @@ -15,8 +15,10 @@ //! The `Efuse` struct represents the eFuse peripheral and is responsible for //! reading various eFuse fields and values. //! -//! ## Examples +//! ## Example +//! //! ### Read chip's MAC address from the eFuse storage. +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::efuse::Efuse; diff --git a/esp-hal/src/soc/esp32h2/efuse/mod.rs b/esp-hal/src/soc/esp32h2/efuse/mod.rs index 131a9287470..fbf928a8dec 100644 --- a/esp-hal/src/soc/esp32h2/efuse/mod.rs +++ b/esp-hal/src/soc/esp32h2/efuse/mod.rs @@ -1,13 +1,13 @@ //! # Reading of eFuses (ESP32-H2) //! //! ## Overview +//! //! The `efuse` module provides functionality for reading eFuse data //! from the `ESP32-H2` chip, allowing access to various chip-specific -//! information such as : +//! information such as: +//! //! * MAC address -//! * core count -//! * CPU frequency -//! * chip type +//! * ADC calibration data //! //! and more. It is useful for retrieving chip-specific configuration and //! identification data during runtime. @@ -15,8 +15,10 @@ //! The `Efuse` struct represents the eFuse peripheral and is responsible for //! reading various eFuse fields and values. //! -//! ## Examples +//! ## Example +//! //! ### Read chip's MAC address from the eFuse storage. +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::efuse::Efuse; diff --git a/esp-hal/src/soc/esp32s2/efuse/mod.rs b/esp-hal/src/soc/esp32s2/efuse/mod.rs index 61d2975344e..bebbf7a1976 100644 --- a/esp-hal/src/soc/esp32s2/efuse/mod.rs +++ b/esp-hal/src/soc/esp32s2/efuse/mod.rs @@ -1,9 +1,11 @@ //! # Reading of eFuses (ESP32-S2) //! //! ## Overview +//! //! The `efuse` module provides functionality for reading eFuse data //! from the `ESP32-S2` chip, allowing access to various chip-specific -//! information such as : +//! information such as: +//! //! * MAC address //! * core count //! * CPU frequency @@ -15,8 +17,10 @@ //! The `Efuse` struct represents the eFuse peripheral and is responsible for //! reading various eFuse fields and values. //! -//! ## Examples +//! ## Example +//! //! ### Read chip's MAC address from the eFuse storage. +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::efuse::Efuse; diff --git a/esp-hal/src/soc/esp32s3/efuse/mod.rs b/esp-hal/src/soc/esp32s3/efuse/mod.rs index 72fc1d2c37e..79445ae675d 100644 --- a/esp-hal/src/soc/esp32s3/efuse/mod.rs +++ b/esp-hal/src/soc/esp32s3/efuse/mod.rs @@ -1,13 +1,13 @@ //! # Reading of eFuses (ESP32-S3) //! //! ## Overview +//! //! The `efuse` module provides functionality for reading eFuse data //! from the `ESP32-S3` chip, allowing access to various chip-specific -//! information such as : +//! information such as: +//! //! * MAC address -//! * core count -//! * CPU frequency -//! * chip type +//! * Chip revision //! //! and more. It is useful for retrieving chip-specific configuration and //! identification data during runtime. @@ -15,8 +15,10 @@ //! The `Efuse` struct represents the eFuse peripheral and is responsible for //! reading various eFuse fields and values. //! -//! ## Examples +//! ## Example +//! //! ### Read chip's MAC address from the eFuse storage. +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::efuse::Efuse; diff --git a/esp-hal/src/spi/master.rs b/esp-hal/src/spi/master.rs index 1c479a532d2..1efda34a90b 100644 --- a/esp-hal/src/spi/master.rs +++ b/esp-hal/src/spi/master.rs @@ -1,13 +1,16 @@ //! # Serial Peripheral Interface - Master Mode //! //! ## Overview +//! //! In this mode, the SPI acts as master and initiates the SPI transactions. //! //! ## Configuration +//! //! The peripheral can be used in full-duplex and half-duplex mode and can //! leverage DMA for data transfers. It can also be used in blocking or async. //! //! ### Exclusive access to the SPI bus +//! //! If all you want to do is to communicate to a single device, and you initiate //! transactions yourself, there are a number of ways to achieve this: //! @@ -19,17 +22,19 @@ //! - Use the `ExclusiveDevice` struct from [`embedded-hal-bus`] or `SpiDevice` //! from [`embassy-embedded-hal`]. //! -//! //! ### Shared SPI access +//! //! If you have multiple devices on the same SPI bus that each have their own CS //! line, you may want to have a look at the implementations provided by //! [`embedded-hal-bus`] and [`embassy-embedded-hal`]. //! //! ## Usage +//! //! The module implements several third-party traits from embedded-hal@0.2.x, //! embedded-hal@1.x.x and embassy-embedded-hal //! //! ## Example +//! //! ### SPI Initialization //! ```rust, no_run #![doc = crate::before_snippet!()] @@ -2740,11 +2745,14 @@ pub trait Instance: private::Sealed { // taken from https://github.com/apache/incubator-nuttx/blob/8267a7618629838231256edfa666e44b5313348e/arch/risc-v/src/esp32c3/esp32c3_spi.c#L496 fn setup(&mut self, frequency: HertzU32, clocks: &Clocks<'_>) { - #[cfg(not(esp32h2))] - let apb_clk_freq: HertzU32 = HertzU32::Hz(clocks.apb_clock.to_Hz()); + cfg_if::cfg_if! { + if #[cfg(esp32h2)] { // ESP32-H2 is using PLL_48M_CLK source instead of APB_CLK - #[cfg(esp32h2)] - let apb_clk_freq: HertzU32 = HertzU32::Hz(clocks.pll_48m_clock.to_Hz()); + let apb_clk_freq = HertzU32::Hz(clocks.pll_48m_clock.to_Hz()); + } else { + let apb_clk_freq = HertzU32::Hz(clocks.apb_clock.to_Hz()); + } + } let reg_val: u32; let duty_cycle = 128; diff --git a/esp-hal/src/spi/slave.rs b/esp-hal/src/spi/slave.rs index d001d0d3e3e..52491f57fdb 100644 --- a/esp-hal/src/spi/slave.rs +++ b/esp-hal/src/spi/slave.rs @@ -1,14 +1,18 @@ //! # Serial Peripheral Interface - Slave Mode //! //! ## Overview +//! //! In this mode, the SPI acts as slave and transfers data with its master when //! its CS is asserted. //! //! ## Configuration +//! //! The SPI slave driver allows using full-duplex and can only be used with DMA. //! //! ## Example +//! //! ### SPI Slave with DMA +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::dma::DmaPriority; @@ -52,6 +56,7 @@ //! ``` //! //! ## Implementation State +//! //! There are several options for working with the SPI peripheral in slave mode, //! but the code currently only supports single transfers (not segmented //! transfers), full duplex, single bit (not dual or quad SPI), and DMA mode diff --git a/esp-hal/src/timer/mod.rs b/esp-hal/src/timer/mod.rs index f72fc16b932..313772472ad 100644 --- a/esp-hal/src/timer/mod.rs +++ b/esp-hal/src/timer/mod.rs @@ -11,7 +11,9 @@ )] #![cfg_attr(feature = "esp32", doc = "See the [timg] module for more information.")] //! ## Examples +//! //! ### One-shot Timer +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::timer::{OneShotTimer, PeriodicTimer, timg::TimerGroup}; diff --git a/esp-hal/src/timer/systimer.rs b/esp-hal/src/timer/systimer.rs index d2e36f38179..d87befe8d76 100644 --- a/esp-hal/src/timer/systimer.rs +++ b/esp-hal/src/timer/systimer.rs @@ -8,6 +8,7 @@ //! operating system, or simply as a general-purpose timer. //! //! ## Configuration +//! //! The timer consists of two counters, `UNIT0` and `UNIT1`. The counter values //! can be monitored by 3 comparators, `COMP0`, `COMP1`, and `COMP2`. //! @@ -1120,9 +1121,9 @@ pub mod etm { //! //! ## Overview //! - //! The system timer supports the Event Task Matrix (ETM) function, which - //! allows the system timer’s ETM events to trigger any - //! peripherals’ ETM tasks. + //! The system timer supports the Event Task Matrix (ETM) function, which + //! allows the system timer’s ETM events to trigger any peripherals’ ETM + //! tasks. //! //! The system timer can generate the following ETM events: //! - SYSTIMER_EVT_CNT_CMPx: Indicates the alarm pulses generated by @@ -1136,7 +1137,7 @@ pub mod etm { //! let syst = SystemTimer::new(peripherals.SYSTIMER); //! let syst_alarms = syst.split(); //! let mut alarm0 = syst_alarms.alarm0.into_periodic(); - //! alarm0.set_period(1.secs()); + //! alarm0.set_period(1u32.secs()); //! //! let timer_event = SysTimerEtmEvent::new(&mut alarm0); //! # } diff --git a/esp-hal/src/timer/timg.rs b/esp-hal/src/timer/timg.rs index b860255979c..5870ae0da63 100644 --- a/esp-hal/src/timer/timg.rs +++ b/esp-hal/src/timer/timg.rs @@ -1,6 +1,7 @@ //! # Timer Group (TIMG) //! //! ## Overview +//! //! The Timer Group (TIMG) peripherals contain one or more general-purpose //! timers, plus one or more watchdog timers. //! @@ -8,6 +9,7 @@ //! auto-reload-capable up-down counter. //! //! ## Configuration +//! //! The timers have configurable alarms, which are triggered when the internal //! counter of the timers reaches a specific target value. The timers are //! clocked using the APB clock source. @@ -18,9 +20,10 @@ //! - Generate one-shot alarms; trigger events once //! - Free-running; fetching a high-resolution timestamp on demand //! -//! //! ## Examples +//! //! ### General-purpose Timer +//! //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::timer::timg::TimerGroup; @@ -42,7 +45,7 @@ //! # } //! ``` //! -//! #### Watchdog Timer +//! ### Watchdog Timer //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::timer::timg::TimerGroup; @@ -242,12 +245,13 @@ impl TimerGroupInstance for TIMG1 { } } -impl<'d, T> TimerGroup<'d, T, Blocking> +impl<'d, T, DM> TimerGroup<'d, T, DM> where T: TimerGroupInstance, + DM: crate::Mode, { /// Construct a new instance of [`TimerGroup`] in blocking mode - pub fn new(_timer_group: impl Peripheral

+ 'd, clocks: &Clocks<'d>) -> Self { + pub fn new_inner(_timer_group: impl Peripheral

+ 'd, clocks: &Clocks<'d>) -> Self { crate::into_ref!(_timer_group); T::reset_peripheral(); @@ -255,15 +259,20 @@ where T::configure_src_clk(); + cfg_if::cfg_if! { + if #[cfg(esp32h2)] { // ESP32-H2 is using PLL_48M_CLK source instead of APB_CLK + let apb_clk_freq = clocks.pll_48m_clock; + } else { + let apb_clk_freq = clocks.apb_clock; + } + }; + let timer0 = Timer::new( Timer0 { phantom: PhantomData, }, - #[cfg(not(esp32h2))] - clocks.apb_clock, - #[cfg(esp32h2)] - clocks.pll_48m_clock, + apb_clk_freq, ); #[cfg(timg_timer1)] @@ -271,7 +280,7 @@ where Timer1 { phantom: PhantomData, }, - clocks.apb_clock, + apb_clk_freq, ); Self { @@ -284,45 +293,23 @@ where } } +impl<'d, T> TimerGroup<'d, T, Blocking> +where + T: TimerGroupInstance, +{ + /// Construct a new instance of [`TimerGroup`] in blocking mode + pub fn new(timer_group: impl Peripheral

+ 'd, clocks: &Clocks<'d>) -> Self { + Self::new_inner(timer_group, clocks) + } +} + impl<'d, T> TimerGroup<'d, T, Async> where T: TimerGroupInstance, { /// Construct a new instance of [`TimerGroup`] in asynchronous mode - pub fn new_async(_timer_group: impl Peripheral

+ 'd, clocks: &Clocks<'d>) -> Self { - crate::into_ref!(_timer_group); - - T::reset_peripheral(); - T::enable_peripheral(); - - T::configure_src_clk(); - - // ESP32-H2 is using PLL_48M_CLK source instead of APB_CLK - let timer0 = Timer::new( - Timer0 { - phantom: PhantomData, - }, - #[cfg(not(esp32h2))] - clocks.apb_clock, - #[cfg(esp32h2)] - clocks.pll_48m_clock, - ); - - #[cfg(timg_timer1)] - let timer1 = Timer::new( - Timer1 { - phantom: PhantomData, - }, - clocks.apb_clock, - ); - - Self { - _timer_group, - timer0, - #[cfg(timg_timer1)] - timer1, - wdt: Wdt::new(), - } + pub fn new_async(timer_group: impl Peripheral

+ 'd, clocks: &Clocks<'d>) -> Self { + Self::new_inner(timer_group, clocks) } } diff --git a/esp-hal/src/twai/filter.rs b/esp-hal/src/twai/filter.rs index 2d0494f20a0..3e05a1cfcd0 100644 --- a/esp-hal/src/twai/filter.rs +++ b/esp-hal/src/twai/filter.rs @@ -1,6 +1,7 @@ //! Two-wire Automotive Interface (TWAI) Filters //! //! ## Overview +//! //! The TWAI controller contains a hardware acceptance filter which can be used //! to filter messages of a particular ID. A node that filters out a message //! does not receive the message, but will still acknowledge it. Acceptance @@ -8,6 +9,7 @@ //! the bus that are irrelevant to the node. //! //! ## Configuration +//! //! The acceptance filters are configured using two 32-bit values known as the //! acceptance code and the acceptance mask. @@ -106,9 +108,16 @@ impl SingleStandardFilter { /// /// Example matching only even IDs, allowing any rtr value and any payload /// data: - /// ```rust, ignore + /// ```rust, no_run + #[doc = crate::before_snippet!()] + /// # use esp_hal::twai::filter::SingleStandardFilter; /// const FILTER: SingleStandardFilter = - /// SingleStandardFilter::new(b"xxxxxxxxxx0", b"x", [b"xxxxxxxx", b"xxxxxxxx"]); + /// SingleStandardFilter::new( + /// b"xxxxxxxxxx0", + /// b"x", + /// [b"xxxxxxxx", b"xxxxxxxx"] + /// ); + /// # } /// ``` pub const fn new(id: &BitFilter<11>, rtr: &BitFilter<1>, payload: [&BitFilter<8>; 2]) -> Self { // The bit values we desire to match against. This determines whether we want a diff --git a/esp-hal/src/twai/mod.rs b/esp-hal/src/twai/mod.rs index 2a5ab3fbd95..aeada4d9c99 100644 --- a/esp-hal/src/twai/mod.rs +++ b/esp-hal/src/twai/mod.rs @@ -1,6 +1,7 @@ //! # Two-wire Automotive Interface (TWAI) //! //! ## Overview +//! //! The TWAI is a multi-master, multi-cast communication protocol with error //! detection and signaling and inbuilt message priorities and arbitration. The //! TWAI protocol is suited for automotive and industrial applications. @@ -18,20 +19,21 @@ //! controllers. It supports Standard Frame Format (11-bit) and Extended Frame //! Format (29-bit) frame identifiers. //! -//! ## Example +//! ## Examples +//! //! ### Transmitting and Receiving Messages +//! //! ```rust, no_run #![doc = crate::before_snippet!()] -//! # use esp_hal::twai; //! # use embedded_can::Id; -//! # use esp_hal::twai::filter::SingleStandardFilter; +//! # use esp_hal::twai; //! # use esp_hal::twai::filter; +//! # use esp_hal::twai::filter::SingleStandardFilter; //! # use esp_hal::twai::TwaiConfiguration; //! # use esp_hal::twai::BaudRate; //! # use esp_hal::twai::TwaiMode; //! # use esp_hal::gpio::Io; //! # use embedded_can::Frame; -//! # use core::option::Option::None; //! # use nb::block; //! # let io = Io::new(peripherals.GPIO, peripherals.IO_MUX); //! // Use GPIO pins 2 and 3 to connect to the respective pins on the TWAI @@ -73,13 +75,14 @@ //! } //! # } //! ``` +//! //! ### Self-testing (self reception of transmitted messages) //! ```rust, no_run #![doc = crate::before_snippet!()] -//! # use esp_hal::twai; //! # use embedded_can::Id; -//! # use esp_hal::twai::filter::SingleStandardFilter; +//! # use esp_hal::twai; //! # use esp_hal::twai::filter; +//! # use esp_hal::twai::filter::SingleStandardFilter; //! # use esp_hal::twai::TwaiConfiguration; //! # use esp_hal::twai::BaudRate; //! # use esp_hal::twai::EspTwaiFrame; @@ -125,7 +128,7 @@ //! // Wait for a frame to be received. //! let frame = block!(can.receive()).unwrap(); //! -//! loop {} +//! # loop {} //! # } //! ``` diff --git a/esp-hal/src/usb_serial_jtag.rs b/esp-hal/src/usb_serial_jtag.rs index 188e3843ae2..5717bf7bc77 100644 --- a/esp-hal/src/usb_serial_jtag.rs +++ b/esp-hal/src/usb_serial_jtag.rs @@ -1,6 +1,7 @@ //! USB Serial/JTAG Controller (USB_SERIAL_JTAG) //! //! ## Overview +//! //! The USB Serial/JTAG controller can be used to program the SoC's flash, read //! program output, or attach a debugger to the running program. This is //! possible for any computer with a USB host (hereafter referred to as 'host'), @@ -27,6 +28,7 @@ //! connect to a host computer //! //! ## Usage +//! //! The USB Serial/JTAG driver implements a number of third-party traits, with //! the intention of making the HAL inter-compatible with various device drivers //! from the community. This includes, but is not limited to, the [embedded-hal] @@ -38,6 +40,7 @@ //! with this driver. //! //! ## Examples +//! //! ### Sending and Receiving Data //! ```rust, no_run #![doc = crate::before_snippet!()] diff --git a/examples/src/bin/embassy_multiprio.rs b/examples/src/bin/embassy_multiprio.rs index c068be165c8..7e852bdf118 100644 --- a/examples/src/bin/embassy_multiprio.rs +++ b/examples/src/bin/embassy_multiprio.rs @@ -91,19 +91,18 @@ async fn main(low_prio_spawner: Spawner) { let timer0: ErasedTimer = timg0.timer0.into(); let timer0 = OneShotTimer::new(timer0); - #[cfg(not(feature = "esp32c2"))] - let timer1 = { - let timg1 = TimerGroup::new(peripherals.TIMG1, &clocks); - let timer0: ErasedTimer = timg1.timer0.into(); - OneShotTimer::new(timer0) - }; - #[cfg(feature = "esp32c2")] - let timer1 = { + cfg_if::cfg_if! { + if #[cfg(feature = "esp32c2")] { let systimer = esp_hal::timer::systimer::SystemTimer::new(peripherals.SYSTIMER) .split::(); let alarm0: ErasedTimer = systimer.alarm0.into(); - OneShotTimer::new(alarm0) - }; + let timer1 = OneShotTimer::new(alarm0); + } else { + let timg1 = TimerGroup::new(peripherals.TIMG1, &clocks); + let timer0: ErasedTimer = timg1.timer0.into(); + let timer1 = OneShotTimer::new(timer0); + } + } let timers = mk_static!([OneShotTimer; 2], [timer0, timer1]); esp_hal_embassy::init(&clocks, timers); diff --git a/examples/src/bin/embassy_serial.rs b/examples/src/bin/embassy_serial.rs index fc9ea25a82b..d29af499283 100644 --- a/examples/src/bin/embassy_serial.rs +++ b/examples/src/bin/embassy_serial.rs @@ -90,20 +90,21 @@ async fn main(spawner: Spawner) { let io = Io::new(peripherals.GPIO, peripherals.IO_MUX); // Default pins for Uart/Serial communication - #[cfg(feature = "esp32")] + cfg_if::cfg_if! { + if #[cfg(feature = "esp32")] { let (tx_pin, rx_pin) = (io.pins.gpio1, io.pins.gpio3); - #[cfg(feature = "esp32c2")] + } else if #[cfg(feature = "esp32c2")] { let (tx_pin, rx_pin) = (io.pins.gpio20, io.pins.gpio19); - #[cfg(feature = "esp32c3")] + } else if #[cfg(feature = "esp32c3")] { let (tx_pin, rx_pin) = (io.pins.gpio21, io.pins.gpio20); - #[cfg(feature = "esp32c6")] + } else if #[cfg(feature = "esp32c6")] { let (tx_pin, rx_pin) = (io.pins.gpio16, io.pins.gpio17); - #[cfg(feature = "esp32h2")] + } else if #[cfg(feature = "esp32h2")] { let (tx_pin, rx_pin) = (io.pins.gpio24, io.pins.gpio23); - #[cfg(feature = "esp32s2")] - let (tx_pin, rx_pin) = (io.pins.gpio43, io.pins.gpio44); - #[cfg(feature = "esp32s3")] + } else if #[cfg((any, feature = "esp32s2", feature = "esp32s3"))] { let (tx_pin, rx_pin) = (io.pins.gpio43, io.pins.gpio44); + } + } let config = Config::default().rx_fifo_full_threshold(READ_BUF_SIZE as u16); diff --git a/examples/src/bin/embassy_spi.rs b/examples/src/bin/embassy_spi.rs index 8f150e22245..247f777d758 100644 --- a/examples/src/bin/embassy_spi.rs +++ b/examples/src/bin/embassy_spi.rs @@ -51,10 +51,13 @@ async fn main(_spawner: Spawner) { let dma = Dma::new(peripherals.DMA); - #[cfg(any(feature = "esp32", feature = "esp32s2"))] + cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32", feature = "esp32s2"))] { let dma_channel = dma.spi2channel; - #[cfg(not(any(feature = "esp32", feature = "esp32s2")))] + } else { let dma_channel = dma.channel0; + } + } let (tx_buffer, tx_descriptors, rx_buffer, rx_descriptors) = dma_buffers!(32000); let dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap(); diff --git a/examples/src/bin/gpio_interrupt.rs b/examples/src/bin/gpio_interrupt.rs index a4f0cfad313..e451e5efc2e 100644 --- a/examples/src/bin/gpio_interrupt.rs +++ b/examples/src/bin/gpio_interrupt.rs @@ -25,10 +25,13 @@ use esp_hal::{ system::SystemControl, }; -#[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))] +cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))] { static BUTTON: Mutex>>> = Mutex::new(RefCell::new(None)); -#[cfg(not(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3")))] + } else { static BUTTON: Mutex>>> = Mutex::new(RefCell::new(None)); + } +} #[entry] fn main() -> ! { @@ -41,10 +44,13 @@ fn main() -> ! { io.set_interrupt_handler(handler); let mut led = Output::new(io.pins.gpio2, Level::Low); - #[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))] + cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))] { let button = io.pins.gpio0; - #[cfg(not(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3")))] + } else { let button = io.pins.gpio9; + } + } let mut button = Input::new(button, Pull::Up); @@ -65,13 +71,16 @@ fn main() -> ! { #[handler] #[ram] fn handler() { - #[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))] + cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))] { esp_println::println!( "GPIO Interrupt with priority {}", esp_hal::xtensa_lx::interrupt::get_level() ); - #[cfg(not(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3")))] + } else { esp_println::println!("GPIO Interrupt"); + } + } if critical_section::with(|cs| { BUTTON diff --git a/examples/src/bin/hello_rgb.rs b/examples/src/bin/hello_rgb.rs index e1223a06e5c..5dacba6a05d 100644 --- a/examples/src/bin/hello_rgb.rs +++ b/examples/src/bin/hello_rgb.rs @@ -67,10 +67,15 @@ fn main() -> ! { } // Configure RMT peripheral globally - #[cfg(not(feature = "esp32h2"))] - let rmt = Rmt::new(peripherals.RMT, 80.MHz(), &clocks).unwrap(); - #[cfg(feature = "esp32h2")] - let rmt = Rmt::new(peripherals.RMT, 32.MHz(), &clocks).unwrap(); + cfg_if::cfg_if! { + if #[cfg(feature = "esp32h2")] { + let freq = 32.MHz(); + } else { + let freq = 80.MHz(); + } + } + + let rmt = Rmt::new(peripherals.RMT, freq, &clocks).unwrap(); // We use one of the RMT channels to instantiate a `SmartLedsAdapter` which can // be used directly with all `smart_led` implementations diff --git a/examples/src/bin/hello_world.rs b/examples/src/bin/hello_world.rs index 59a819914a9..f999bfa7452 100644 --- a/examples/src/bin/hello_world.rs +++ b/examples/src/bin/hello_world.rs @@ -36,20 +36,21 @@ fn main() -> ! { let io = Io::new(peripherals.GPIO, peripherals.IO_MUX); // Default pins for Uart/Serial communication - #[cfg(feature = "esp32")] + cfg_if::cfg_if! { + if #[cfg(feature = "esp32")] { let (mut tx_pin, mut rx_pin) = (io.pins.gpio1, io.pins.gpio3); - #[cfg(feature = "esp32c2")] + } else if #[cfg(feature = "esp32c2")] { let (mut tx_pin, mut rx_pin) = (io.pins.gpio20, io.pins.gpio19); - #[cfg(feature = "esp32c3")] + } else if #[cfg(feature = "esp32c3")] { let (mut tx_pin, mut rx_pin) = (io.pins.gpio21, io.pins.gpio20); - #[cfg(feature = "esp32c6")] + } else if #[cfg(feature = "esp32c6")] { let (mut tx_pin, mut rx_pin) = (io.pins.gpio16, io.pins.gpio17); - #[cfg(feature = "esp32h2")] + } else if #[cfg(feature = "esp32h2")] { let (mut tx_pin, mut rx_pin) = (io.pins.gpio24, io.pins.gpio23); - #[cfg(feature = "esp32s2")] - let (mut tx_pin, mut rx_pin) = (io.pins.gpio43, io.pins.gpio44); - #[cfg(feature = "esp32s3")] + } else if #[cfg(any(feature = "esp32s2", feature = "esp32s3"))] { let (mut tx_pin, mut rx_pin) = (io.pins.gpio43, io.pins.gpio44); + } + } let mut uart0 = Uart::new_with_default_pins(peripherals.UART0, &clocks, &mut tx_pin, &mut rx_pin).unwrap(); diff --git a/examples/src/bin/ieee802154_sniffer.rs b/examples/src/bin/ieee802154_sniffer.rs index 09bd2dd84bb..75d2ca91fe4 100644 --- a/examples/src/bin/ieee802154_sniffer.rs +++ b/examples/src/bin/ieee802154_sniffer.rs @@ -29,10 +29,13 @@ fn main() -> ! { let io = Io::new(peripherals.GPIO, peripherals.IO_MUX); // Default pins for Uart/Serial communication - #[cfg(feature = "esp32c6")] + cfg_if::cfg_if! { + if #[cfg(feature = "esp32c6")] { let (mut tx_pin, mut rx_pin) = (io.pins.gpio16, io.pins.gpio17); - #[cfg(feature = "esp32h2")] + } else if #[cfg(feature = "esp32h2")] { let (mut tx_pin, mut rx_pin) = (io.pins.gpio24, io.pins.gpio23); + } + } let mut uart0 = Uart::new_with_default_pins(peripherals.UART0, &clocks, &mut tx_pin, &mut rx_pin).unwrap(); diff --git a/examples/src/bin/mcpwm.rs b/examples/src/bin/mcpwm.rs index 2e81f992f4b..f25d932e6c8 100644 --- a/examples/src/bin/mcpwm.rs +++ b/examples/src/bin/mcpwm.rs @@ -29,10 +29,15 @@ fn main() -> ! { let pin = io.pins.gpio0; // initialize peripheral - #[cfg(feature = "esp32h2")] - let clock_cfg = PeripheralClockConfig::with_frequency(&clocks, 40.MHz()).unwrap(); - #[cfg(not(feature = "esp32h2"))] - let clock_cfg = PeripheralClockConfig::with_frequency(&clocks, 32.MHz()).unwrap(); + cfg_if::cfg_if! { + if #[cfg(feature = "esp32h2")] { + let freq = 40.MHz(); + } else { + let freq = 32.MHz(); + } + } + + let clock_cfg = PeripheralClockConfig::with_frequency(&clocks, freq).unwrap(); let mut mcpwm = McPwm::new(peripherals.MCPWM0, clock_cfg); diff --git a/examples/src/bin/qspi_flash.rs b/examples/src/bin/qspi_flash.rs index 10b2e6b0b0e..9a9dc1faa6a 100644 --- a/examples/src/bin/qspi_flash.rs +++ b/examples/src/bin/qspi_flash.rs @@ -71,10 +71,14 @@ fn main() -> ! { } let dma = Dma::new(peripherals.DMA); - #[cfg(any(feature = "esp32", feature = "esp32s2"))] + + cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32", feature = "esp32s2"))] { let dma_channel = dma.spi2channel; - #[cfg(not(any(feature = "esp32", feature = "esp32s2")))] + } else { let dma_channel = dma.channel0; + } + } let (tx_buffer, tx_descriptors, rx_buffer, rx_descriptors) = dma_buffers!(256, 320); let mut dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap(); diff --git a/examples/src/bin/serial_interrupts.rs b/examples/src/bin/serial_interrupts.rs index 8af7b9a31e8..ad8fe5d5665 100644 --- a/examples/src/bin/serial_interrupts.rs +++ b/examples/src/bin/serial_interrupts.rs @@ -38,20 +38,21 @@ fn main() -> ! { let io = Io::new(peripherals.GPIO, peripherals.IO_MUX); // Default pins for Uart/Serial communication - #[cfg(feature = "esp32")] + cfg_if::cfg_if! { + if #[cfg(feature = "esp32")] { let (tx_pin, rx_pin) = (io.pins.gpio1, io.pins.gpio3); - #[cfg(feature = "esp32c2")] + } else if #[cfg(feature = "esp32c2")] { let (tx_pin, rx_pin) = (io.pins.gpio20, io.pins.gpio19); - #[cfg(feature = "esp32c3")] + } else if #[cfg(feature = "esp32c3")] { let (tx_pin, rx_pin) = (io.pins.gpio21, io.pins.gpio20); - #[cfg(feature = "esp32c6")] + } else if #[cfg(feature = "esp32c6")] { let (tx_pin, rx_pin) = (io.pins.gpio16, io.pins.gpio17); - #[cfg(feature = "esp32h2")] + } else if #[cfg(feature = "esp32h2")] { let (tx_pin, rx_pin) = (io.pins.gpio24, io.pins.gpio23); - #[cfg(feature = "esp32s2")] - let (tx_pin, rx_pin) = (io.pins.gpio43, io.pins.gpio44); - #[cfg(feature = "esp32s3")] + } else if #[cfg(any(feature = "esp32s2", feature = "esp32s3"))] { let (tx_pin, rx_pin) = (io.pins.gpio43, io.pins.gpio44); + } + } let config = Config::default().rx_fifo_full_threshold(30); let mut uart0 = diff --git a/examples/src/bin/sleep_timer_rtcio.rs b/examples/src/bin/sleep_timer_rtcio.rs index b8e6e727448..2f794cd2e82 100644 --- a/examples/src/bin/sleep_timer_rtcio.rs +++ b/examples/src/bin/sleep_timer_rtcio.rs @@ -52,15 +52,17 @@ fn main() -> ! { let delay = Delay::new(&clocks); let timer = TimerWakeupSource::new(Duration::from_secs(10)); - #[cfg(feature = "esp32c3")] + cfg_if::cfg_if! { + if #[cfg(feature = "esp32c3")] { let wakeup_pins: &mut [(&mut dyn gpio::RtcPinWithResistors, WakeupLevel)] = &mut [ (&mut io.pins.gpio2, WakeupLevel::Low), (&mut io.pins.gpio3, WakeupLevel::High), ]; - - #[cfg(feature = "esp32s3")] + } else if #[cfg(feature = "esp32s3")] { let wakeup_pins: &mut [(&mut dyn gpio::RtcPin, WakeupLevel)] = &mut [(&mut io.pins.gpio18, WakeupLevel::Low)]; + } + } let rtcio = RtcioWakeupSource::new(wakeup_pins); println!("sleeping!"); diff --git a/examples/src/bin/spi_loopback_dma.rs b/examples/src/bin/spi_loopback_dma.rs index 09b65c76ede..09aef7680e2 100644 --- a/examples/src/bin/spi_loopback_dma.rs +++ b/examples/src/bin/spi_loopback_dma.rs @@ -46,10 +46,13 @@ fn main() -> ! { let dma = Dma::new(peripherals.DMA); - #[cfg(any(feature = "esp32", feature = "esp32s2"))] + cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32", feature = "esp32s2"))] { let dma_channel = dma.spi2channel; - #[cfg(not(any(feature = "esp32", feature = "esp32s2")))] + } else { let dma_channel = dma.channel0; + } + } let (tx_buffer, tx_descriptors, rx_buffer, rx_descriptors) = dma_buffers!(32000); let mut dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap(); diff --git a/examples/src/bin/wifi_ble.rs b/examples/src/bin/wifi_ble.rs index 34bf83e936f..b78944fa21f 100644 --- a/examples/src/bin/wifi_ble.rs +++ b/examples/src/bin/wifi_ble.rs @@ -56,15 +56,14 @@ fn main() -> ! { .unwrap(); let io = Io::new(peripherals.GPIO, peripherals.IO_MUX); - #[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))] + + cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))] { let button = Input::new(io.pins.gpio0, Pull::Down); - #[cfg(any( - feature = "esp32c2", - feature = "esp32c3", - feature = "esp32c6", - feature = "esp32h2" - ))] + } else { let button = Input::new(io.pins.gpio9, Pull::Down); + } + } let mut debounce_cnt = 500; diff --git a/examples/src/bin/wifi_embassy_access_point.rs b/examples/src/bin/wifi_embassy_access_point.rs index 6b99c22a985..00f208a678f 100644 --- a/examples/src/bin/wifi_embassy_access_point.rs +++ b/examples/src/bin/wifi_embassy_access_point.rs @@ -83,17 +83,15 @@ async fn main(spawner: Spawner) -> ! { let (wifi_interface, controller) = esp_wifi::wifi::new_with_mode(&init, wifi, WifiApDevice).unwrap(); - #[cfg(feature = "esp32")] - { + cfg_if::cfg_if! { + if #[cfg(feature = "esp32")] { let timg1 = TimerGroup::new(peripherals.TIMG1, &clocks); - esp_hal_embassy::init(&clocks, timg1.timer0); - } - - #[cfg(not(feature = "esp32"))] - { - let systimer = esp_hal::timer::systimer::SystemTimer::new(peripherals.SYSTIMER) - .split::(); - esp_hal_embassy::init(&clocks, systimer.alarm0); + esp_hal_embassy::init(timg1.timer0); + } else { + use esp_hal::timer::systimer::{SystemTimer, Target}; + let systimer = SystemTimer::new(peripherals.SYSTIMER).split::(); + esp_hal_embassy::init(systimer.alarm0); + } } let config = Config::ipv4_static(StaticConfigV4 { diff --git a/examples/src/bin/wifi_embassy_access_point_with_sta.rs b/examples/src/bin/wifi_embassy_access_point_with_sta.rs index 6bc52865a8c..33b28f4fd3f 100644 --- a/examples/src/bin/wifi_embassy_access_point_with_sta.rs +++ b/examples/src/bin/wifi_embassy_access_point_with_sta.rs @@ -91,17 +91,15 @@ async fn main(spawner: Spawner) -> ! { let (wifi_ap_interface, wifi_sta_interface, mut controller) = esp_wifi::wifi::new_ap_sta(&init, wifi).unwrap(); - #[cfg(feature = "esp32")] - { + cfg_if::cfg_if! { + if #[cfg(feature = "esp32")] { let timg1 = TimerGroup::new(peripherals.TIMG1, &clocks); - esp_hal_embassy::init(&clocks, timg1.timer0); - } - - #[cfg(not(feature = "esp32"))] - { - let systimer = esp_hal::timer::systimer::SystemTimer::new(peripherals.SYSTIMER) - .split::(); - esp_hal_embassy::init(&clocks, systimer.alarm0); + esp_hal_embassy::init(timg1.timer0); + } else { + use esp_hal::timer::systimer::{SystemTimer, Target}; + let systimer = SystemTimer::new(peripherals.SYSTIMER).split::(); + esp_hal_embassy::init(systimer.alarm0); + } } let ap_config = Config::ipv4_static(StaticConfigV4 { diff --git a/examples/src/bin/wifi_embassy_bench.rs b/examples/src/bin/wifi_embassy_bench.rs index 81fce5ae720..67f8187a217 100644 --- a/examples/src/bin/wifi_embassy_bench.rs +++ b/examples/src/bin/wifi_embassy_bench.rs @@ -95,17 +95,15 @@ async fn main(spawner: Spawner) -> ! { let (wifi_interface, controller) = esp_wifi::wifi::new_with_mode(&init, wifi, WifiStaDevice).unwrap(); - #[cfg(feature = "esp32")] - { + cfg_if::cfg_if! { + if #[cfg(feature = "esp32")] { let timg1 = TimerGroup::new(peripherals.TIMG1, &clocks); - esp_hal_embassy::init(&clocks, timg1.timer0); - } - - #[cfg(not(feature = "esp32"))] - { - let systimer = esp_hal::timer::systimer::SystemTimer::new(peripherals.SYSTIMER) - .split::(); - esp_hal_embassy::init(&clocks, systimer.alarm0); + esp_hal_embassy::init(timg1.timer0); + } else { + use esp_hal::timer::systimer::{SystemTimer, Target}; + let systimer = SystemTimer::new(peripherals.SYSTIMER).split::(); + esp_hal_embassy::init(systimer.alarm0); + } } let config = Config::dhcpv4(Default::default()); diff --git a/examples/src/bin/wifi_embassy_ble.rs b/examples/src/bin/wifi_embassy_ble.rs index 89fb122ac67..fe2c1854925 100644 --- a/examples/src/bin/wifi_embassy_ble.rs +++ b/examples/src/bin/wifi_embassy_ble.rs @@ -58,27 +58,23 @@ async fn main(_spawner: Spawner) -> ! { .unwrap(); let io = Io::new(peripherals.GPIO, peripherals.IO_MUX); - #[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))] + cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))] { let button = Input::new(io.pins.gpio0, Pull::Down); - #[cfg(any( - feature = "esp32c2", - feature = "esp32c3", - feature = "esp32c6", - feature = "esp32h2" - ))] + } else { let button = Input::new(io.pins.gpio9, Pull::Down); - - #[cfg(feature = "esp32")] - { - let timg1 = TimerGroup::new(peripherals.TIMG1, &clocks); - esp_hal_embassy::init(&clocks, timg1.timer0); + } } - #[cfg(not(feature = "esp32"))] - { - let systimer = esp_hal::timer::systimer::SystemTimer::new(peripherals.SYSTIMER) - .split::(); - esp_hal_embassy::init(&clocks, systimer.alarm0); + cfg_if::cfg_if! { + if #[cfg(feature = "esp32")] { + let timg1 = TimerGroup::new(peripherals.TIMG1, &clocks); + esp_hal_embassy::init(timg1.timer0); + } else { + use esp_hal::timer::systimer::{SystemTimer, Target}; + let systimer = SystemTimer::new(peripherals.SYSTIMER).split::(); + esp_hal_embassy::init(systimer.alarm0); + } } let mut bluetooth = peripherals.BT; diff --git a/examples/src/bin/wifi_embassy_dhcp.rs b/examples/src/bin/wifi_embassy_dhcp.rs index 961ef175cdb..39e1586e3d5 100644 --- a/examples/src/bin/wifi_embassy_dhcp.rs +++ b/examples/src/bin/wifi_embassy_dhcp.rs @@ -76,17 +76,15 @@ async fn main(spawner: Spawner) -> ! { let (wifi_interface, controller) = esp_wifi::wifi::new_with_mode(&init, wifi, WifiStaDevice).unwrap(); - #[cfg(feature = "esp32")] - { + cfg_if::cfg_if! { + if #[cfg(feature = "esp32")] { let timg1 = TimerGroup::new(peripherals.TIMG1, &clocks); - esp_hal_embassy::init(&clocks, timg1.timer0); - } - - #[cfg(not(feature = "esp32"))] - { - let systimer = esp_hal::timer::systimer::SystemTimer::new(peripherals.SYSTIMER) - .split::(); - esp_hal_embassy::init(&clocks, systimer.alarm0); + esp_hal_embassy::init(timg1.timer0); + } else { + use esp_hal::timer::systimer::{SystemTimer, Target}; + let systimer = SystemTimer::new(peripherals.SYSTIMER).split::(); + esp_hal_embassy::init(systimer.alarm0); + } } let config = Config::dhcpv4(Default::default()); diff --git a/examples/src/bin/wifi_embassy_esp_now.rs b/examples/src/bin/wifi_embassy_esp_now.rs index a00179d0f15..bd0f8892852 100644 --- a/examples/src/bin/wifi_embassy_esp_now.rs +++ b/examples/src/bin/wifi_embassy_esp_now.rs @@ -52,17 +52,15 @@ async fn main(_spawner: Spawner) -> ! { let mut esp_now = esp_wifi::esp_now::EspNow::new(&init, wifi).unwrap(); println!("esp-now version {}", esp_now.get_version().unwrap()); - #[cfg(feature = "esp32")] - { + cfg_if::cfg_if! { + if #[cfg(feature = "esp32")] { let timg1 = TimerGroup::new(peripherals.TIMG1, &clocks); - esp_hal_embassy::init(&clocks, timg1.timer0); - } - - #[cfg(not(feature = "esp32"))] - { - let systimer = esp_hal::timer::systimer::SystemTimer::new(peripherals.SYSTIMER) - .split::(); - esp_hal_embassy::init(&clocks, systimer.alarm0); + esp_hal_embassy::init(timg1.timer0); + } else { + use esp_hal::timer::systimer::{SystemTimer, Target}; + let systimer = SystemTimer::new(peripherals.SYSTIMER).split::(); + esp_hal_embassy::init(systimer.alarm0); + } } let mut ticker = Ticker::every(Duration::from_secs(5)); diff --git a/examples/src/bin/wifi_embassy_esp_now_duplex.rs b/examples/src/bin/wifi_embassy_esp_now_duplex.rs index e3d02644f24..e04224dfb2b 100644 --- a/examples/src/bin/wifi_embassy_esp_now_duplex.rs +++ b/examples/src/bin/wifi_embassy_esp_now_duplex.rs @@ -62,17 +62,15 @@ async fn main(spawner: Spawner) -> ! { let esp_now = esp_wifi::esp_now::EspNow::new(&init, wifi).unwrap(); println!("esp-now version {}", esp_now.get_version().unwrap()); - #[cfg(feature = "esp32")] - { + cfg_if::cfg_if! { + if #[cfg(feature = "esp32")] { let timg1 = TimerGroup::new(peripherals.TIMG1, &clocks); - esp_hal_embassy::init(&clocks, timg1.timer0); - } - - #[cfg(not(feature = "esp32"))] - { - let systimer = esp_hal::timer::systimer::SystemTimer::new(peripherals.SYSTIMER) - .split::(); - esp_hal_embassy::init(&clocks, systimer.alarm0); + esp_hal_embassy::init(timg1.timer0); + } else { + use esp_hal::timer::systimer::{SystemTimer, Target}; + let systimer = SystemTimer::new(peripherals.SYSTIMER).split::(); + esp_hal_embassy::init(systimer.alarm0); + } } let (manager, sender, receiver) = esp_now.split(); diff --git a/hil-test/tests/clock_monitor.rs b/hil-test/tests/clock_monitor.rs index 48bdc704676..938108924f5 100644 --- a/hil-test/tests/clock_monitor.rs +++ b/hil-test/tests/clock_monitor.rs @@ -41,11 +41,24 @@ mod tests { #[test] fn test_estimated_clock(mut ctx: Context<'static>) { - #[cfg(feature = "esp32c2")] // 26 MHz - defmt::assert!((23..=29).contains(&ctx.rtc.estimate_xtal_frequency())); - #[cfg(feature = "esp32h2")] // 32 MHz - defmt::assert!((29..=35).contains(&ctx.rtc.estimate_xtal_frequency())); - #[cfg(not(any(feature = "esp32h2", feature = "esp32c2")))] // 40 MHz - defmt::assert!((35..=45).contains(&ctx.rtc.estimate_xtal_frequency())); + cfg_if::cfg_if! { + if #[cfg(feature = "esp32c2")] { + // 26 MHz + let expected_range = 23..=29; + } else if #[cfg(feature = "esp32h2")] { + // 32 MHz + let expected_range = 29..=35; + } else { + // 40 MHz + let expected_range = 35..=45; + } + } + + let measured_frequency = ctx.rtc.estimate_xtal_frequency(); + defmt::assert!( + expected_range.contains(&measured_frequency), + "Measured frequency: {}", + measured_frequency + ); } } diff --git a/hil-test/tests/dma_mem2mem.rs b/hil-test/tests/dma_mem2mem.rs index 7dc7d86baf3..409ca111040 100644 --- a/hil-test/tests/dma_mem2mem.rs +++ b/hil-test/tests/dma_mem2mem.rs @@ -38,10 +38,14 @@ mod tests { let dma = Dma::new(peripherals.DMA); let channel = dma.channel0.configure(false, DmaPriority::Priority0); - #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))] + + cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))] { let dma_peripheral = peripherals.SPI2; - #[cfg(not(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3")))] + } else { let dma_peripheral = peripherals.MEM2MEM1; + } + } let mut mem2mem = Mem2Mem::new(channel, dma_peripheral, tx_descriptors, rx_descriptors).unwrap(); @@ -68,10 +72,14 @@ mod tests { let dma = Dma::new(peripherals.DMA); let channel = dma.channel0.configure(false, DmaPriority::Priority0); - #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))] + + cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))] { let dma_peripheral = peripherals.SPI2; - #[cfg(not(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3")))] + } else { let dma_peripheral = peripherals.MEM2MEM1; + } + } let mut mem2mem = Mem2Mem::new_with_chunk_size( channel, @@ -102,10 +110,14 @@ mod tests { let dma = Dma::new(peripherals.DMA); let channel = dma.channel0.configure(false, DmaPriority::Priority0); - #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))] + + cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))] { let dma_peripheral = peripherals.SPI2; - #[cfg(not(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3")))] + } else { let dma_peripheral = peripherals.MEM2MEM1; + } + } let (tx_descriptors, rx_descriptors) = dma_descriptors!(0, 1024); match Mem2Mem::new_with_chunk_size( @@ -130,10 +142,14 @@ mod tests { let dma = Dma::new(peripherals.DMA); let channel = dma.channel0.configure(false, DmaPriority::Priority0); - #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))] + + cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))] { let dma_peripheral = peripherals.SPI2; - #[cfg(not(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3")))] + } else { let dma_peripheral = peripherals.MEM2MEM1; + } + } let (tx_descriptors, rx_descriptors) = dma_descriptors!(1024, 0); match Mem2Mem::new_with_chunk_size( @@ -156,10 +172,14 @@ mod tests { let dma = Dma::new(peripherals.DMA); let channel = dma.channel0.configure(false, DmaPriority::Priority0); - #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))] + + cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))] { let dma_peripheral = peripherals.SPI2; - #[cfg(not(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3")))] + } else { let dma_peripheral = peripherals.MEM2MEM1; + } + } let (tx_descriptors, rx_descriptors) = dma_descriptors!(1024, 1024); match Mem2Mem::new_with_chunk_size( @@ -182,10 +202,14 @@ mod tests { let dma = Dma::new(peripherals.DMA); let channel = dma.channel0.configure(false, DmaPriority::Priority0); - #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))] + + cfg_if::cfg_if! { + if #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3"))] { let dma_peripheral = peripherals.SPI2; - #[cfg(not(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32s3")))] + } else { let dma_peripheral = peripherals.MEM2MEM1; + } + } let (tx_descriptors, rx_descriptors) = dma_descriptors!(1024, 1024); match Mem2Mem::new_with_chunk_size( diff --git a/hil-test/tests/gpio.rs b/hil-test/tests/gpio.rs index d5052732e61..1d041d8a396 100644 --- a/hil-test/tests/gpio.rs +++ b/hil-test/tests/gpio.rs @@ -25,15 +25,6 @@ use esp_hal::{ }; use hil_test as _; -macro_rules! mk_static { - ($t:ty,$val:expr) => {{ - static STATIC_CELL: static_cell::StaticCell<$t> = static_cell::StaticCell::new(); - #[deny(unused_attributes)] - let x = STATIC_CELL.uninit().write(($val)); - x - }}; -} - static COUNTER: Mutex> = Mutex::new(RefCell::new(0)); static INPUT_PIN: Mutex>>> = Mutex::new(RefCell::new(None)); diff --git a/hil-test/tests/rsa.rs b/hil-test/tests/rsa.rs index e2a83dbb03b..f174d746b37 100644 --- a/hil-test/tests/rsa.rs +++ b/hil-test/tests/rsa.rs @@ -145,21 +145,20 @@ mod tests { let operand_a = BIGNUM_1.as_words(); let operand_b = BIGNUM_2.as_words(); - #[cfg(feature = "esp32")] - { + cfg_if::cfg_if! { + if #[cfg(feature = "esp32")] { let mut rsamulti = RsaMultiplication::::new(&mut ctx.rsa); rsamulti.start_multiplication(operand_a, operand_b); rsamulti.read_results(&mut outbuf); - } - #[cfg(not(feature = "esp32"))] - { + } else { let mut rsamulti = RsaMultiplication::::new( &mut ctx.rsa, operand_a, ); rsamulti.start_multiplication(operand_b); rsamulti.read_results(&mut outbuf); + } } assert_eq!(EXPECTED_OUTPUT, outbuf) }