diff --git a/esp-hal/CHANGELOG.md b/esp-hal/CHANGELOG.md index 2adb516bff0..5a9614e5ba6 100644 --- a/esp-hal/CHANGELOG.md +++ b/esp-hal/CHANGELOG.md @@ -43,6 +43,14 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - The `Spi::with_pins` methods have been removed. (#2373) - The `Spi::new_half_duplex` constructor have been removed. (#2373) - The `HalfDuplexMode` and `FullDuplexMode` parameters have been removed from `Spi`. (#2373) +- Removed the output pin type parameter from `ledc::{Channel, ChannelIFace}` (#2388) +- Removed the output pin type parameter from `mcpwm::operator::{PwmPin, LinkedPins}` (#2388) +- Removed the output pin type parameter from `parl_io::{ClkOutPin, ClkInPin, RxClkInPin}` (#2388) +- Removed the valid pin type parameter from `parl_io::{TxPinConfigWithValidPin, RxPinConfigWithValidPin}` (#2388) +- Removed the pin type parameters from `parl_io::{TxOneBit, TxTwoBits, TxFourBits, TxEightBits, TxSixteenBits}` (#2388) +- Removed the pin type parameters from `parl_io::{RxOneBit, RxTwoBits, RxFourBits, RxEightBits, RxSixteenBits}` (#2388) +- Removed the pin type parameters from `lcd_cam::lcd::i8080::{TxEightBits, TxSixteenBits}` (#2388) +- Removed the pin type parameters from `lcd_cam::cam::{RxEightBits, RxSixteenBits}` (#2388) ## [0.21.1] diff --git a/esp-hal/src/gpio/interconnect.rs b/esp-hal/src/gpio/interconnect.rs index ef863c1bd42..126b66394a5 100644 --- a/esp-hal/src/gpio/interconnect.rs +++ b/esp-hal/src/gpio/interconnect.rs @@ -5,14 +5,11 @@ use crate::{ self, AlternateFunction, AnyPin, - GpioPin, InputPin, Level, NoPin, + OutputPin, OutputSignalType, - PeripheralInput, - PeripheralOutput, - PeripheralSignal, Pin, Pull, FUNC_IN_SEL_OFFSET, @@ -25,9 +22,39 @@ use crate::{ private::{self, Sealed}, }; +/// A signal that can be connected to a peripheral input. +/// +/// Peripheral drivers are encouraged to accept types that implement this and +/// [`PeripheralOutput`] as arguments instead of pin types. +pub trait PeripheralInput: Into + 'static {} + +/// A signal that can be connected to a peripheral input and/or output. +/// +/// Peripheral drivers are encouraged to accept types that implement this and +/// [`PeripheralInput`] as arguments instead of pin types. +pub trait PeripheralOutput: Into + 'static {} + +impl PeripheralInput for P {} +impl PeripheralOutput for P {} + +impl PeripheralInput for InputSignal {} +impl PeripheralInput for OutputSignal {} +impl PeripheralOutput for OutputSignal {} + +impl PeripheralInput for NoPin {} +impl PeripheralOutput for NoPin {} + +impl PeripheralInput for Level {} +impl PeripheralOutput for Level {} + +impl PeripheralInput for InputConnection {} + +impl PeripheralInput for OutputConnection {} +impl PeripheralOutput for OutputConnection {} + /// A configurable input signal between a peripheral and a GPIO pin. /// -/// Obtained by calling [`GpioPin::peripheral_input()`], +/// Obtained by calling [`super::GpioPin::peripheral_input()`], /// [`super::Flex::peripheral_input()`] or [`super::Input::peripheral_input()`]. /// /// Multiple input signals can be connected to one pin. @@ -91,25 +118,14 @@ impl InputSignal { unsafe { GPIO::steal() } .func_in_sel_cfg(signal - FUNC_IN_SEL_OFFSET) .modify(|_, w| unsafe { - w.sel() - .set_bit() - .in_inv_sel() - .bit(invert) - .in_sel() - .bits(input) + w.sel().set_bit(); + w.in_inv_sel().bit(invert); + w.in_sel().bits(input) }); } } -impl PeripheralSignal for InputSignal { - delegate::delegate! { - to self.pin { - fn pull_direction(&self, pull: Pull, _internal: private::Internal); - } - } -} - -impl PeripheralInput for InputSignal { +impl InputSignal { /// Connect the pin to a peripheral input signal. /// /// Since there can only be one input signal connected to a peripheral at a @@ -157,23 +173,22 @@ impl PeripheralInput for InputSignal { .modify(|_, w| w.sel().clear_bit()); } - fn input_signals(&self, _: private::Internal) -> &[(AlternateFunction, gpio::InputSignal)] { - PeripheralInput::input_signals(&self.pin, private::Internal) - } - delegate::delegate! { + #[doc(hidden)] to self.pin { - fn init_input(&self, pull: Pull, _internal: private::Internal); - fn is_input_high(&self, _internal: private::Internal) -> bool; - fn enable_input(&mut self, on: bool, _internal: private::Internal); - fn enable_input_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); + pub fn pull_direction(&self, pull: Pull, _internal: private::Internal); + pub fn input_signals(&self, _internal: private::Internal) -> &[(AlternateFunction, gpio::InputSignal)]; + pub fn init_input(&self, pull: Pull, _internal: private::Internal); + pub fn is_input_high(&self, _internal: private::Internal) -> bool; + pub fn enable_input(&mut self, on: bool, _internal: private::Internal); + pub fn enable_input_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); } } } /// A configurable output signal between a peripheral and a GPIO pin. /// -/// Obtained by calling [`GpioPin::into_peripheral_output()`], +/// Obtained by calling [`super::GpioPin::into_peripheral_output()`], /// [`super::Flex::into_peripheral_output()`] or /// [`super::Output::into_peripheral_output()`]. /// @@ -220,6 +235,19 @@ impl OutputSignal { self } + /// - signal: The input signal to connect to the pin + /// - invert: Configures whether or not to invert the input value + /// - input: The GPIO number to connect to the input signal + fn connect_input(&self, signal: usize, invert: bool, input: u8) { + unsafe { GPIO::steal() } + .func_in_sel_cfg(signal - FUNC_IN_SEL_OFFSET) + .modify(|_, w| unsafe { + w.sel().set_bit(); + w.in_inv_sel().bit(invert); + w.in_sel().bits(input) + }); + } + /// - signal: The output signal to connect to the pin /// - invert: Configures whether or not to invert the output value /// - invert_enable: Configures whether or not to invert the output enable @@ -230,7 +258,7 @@ impl OutputSignal { /// - true: Force the output enable signal to be sourced from bit n of /// GPIO_ENABLE_REG /// - output: The GPIO number to connect to the output signal - fn connect( + fn connect_output( &self, signal: OutputSignalType, invert: bool, @@ -241,27 +269,62 @@ impl OutputSignal { unsafe { GPIO::steal() } .func_out_sel_cfg(output as usize) .modify(|_, w| unsafe { - w.out_sel() - .bits(signal) - .inv_sel() - .bit(invert) - .oen_sel() - .bit(enable_from_gpio) - .oen_inv_sel() - .bit(invert_enable) + w.out_sel().bits(signal); + w.inv_sel().bit(invert); + w.oen_sel().bit(enable_from_gpio); + w.oen_inv_sel().bit(invert_enable) }); } } -impl PeripheralSignal for OutputSignal { - delegate::delegate! { - to self.pin { - fn pull_direction(&self, pull: Pull, _internal: private::Internal); +impl OutputSignal { + /// Connect the pin to a peripheral input signal. + /// + /// Since there can only be one signal connected to a peripheral input at a + /// time, this function will disconnect any previously connected input + /// signals. + fn connect_input_to_peripheral(&mut self, signal: gpio::InputSignal, _: private::Internal) { + let signal_nr = signal as usize; + + let af = if self.is_inverted { + GPIO_FUNCTION + } else { + self.input_signals(private::Internal) + .iter() + .find(|(_af, s)| *s == signal) + .map(|(af, _)| *af) + .unwrap_or(GPIO_FUNCTION) + }; + + if af == GPIO_FUNCTION && signal_nr > INPUT_SIGNAL_MAX as usize { + panic!("Cannot connect GPIO to this peripheral"); + } + + self.pin.set_alternate_function(af, private::Internal); + + if signal_nr <= INPUT_SIGNAL_MAX as usize { + self.connect_input(signal_nr, self.is_inverted, self.pin.number()); } } -} -impl PeripheralOutput for OutputSignal { + /// Remove this pin from a connected peripheral input. + /// + /// Clears the entry in the GPIO matrix / Io mux that associates this input + /// pin with the given [input `signal`](`InputSignal`). Any other + /// connected signals remain intact. + fn disconnect_input_from_peripheral( + &mut self, + signal: gpio::InputSignal, + _: private::Internal, + ) { + self.pin + .set_alternate_function(GPIO_FUNCTION, private::Internal); + + unsafe { GPIO::steal() } + .func_in_sel_cfg(signal as usize - FUNC_IN_SEL_OFFSET) + .modify(|_, w| w.sel().clear_bit()); + } + /// Connect the pin to a peripheral output signal. fn connect_peripheral_to_output(&mut self, signal: gpio::OutputSignal, _: private::Internal) { let af = if self.is_inverted { @@ -282,7 +345,7 @@ impl PeripheralOutput for OutputSignal { OUTPUT_SIGNAL_MAX }; - self.connect( + self.connect_output( clipped_signal, self.is_inverted, false, @@ -309,38 +372,45 @@ impl PeripheralOutput for OutputSignal { .modify(|_, w| w.sel().clear_bit()); } - fn output_signals(&self, _: private::Internal) -> &[(AlternateFunction, gpio::OutputSignal)] { - PeripheralOutput::output_signals(&self.pin, private::Internal) - } - delegate::delegate! { + #[doc(hidden)] to self.pin { - fn set_to_open_drain_output(&mut self, _internal: private::Internal); - fn set_to_push_pull_output(&mut self, _internal: private::Internal); - fn enable_output(&mut self, on: bool, _internal: private::Internal); - fn set_output_high(&mut self, on: bool, _internal: private::Internal); - fn set_drive_strength(&mut self, strength: gpio::DriveStrength, _internal: private::Internal); - fn enable_open_drain(&mut self, on: bool, _internal: private::Internal); - fn enable_output_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); - fn internal_pull_up_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); - fn internal_pull_down_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); - fn is_set_high(&self, _internal: private::Internal) -> bool; + pub fn pull_direction(&self, pull: Pull, _internal: private::Internal); + pub fn input_signals(&self, _internal: private::Internal) -> &[(AlternateFunction, gpio::InputSignal)]; + pub fn init_input(&self, pull: Pull, _internal: private::Internal); + pub fn is_input_high(&self, _internal: private::Internal) -> bool; + pub fn enable_input(&mut self, on: bool, _internal: private::Internal); + pub fn enable_input_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); + + pub fn output_signals(&self, _internal: private::Internal) -> &[(AlternateFunction, gpio::OutputSignal)]; + pub fn set_to_open_drain_output(&mut self, _internal: private::Internal); + pub fn set_to_push_pull_output(&mut self, _internal: private::Internal); + pub fn enable_output(&mut self, on: bool, _internal: private::Internal); + pub fn set_output_high(&mut self, on: bool, _internal: private::Internal); + pub fn set_drive_strength(&mut self, strength: gpio::DriveStrength, _internal: private::Internal); + pub fn enable_open_drain(&mut self, on: bool, _internal: private::Internal); + pub fn enable_output_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); + pub fn internal_pull_up_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); + pub fn internal_pull_down_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); + pub fn is_set_high(&self, _internal: private::Internal) -> bool; } } } #[derive(Clone)] -enum AnyInputSignalInner { +enum InputConnectionInner { Input(InputSignal), Constant(Level), - Dummy(NoPin), } -/// A type-erased input signal. +/// A type-erased peripheral input signal connection. +/// +/// This is mainly intended for internal use, but it can be used to connect +/// peripherals within the MCU without external hardware. #[derive(Clone)] -pub struct AnyInputSignal(AnyInputSignalInner); +pub struct InputConnection(InputConnectionInner); -impl Peripheral for AnyInputSignal { +impl Peripheral for InputConnection { type P = Self; unsafe fn clone_unchecked(&self) -> Self::P { @@ -348,73 +418,182 @@ impl Peripheral for AnyInputSignal { } } -impl From for AnyInputSignal { +impl From for InputConnection { fn from(input: InputSignal) -> Self { - Self(AnyInputSignalInner::Input(input)) + Self(InputConnectionInner::Input(input)) } } -impl From for AnyInputSignal { +impl From for InputConnection { fn from(level: Level) -> Self { - Self(AnyInputSignalInner::Constant(level)) + Self(InputConnectionInner::Constant(level)) } } -impl From for AnyInputSignal { - fn from(pin: NoPin) -> Self { - Self(AnyInputSignalInner::Dummy(pin)) +impl From for InputConnection { + fn from(_pin: NoPin) -> Self { + Self(InputConnectionInner::Constant(Level::Low)) } } -impl From for AnyInputSignal { - fn from(input: AnyPin) -> Self { - Self(AnyInputSignalInner::Input(input.peripheral_input())) +impl

From

for InputConnection +where + P: InputPin, +{ + fn from(input: P) -> Self { + Self(InputConnectionInner::Input( + input.degrade().peripheral_input(), + )) } } -impl From> for AnyInputSignal -where - GpioPin: InputPin, -{ - fn from(pin: GpioPin) -> Self { - Self(AnyInputSignalInner::Input(pin.peripheral_input())) +impl From for InputConnection { + fn from(output_signal: OutputSignal) -> Self { + Self(InputConnectionInner::Input(InputSignal { + pin: output_signal.pin, + is_inverted: output_signal.is_inverted, + })) + } +} + +impl From for InputConnection { + fn from(conn: OutputConnection) -> Self { + match conn.0 { + OutputConnectionInner::Output(inner) => inner.into(), + OutputConnectionInner::Constant(inner) => inner.into(), + } } } -impl Sealed for AnyInputSignal {} -impl PeripheralSignal for AnyInputSignal { +impl Sealed for InputConnection {} + +impl InputConnection { delegate::delegate! { + #[doc(hidden)] to match &self.0 { - AnyInputSignalInner::Input(pin) => pin, - AnyInputSignalInner::Constant(level) => level, - AnyInputSignalInner::Dummy(pin) => pin, + InputConnectionInner::Input(pin) => pin, + InputConnectionInner::Constant(level) => level, } { - fn pull_direction(&self, pull: Pull, _internal: private::Internal); + pub fn pull_direction(&self, pull: Pull, _internal: private::Internal); + pub fn init_input(&self, pull: Pull, _internal: private::Internal); + pub fn is_input_high(&self, _internal: private::Internal) -> bool; + pub fn input_signals(&self, _internal: private::Internal) -> &[(AlternateFunction, gpio::InputSignal)]; + } + + #[doc(hidden)] + to match &mut self.0 { + InputConnectionInner::Input(pin) => pin, + InputConnectionInner::Constant(level) => level, + } { + pub fn enable_input(&mut self, on: bool, _internal: private::Internal); + pub fn enable_input_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); + pub fn connect_input_to_peripheral(&mut self, signal: crate::gpio::InputSignal, _internal: private::Internal); + pub fn disconnect_input_from_peripheral(&mut self, signal: crate::gpio::InputSignal, _internal: private::Internal); + } + } +} + +enum OutputConnectionInner { + Output(OutputSignal), + Constant(Level), +} + +/// A type-erased peripheral (input and) output signal connection. +/// +/// This is mainly intended for internal use, but it can be used to connect +/// peripherals within the MCU without external hardware. +pub struct OutputConnection(OutputConnectionInner); + +impl Sealed for OutputConnection {} + +impl Peripheral for OutputConnection { + type P = Self; + + unsafe fn clone_unchecked(&self) -> Self::P { + match self { + Self(OutputConnectionInner::Output(signal)) => Self::from(signal.clone_unchecked()), + Self(OutputConnectionInner::Constant(level)) => Self::from(*level), } } } -impl PeripheralInput for AnyInputSignal { +impl From for OutputConnection { + fn from(_pin: NoPin) -> Self { + Self(OutputConnectionInner::Constant(Level::Low)) + } +} + +impl From for OutputConnection { + fn from(level: Level) -> Self { + Self(OutputConnectionInner::Constant(level)) + } +} + +impl

From

for OutputConnection +where + P: OutputPin, +{ + fn from(input: P) -> Self { + Self(OutputConnectionInner::Output( + input.degrade().into_peripheral_output(), + )) + } +} + +impl From for OutputConnection { + fn from(signal: OutputSignal) -> Self { + Self(OutputConnectionInner::Output(signal)) + } +} + +impl OutputConnection { delegate::delegate! { + #[doc(hidden)] + to match &self.0 { + OutputConnectionInner::Output(pin) => pin, + OutputConnectionInner::Constant(level) => level, + } { + pub fn is_input_high(&self, _internal: private::Internal) -> bool; + pub fn input_signals(&self, _internal: private::Internal) -> &[(AlternateFunction, gpio::InputSignal)]; + } + #[doc(hidden)] + to match &mut self.0 { + OutputConnectionInner::Output(pin) => pin, + OutputConnectionInner::Constant(level) => level, + } { + pub fn pull_direction(&mut self, pull: Pull, _internal: private::Internal); + pub fn init_input(&mut self, pull: Pull, _internal: private::Internal); + pub fn enable_input(&mut self, on: bool, _internal: private::Internal); + pub fn enable_input_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); + pub fn connect_input_to_peripheral(&mut self, signal: crate::gpio::InputSignal, _internal: private::Internal); + pub fn disconnect_input_from_peripheral(&mut self, signal: crate::gpio::InputSignal, _internal: private::Internal); + } + + #[doc(hidden)] to match &self.0 { - AnyInputSignalInner::Input(pin) => pin, - AnyInputSignalInner::Constant(level) => level, - AnyInputSignalInner::Dummy(pin) => pin, + OutputConnectionInner::Output(pin) => pin, + OutputConnectionInner::Constant(level) => level, } { - fn init_input(&self, pull: Pull, _internal: private::Internal); - fn is_input_high(&self, _internal: private::Internal) -> bool; - fn input_signals(&self, _internal: private::Internal) -> &[(AlternateFunction, gpio::InputSignal)]; + pub fn is_set_high(&self, _internal: private::Internal) -> bool; + pub fn output_signals(&self, _internal: private::Internal) -> &[(AlternateFunction, gpio::OutputSignal)]; } + #[doc(hidden)] to match &mut self.0 { - AnyInputSignalInner::Input(pin) => pin, - AnyInputSignalInner::Constant(level) => level, - AnyInputSignalInner::Dummy(pin) => pin, + OutputConnectionInner::Output(pin) => pin, + OutputConnectionInner::Constant(level) => level, } { - fn enable_input(&mut self, on: bool, _internal: private::Internal); - fn enable_input_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); - fn connect_input_to_peripheral(&mut self, signal: crate::gpio::InputSignal, _internal: private::Internal); - fn disconnect_input_from_peripheral(&mut self, signal: crate::gpio::InputSignal, _internal: private::Internal); + pub fn set_to_open_drain_output(&mut self, _internal: private::Internal); + pub fn set_to_push_pull_output(&mut self, _internal: private::Internal); + pub fn enable_output(&mut self, on: bool, _internal: private::Internal); + pub fn set_output_high(&mut self, on: bool, _internal: private::Internal); + pub fn set_drive_strength(&mut self, strength: gpio::DriveStrength, _internal: private::Internal); + pub fn enable_open_drain(&mut self, on: bool, _internal: private::Internal); + pub fn enable_output_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); + pub fn internal_pull_up_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); + pub fn internal_pull_down_in_sleep_mode(&mut self, on: bool, _internal: private::Internal); + pub fn connect_peripheral_to_output(&mut self, signal: gpio::OutputSignal, _internal: private::Internal); + pub fn disconnect_from_peripheral_output(&mut self, signal: gpio::OutputSignal, _internal: private::Internal); } } } diff --git a/esp-hal/src/gpio/mod.rs b/esp-hal/src/gpio/mod.rs index d64b0e58b10..8e1812c78ec 100644 --- a/esp-hal/src/gpio/mod.rs +++ b/esp-hal/src/gpio/mod.rs @@ -306,6 +306,11 @@ pub trait Pin: Sealed { /// GPIO number fn number(&self) -> u8; + #[doc(hidden)] + fn mask(&self) -> u32 { + 1 << (self.number() % 32) + } + /// Type-erase (degrade) this pin into an AnyPin. /// /// This converts pin singletons (`GpioPin<0>`, …), which are all different @@ -335,14 +340,15 @@ pub trait Pin: Sealed { /// Enable or disable the GPIO pin output buffer. #[doc(hidden)] - fn output_enable(&self, enable: bool, _: private::Internal) { - let bank = self.gpio_bank(private::Internal); - let mask = 1 << (self.number() % 32); - if enable { - bank.write_out_en_set(mask); - } else { - bank.write_out_en_clear(mask); - } + fn enable_output(&self, enable: bool, _: private::Internal) { + self.gpio_bank(private::Internal) + .write_out_en(self.mask(), enable); + } + + /// Enable input for the pin + #[doc(hidden)] + fn enable_input(&mut self, on: bool, _: private::Internal) { + get_io_mux_reg(self.number()).modify(|_, w| w.fun_ie().bit(on)); } #[doc(hidden)] @@ -353,110 +359,141 @@ pub trait Pin: Sealed { #[doc(hidden)] fn gpio_bank(&self, _: private::Internal) -> GpioRegisterAccess; -} -/// Common trait implemented by signals which can be used as peripheral inputs -/// or outputs. -pub trait PeripheralSignal: Sealed { - /// Configure the pullup and pulldown resistors #[doc(hidden)] - fn pull_direction(&self, pull: Pull, _: private::Internal); + fn pull_direction(&self, pull: Pull, _: private::Internal) { + let pull_up = pull == Pull::Up; + let pull_down = pull == Pull::Down; + + #[cfg(esp32)] + crate::soc::gpio::errata36(self.degrade_pin(private::Internal), pull_up, pull_down); + + get_io_mux_reg(self.number()).modify(|_, w| { + w.fun_wpd().bit(pull_down); + w.fun_wpu().bit(pull_up) + }); + } } -/// Trait implemented by pins which can be used as peripheral inputs. -pub trait PeripheralInput: PeripheralSignal { +/// Trait implemented by pins which can be used as inputs. +pub trait InputPin: Pin + Into + 'static { /// Init as input with the given pull-up/pull-down #[doc(hidden)] - fn init_input(&self, pull: Pull, _: private::Internal); + fn init_input(&self, pull: Pull, _: private::Internal) { + self.pull_direction(pull, private::Internal); - /// Enable input for the pin - #[doc(hidden)] - fn enable_input(&mut self, on: bool, _: private::Internal); + #[cfg(usb_device)] + disable_usb_pads(self.number()); + + get_io_mux_reg(self.number()).modify(|_, w| unsafe { + w.mcu_sel().bits(GPIO_FUNCTION as u8); + w.fun_ie().set_bit(); + w.slp_sel().clear_bit() + }); + } /// Enable input in sleep mode for the pin #[doc(hidden)] - fn enable_input_in_sleep_mode(&mut self, on: bool, _: private::Internal); + fn enable_input_in_sleep_mode(&mut self, on: bool, _: private::Internal) { + get_io_mux_reg(self.number()).modify(|_, w| w.mcu_ie().bit(on)); + } /// The current state of the input #[doc(hidden)] - fn is_input_high(&self, _: private::Internal) -> bool; + fn is_input_high(&self, _: private::Internal) -> bool { + self.gpio_bank(private::Internal).read_input() & self.mask() != 0 + } +} - /// Returns the list of input signals that can be connected to this pin - /// using IO_MUX. +/// Trait implemented by pins which can be used as outputs. +pub trait OutputPin: Pin + Into + 'static { + /// Set up as output #[doc(hidden)] - fn input_signals(&self, _: private::Internal) -> &[(AlternateFunction, InputSignal)]; + fn init_output( + &mut self, + alternate: AlternateFunction, + open_drain: bool, + _: private::Internal, + ) { + self.enable_output(true, private::Internal); - /// Connect the pin to a peripheral. - #[doc(hidden)] - fn connect_input_to_peripheral(&mut self, signal: InputSignal, _: private::Internal); + let gpio = unsafe { GPIO::steal() }; - /// Disconnect the pin from a peripheral. - #[doc(hidden)] - fn disconnect_input_from_peripheral(&mut self, signal: InputSignal, _: private::Internal); -} + gpio.pin(self.number() as usize) + .modify(|_, w| w.pad_driver().bit(open_drain)); + + gpio.func_out_sel_cfg(self.number() as usize) + .modify(|_, w| unsafe { w.out_sel().bits(OutputSignal::GPIO as OutputSignalType) }); + + #[cfg(any(esp32c3, esp32s3))] + disable_usb_pads(self.number()); + + get_io_mux_reg(self.number()).modify(|_, w| unsafe { + w.mcu_sel().bits(alternate as u8); + w.fun_ie().bit(open_drain); + w.fun_drv().bits(DriveStrength::I20mA as u8); + w.slp_sel().clear_bit() + }); + } -/// Trait implemented by pins which can be used as peripheral outputs. -pub trait PeripheralOutput: PeripheralSignal { /// Configure open-drain mode #[doc(hidden)] - fn set_to_open_drain_output(&mut self, _: private::Internal); + fn set_to_open_drain_output(&mut self, _: private::Internal) { + self.init_output(GPIO_FUNCTION, true, private::Internal); + } /// Configure output mode #[doc(hidden)] - fn set_to_push_pull_output(&mut self, _: private::Internal); - - /// Enable/disable the pin as output - #[doc(hidden)] - fn enable_output(&mut self, on: bool, _: private::Internal); + fn set_to_push_pull_output(&mut self, _: private::Internal) { + self.init_output(GPIO_FUNCTION, false, private::Internal); + } /// Set the pin's level to high or low #[doc(hidden)] - fn set_output_high(&mut self, on: bool, _: private::Internal); + fn set_output_high(&mut self, high: bool, _: private::Internal) { + self.gpio_bank(private::Internal) + .write_output(self.mask(), high); + } /// Configure the [DriveStrength] of the pin #[doc(hidden)] - fn set_drive_strength(&mut self, strength: DriveStrength, _: private::Internal); + fn set_drive_strength(&mut self, strength: DriveStrength, _: private::Internal) { + get_io_mux_reg(self.number()).modify(|_, w| unsafe { w.fun_drv().bits(strength as u8) }); + } /// Enable/disable open-drain mode #[doc(hidden)] - fn enable_open_drain(&mut self, on: bool, _: private::Internal); + fn enable_open_drain(&mut self, on: bool, _: private::Internal) { + unsafe { GPIO::steal() } + .pin(self.number() as usize) + .modify(|_, w| w.pad_driver().bit(on)); + } /// Enable/disable output in sleep mode #[doc(hidden)] - fn enable_output_in_sleep_mode(&mut self, on: bool, _: private::Internal); + fn enable_output_in_sleep_mode(&mut self, on: bool, _: private::Internal) { + get_io_mux_reg(self.number()).modify(|_, w| w.mcu_oe().bit(on)); + } /// Configure internal pull-up resistor in sleep mode #[doc(hidden)] - fn internal_pull_up_in_sleep_mode(&mut self, on: bool, _: private::Internal); + fn internal_pull_up_in_sleep_mode(&mut self, on: bool, _: private::Internal) { + get_io_mux_reg(self.number()).modify(|_, w| w.mcu_wpu().bit(on)); + } /// Configure internal pull-down resistor in sleep mode #[doc(hidden)] - fn internal_pull_down_in_sleep_mode(&mut self, on: bool, _: private::Internal); + fn internal_pull_down_in_sleep_mode(&mut self, on: bool, _: private::Internal) { + get_io_mux_reg(self.number()).modify(|_, w| w.mcu_wpd().bit(on)); + } /// Is the output set to high #[doc(hidden)] - fn is_set_high(&self, _: private::Internal) -> bool; - - /// Returns the list of output signals that can be connected to this pin - /// using IO_MUX. - #[doc(hidden)] - fn output_signals(&self, _: private::Internal) -> &[(AlternateFunction, OutputSignal)]; - - /// Connect the pin to a peripheral. - #[doc(hidden)] - fn connect_peripheral_to_output(&mut self, signal: OutputSignal, _: private::Internal); - - /// Disconnect the pin from a peripheral. - #[doc(hidden)] - fn disconnect_from_peripheral_output(&mut self, signal: OutputSignal, _: private::Internal); + fn is_set_high(&self, _: private::Internal) -> bool { + self.gpio_bank(private::Internal).read_output() & self.mask() != 0 + } } -/// Trait implemented by pins which can be used as inputs. -pub trait InputPin: Pin + PeripheralInput + Into + 'static {} - -/// Trait implemented by pins which can be used as outputs. -pub trait OutputPin: Pin + PeripheralOutput + Into + 'static {} - /// Trait implemented by pins which can be used as analog pins pub trait AnalogPin: Pin { /// Configure the pin for analog operation @@ -492,6 +529,14 @@ pub enum GpioRegisterAccess { } impl GpioRegisterAccess { + fn write_out_en(self, word: u32, enable: bool) { + if enable { + self.write_out_en_set(word); + } else { + self.write_out_en_clear(word); + } + } + fn write_out_en_clear(self, word: u32) { match self { Self::Bank0 => Bank0GpioRegisterAccess::write_out_en_clear(word), @@ -540,6 +585,14 @@ impl GpioRegisterAccess { } } + fn write_output(self, word: u32, set: bool) { + if set { + self.write_output_set(word); + } else { + self.write_output_clear(word); + } + } + fn write_output_set(self, word: u32) { match self { Self::Bank0 => Bank0GpioRegisterAccess::write_output_set(word), @@ -721,161 +774,10 @@ where impl private::Sealed for GpioPin {} -impl PeripheralSignal for GpioPin -where - Self: Pin, -{ - fn pull_direction(&self, pull: Pull, _: private::Internal) { - let pull_up = pull == Pull::Up; - let pull_down = pull == Pull::Down; - - #[cfg(esp32)] - crate::soc::gpio::errata36(self.degrade_pin(private::Internal), pull_up, pull_down); - - get_io_mux_reg(GPIONUM).modify(|_, w| { - w.fun_wpd().bit(pull_down); - w.fun_wpu().bit(pull_up) - }); - } -} - -impl PeripheralInput for GpioPin -where - Self: Pin, -{ - fn init_input(&self, pull: Pull, _: private::Internal) { - self.pull_direction(pull, private::Internal); - - #[cfg(usb_device)] - disable_usb_pads(GPIONUM); - - get_io_mux_reg(GPIONUM).modify(|_, w| unsafe { - w.mcu_sel().bits(GPIO_FUNCTION as u8); - w.fun_ie().set_bit(); - w.slp_sel().clear_bit() - }); - } - - fn enable_input(&mut self, on: bool, _: private::Internal) { - get_io_mux_reg(GPIONUM).modify(|_, w| w.fun_ie().bit(on)); - } - - fn enable_input_in_sleep_mode(&mut self, on: bool, _: private::Internal) { - get_io_mux_reg(GPIONUM).modify(|_, w| w.mcu_ie().bit(on)); - } - - fn is_input_high(&self, _: private::Internal) -> bool { - self.gpio_bank(private::Internal).read_input() & (1 << (GPIONUM % 32)) != 0 - } - - fn input_signals(&self, _: private::Internal) -> &[(AlternateFunction, InputSignal)] { - ::input_signals(self, private::Internal) - } - - fn connect_input_to_peripheral(&mut self, signal: InputSignal, _: private::Internal) { - self.peripheral_input() - .connect_input_to_peripheral(signal, private::Internal); - } - - fn disconnect_input_from_peripheral(&mut self, signal: InputSignal, _: private::Internal) { - self.peripheral_input() - .disconnect_input_from_peripheral(signal, private::Internal); - } -} - -impl PeripheralOutput for GpioPin -where - Self: OutputPin + Pin, -{ - fn set_to_open_drain_output(&mut self, _: private::Internal) { - self.init_output(GPIO_FUNCTION, true); - } - - fn set_to_push_pull_output(&mut self, _: private::Internal) { - self.init_output(GPIO_FUNCTION, false); - } - - fn enable_output(&mut self, on: bool, _: private::Internal) { - self.output_enable(on, private::Internal); - } - - fn set_output_high(&mut self, high: bool, _: private::Internal) { - let bank = self.gpio_bank(private::Internal); - let mask = 1 << (GPIONUM % 32); - if high { - bank.write_output_set(mask); - } else { - bank.write_output_clear(mask); - } - } - - fn set_drive_strength(&mut self, strength: DriveStrength, _: private::Internal) { - get_io_mux_reg(GPIONUM).modify(|_, w| unsafe { w.fun_drv().bits(strength as u8) }); - } - - fn enable_open_drain(&mut self, on: bool, _: private::Internal) { - unsafe { GPIO::steal() } - .pin(GPIONUM as usize) - .modify(|_, w| w.pad_driver().bit(on)); - } - - fn internal_pull_up_in_sleep_mode(&mut self, on: bool, _: private::Internal) { - get_io_mux_reg(GPIONUM).modify(|_, w| w.mcu_wpu().bit(on)); - } - - fn internal_pull_down_in_sleep_mode(&mut self, on: bool, _: private::Internal) { - get_io_mux_reg(GPIONUM).modify(|_, w| w.mcu_wpd().bit(on)); - } - - fn enable_output_in_sleep_mode(&mut self, on: bool, _: private::Internal) { - get_io_mux_reg(GPIONUM).modify(|_, w| w.mcu_oe().bit(on)); - } - - fn is_set_high(&self, _: private::Internal) -> bool { - self.gpio_bank(private::Internal).read_output() & (1 << (GPIONUM % 32)) != 0 - } - - fn output_signals(&self, _: private::Internal) -> &[(AlternateFunction, OutputSignal)] { - ::output_signals(self, private::Internal) - } - - fn connect_peripheral_to_output(&mut self, signal: OutputSignal, _: private::Internal) { - self.degrade_pin(private::Internal) - .connect_peripheral_to_output(signal, private::Internal); - } - - fn disconnect_from_peripheral_output(&mut self, signal: OutputSignal, _: private::Internal) { - self.degrade_pin(private::Internal) - .disconnect_from_peripheral_output(signal, private::Internal); - } -} - impl GpioPin where Self: OutputPin, { - fn init_output(&self, alternate: AlternateFunction, open_drain: bool) { - self.output_enable(true, private::Internal); - - let gpio = unsafe { GPIO::steal() }; - - gpio.pin(GPIONUM as usize) - .modify(|_, w| w.pad_driver().bit(open_drain)); - - gpio.func_out_sel_cfg(GPIONUM as usize) - .modify(|_, w| unsafe { w.out_sel().bits(OutputSignal::GPIO as OutputSignalType) }); - - #[cfg(any(esp32c3, esp32s3))] - disable_usb_pads(GPIONUM); - - get_io_mux_reg(GPIONUM).modify(|_, w| unsafe { - w.mcu_sel().bits(alternate as u8); - w.fun_ie().bit(open_drain); - w.fun_drv().bits(DriveStrength::I20mA as u8); - w.slp_sel().clear_bit() - }); - } - /// Turns the pin object into a peripheral /// [output][interconnect::OutputSignal]. /// @@ -1918,7 +1820,7 @@ where /// Set the GPIO to input mode. pub fn set_as_input(&mut self, pull: Pull) { self.pin.init_input(pull, private::Internal); - self.pin.output_enable(false, private::Internal); + self.pin.enable_output(false, private::Internal); } /// Get whether the pin input level is high. @@ -2138,12 +2040,6 @@ pub(crate) mod internal { }) } - fn output_enable(&self, enable: bool, _: private::Internal) { - handle_gpio_input!(&self.0, target, { - Pin::output_enable(target, enable, private::Internal) - }) - } - fn output_signals(&self, _: private::Internal) -> &[(AlternateFunction, OutputSignal)] { handle_gpio_input!(&self.0, target, { Pin::output_signals(target, private::Internal) @@ -2163,140 +2059,7 @@ pub(crate) mod internal { } } - impl PeripheralSignal for AnyPin { - fn pull_direction(&self, pull: Pull, _: private::Internal) { - handle_gpio_input!(&self.0, target, { - PeripheralSignal::pull_direction(target, pull, private::Internal) - }) - } - } - - impl PeripheralInput for AnyPin { - fn init_input(&self, pull: Pull, _: private::Internal) { - handle_gpio_input!(&self.0, target, { - PeripheralInput::init_input(target, pull, private::Internal) - }); - } - - fn enable_input(&mut self, on: bool, _: private::Internal) { - handle_gpio_input!(&mut self.0, target, { - PeripheralInput::enable_input(target, on, private::Internal) - }); - } - - fn enable_input_in_sleep_mode(&mut self, on: bool, _: private::Internal) { - handle_gpio_input!(&mut self.0, target, { - PeripheralInput::enable_input_in_sleep_mode(target, on, private::Internal) - }); - } - - fn is_input_high(&self, _: private::Internal) -> bool { - handle_gpio_input!(&self.0, target, { - PeripheralInput::is_input_high(target, private::Internal) - }) - } - - fn input_signals(&self, _: private::Internal) -> &[(AlternateFunction, InputSignal)] { - handle_gpio_input!(&self.0, target, { - PeripheralInput::input_signals(target, private::Internal) - }) - } - - fn connect_input_to_peripheral(&mut self, signal: InputSignal, _: private::Internal) { - interconnect::InputSignal::new(self.degrade_pin(private::Internal)) - .connect_input_to_peripheral(signal, private::Internal); - } - - fn disconnect_input_from_peripheral(&mut self, signal: InputSignal, _: private::Internal) { - interconnect::InputSignal::new(self.degrade_pin(private::Internal)) - .disconnect_input_from_peripheral(signal, private::Internal); - } - } - impl InputPin for AnyPin {} - - impl PeripheralOutput for AnyPin { - fn set_to_open_drain_output(&mut self, _: private::Internal) { - handle_gpio_output!(&mut self.0, target, { - PeripheralOutput::set_to_open_drain_output(target, private::Internal) - }); - } - - fn set_to_push_pull_output(&mut self, _: private::Internal) { - handle_gpio_output!(&mut self.0, target, { - PeripheralOutput::set_to_push_pull_output(target, private::Internal) - }); - } - - fn enable_output(&mut self, on: bool, _: private::Internal) { - handle_gpio_output!(&mut self.0, target, { - PeripheralOutput::enable_output(target, on, private::Internal) - }); - } - - fn set_output_high(&mut self, on: bool, _: private::Internal) { - handle_gpio_output!(&mut self.0, target, { - PeripheralOutput::set_output_high(target, on, private::Internal) - }); - } - - fn set_drive_strength(&mut self, strength: DriveStrength, _: private::Internal) { - handle_gpio_output!(&mut self.0, target, { - PeripheralOutput::set_drive_strength(target, strength, private::Internal) - }); - } - - fn enable_open_drain(&mut self, on: bool, _: private::Internal) { - handle_gpio_output!(&mut self.0, target, { - PeripheralOutput::enable_open_drain(target, on, private::Internal) - }); - } - - fn enable_output_in_sleep_mode(&mut self, on: bool, _: private::Internal) { - handle_gpio_output!(&mut self.0, target, { - PeripheralOutput::enable_output_in_sleep_mode(target, on, private::Internal) - }); - } - - fn internal_pull_up_in_sleep_mode(&mut self, on: bool, _: private::Internal) { - handle_gpio_output!(&mut self.0, target, { - PeripheralOutput::internal_pull_up_in_sleep_mode(target, on, private::Internal) - }); - } - - fn internal_pull_down_in_sleep_mode(&mut self, on: bool, _: private::Internal) { - handle_gpio_output!(&mut self.0, target, { - PeripheralOutput::internal_pull_down_in_sleep_mode(target, on, private::Internal) - }); - } - - fn is_set_high(&self, _: private::Internal) -> bool { - handle_gpio_output!(&self.0, target, { - PeripheralOutput::is_set_high(target, private::Internal) - }) - } - - fn output_signals(&self, _: private::Internal) -> &[(AlternateFunction, OutputSignal)] { - handle_gpio_output!(&self.0, target, { - PeripheralOutput::output_signals(target, private::Internal) - }) - } - - fn connect_peripheral_to_output(&mut self, signal: OutputSignal, _: private::Internal) { - interconnect::OutputSignal::new(self.degrade_pin(private::Internal)) - .connect_peripheral_to_output(signal, private::Internal); - } - - fn disconnect_from_peripheral_output( - &mut self, - signal: OutputSignal, - _: private::Internal, - ) { - interconnect::OutputSignal::new(self.degrade_pin(private::Internal)) - .disconnect_from_peripheral_output(signal, private::Internal); - } - } - impl OutputPin for AnyPin {} #[cfg(any(xtensa, esp32c2, esp32c3, esp32c6))] diff --git a/esp-hal/src/gpio/placeholder.rs b/esp-hal/src/gpio/placeholder.rs index e5034a55891..84c918fce76 100644 --- a/esp-hal/src/gpio/placeholder.rs +++ b/esp-hal/src/gpio/placeholder.rs @@ -15,26 +15,32 @@ impl crate::peripheral::Peripheral for Level { } } -impl PeripheralSignal for Level { - fn pull_direction(&self, _pull: Pull, _internal: private::Internal) {} -} +impl Level { + pub(crate) fn pull_direction(&self, _pull: Pull, _internal: private::Internal) {} -impl PeripheralInput for Level { - fn input_signals(&self, _: private::Internal) -> &[(AlternateFunction, InputSignal)] { + pub(crate) fn input_signals( + &self, + _: private::Internal, + ) -> &[(AlternateFunction, InputSignal)] { &[] } - fn init_input(&self, _pull: Pull, _: private::Internal) {} + pub(crate) fn init_input(&self, _pull: Pull, _: private::Internal) {} - fn enable_input(&mut self, _on: bool, _: private::Internal) {} + pub(crate) fn enable_input(&mut self, _on: bool, _: private::Internal) {} - fn enable_input_in_sleep_mode(&mut self, _on: bool, _: private::Internal) {} + pub(crate) fn enable_input_in_sleep_mode(&mut self, _on: bool, _: private::Internal) {} - fn is_input_high(&self, _: private::Internal) -> bool { + pub(crate) fn is_input_high(&self, _: private::Internal) -> bool { *self == Level::High } - fn connect_input_to_peripheral(&mut self, signal: InputSignal, _: private::Internal) { + #[doc(hidden)] + pub(crate) fn connect_input_to_peripheral( + &mut self, + signal: InputSignal, + _: private::Internal, + ) { let value = match self { Level::High => ONE_INPUT, Level::Low => ZERO_INPUT, @@ -43,48 +49,52 @@ impl PeripheralInput for Level { unsafe { GPIO::steal() } .func_in_sel_cfg(signal as usize - FUNC_IN_SEL_OFFSET) .modify(|_, w| unsafe { - w.sel() - .set_bit() - .in_inv_sel() - .bit(false) - .in_sel() - .bits(value) + w.sel().set_bit(); + w.in_inv_sel().bit(false); + w.in_sel().bits(value) }); } - fn disconnect_input_from_peripheral(&mut self, _signal: InputSignal, _: private::Internal) {} -} - -impl PeripheralOutput for Level { - fn set_to_open_drain_output(&mut self, _: private::Internal) {} - - fn set_to_push_pull_output(&mut self, _: private::Internal) {} - - fn enable_output(&mut self, _on: bool, _: private::Internal) {} - - fn set_output_high(&mut self, _on: bool, _: private::Internal) {} - - fn set_drive_strength(&mut self, _strength: DriveStrength, _: private::Internal) {} - - fn enable_open_drain(&mut self, _on: bool, _: private::Internal) {} - - fn enable_output_in_sleep_mode(&mut self, _on: bool, _: private::Internal) {} - - fn internal_pull_up_in_sleep_mode(&mut self, _on: bool, _: private::Internal) {} - - fn internal_pull_down_in_sleep_mode(&mut self, _on: bool, _: private::Internal) {} + pub(crate) fn disconnect_input_from_peripheral( + &mut self, + _signal: InputSignal, + _: private::Internal, + ) { + } + pub(crate) fn set_to_open_drain_output(&mut self, _: private::Internal) {} + pub(crate) fn set_to_push_pull_output(&mut self, _: private::Internal) {} + pub(crate) fn enable_output(&mut self, _on: bool, _: private::Internal) {} + pub(crate) fn set_output_high(&mut self, _on: bool, _: private::Internal) {} + pub(crate) fn set_drive_strength(&mut self, _strength: DriveStrength, _: private::Internal) {} + pub(crate) fn enable_open_drain(&mut self, _on: bool, _: private::Internal) {} + pub(crate) fn enable_output_in_sleep_mode(&mut self, _on: bool, _: private::Internal) {} + pub(crate) fn internal_pull_up_in_sleep_mode(&mut self, _on: bool, _: private::Internal) {} + pub(crate) fn internal_pull_down_in_sleep_mode(&mut self, _on: bool, _: private::Internal) {} - fn is_set_high(&self, _: private::Internal) -> bool { + pub(crate) fn is_set_high(&self, _: private::Internal) -> bool { false } - fn output_signals(&self, _: private::Internal) -> &[(AlternateFunction, OutputSignal)] { + pub(crate) fn output_signals( + &self, + _: private::Internal, + ) -> &[(AlternateFunction, OutputSignal)] { &[] } - fn connect_peripheral_to_output(&mut self, _signal: OutputSignal, _: private::Internal) {} + pub(crate) fn connect_peripheral_to_output( + &mut self, + _signal: OutputSignal, + _: private::Internal, + ) { + } - fn disconnect_from_peripheral_output(&mut self, _signal: OutputSignal, _: private::Internal) {} + pub(crate) fn disconnect_from_peripheral_output( + &mut self, + _signal: OutputSignal, + _: private::Internal, + ) { + } } /// Placeholder pin, used when no pin is required when using a peripheral. @@ -103,44 +113,6 @@ impl crate::peripheral::Peripheral for NoPin { impl private::Sealed for NoPin {} -impl PeripheralSignal for NoPin { - fn pull_direction(&self, _pull: Pull, _internal: private::Internal) {} -} - -impl PeripheralInput for NoPin { - delegate::delegate! { - to Level::Low { - fn init_input(&self, _pull: Pull, _internal: private::Internal); - fn enable_input(&mut self, _on: bool, _internal: private::Internal); - fn enable_input_in_sleep_mode(&mut self, _on: bool, _internal: private::Internal); - fn is_input_high(&self, _internal: private::Internal) -> bool; - fn connect_input_to_peripheral(&mut self, _signal: InputSignal, _internal: private::Internal); - fn disconnect_input_from_peripheral(&mut self, _signal: InputSignal, _internal: private::Internal); - fn input_signals(&self, _internal: private::Internal) -> &[(AlternateFunction, InputSignal)]; - } - } -} - -impl PeripheralOutput for NoPin { - delegate::delegate! { - to Level::Low { - fn set_to_open_drain_output(&mut self, _internal: private::Internal); - fn set_to_push_pull_output(&mut self, _internal: private::Internal); - fn enable_output(&mut self, _on: bool, _internal: private::Internal); - fn set_output_high(&mut self, _on: bool, _internal: private::Internal); - fn set_drive_strength(&mut self, _strength: DriveStrength, _internal: private::Internal); - fn enable_open_drain(&mut self, _on: bool, _internal: private::Internal); - fn enable_output_in_sleep_mode(&mut self, _on: bool, _internal: private::Internal); - fn internal_pull_up_in_sleep_mode(&mut self, _on: bool, _internal: private::Internal); - fn internal_pull_down_in_sleep_mode(&mut self, _on: bool, _internal: private::Internal); - fn is_set_high(&self, _internal: private::Internal) -> bool; - fn output_signals(&self, _internal: private::Internal) -> &[(AlternateFunction, OutputSignal)]; - fn connect_peripheral_to_output(&mut self, _signal: OutputSignal, _internal: private::Internal); - fn disconnect_from_peripheral_output(&mut self, _signal: OutputSignal, _internal: private::Internal); - } - } -} - impl embedded_hal_02::digital::v2::OutputPin for NoPin { type Error = core::convert::Infallible; diff --git a/esp-hal/src/i2c.rs b/esp-hal/src/i2c.rs index 77a08c5b1d4..9eb4219e3f4 100644 --- a/esp-hal/src/i2c.rs +++ b/esp-hal/src/i2c.rs @@ -59,7 +59,7 @@ use fugit::HertzU32; use crate::{ clock::Clocks, dma::PeripheralMarker, - gpio::{InputSignal, OutputSignal, PeripheralInput, PeripheralOutput, Pull}, + gpio::{interconnect::PeripheralOutput, InputSignal, OutputSignal, Pull}, interrupt::InterruptHandler, peripheral::{Peripheral, PeripheralRef}, peripherals::i2c0::{RegisterBlock, COMD}, @@ -489,16 +489,14 @@ impl<'d, T, DM: Mode> I2c<'d, DM, T> where T: Instance, { - fn new_internal< - SDA: PeripheralOutput + PeripheralInput, - SCL: PeripheralOutput + PeripheralInput, - >( + fn new_internal( i2c: impl Peripheral

+ 'd, sda: impl Peripheral

+ 'd, scl: impl Peripheral

+ 'd, frequency: HertzU32, ) -> Self { - crate::into_ref!(i2c, sda, scl); + crate::into_ref!(i2c); + crate::into_mapped_ref!(sda, scl); let i2c = I2c { i2c, @@ -562,7 +560,7 @@ impl<'d> I2c<'d, Blocking> { /// Create a new I2C instance /// This will enable the peripheral but the peripheral won't get /// automatically disabled when this gets dropped. - pub fn new( + pub fn new( i2c: impl Peripheral

+ 'd, sda: impl Peripheral

+ 'd, scl: impl Peripheral

+ 'd, @@ -579,10 +577,7 @@ where /// Create a new I2C instance /// This will enable the peripheral but the peripheral won't get /// automatically disabled when this gets dropped. - pub fn new_typed< - SDA: PeripheralOutput + PeripheralInput, - SCL: PeripheralOutput + PeripheralInput, - >( + pub fn new_typed( i2c: impl Peripheral

+ 'd, sda: impl Peripheral

+ 'd, scl: impl Peripheral

+ 'd, @@ -607,10 +602,7 @@ impl<'d> I2c<'d, Async> { /// Create a new I2C instance /// This will enable the peripheral but the peripheral won't get /// automatically disabled when this gets dropped. - pub fn new_async< - SDA: PeripheralOutput + PeripheralInput, - SCL: PeripheralOutput + PeripheralInput, - >( + pub fn new_async( i2c: impl Peripheral

+ 'd, sda: impl Peripheral

+ 'd, scl: impl Peripheral

+ 'd, @@ -627,10 +619,7 @@ where /// Create a new I2C instance /// This will enable the peripheral but the peripheral won't get /// automatically disabled when this gets dropped. - pub fn new_async_typed< - SDA: PeripheralOutput + PeripheralInput, - SCL: PeripheralOutput + PeripheralInput, - >( + pub fn new_async_typed( i2c: impl Peripheral

+ 'd, sda: impl Peripheral

+ 'd, scl: impl Peripheral

+ 'd, diff --git a/esp-hal/src/i2s.rs b/esp-hal/src/i2s.rs index feac9299e82..3f69d82dfdf 100644 --- a/esp-hal/src/i2s.rs +++ b/esp-hal/src/i2s.rs @@ -103,9 +103,8 @@ use crate::{ Tx, WriteBuffer, }, - gpio::PeripheralOutput, + gpio::interconnect::PeripheralOutput, interrupt::InterruptHandler, - into_ref, peripheral::{Peripheral, PeripheralRef}, system::PeripheralClockControl, InterruptConfigurable, @@ -434,7 +433,7 @@ where /// Configures the I2S peripheral to use a master clock (MCLK) output pin. pub fn with_mclk(self, pin: impl Peripheral

+ 'd) -> Self { - into_ref!(pin); + crate::into_mapped_ref!(pin); pin.set_to_push_pull_output(crate::private::Internal); pin.connect_peripheral_to_output(self.i2s_tx.i2s.mclk_signal(), crate::private::Internal); @@ -750,10 +749,13 @@ mod private { DmaEligible, PeripheralMarker, }, - gpio::{InputSignal, OutputSignal, PeripheralInput, PeripheralOutput}, + gpio::{ + interconnect::{PeripheralInput, PeripheralOutput}, + InputSignal, + OutputSignal, + }, interrupt::InterruptHandler, - into_ref, - peripheral::PeripheralRef, + peripheral::{Peripheral, PeripheralRef}, peripherals::I2S0, private, Mode, @@ -784,33 +786,33 @@ mod private { } } - pub fn with_bclk

(self, pin: impl crate::peripheral::Peripheral

+ 'd) -> Self + pub fn with_bclk

(self, pin: impl Peripheral

+ 'd) -> Self where P: PeripheralOutput, { - into_ref!(pin); + crate::into_mapped_ref!(pin); pin.set_to_push_pull_output(private::Internal); pin.connect_peripheral_to_output(self.i2s.bclk_signal(), private::Internal); self } - pub fn with_ws

(self, pin: impl crate::peripheral::Peripheral

+ 'd) -> Self + pub fn with_ws

(self, pin: impl Peripheral

+ 'd) -> Self where P: PeripheralOutput, { - into_ref!(pin); + crate::into_mapped_ref!(pin); pin.set_to_push_pull_output(private::Internal); pin.connect_peripheral_to_output(self.i2s.ws_signal(), private::Internal); self } - pub fn with_dout

(self, pin: impl crate::peripheral::Peripheral

+ 'd) -> Self + pub fn with_dout

(self, pin: impl Peripheral

+ 'd) -> Self where P: PeripheralOutput, { - into_ref!(pin); + crate::into_mapped_ref!(pin); pin.set_to_push_pull_output(private::Internal); pin.connect_peripheral_to_output(self.i2s.dout_signal(), private::Internal); @@ -843,33 +845,33 @@ mod private { } } - pub fn with_bclk

(self, pin: impl crate::peripheral::Peripheral

+ 'd) -> Self + pub fn with_bclk

(self, pin: impl Peripheral

+ 'd) -> Self where P: PeripheralOutput, { - into_ref!(pin); + crate::into_mapped_ref!(pin); pin.set_to_push_pull_output(private::Internal); pin.connect_peripheral_to_output(self.i2s.bclk_rx_signal(), private::Internal); self } - pub fn with_ws

(self, pin: impl crate::peripheral::Peripheral

+ 'd) -> Self + pub fn with_ws

(self, pin: impl Peripheral

+ 'd) -> Self where P: PeripheralOutput, { - into_ref!(pin); + crate::into_mapped_ref!(pin); pin.set_to_push_pull_output(private::Internal); pin.connect_peripheral_to_output(self.i2s.ws_rx_signal(), private::Internal); self } - pub fn with_din

(self, pin: impl crate::peripheral::Peripheral

+ 'd) -> Self + pub fn with_din

(self, pin: impl Peripheral

+ 'd) -> Self where P: PeripheralInput, { - into_ref!(pin); + crate::into_mapped_ref!(pin); pin.init_input(crate::gpio::Pull::None, private::Internal); pin.connect_input_to_peripheral(self.i2s.din_signal(), private::Internal); @@ -878,11 +880,7 @@ mod private { } pub trait RegBlock: - crate::peripheral::Peripheral

- + PeripheralMarker - + DmaEligible - + Into - + 'static + Peripheral

+ PeripheralMarker + DmaEligible + Into + 'static { fn register_block(&self) -> &RegisterBlock; } diff --git a/esp-hal/src/lcd_cam/cam.rs b/esp-hal/src/lcd_cam/cam.rs index 00841606611..abf7b5d398f 100644 --- a/esp-hal/src/lcd_cam/cam.rs +++ b/esp-hal/src/lcd_cam/cam.rs @@ -75,7 +75,12 @@ use fugit::HertzU32; use crate::{ clock::Clocks, dma::{ChannelRx, DmaChannelConvert, DmaEligible, DmaError, DmaPeripheral, DmaRxBuffer, Rx}, - gpio::{InputSignal, OutputSignal, PeripheralInput, PeripheralOutput, Pull}, + gpio::{ + interconnect::{PeripheralInput, PeripheralOutput}, + InputSignal, + OutputSignal, + Pull, + }, lcd_cam::{cam::private::RxPins, private::calculate_clkm, BitOrder, ByteOrder}, peripheral::{Peripheral, PeripheralRef}, peripherals::LCD_CAM, @@ -237,7 +242,7 @@ impl<'d> Camera<'d> { self, mclk: impl Peripheral

+ 'd, ) -> Self { - crate::into_ref!(mclk); + crate::into_mapped_ref!(mclk); mclk.set_to_push_pull_output(crate::private::Internal); mclk.connect_peripheral_to_output(OutputSignal::CAM_CLK, crate::private::Internal); self @@ -248,7 +253,7 @@ impl<'d> Camera<'d> { self, pclk: impl Peripheral

+ 'd, ) -> Self { - crate::into_ref!(pclk); + crate::into_mapped_ref!(pclk); pclk.init_input(Pull::None, crate::private::Internal); pclk.connect_input_to_peripheral(InputSignal::CAM_PCLK, crate::private::Internal); @@ -263,8 +268,7 @@ impl<'d> Camera<'d> { vsync: impl Peripheral

+ 'd, h_enable: impl Peripheral

+ 'd, ) -> Self { - crate::into_ref!(vsync); - crate::into_ref!(h_enable); + crate::into_mapped_ref!(vsync, h_enable); vsync.init_input(Pull::None, crate::private::Internal); vsync.connect_input_to_peripheral(InputSignal::CAM_V_SYNC, crate::private::Internal); @@ -290,9 +294,7 @@ impl<'d> Camera<'d> { hsync: impl Peripheral

+ 'd, h_enable: impl Peripheral

+ 'd, ) -> Self { - crate::into_ref!(vsync); - crate::into_ref!(hsync); - crate::into_ref!(h_enable); + crate::into_mapped_ref!(vsync, hsync, h_enable); vsync.init_input(Pull::None, crate::private::Internal); vsync.connect_input_to_peripheral(InputSignal::CAM_V_SYNC, crate::private::Internal); @@ -482,51 +484,40 @@ impl RxEightBits { #[allow(clippy::too_many_arguments)] /// Creates a new instance of `RxEightBits`, configuring the specified pins /// as the 8-bit data bus. - pub fn new<'d, P0, P1, P2, P3, P4, P5, P6, P7>( - pin_0: impl Peripheral

+ 'd, - pin_1: impl Peripheral

+ 'd, - pin_2: impl Peripheral

+ 'd, - pin_3: impl Peripheral

+ 'd, - pin_4: impl Peripheral

+ 'd, - pin_5: impl Peripheral

+ 'd, - pin_6: impl Peripheral

+ 'd, - pin_7: impl Peripheral

+ 'd, - ) -> Self - where - P0: PeripheralInput, - P1: PeripheralInput, - P2: PeripheralInput, - P3: PeripheralInput, - P4: PeripheralInput, - P5: PeripheralInput, - P6: PeripheralInput, - P7: PeripheralInput, - { - crate::into_ref!(pin_0); - crate::into_ref!(pin_1); - crate::into_ref!(pin_2); - crate::into_ref!(pin_3); - crate::into_ref!(pin_4); - crate::into_ref!(pin_5); - crate::into_ref!(pin_6); - crate::into_ref!(pin_7); - - pin_0.init_input(Pull::None, crate::private::Internal); - pin_0.connect_input_to_peripheral(InputSignal::CAM_DATA_0, crate::private::Internal); - pin_1.init_input(Pull::None, crate::private::Internal); - pin_1.connect_input_to_peripheral(InputSignal::CAM_DATA_1, crate::private::Internal); - pin_2.init_input(Pull::None, crate::private::Internal); - pin_2.connect_input_to_peripheral(InputSignal::CAM_DATA_2, crate::private::Internal); - pin_3.init_input(Pull::None, crate::private::Internal); - pin_3.connect_input_to_peripheral(InputSignal::CAM_DATA_3, crate::private::Internal); - pin_4.init_input(Pull::None, crate::private::Internal); - pin_4.connect_input_to_peripheral(InputSignal::CAM_DATA_4, crate::private::Internal); - pin_5.init_input(Pull::None, crate::private::Internal); - pin_5.connect_input_to_peripheral(InputSignal::CAM_DATA_5, crate::private::Internal); - pin_6.init_input(Pull::None, crate::private::Internal); - pin_6.connect_input_to_peripheral(InputSignal::CAM_DATA_6, crate::private::Internal); - pin_7.init_input(Pull::None, crate::private::Internal); - pin_7.connect_input_to_peripheral(InputSignal::CAM_DATA_7, crate::private::Internal); + pub fn new<'d>( + pin_0: impl Peripheral

+ 'd, + pin_1: impl Peripheral

+ 'd, + pin_2: impl Peripheral

+ 'd, + pin_3: impl Peripheral

+ 'd, + pin_4: impl Peripheral

+ 'd, + pin_5: impl Peripheral

+ 'd, + pin_6: impl Peripheral

+ 'd, + pin_7: impl Peripheral

+ 'd, + ) -> Self { + crate::into_mapped_ref!(pin_0); + crate::into_mapped_ref!(pin_1); + crate::into_mapped_ref!(pin_2); + crate::into_mapped_ref!(pin_3); + crate::into_mapped_ref!(pin_4); + crate::into_mapped_ref!(pin_5); + crate::into_mapped_ref!(pin_6); + crate::into_mapped_ref!(pin_7); + + let pairs = [ + (pin_0, InputSignal::CAM_DATA_0), + (pin_1, InputSignal::CAM_DATA_1), + (pin_2, InputSignal::CAM_DATA_2), + (pin_3, InputSignal::CAM_DATA_3), + (pin_4, InputSignal::CAM_DATA_4), + (pin_5, InputSignal::CAM_DATA_5), + (pin_6, InputSignal::CAM_DATA_6), + (pin_7, InputSignal::CAM_DATA_7), + ]; + + for (mut pin, signal) in pairs.into_iter() { + pin.init_input(Pull::None, crate::private::Internal); + pin.connect_input_to_peripheral(signal, crate::private::Internal); + } Self { _pins: () } } @@ -546,91 +537,64 @@ impl RxSixteenBits { #[allow(clippy::too_many_arguments)] /// Creates a new instance of `RxSixteenBits`, configuring the specified /// pins as the 16-bit data bus. - pub fn new<'d, P0, P1, P2, P3, P4, P5, P6, P7, P8, P9, P10, P11, P12, P13, P14, P15>( - pin_0: impl Peripheral

+ 'd, - pin_1: impl Peripheral

+ 'd, - pin_2: impl Peripheral

+ 'd, - pin_3: impl Peripheral

+ 'd, - pin_4: impl Peripheral

+ 'd, - pin_5: impl Peripheral

+ 'd, - pin_6: impl Peripheral

+ 'd, - pin_7: impl Peripheral

+ 'd, - pin_8: impl Peripheral

+ 'd, - pin_9: impl Peripheral

+ 'd, - pin_10: impl Peripheral

+ 'd, - pin_11: impl Peripheral

+ 'd, - pin_12: impl Peripheral

+ 'd, - pin_13: impl Peripheral

+ 'd, - pin_14: impl Peripheral

+ 'd, - pin_15: impl Peripheral

+ 'd, - ) -> Self - where - P0: PeripheralInput, - P1: PeripheralInput, - P2: PeripheralInput, - P3: PeripheralInput, - P4: PeripheralInput, - P5: PeripheralInput, - P6: PeripheralInput, - P7: PeripheralInput, - P8: PeripheralInput, - P9: PeripheralInput, - P10: PeripheralInput, - P11: PeripheralInput, - P12: PeripheralInput, - P13: PeripheralInput, - P14: PeripheralInput, - P15: PeripheralInput, - { - crate::into_ref!(pin_0); - crate::into_ref!(pin_1); - crate::into_ref!(pin_2); - crate::into_ref!(pin_3); - crate::into_ref!(pin_4); - crate::into_ref!(pin_5); - crate::into_ref!(pin_6); - crate::into_ref!(pin_7); - crate::into_ref!(pin_8); - crate::into_ref!(pin_9); - crate::into_ref!(pin_10); - crate::into_ref!(pin_11); - crate::into_ref!(pin_12); - crate::into_ref!(pin_13); - crate::into_ref!(pin_14); - crate::into_ref!(pin_15); - - pin_0.init_input(Pull::None, crate::private::Internal); - pin_0.connect_input_to_peripheral(InputSignal::CAM_DATA_0, crate::private::Internal); - pin_1.init_input(Pull::None, crate::private::Internal); - pin_1.connect_input_to_peripheral(InputSignal::CAM_DATA_1, crate::private::Internal); - pin_2.init_input(Pull::None, crate::private::Internal); - pin_2.connect_input_to_peripheral(InputSignal::CAM_DATA_2, crate::private::Internal); - pin_3.init_input(Pull::None, crate::private::Internal); - pin_3.connect_input_to_peripheral(InputSignal::CAM_DATA_3, crate::private::Internal); - pin_4.init_input(Pull::None, crate::private::Internal); - pin_4.connect_input_to_peripheral(InputSignal::CAM_DATA_4, crate::private::Internal); - pin_5.init_input(Pull::None, crate::private::Internal); - pin_5.connect_input_to_peripheral(InputSignal::CAM_DATA_5, crate::private::Internal); - pin_6.init_input(Pull::None, crate::private::Internal); - pin_6.connect_input_to_peripheral(InputSignal::CAM_DATA_6, crate::private::Internal); - pin_7.init_input(Pull::None, crate::private::Internal); - pin_7.connect_input_to_peripheral(InputSignal::CAM_DATA_7, crate::private::Internal); - pin_8.init_input(Pull::None, crate::private::Internal); - pin_8.connect_input_to_peripheral(InputSignal::CAM_DATA_8, crate::private::Internal); - pin_9.init_input(Pull::None, crate::private::Internal); - pin_9.connect_input_to_peripheral(InputSignal::CAM_DATA_9, crate::private::Internal); - pin_10.init_input(Pull::None, crate::private::Internal); - pin_10.connect_input_to_peripheral(InputSignal::CAM_DATA_10, crate::private::Internal); - pin_11.init_input(Pull::None, crate::private::Internal); - pin_11.connect_input_to_peripheral(InputSignal::CAM_DATA_11, crate::private::Internal); - pin_12.init_input(Pull::None, crate::private::Internal); - pin_12.connect_input_to_peripheral(InputSignal::CAM_DATA_12, crate::private::Internal); - pin_13.init_input(Pull::None, crate::private::Internal); - pin_13.connect_input_to_peripheral(InputSignal::CAM_DATA_13, crate::private::Internal); - pin_14.init_input(Pull::None, crate::private::Internal); - pin_14.connect_input_to_peripheral(InputSignal::CAM_DATA_14, crate::private::Internal); - pin_15.init_input(Pull::None, crate::private::Internal); - pin_15.connect_input_to_peripheral(InputSignal::CAM_DATA_15, crate::private::Internal); + pub fn new<'d>( + pin_0: impl Peripheral

+ 'd, + pin_1: impl Peripheral

+ 'd, + pin_2: impl Peripheral

+ 'd, + pin_3: impl Peripheral

+ 'd, + pin_4: impl Peripheral

+ 'd, + pin_5: impl Peripheral

+ 'd, + pin_6: impl Peripheral

+ 'd, + pin_7: impl Peripheral

+ 'd, + pin_8: impl Peripheral

+ 'd, + pin_9: impl Peripheral

+ 'd, + pin_10: impl Peripheral

+ 'd, + pin_11: impl Peripheral

+ 'd, + pin_12: impl Peripheral

+ 'd, + pin_13: impl Peripheral

+ 'd, + pin_14: impl Peripheral

+ 'd, + pin_15: impl Peripheral

+ 'd, + ) -> Self { + crate::into_mapped_ref!(pin_0); + crate::into_mapped_ref!(pin_1); + crate::into_mapped_ref!(pin_2); + crate::into_mapped_ref!(pin_3); + crate::into_mapped_ref!(pin_4); + crate::into_mapped_ref!(pin_5); + crate::into_mapped_ref!(pin_6); + crate::into_mapped_ref!(pin_7); + crate::into_mapped_ref!(pin_8); + crate::into_mapped_ref!(pin_9); + crate::into_mapped_ref!(pin_10); + crate::into_mapped_ref!(pin_11); + crate::into_mapped_ref!(pin_12); + crate::into_mapped_ref!(pin_13); + crate::into_mapped_ref!(pin_14); + crate::into_mapped_ref!(pin_15); + + let pairs = [ + (pin_0, InputSignal::CAM_DATA_0), + (pin_1, InputSignal::CAM_DATA_1), + (pin_2, InputSignal::CAM_DATA_2), + (pin_3, InputSignal::CAM_DATA_3), + (pin_4, InputSignal::CAM_DATA_4), + (pin_5, InputSignal::CAM_DATA_5), + (pin_6, InputSignal::CAM_DATA_6), + (pin_7, InputSignal::CAM_DATA_7), + (pin_8, InputSignal::CAM_DATA_8), + (pin_9, InputSignal::CAM_DATA_9), + (pin_10, InputSignal::CAM_DATA_10), + (pin_11, InputSignal::CAM_DATA_11), + (pin_12, InputSignal::CAM_DATA_12), + (pin_13, InputSignal::CAM_DATA_13), + (pin_14, InputSignal::CAM_DATA_14), + (pin_15, InputSignal::CAM_DATA_15), + ]; + + for (mut pin, signal) in pairs.into_iter() { + pin.init_input(Pull::None, crate::private::Internal); + pin.connect_input_to_peripheral(signal, crate::private::Internal); + } Self { _pins: () } } diff --git a/esp-hal/src/lcd_cam/lcd/i8080.rs b/esp-hal/src/lcd_cam/lcd/i8080.rs index 0261778f5a9..72ab45dea80 100644 --- a/esp-hal/src/lcd_cam/lcd/i8080.rs +++ b/esp-hal/src/lcd_cam/lcd/i8080.rs @@ -70,7 +70,10 @@ use fugit::HertzU32; use crate::{ clock::Clocks, dma::{ChannelTx, DmaChannelConvert, DmaEligible, DmaError, DmaPeripheral, DmaTxBuffer, Tx}, - gpio::{OutputSignal, PeripheralOutput}, + gpio::{ + interconnect::{OutputConnection, PeripheralOutput}, + OutputSignal, + }, lcd_cam::{ asynch::LCD_DONE_WAKER, lcd::{i8080::private::TxPins, ClockMode, DelayMode, Phase, Polarity}, @@ -233,7 +236,7 @@ impl<'d, DM: Mode> I8080<'d, DM> { /// Associates a CS pin with the I8080 interface. pub fn with_cs(self, cs: impl Peripheral

+ 'd) -> Self { - crate::into_ref!(cs); + crate::into_mapped_ref!(cs); cs.set_to_push_pull_output(crate::private::Internal); cs.connect_peripheral_to_output(OutputSignal::LCD_CS, crate::private::Internal); @@ -246,8 +249,7 @@ impl<'d, DM: Mode> I8080<'d, DM> { dc: impl Peripheral

+ 'd, wrx: impl Peripheral

+ 'd, ) -> Self { - crate::into_ref!(dc); - crate::into_ref!(wrx); + crate::into_mapped_ref!(dc, wrx); dc.set_to_push_pull_output(crate::private::Internal); dc.connect_peripheral_to_output(OutputSignal::LCD_DC, crate::private::Internal); @@ -580,275 +582,124 @@ impl From for Command { /// Represents a group of 8 output pins configured for 8-bit parallel data /// transmission. -pub struct TxEightBits<'d, P0, P1, P2, P3, P4, P5, P6, P7> { - pin_0: PeripheralRef<'d, P0>, - pin_1: PeripheralRef<'d, P1>, - pin_2: PeripheralRef<'d, P2>, - pin_3: PeripheralRef<'d, P3>, - pin_4: PeripheralRef<'d, P4>, - pin_5: PeripheralRef<'d, P5>, - pin_6: PeripheralRef<'d, P6>, - pin_7: PeripheralRef<'d, P7>, +pub struct TxEightBits<'d> { + pins: [PeripheralRef<'d, OutputConnection>; 8], } -impl<'d, P0, P1, P2, P3, P4, P5, P6, P7> TxEightBits<'d, P0, P1, P2, P3, P4, P5, P6, P7> -where - P0: PeripheralOutput, - P1: PeripheralOutput, - P2: PeripheralOutput, - P3: PeripheralOutput, - P4: PeripheralOutput, - P5: PeripheralOutput, - P6: PeripheralOutput, - P7: PeripheralOutput, -{ +impl<'d> TxEightBits<'d> { #[allow(clippy::too_many_arguments)] /// Creates a new `TxEightBits` instance with the provided output pins. pub fn new( - pin_0: impl Peripheral

+ 'd, - pin_1: impl Peripheral

+ 'd, - pin_2: impl Peripheral

+ 'd, - pin_3: impl Peripheral

+ 'd, - pin_4: impl Peripheral

+ 'd, - pin_5: impl Peripheral

+ 'd, - pin_6: impl Peripheral

+ 'd, - pin_7: impl Peripheral

+ 'd, + pin_0: impl Peripheral

+ 'd, + pin_1: impl Peripheral

+ 'd, + pin_2: impl Peripheral

+ 'd, + pin_3: impl Peripheral

+ 'd, + pin_4: impl Peripheral

+ 'd, + pin_5: impl Peripheral

+ 'd, + pin_6: impl Peripheral

+ 'd, + pin_7: impl Peripheral

+ 'd, ) -> Self { - crate::into_ref!(pin_0); - crate::into_ref!(pin_1); - crate::into_ref!(pin_2); - crate::into_ref!(pin_3); - crate::into_ref!(pin_4); - crate::into_ref!(pin_5); - crate::into_ref!(pin_6); - crate::into_ref!(pin_7); + crate::into_mapped_ref!(pin_0); + crate::into_mapped_ref!(pin_1); + crate::into_mapped_ref!(pin_2); + crate::into_mapped_ref!(pin_3); + crate::into_mapped_ref!(pin_4); + crate::into_mapped_ref!(pin_5); + crate::into_mapped_ref!(pin_6); + crate::into_mapped_ref!(pin_7); Self { - pin_0, - pin_1, - pin_2, - pin_3, - pin_4, - pin_5, - pin_6, - pin_7, + pins: [pin_0, pin_1, pin_2, pin_3, pin_4, pin_5, pin_6, pin_7], } } } -impl<'d, P0, P1, P2, P3, P4, P5, P6, P7> TxPins for TxEightBits<'d, P0, P1, P2, P3, P4, P5, P6, P7> -where - P0: PeripheralOutput, - P1: PeripheralOutput, - P2: PeripheralOutput, - P3: PeripheralOutput, - P4: PeripheralOutput, - P5: PeripheralOutput, - P6: PeripheralOutput, - P7: PeripheralOutput, -{ +impl<'d> TxPins for TxEightBits<'d> { fn configure(&mut self) { - self.pin_0.set_to_push_pull_output(crate::private::Internal); - self.pin_0 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_0, crate::private::Internal); - self.pin_1.set_to_push_pull_output(crate::private::Internal); - self.pin_1 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_1, crate::private::Internal); - self.pin_2.set_to_push_pull_output(crate::private::Internal); - self.pin_2 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_2, crate::private::Internal); - self.pin_3.set_to_push_pull_output(crate::private::Internal); - self.pin_3 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_3, crate::private::Internal); - self.pin_4.set_to_push_pull_output(crate::private::Internal); - self.pin_4 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_4, crate::private::Internal); - self.pin_5.set_to_push_pull_output(crate::private::Internal); - self.pin_5 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_5, crate::private::Internal); - self.pin_6.set_to_push_pull_output(crate::private::Internal); - self.pin_6 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_6, crate::private::Internal); - self.pin_7.set_to_push_pull_output(crate::private::Internal); - self.pin_7 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_7, crate::private::Internal); + const SIGNALS: [OutputSignal; 8] = [ + OutputSignal::LCD_DATA_0, + OutputSignal::LCD_DATA_1, + OutputSignal::LCD_DATA_2, + OutputSignal::LCD_DATA_3, + OutputSignal::LCD_DATA_4, + OutputSignal::LCD_DATA_5, + OutputSignal::LCD_DATA_6, + OutputSignal::LCD_DATA_7, + ]; + + for (pin, signal) in self.pins.iter_mut().zip(SIGNALS.iter()) { + pin.set_to_push_pull_output(crate::private::Internal); + pin.connect_peripheral_to_output(*signal, crate::private::Internal); + } } } /// Represents a group of 16 output pins configured for 16-bit parallel data /// transmission. -pub struct TxSixteenBits<'d, P0, P1, P2, P3, P4, P5, P6, P7, P8, P9, P10, P11, P12, P13, P14, P15> { - pin_0: PeripheralRef<'d, P0>, - pin_1: PeripheralRef<'d, P1>, - pin_2: PeripheralRef<'d, P2>, - pin_3: PeripheralRef<'d, P3>, - pin_4: PeripheralRef<'d, P4>, - pin_5: PeripheralRef<'d, P5>, - pin_6: PeripheralRef<'d, P6>, - pin_7: PeripheralRef<'d, P7>, - pin_8: PeripheralRef<'d, P8>, - pin_9: PeripheralRef<'d, P9>, - pin_10: PeripheralRef<'d, P10>, - pin_11: PeripheralRef<'d, P11>, - pin_12: PeripheralRef<'d, P12>, - pin_13: PeripheralRef<'d, P13>, - pin_14: PeripheralRef<'d, P14>, - pin_15: PeripheralRef<'d, P15>, +pub struct TxSixteenBits<'d> { + pins: [PeripheralRef<'d, OutputConnection>; 16], } -impl<'d, P0, P1, P2, P3, P4, P5, P6, P7, P8, P9, P10, P11, P12, P13, P14, P15> - TxSixteenBits<'d, P0, P1, P2, P3, P4, P5, P6, P7, P8, P9, P10, P11, P12, P13, P14, P15> -where - P0: PeripheralOutput, - P1: PeripheralOutput, - P2: PeripheralOutput, - P3: PeripheralOutput, - P4: PeripheralOutput, - P5: PeripheralOutput, - P6: PeripheralOutput, - P7: PeripheralOutput, - P8: PeripheralOutput, - P9: PeripheralOutput, - P10: PeripheralOutput, - P11: PeripheralOutput, - P12: PeripheralOutput, - P13: PeripheralOutput, - P14: PeripheralOutput, - P15: PeripheralOutput, -{ +impl<'d> TxSixteenBits<'d> { #[allow(clippy::too_many_arguments)] /// Creates a new `TxSixteenBits` instance with the provided output pins. pub fn new( - pin_0: impl Peripheral

+ 'd, - pin_1: impl Peripheral

+ 'd, - pin_2: impl Peripheral

+ 'd, - pin_3: impl Peripheral

+ 'd, - pin_4: impl Peripheral

+ 'd, - pin_5: impl Peripheral

+ 'd, - pin_6: impl Peripheral

+ 'd, - pin_7: impl Peripheral

+ 'd, - pin_8: impl Peripheral

+ 'd, - pin_9: impl Peripheral

+ 'd, - pin_10: impl Peripheral

+ 'd, - pin_11: impl Peripheral

+ 'd, - pin_12: impl Peripheral

+ 'd, - pin_13: impl Peripheral

+ 'd, - pin_14: impl Peripheral

+ 'd, - pin_15: impl Peripheral

+ 'd, + pin_0: impl Peripheral

+ 'd, + pin_1: impl Peripheral

+ 'd, + pin_2: impl Peripheral

+ 'd, + pin_3: impl Peripheral

+ 'd, + pin_4: impl Peripheral

+ 'd, + pin_5: impl Peripheral

+ 'd, + pin_6: impl Peripheral

+ 'd, + pin_7: impl Peripheral

+ 'd, + pin_8: impl Peripheral

+ 'd, + pin_9: impl Peripheral

+ 'd, + pin_10: impl Peripheral

+ 'd, + pin_11: impl Peripheral

+ 'd, + pin_12: impl Peripheral

+ 'd, + pin_13: impl Peripheral

+ 'd, + pin_14: impl Peripheral

+ 'd, + pin_15: impl Peripheral

+ 'd, ) -> Self { - crate::into_ref!(pin_0); - crate::into_ref!(pin_1); - crate::into_ref!(pin_2); - crate::into_ref!(pin_3); - crate::into_ref!(pin_4); - crate::into_ref!(pin_5); - crate::into_ref!(pin_6); - crate::into_ref!(pin_7); - crate::into_ref!(pin_8); - crate::into_ref!(pin_9); - crate::into_ref!(pin_10); - crate::into_ref!(pin_11); - crate::into_ref!(pin_12); - crate::into_ref!(pin_13); - crate::into_ref!(pin_14); - crate::into_ref!(pin_15); + crate::into_mapped_ref!( + pin_0, pin_1, pin_2, pin_3, pin_4, pin_5, pin_6, pin_7, pin_8, pin_9, pin_10, pin_11, + pin_12, pin_13, pin_14, pin_15 + ); Self { - pin_0, - pin_1, - pin_2, - pin_3, - pin_4, - pin_5, - pin_6, - pin_7, - pin_8, - pin_9, - pin_10, - pin_11, - pin_12, - pin_13, - pin_14, - pin_15, + pins: [ + pin_0, pin_1, pin_2, pin_3, pin_4, pin_5, pin_6, pin_7, pin_8, pin_9, pin_10, + pin_11, pin_12, pin_13, pin_14, pin_15, + ], } } } -impl<'d, P0, P1, P2, P3, P4, P5, P6, P7, P8, P9, P10, P11, P12, P13, P14, P15> TxPins - for TxSixteenBits<'d, P0, P1, P2, P3, P4, P5, P6, P7, P8, P9, P10, P11, P12, P13, P14, P15> -where - P0: PeripheralOutput, - P1: PeripheralOutput, - P2: PeripheralOutput, - P3: PeripheralOutput, - P4: PeripheralOutput, - P5: PeripheralOutput, - P6: PeripheralOutput, - P7: PeripheralOutput, - P8: PeripheralOutput, - P9: PeripheralOutput, - P10: PeripheralOutput, - P11: PeripheralOutput, - P12: PeripheralOutput, - P13: PeripheralOutput, - P14: PeripheralOutput, - P15: PeripheralOutput, -{ +impl<'d> TxPins for TxSixteenBits<'d> { fn configure(&mut self) { - self.pin_0.set_to_push_pull_output(crate::private::Internal); - self.pin_0 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_0, crate::private::Internal); - self.pin_1.set_to_push_pull_output(crate::private::Internal); - self.pin_1 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_1, crate::private::Internal); - self.pin_2.set_to_push_pull_output(crate::private::Internal); - self.pin_2 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_2, crate::private::Internal); - self.pin_3.set_to_push_pull_output(crate::private::Internal); - self.pin_3 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_3, crate::private::Internal); - self.pin_4.set_to_push_pull_output(crate::private::Internal); - self.pin_4 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_4, crate::private::Internal); - self.pin_5.set_to_push_pull_output(crate::private::Internal); - self.pin_5 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_5, crate::private::Internal); - self.pin_6.set_to_push_pull_output(crate::private::Internal); - self.pin_6 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_6, crate::private::Internal); - self.pin_7.set_to_push_pull_output(crate::private::Internal); - self.pin_7 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_7, crate::private::Internal); - self.pin_8.set_to_push_pull_output(crate::private::Internal); - self.pin_8 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_8, crate::private::Internal); - self.pin_9.set_to_push_pull_output(crate::private::Internal); - self.pin_9 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_9, crate::private::Internal); - self.pin_10 - .set_to_push_pull_output(crate::private::Internal); - self.pin_10 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_10, crate::private::Internal); - self.pin_11 - .set_to_push_pull_output(crate::private::Internal); - self.pin_11 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_11, crate::private::Internal); - self.pin_12 - .set_to_push_pull_output(crate::private::Internal); - self.pin_12 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_12, crate::private::Internal); - self.pin_13 - .set_to_push_pull_output(crate::private::Internal); - self.pin_13 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_13, crate::private::Internal); - self.pin_14 - .set_to_push_pull_output(crate::private::Internal); - self.pin_14 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_14, crate::private::Internal); - self.pin_15 - .set_to_push_pull_output(crate::private::Internal); - self.pin_15 - .connect_peripheral_to_output(OutputSignal::LCD_DATA_15, crate::private::Internal); + const SIGNALS: [OutputSignal; 16] = [ + OutputSignal::LCD_DATA_0, + OutputSignal::LCD_DATA_1, + OutputSignal::LCD_DATA_2, + OutputSignal::LCD_DATA_3, + OutputSignal::LCD_DATA_4, + OutputSignal::LCD_DATA_5, + OutputSignal::LCD_DATA_6, + OutputSignal::LCD_DATA_7, + OutputSignal::LCD_DATA_8, + OutputSignal::LCD_DATA_9, + OutputSignal::LCD_DATA_10, + OutputSignal::LCD_DATA_11, + OutputSignal::LCD_DATA_12, + OutputSignal::LCD_DATA_13, + OutputSignal::LCD_DATA_14, + OutputSignal::LCD_DATA_15, + ]; + + for (pin, signal) in self.pins.iter_mut().zip(SIGNALS.iter()) { + pin.set_to_push_pull_output(crate::private::Internal); + pin.connect_peripheral_to_output(*signal, crate::private::Internal); + } } } diff --git a/esp-hal/src/ledc/channel.rs b/esp-hal/src/ledc/channel.rs index 2d7feacd00a..fa27cc3689b 100644 --- a/esp-hal/src/ledc/channel.rs +++ b/esp-hal/src/ledc/channel.rs @@ -11,7 +11,10 @@ use super::timer::{TimerIFace, TimerSpeed}; use crate::{ - gpio::{OutputSignal, PeripheralOutput}, + gpio::{ + interconnect::{OutputConnection, PeripheralOutput}, + OutputSignal, + }, peripheral::{Peripheral, PeripheralRef}, peripherals::ledc::RegisterBlock, }; @@ -95,9 +98,9 @@ pub mod config { } /// Channel interface -pub trait ChannelIFace<'a, S: TimerSpeed + 'a, O: PeripheralOutput + 'a> +pub trait ChannelIFace<'a, S: TimerSpeed + 'a> where - Channel<'a, S, O>: ChannelHW, + Channel<'a, S>: ChannelHW, { /// Configure channel fn configure(&mut self, config: config::Config<'a, S>) -> Result<(), Error>; @@ -144,17 +147,20 @@ pub trait ChannelHW { } /// Channel struct -pub struct Channel<'a, S: TimerSpeed, O: PeripheralOutput> { +pub struct Channel<'a, S: TimerSpeed> { ledc: &'a RegisterBlock, timer: Option<&'a dyn TimerIFace>, number: Number, - output_pin: PeripheralRef<'a, O>, + output_pin: PeripheralRef<'a, OutputConnection>, } -impl<'a, S: TimerSpeed, O: PeripheralOutput> Channel<'a, S, O> { +impl<'a, S: TimerSpeed> Channel<'a, S> { /// Return a new channel - pub fn new(number: Number, output_pin: impl Peripheral

+ 'a) -> Self { - crate::into_ref!(output_pin); + pub fn new( + number: Number, + output_pin: impl Peripheral

+ 'a, + ) -> Self { + crate::into_mapped_ref!(output_pin); let ledc = unsafe { &*crate::peripherals::LEDC::ptr() }; Channel { ledc, @@ -165,9 +171,9 @@ impl<'a, S: TimerSpeed, O: PeripheralOutput> Channel<'a, S, O> { } } -impl<'a, S: TimerSpeed, O: PeripheralOutput> ChannelIFace<'a, S, O> for Channel<'a, S, O> +impl<'a, S: TimerSpeed> ChannelIFace<'a, S> for Channel<'a, S> where - Channel<'a, S, O>: ChannelHW, + Channel<'a, S>: ChannelHW, { /// Configure channel fn configure(&mut self, config: config::Config<'a, S>) -> Result<(), Error> { @@ -298,7 +304,7 @@ mod ehal1 { use embedded_hal::pwm::{self, ErrorKind, ErrorType, SetDutyCycle}; use super::{Channel, ChannelHW, Error}; - use crate::{gpio::OutputPin, ledc::timer::TimerSpeed}; + use crate::ledc::timer::TimerSpeed; impl pwm::Error for Error { fn kind(&self) -> pwm::ErrorKind { @@ -306,13 +312,13 @@ mod ehal1 { } } - impl<'a, S: TimerSpeed, O: OutputPin> ErrorType for Channel<'a, S, O> { + impl<'a, S: TimerSpeed> ErrorType for Channel<'a, S> { type Error = Error; } - impl<'a, S: TimerSpeed, O: OutputPin> SetDutyCycle for Channel<'a, S, O> + impl<'a, S: TimerSpeed> SetDutyCycle for Channel<'a, S> where - Channel<'a, S, O>: ChannelHW, + Channel<'a, S>: ChannelHW, { fn max_duty_cycle(&self) -> u16 { let duty_exp; @@ -337,7 +343,7 @@ mod ehal1 { } } -impl<'a, O: PeripheralOutput, S: crate::ledc::timer::TimerSpeed> Channel<'a, S, O> { +impl<'a, S: crate::ledc::timer::TimerSpeed> Channel<'a, S> { #[cfg(esp32)] fn set_channel(&mut self, timer_number: u8) { if S::IS_HS { @@ -535,9 +541,8 @@ impl<'a, O: PeripheralOutput, S: crate::ledc::timer::TimerSpeed> Channel<'a, S, } } -impl<'a, O, S> ChannelHW for Channel<'a, S, O> +impl<'a, S> ChannelHW for Channel<'a, S> where - O: PeripheralOutput, S: crate::ledc::timer::TimerSpeed, { /// Configure Channel HW diff --git a/esp-hal/src/ledc/mod.rs b/esp-hal/src/ledc/mod.rs index dc862b11045..3b0a61cfefc 100644 --- a/esp-hal/src/ledc/mod.rs +++ b/esp-hal/src/ledc/mod.rs @@ -65,7 +65,7 @@ use self::{ timer::{Timer, TimerSpeed}, }; use crate::{ - gpio::OutputPin, + gpio::interconnect::PeripheralOutput, peripheral::{Peripheral, PeripheralRef}, system::{Peripheral as PeripheralEnable, PeripheralClockControl}, }; @@ -165,11 +165,11 @@ impl<'d> Ledc<'d> { } /// Return a new channel - pub fn get_channel( + pub fn get_channel( &self, number: channel::Number, - output_pin: impl Peripheral

+ 'd, - ) -> Channel<'d, S, O> { + output_pin: impl Peripheral

+ 'd, + ) -> Channel<'d, S> { Channel::new(number, output_pin) } } diff --git a/esp-hal/src/mcpwm/operator.rs b/esp-hal/src/mcpwm/operator.rs index 31d7e55fb78..0b20764b364 100644 --- a/esp-hal/src/mcpwm/operator.rs +++ b/esp-hal/src/mcpwm/operator.rs @@ -12,7 +12,7 @@ use core::marker::PhantomData; use crate::{ - gpio::PeripheralOutput, + gpio::interconnect::{OutputConnection, PeripheralOutput}, mcpwm::{timer::Timer, PwmPeripheral}, peripheral::{Peripheral, PeripheralRef}, private, @@ -204,34 +204,31 @@ impl Operator { } /// Use the A output with the given pin and configuration - pub fn with_pin_a<'d, Pin: PeripheralOutput>( + pub fn with_pin_a<'d>( self, - pin: impl Peripheral

+ 'd, + pin: impl Peripheral

+ 'd, config: PwmPinConfig, - ) -> PwmPin<'d, Pin, PWM, OP, true> { + ) -> PwmPin<'d, PWM, OP, true> { PwmPin::new(pin, config) } /// Use the B output with the given pin and configuration - pub fn with_pin_b<'d, Pin: PeripheralOutput>( + pub fn with_pin_b<'d>( self, - pin: impl Peripheral

+ 'd, + pin: impl Peripheral

+ 'd, config: PwmPinConfig, - ) -> PwmPin<'d, Pin, PWM, OP, false> { + ) -> PwmPin<'d, PWM, OP, false> { PwmPin::new(pin, config) } /// Use both the A and the B output with the given pins and configurations - pub fn with_pins<'d, PinA: PeripheralOutput, PinB: PeripheralOutput>( + pub fn with_pins<'d>( self, - pin_a: impl Peripheral

+ 'd, + pin_a: impl Peripheral

+ 'd, config_a: PwmPinConfig, - pin_b: impl Peripheral

+ 'd, + pin_b: impl Peripheral

+ 'd, config_b: PwmPinConfig, - ) -> ( - PwmPin<'d, PinA, PWM, OP, true>, - PwmPin<'d, PinB, PWM, OP, false>, - ) { + ) -> (PwmPin<'d, PWM, OP, true>, PwmPin<'d, PWM, OP, false>) { (PwmPin::new(pin_a, config_a), PwmPin::new(pin_b, config_b)) } @@ -239,14 +236,14 @@ impl Operator { /// /// This is useful for complementary or mirrored signals with or without /// configured deadtime - pub fn with_linked_pins<'d, PinA: PeripheralOutput, PinB: PeripheralOutput>( + pub fn with_linked_pins<'d>( self, - pin_a: impl Peripheral

+ 'd, + pin_a: impl Peripheral

+ 'd, config_a: PwmPinConfig, - pin_b: impl Peripheral

+ 'd, + pin_b: impl Peripheral

+ 'd, config_b: PwmPinConfig, config_dt: DeadTimeCfg, - ) -> LinkedPins<'d, PinA, PinB, PWM, OP> { + ) -> LinkedPins<'d, PWM, OP> { LinkedPins::new(pin_a, config_a, pin_b, config_b, config_dt) } } @@ -283,16 +280,17 @@ impl PwmPinConfig { } /// A pin driven by an MCPWM operator -pub struct PwmPin<'d, Pin, PWM, const OP: u8, const IS_A: bool> { - pin: PeripheralRef<'d, Pin>, +pub struct PwmPin<'d, PWM, const OP: u8, const IS_A: bool> { + pin: PeripheralRef<'d, OutputConnection>, phantom: PhantomData, } -impl<'d, Pin: PeripheralOutput, PWM: PwmPeripheral, const OP: u8, const IS_A: bool> - PwmPin<'d, Pin, PWM, OP, IS_A> -{ - fn new(pin: impl Peripheral

+ 'd, config: PwmPinConfig) -> Self { - crate::into_ref!(pin); +impl<'d, PWM: PwmPeripheral, const OP: u8, const IS_A: bool> PwmPin<'d, PWM, OP, IS_A> { + fn new( + pin: impl Peripheral

+ 'd, + config: PwmPinConfig, + ) -> Self { + crate::into_mapped_ref!(pin); let mut pin = PwmPin { pin, phantom: PhantomData, @@ -415,8 +413,8 @@ impl<'d, Pin: PeripheralOutput, PWM: PwmPeripheral, const OP: u8, const IS_A: bo } } -impl<'d, Pin: PeripheralOutput, PWM: PwmPeripheral, const OP: u8, const IS_A: bool> - embedded_hal_02::PwmPin for PwmPin<'d, Pin, PWM, OP, IS_A> +impl<'d, PWM: PwmPeripheral, const OP: u8, const IS_A: bool> embedded_hal_02::PwmPin + for PwmPin<'d, PWM, OP, IS_A> { type Duty = u16; @@ -449,15 +447,15 @@ impl<'d, Pin: PeripheralOutput, PWM: PwmPeripheral, const OP: u8, const IS_A: bo } /// Implement no error type for the PwmPin because the method are infallible -impl<'d, Pin: PeripheralOutput, PWM: PwmPeripheral, const OP: u8, const IS_A: bool> - embedded_hal::pwm::ErrorType for PwmPin<'d, Pin, PWM, OP, IS_A> +impl<'d, PWM: PwmPeripheral, const OP: u8, const IS_A: bool> embedded_hal::pwm::ErrorType + for PwmPin<'d, PWM, OP, IS_A> { type Error = core::convert::Infallible; } /// Implement the trait SetDutyCycle for PwmPin -impl<'d, Pin: PeripheralOutput, PWM: PwmPeripheral, const OP: u8, const IS_A: bool> - embedded_hal::pwm::SetDutyCycle for PwmPin<'d, Pin, PWM, OP, IS_A> +impl<'d, PWM: PwmPeripheral, const OP: u8, const IS_A: bool> embedded_hal::pwm::SetDutyCycle + for PwmPin<'d, PWM, OP, IS_A> { /// Get the max duty of the PwmPin fn max_duty_cycle(&self) -> u16 { @@ -518,18 +516,16 @@ impl<'d, Pin: PeripheralOutput, PWM: PwmPeripheral, const OP: u8, const IS_A: bo /// // pin_b: ------_________-----------_________----- /// # } /// ``` -pub struct LinkedPins<'d, PinA, PinB, PWM, const OP: u8> { - pin_a: PwmPin<'d, PinA, PWM, OP, true>, - pin_b: PwmPin<'d, PinB, PWM, OP, false>, +pub struct LinkedPins<'d, PWM, const OP: u8> { + pin_a: PwmPin<'d, PWM, OP, true>, + pin_b: PwmPin<'d, PWM, OP, false>, } -impl<'d, PinA: PeripheralOutput, PinB: PeripheralOutput, PWM: PwmPeripheral, const OP: u8> - LinkedPins<'d, PinA, PinB, PWM, OP> -{ +impl<'d, PWM: PwmPeripheral, const OP: u8> LinkedPins<'d, PWM, OP> { fn new( - pin_a: impl Peripheral

+ 'd, + pin_a: impl Peripheral

+ 'd, config_a: PwmPinConfig, - pin_b: impl Peripheral

+ 'd, + pin_b: impl Peripheral

+ 'd, config_b: PwmPinConfig, config_dt: DeadTimeCfg, ) -> Self { diff --git a/esp-hal/src/otg_fs.rs b/esp-hal/src/otg_fs.rs index 4883daa1527..095126468dd 100644 --- a/esp-hal/src/otg_fs.rs +++ b/esp-hal/src/otg_fs.rs @@ -83,16 +83,11 @@ impl<'d> Usb<'d> { unsafe { let usb_wrap = &*peripherals::USB_WRAP::PTR; usb_wrap.otg_conf().modify(|_, w| { - w.usb_pad_enable() - .set_bit() - .phy_sel() - .clear_bit() - .clk_en() - .set_bit() - .ahb_clk_force_on() - .set_bit() - .phy_clk_force_on() - .set_bit() + w.usb_pad_enable().set_bit(); + w.phy_sel().clear_bit(); + w.clk_en().set_bit(); + w.ahb_clk_force_on().set_bit(); + w.phy_clk_force_on().set_bit() }); #[cfg(esp32s3)] @@ -102,7 +97,7 @@ impl<'d> Usb<'d> { .modify(|_, w| w.sw_hw_usb_phy_sel().set_bit().sw_usb_phy_sel().set_bit()); } - use crate::gpio::{Level, PeripheralInput}; + use crate::gpio::Level; Level::High.connect_input_to_peripheral(InputSignal::USB_OTG_IDDIG, Internal); // connected connector is mini-B side Level::High.connect_input_to_peripheral(InputSignal::USB_SRP_BVALID, Internal); // HIGH to force USB device mode diff --git a/esp-hal/src/parl_io.rs b/esp-hal/src/parl_io.rs index 45267024da5..72394da5e81 100644 --- a/esp-hal/src/parl_io.rs +++ b/esp-hal/src/parl_io.rs @@ -49,7 +49,7 @@ use crate::{ Tx, WriteBuffer, }, - gpio::{PeripheralInput, PeripheralOutput}, + gpio::interconnect::{InputConnection, OutputConnection, PeripheralInput, PeripheralOutput}, interrupt::InterruptHandler, peripheral::{self, Peripheral}, peripherals::{self, PARL_IO}, @@ -277,26 +277,17 @@ pub fn no_clk_pin() -> &'static mut NoClkPin { } /// Wraps a GPIO pin which will be used as the clock output signal -pub struct ClkOutPin<'d, P> -where - P: PeripheralOutput, -{ - pin: PeripheralRef<'d, P>, +pub struct ClkOutPin<'d> { + pin: PeripheralRef<'d, OutputConnection>, } -impl<'d, P> ClkOutPin<'d, P> -where - P: PeripheralOutput, -{ +impl<'d> ClkOutPin<'d> { /// Create a ClkOutPin - pub fn new(pin: impl Peripheral

+ 'd) -> Self { - crate::into_ref!(pin); + pub fn new(pin: impl Peripheral

+ 'd) -> Self { + crate::into_mapped_ref!(pin); Self { pin } } } -impl<'d, P> TxClkPin for ClkOutPin<'d, P> -where - P: PeripheralOutput, -{ +impl TxClkPin for ClkOutPin<'_> { fn configure(&mut self) { self.pin.set_to_push_pull_output(crate::private::Internal); self.pin.connect_peripheral_to_output( @@ -307,26 +298,17 @@ where } /// Wraps a GPIO pin which will be used as the TX clock input signal -pub struct ClkInPin<'d, P> -where - P: PeripheralInput, -{ - pin: PeripheralRef<'d, P>, +pub struct ClkInPin<'d> { + pin: PeripheralRef<'d, InputConnection>, } -impl<'d, P> ClkInPin<'d, P> -where - P: PeripheralInput, -{ +impl<'d> ClkInPin<'d> { /// Create a new ClkInPin - pub fn new(pin: impl Peripheral

+ 'd) -> Self { - crate::into_ref!(pin); + pub fn new(pin: impl Peripheral

+ 'd) -> Self { + crate::into_mapped_ref!(pin); Self { pin } } } -impl<'d, P> TxClkPin for ClkInPin<'d, P> -where - P: PeripheralInput, -{ +impl TxClkPin for ClkInPin<'_> { fn configure(&mut self) { let pcr = unsafe { &*crate::peripherals::PCR::PTR }; pcr.parl_clk_tx_conf() @@ -342,27 +324,21 @@ where } /// Wraps a GPIO pin which will be used as the RX clock input signal -pub struct RxClkInPin<'d, P> -where - P: PeripheralInput, -{ - pin: PeripheralRef<'d, P>, +pub struct RxClkInPin<'d> { + pin: PeripheralRef<'d, InputConnection>, sample_edge: SampleEdge, } -impl<'d, P> RxClkInPin<'d, P> -where - P: PeripheralInput, -{ +impl<'d> RxClkInPin<'d> { /// Create a new RxClkInPin - pub fn new(pin: impl Peripheral

+ 'd, sample_edge: SampleEdge) -> Self { - crate::into_ref!(pin); + pub fn new( + pin: impl Peripheral

+ 'd, + sample_edge: SampleEdge, + ) -> Self { + crate::into_mapped_ref!(pin); Self { pin, sample_edge } } } -impl<'d, P> RxClkPin for RxClkInPin<'d, P> -where - P: PeripheralInput, -{ +impl<'d> RxClkPin for RxClkInPin<'d> { fn configure(&mut self) { let pcr = unsafe { &*crate::peripherals::PCR::PTR }; pcr.parl_clk_rx_conf() @@ -380,38 +356,33 @@ where } /// Pin configuration with an additional pin for the valid signal. -pub struct TxPinConfigWithValidPin<'d, P, VP> +pub struct TxPinConfigWithValidPin<'d, P> where P: NotContainsValidSignalPin + TxPins + ConfigurePins, - VP: PeripheralOutput, { tx_pins: P, - valid_pin: PeripheralRef<'d, VP>, + valid_pin: PeripheralRef<'d, OutputConnection>, } -impl<'d, P, VP> TxPinConfigWithValidPin<'d, P, VP> +impl<'d, P> TxPinConfigWithValidPin<'d, P> where P: NotContainsValidSignalPin + TxPins + ConfigurePins, - VP: PeripheralOutput, { /// Create a [TxPinConfigWithValidPin] - pub fn new(tx_pins: P, valid_pin: impl Peripheral

+ 'd) -> Self { - crate::into_ref!(valid_pin); + pub fn new(tx_pins: P, valid_pin: impl Peripheral

+ 'd) -> Self { + crate::into_mapped_ref!(valid_pin); Self { tx_pins, valid_pin } } } -impl<'d, P, VP> TxPins for TxPinConfigWithValidPin<'d, P, VP> -where - P: NotContainsValidSignalPin + TxPins + ConfigurePins, - VP: PeripheralOutput, +impl<'d, P> TxPins for TxPinConfigWithValidPin<'d, P> where + P: NotContainsValidSignalPin + TxPins + ConfigurePins { } -impl<'d, P, VP> ConfigurePins for TxPinConfigWithValidPin<'d, P, VP> +impl<'d, P> ConfigurePins for TxPinConfigWithValidPin<'d, P> where P: NotContainsValidSignalPin + TxPins + ConfigurePins, - VP: PeripheralOutput, { fn configure(&mut self) -> Result<(), Error> { self.tx_pins.configure()?; @@ -466,31 +437,27 @@ macro_rules! tx_pins { #[doc = "Data pin configuration for "] #[doc = stringify!($width)] #[doc = "bit output mode"] - pub struct $name<'d, $($pin),+> { + pub struct $name<'d> { $( - [< pin_ $pin:lower >] : PeripheralRef<'d, $pin>, + [< pin_ $pin:lower >] : PeripheralRef<'d, OutputConnection>, )+ } - impl<'d, $($pin),+> $name<'d, $($pin),+> - where - $($pin: PeripheralOutput),+ + impl<'d> $name<'d> { /// Create a new TX pin #[allow(clippy::too_many_arguments)] pub fn new( $( - [< pin_ $pin:lower >] : impl Peripheral

+ 'd, + [< pin_ $pin:lower >] : impl Peripheral

+ 'd, )+ ) -> Self { - crate::into_ref!($( [< pin_ $pin:lower >] ),+); + crate::into_mapped_ref!($( [< pin_ $pin:lower >] ),+); Self { $( [< pin_ $pin:lower >] ),+ } } } - impl<'d, $($pin),+> ConfigurePins for $name<'d, $($pin),+> - where - $($pin: PeripheralOutput),+ + impl ConfigurePins for $name<'_> { fn configure(&mut self) -> Result<(), Error>{ $( @@ -503,7 +470,7 @@ macro_rules! tx_pins { } } - impl<'d, $($pin),+> TxPins for $name<'d, $($pin),+> {} + impl TxPins for $name<'_> {} } }; } @@ -552,67 +519,47 @@ tx_pins!( P15 = PARL_TX_DATA15 ); -impl<'d, P0> FullDuplex for TxOneBit<'d, P0> {} +impl FullDuplex for TxOneBit<'_> {} +impl FullDuplex for TxTwoBits<'_> {} +impl FullDuplex for TxFourBits<'_> {} +impl FullDuplex for TxEightBits<'_> {} -impl<'d, P0, P1> FullDuplex for TxTwoBits<'d, P0, P1> {} - -impl<'d, P0, P1, P2, P3> FullDuplex for TxFourBits<'d, P0, P1, P2, P3> {} - -impl<'d, P0, P1, P2, P3, P4, P5, P6, P7> FullDuplex - for TxEightBits<'d, P0, P1, P2, P3, P4, P5, P6, P7> -{ -} - -impl<'d, P0> NotContainsValidSignalPin for TxOneBit<'d, P0> {} - -impl<'d, P0, P1> NotContainsValidSignalPin for TxTwoBits<'d, P0, P1> {} - -impl<'d, P0, P1, P2, P3> NotContainsValidSignalPin for TxFourBits<'d, P0, P1, P2, P3> {} +impl NotContainsValidSignalPin for TxOneBit<'_> {} +impl NotContainsValidSignalPin for TxTwoBits<'_> {} +impl NotContainsValidSignalPin for TxFourBits<'_> {} #[cfg(esp32c6)] -impl<'d, P0, P1, P2, P3, P4, P5, P6, P7> NotContainsValidSignalPin - for TxEightBits<'d, P0, P1, P2, P3, P4, P5, P6, P7> -{ -} +impl NotContainsValidSignalPin for TxEightBits<'_> {} #[cfg(esp32h2)] -impl<'d, P0, P1, P2, P3, P4, P5, P6, P7> ContainsValidSignalPin - for TxEightBits<'d, P0, P1, P2, P3, P4, P5, P6, P7> -{ -} +impl ContainsValidSignalPin for TxEightBits<'_> {} #[cfg(esp32c6)] -impl<'d, P0, P1, P2, P3, P4, P5, P6, P7, P8, P9, P10, P11, P12, P13, P14, P15> - ContainsValidSignalPin - for TxSixteenBits<'d, P0, P1, P2, P3, P4, P5, P6, P7, P8, P9, P10, P11, P12, P13, P14, P15> -{ -} +impl ContainsValidSignalPin for TxSixteenBits<'_> {} /// Pin configuration with an additional pin for the valid signal. -pub struct RxPinConfigWithValidPin<'d, P, VP> +pub struct RxPinConfigWithValidPin<'d, P> where P: NotContainsValidSignalPin + RxPins + ConfigurePins, - VP: PeripheralInput, { rx_pins: P, - valid_pin: PeripheralRef<'d, VP>, + valid_pin: PeripheralRef<'d, InputConnection>, enable_mode: EnableMode, eof_mode: EofMode, } -impl<'d, P, VP> RxPinConfigWithValidPin<'d, P, VP> +impl<'d, P> RxPinConfigWithValidPin<'d, P> where P: NotContainsValidSignalPin + RxPins + ConfigurePins, - VP: PeripheralInput, { /// Create a new [RxPinConfigWithValidPin] pub fn new( rx_pins: P, - valid_pin: impl Peripheral

+ 'd, + valid_pin: impl Peripheral

+ 'd, enable_mode: EnableMode, eof_mode: EofMode, ) -> Self { - crate::into_ref!(valid_pin); + crate::into_mapped_ref!(valid_pin); Self { rx_pins, valid_pin, @@ -622,17 +569,14 @@ where } } -impl<'d, P, VP> RxPins for RxPinConfigWithValidPin<'d, P, VP> -where - P: NotContainsValidSignalPin + RxPins + ConfigurePins, - VP: PeripheralInput, +impl<'d, P> RxPins for RxPinConfigWithValidPin<'d, P> where + P: NotContainsValidSignalPin + RxPins + ConfigurePins { } -impl<'d, P, VP> ConfigurePins for RxPinConfigWithValidPin<'d, P, VP> +impl<'d, P> ConfigurePins for RxPinConfigWithValidPin<'d, P> where P: NotContainsValidSignalPin + RxPins + ConfigurePins, - VP: PeripheralInput, { fn configure(&mut self) -> Result<(), Error> { self.rx_pins.configure()?; @@ -713,31 +657,27 @@ macro_rules! rx_pins { #[doc = "Data pin configuration for "] #[doc = stringify!($width)] #[doc = "bit input mode"] - pub struct $name<'d, $($pin),+> { + pub struct $name<'d> { $( - [< pin_ $pin:lower >] : PeripheralRef<'d, $pin>, + [< pin_ $pin:lower >] : PeripheralRef<'d, InputConnection>, )+ } - impl<'d, $($pin),+> $name<'d, $($pin),+> - where - $($pin: PeripheralInput),+ + impl<'d> $name<'d> { /// Create a new RX pin #[allow(clippy::too_many_arguments)] pub fn new( $( - [< pin_ $pin:lower >] : impl Peripheral

+ 'd, + [< pin_ $pin:lower >] : impl Peripheral

+ 'd, )+ ) -> Self { - crate::into_ref!($( [< pin_ $pin:lower >] ),+); + crate::into_mapped_ref!($( [< pin_ $pin:lower >] ),+); Self { $( [< pin_ $pin:lower >] ),+ } } } - impl<'d, $($pin),+> ConfigurePins for $name<'d, $($pin),+> - where - $($pin: PeripheralInput),+ + impl ConfigurePins for $name<'_> { fn configure(&mut self) -> Result<(), Error> { $( @@ -750,7 +690,7 @@ macro_rules! rx_pins { } } - impl<'d, $($pin),+> RxPins for $name<'d, $($pin),+> {} + impl RxPins for $name<'_> {} } }; } @@ -799,41 +739,23 @@ rx_pins!( P15 = PARL_RX_DATA15 ); -impl<'d, P0> FullDuplex for RxOneBit<'d, P0> {} - -impl<'d, P0, P1> FullDuplex for RxTwoBits<'d, P0, P1> {} +impl FullDuplex for RxOneBit<'_> {} +impl FullDuplex for RxTwoBits<'_> {} +impl FullDuplex for RxFourBits<'_> {} +impl FullDuplex for RxEightBits<'_> {} -impl<'d, P0, P1, P2, P3> FullDuplex for RxFourBits<'d, P0, P1, P2, P3> {} - -impl<'d, P0, P1, P2, P3, P4, P5, P6, P7> FullDuplex - for RxEightBits<'d, P0, P1, P2, P3, P4, P5, P6, P7> -{ -} - -impl<'d, P0> NotContainsValidSignalPin for RxOneBit<'d, P0> {} - -impl<'d, P0, P1> NotContainsValidSignalPin for RxTwoBits<'d, P0, P1> {} - -impl<'d, P0, P1, P2, P3> NotContainsValidSignalPin for RxFourBits<'d, P0, P1, P2, P3> {} +impl NotContainsValidSignalPin for RxOneBit<'_> {} +impl NotContainsValidSignalPin for RxTwoBits<'_> {} +impl NotContainsValidSignalPin for RxFourBits<'_> {} #[cfg(esp32c6)] -impl<'d, P0, P1, P2, P3, P4, P5, P6, P7> NotContainsValidSignalPin - for RxEightBits<'d, P0, P1, P2, P3, P4, P5, P6, P7> -{ -} +impl NotContainsValidSignalPin for RxEightBits<'_> {} #[cfg(esp32h2)] -impl<'d, P0, P1, P2, P3, P4, P5, P6, P7> ContainsValidSignalPin - for RxEightBits<'d, P0, P1, P2, P3, P4, P5, P6, P7> -{ -} +impl ContainsValidSignalPin for RxEightBits<'_> {} #[cfg(esp32c6)] -impl<'d, P0, P1, P2, P3, P4, P5, P6, P7, P8, P9, P10, P11, P12, P13, P14, P15> - ContainsValidSignalPin - for RxSixteenBits<'d, P0, P1, P2, P3, P4, P5, P6, P7, P8, P9, P10, P11, P12, P13, P14, P15> -{ -} +impl ContainsValidSignalPin for RxSixteenBits<'_> {} impl<'d, DM> TxCreatorFullDuplex<'d, DM> where diff --git a/esp-hal/src/pcnt/channel.rs b/esp-hal/src/pcnt/channel.rs index a9809535b8d..34b1f971258 100644 --- a/esp-hal/src/pcnt/channel.rs +++ b/esp-hal/src/pcnt/channel.rs @@ -11,7 +11,7 @@ use core::marker::PhantomData; pub use crate::peripherals::pcnt::unit::conf0::{CTRL_MODE as CtrlMode, EDGE_MODE as EdgeMode}; use crate::{ - gpio::{InputSignal, PeripheralInput}, + gpio::{interconnect::PeripheralInput, InputSignal}, peripheral::Peripheral, }; @@ -116,7 +116,7 @@ impl<'d, const UNIT: usize, const NUM: usize> Channel<'d, UNIT, NUM> { }; if (signal as usize) <= crate::gpio::INPUT_SIGNAL_MAX as usize { - crate::into_ref!(source); + crate::into_mapped_ref!(source); source.enable_input(true, crate::private::Internal); source.connect_input_to_peripheral(signal, crate::private::Internal); } @@ -174,7 +174,7 @@ impl<'d, const UNIT: usize, const NUM: usize> Channel<'d, UNIT, NUM> { }; if (signal as usize) <= crate::gpio::INPUT_SIGNAL_MAX as usize { - crate::into_ref!(source); + crate::into_mapped_ref!(source); source.enable_input(true, crate::private::Internal); source.connect_input_to_peripheral(signal, crate::private::Internal); } diff --git a/esp-hal/src/rmt.rs b/esp-hal/src/rmt.rs index 28b55c69055..ef61e03e5f9 100644 --- a/esp-hal/src/rmt.rs +++ b/esp-hal/src/rmt.rs @@ -85,7 +85,7 @@ use core::marker::PhantomData; use fugit::HertzU32; use crate::{ - gpio::{PeripheralInput, PeripheralOutput}, + gpio::interconnect::{PeripheralInput, PeripheralOutput}, interrupt::InterruptHandler, peripheral::Peripheral, rmt::private::CreateInstance, @@ -320,7 +320,7 @@ fn configure_rx_channel< return Err(Error::InvalidArgument); } - crate::into_ref!(pin); + crate::into_mapped_ref!(pin); pin.init_input(crate::gpio::Pull::None, crate::private::Internal); pin.connect_input_to_peripheral(T::input_signal(), crate::private::Internal); @@ -346,7 +346,7 @@ fn configure_tx_channel< pin: impl Peripheral

+ 'd, config: TxChannelConfig, ) -> Result { - crate::into_ref!(pin); + crate::into_mapped_ref!(pin); pin.set_to_push_pull_output(crate::private::Internal); pin.connect_peripheral_to_output(T::output_signal(), crate::private::Internal); @@ -571,7 +571,7 @@ macro_rules! impl_tx_channel_creator { impl<'d, P> $crate::rmt::TxChannelCreator<'d, $crate::rmt::Channel<$crate::Blocking, $channel>, P> for ChannelCreator<$crate::Blocking, $channel> where - P: $crate::gpio::PeripheralOutput, + P: $crate::gpio::interconnect::PeripheralOutput, { } @@ -580,7 +580,7 @@ macro_rules! impl_tx_channel_creator { impl<'d, P> $crate::rmt::TxChannelCreatorAsync<'d, $crate::rmt::Channel<$crate::Async, $channel>, P> for ChannelCreator<$crate::Async, $channel> where - P: $crate::gpio::PeripheralOutput, + P: $crate::gpio::interconnect::PeripheralOutput, { } @@ -593,7 +593,7 @@ macro_rules! impl_rx_channel_creator { impl<'d, P> $crate::rmt::RxChannelCreator<'d, $crate::rmt::Channel<$crate::Blocking, $channel>, P> for ChannelCreator<$crate::Blocking, $channel> where - P: $crate::gpio::PeripheralInput, + P: $crate::gpio::interconnect::PeripheralInput, { } @@ -602,7 +602,7 @@ macro_rules! impl_rx_channel_creator { impl<'d, P> $crate::rmt::RxChannelCreatorAsync<'d, $crate::rmt::Channel<$crate::Async, $channel>, P> for ChannelCreator<$crate::Async, $channel> where - P: $crate::gpio::PeripheralInput, + P: $crate::gpio::interconnect::PeripheralInput, { } diff --git a/esp-hal/src/spi/master.rs b/esp-hal/src/spi/master.rs index c8f10a97d88..e3ad29213d5 100644 --- a/esp-hal/src/spi/master.rs +++ b/esp-hal/src/spi/master.rs @@ -74,7 +74,12 @@ use super::{DmaError, Error, SpiBitOrder, SpiDataMode, SpiMode}; use crate::{ clock::Clocks, dma::{DmaChannelConvert, DmaEligible, DmaRxBuffer, DmaTxBuffer, PeripheralMarker, Rx, Tx}, - gpio::{InputSignal, NoPin, OutputSignal, PeripheralInput, PeripheralOutput}, + gpio::{ + interconnect::{OutputConnection, PeripheralOutput}, + InputSignal, + NoPin, + OutputSignal, + }, interrupt::InterruptHandler, peripheral::{Peripheral, PeripheralRef}, peripherals::spi2::RegisterBlock, @@ -517,19 +522,21 @@ where let is_qspi = spi.spi.sio2_input_signal().is_some(); if is_qspi { - NoPin.connect_input_to_peripheral( + let mut signal = OutputConnection::from(NoPin); + + signal.connect_input_to_peripheral( unwrap!(spi.spi.sio2_input_signal()), private::Internal, ); - NoPin.connect_peripheral_to_output( + signal.connect_peripheral_to_output( unwrap!(spi.spi.sio2_output_signal()), private::Internal, ); - NoPin.connect_input_to_peripheral( + signal.connect_input_to_peripheral( unwrap!(spi.spi.sio3_input_signal()), private::Internal, ); - NoPin.connect_peripheral_to_output( + signal.connect_peripheral_to_output( unwrap!(spi.spi.sio3_output_signal()), private::Internal, ); @@ -542,12 +549,8 @@ where /// /// Enables both input and output functionality for the pin, and connects it /// to the MOSI signal and SIO0 input signal. - pub fn with_mosi( - self, - mosi: impl Peripheral

+ 'd, - ) -> Self { - crate::into_ref!(mosi); - + pub fn with_mosi(self, mosi: impl Peripheral

+ 'd) -> Self { + crate::into_mapped_ref!(mosi); mosi.enable_output(true, private::Internal); mosi.connect_peripheral_to_output(self.spi.mosi_signal(), private::Internal); @@ -561,12 +564,8 @@ where /// /// Enables both input and output functionality for the pin, and connects it /// to the MISO signal and SIO1 input signal. - pub fn with_miso( - self, - miso: impl Peripheral

+ 'd, - ) -> Self { - crate::into_ref!(miso); - + pub fn with_miso(self, miso: impl Peripheral

+ 'd) -> Self { + crate::into_mapped_ref!(miso); miso.enable_input(true, private::Internal); miso.connect_input_to_peripheral(self.spi.miso_signal(), private::Internal); @@ -581,7 +580,7 @@ where /// Sets the specified pin to push-pull output and connects it to the SPI /// clock signal. pub fn with_sck(self, sclk: impl Peripheral

+ 'd) -> Self { - crate::into_ref!(sclk); + crate::into_mapped_ref!(sclk); sclk.set_to_push_pull_output(private::Internal); sclk.connect_peripheral_to_output(self.spi.sclk_signal(), private::Internal); @@ -593,7 +592,7 @@ where /// Sets the specified pin to push-pull output and connects it to the SPI CS /// signal. pub fn with_cs(self, cs: impl Peripheral

+ 'd) -> Self { - crate::into_ref!(cs); + crate::into_mapped_ref!(cs); cs.set_to_push_pull_output(private::Internal); cs.connect_peripheral_to_output(self.spi.cs_signal(), private::Internal); @@ -625,14 +624,11 @@ where /// /// Enables both input and output functionality for the pin, and connects it /// to the SIO2 output and input signals. - pub fn with_sio2( - self, - sio2: impl Peripheral

+ 'd, - ) -> Self + pub fn with_sio2(self, sio2: impl Peripheral

+ 'd) -> Self where T: QspiInstance, { - crate::into_ref!(sio2); + crate::into_mapped_ref!(sio2); sio2.enable_input(true, private::Internal); sio2.enable_output(true, private::Internal); @@ -649,14 +645,11 @@ where /// /// Enables both input and output functionality for the pin, and connects it /// to the SIO3 output and input signals. - pub fn with_sio3( - self, - sio3: impl Peripheral

+ 'd, - ) -> Self + pub fn with_sio3(self, sio3: impl Peripheral

+ 'd) -> Self where T: QspiInstance, { - crate::into_ref!(sio3); + crate::into_mapped_ref!(sio3); sio3.enable_input(true, private::Internal); sio3.enable_output(true, private::Internal); diff --git a/esp-hal/src/spi/slave.rs b/esp-hal/src/spi/slave.rs index c49e2372ade..1cb3a5305b1 100644 --- a/esp-hal/src/spi/slave.rs +++ b/esp-hal/src/spi/slave.rs @@ -73,7 +73,11 @@ use super::{Error, SpiMode}; use crate::{ dma::{DescriptorChain, DmaChannelConvert, DmaEligible, PeripheralMarker, Rx, Tx}, - gpio::{InputSignal, OutputSignal, PeripheralInput, PeripheralOutput}, + gpio::{ + interconnect::{PeripheralInput, PeripheralOutput}, + InputSignal, + OutputSignal, + }, peripheral::{Peripheral, PeripheralRef}, peripherals::spi2::RegisterBlock, private, @@ -129,7 +133,7 @@ where cs: impl Peripheral

+ 'd, mode: SpiMode, ) -> Spi<'d, T> { - crate::into_ref!(sclk, mosi, miso, cs); + crate::into_mapped_ref!(sclk, mosi, miso, cs); let this = Self::new_internal(spi, mode); diff --git a/esp-hal/src/twai/mod.rs b/esp-hal/src/twai/mod.rs index 69114044ec5..eaed7d1424e 100644 --- a/esp-hal/src/twai/mod.rs +++ b/esp-hal/src/twai/mod.rs @@ -130,7 +130,12 @@ use core::marker::PhantomData; use self::filter::{Filter, FilterType}; use crate::{ dma::PeripheralMarker, - gpio::{InputSignal, OutputSignal, PeripheralInput, PeripheralOutput, Pull}, + gpio::{ + interconnect::{PeripheralInput, PeripheralOutput}, + InputSignal, + OutputSignal, + Pull, + }, interrupt::InterruptHandler, peripheral::{Peripheral, PeripheralRef}, peripherals::twai0::RegisterBlock, @@ -764,8 +769,8 @@ where no_transceiver: bool, mode: TwaiMode, ) -> Self { - // Set up the GPIO pins. - crate::into_ref!(twai, tx_pin, rx_pin); + crate::into_ref!(twai); + crate::into_mapped_ref!(tx_pin, rx_pin); // Enable the peripheral clock for the TWAI peripheral. PeripheralClockControl::enable(twai.peripheral()); @@ -792,6 +797,7 @@ where .modify(|_, w| w.ext_mode().set_bit()); } + // Set up the GPIO pins. let rx_pull = if no_transceiver { tx_pin.set_to_open_drain_output(crate::private::Internal); tx_pin.pull_direction(Pull::Up, crate::private::Internal); diff --git a/esp-hal/src/uart.rs b/esp-hal/src/uart.rs index 27e7e05002f..5e8c6f64935 100644 --- a/esp-hal/src/uart.rs +++ b/esp-hal/src/uart.rs @@ -131,7 +131,12 @@ use core::marker::PhantomData; use self::config::Config; use crate::{ clock::Clocks, - gpio::{InputSignal, OutputSignal, PeripheralInput, PeripheralOutput, Pull}, + gpio::{ + interconnect::{PeripheralInput, PeripheralOutput}, + InputSignal, + OutputSignal, + Pull, + }, interrupt::InterruptHandler, peripheral::{Peripheral, PeripheralRef}, peripherals::{uart0::RegisterBlock, Interrupt}, @@ -452,7 +457,7 @@ where } fn with_rx(self, rx: impl Peripheral

+ 'd) -> Self { - crate::into_ref!(rx); + crate::into_mapped_ref!(rx); rx.init_input(Pull::Up, Internal); rx.connect_input_to_peripheral(T::rx_signal(), Internal); @@ -460,7 +465,7 @@ where } fn with_tx(self, tx: impl Peripheral

+ 'd) -> Self { - crate::into_ref!(tx); + crate::into_mapped_ref!(tx); // Make sure we don't cause an unexpected low pulse on the pin. tx.set_output_high(true, Internal); tx.set_to_push_pull_output(Internal); @@ -539,7 +544,7 @@ where /// Configure RTS pin pub fn with_rts(self, rts: impl Peripheral

+ 'd) -> Self { - crate::into_ref!(rts); + crate::into_mapped_ref!(rts); rts.set_to_push_pull_output(Internal); rts.connect_peripheral_to_output(T::rts_signal(), Internal); @@ -623,7 +628,7 @@ where /// Configure CTS pin pub fn with_cts(self, cts: impl Peripheral

+ 'd) -> Self { - crate::into_ref!(cts); + crate::into_mapped_ref!(cts); cts.init_input(Pull::None, Internal); cts.connect_input_to_peripheral(T::cts_signal(), Internal); @@ -860,7 +865,7 @@ where /// Configure CTS pin pub fn with_cts(self, cts: impl Peripheral

+ 'd) -> Self { - crate::into_ref!(cts); + crate::into_mapped_ref!(cts); cts.init_input(Pull::None, Internal); cts.connect_input_to_peripheral(T::cts_signal(), Internal); @@ -869,7 +874,7 @@ where /// Configure RTS pin pub fn with_rts(self, rts: impl Peripheral

+ 'd) -> Self { - crate::into_ref!(rts); + crate::into_mapped_ref!(rts); rts.set_to_push_pull_output(Internal); rts.connect_peripheral_to_output(T::rts_signal(), Internal); diff --git a/hil-test/tests/spi_slave.rs b/hil-test/tests/spi_slave.rs index aced1f2bccf..f39791b6833 100644 --- a/hil-test/tests/spi_slave.rs +++ b/hil-test/tests/spi_slave.rs @@ -11,7 +11,7 @@ use esp_hal::{ dma::{Dma, DmaPriority}, dma_buffers, - gpio::{interconnect::InputSignal, Io, Level, Output, PeripheralInput}, + gpio::{interconnect::InputSignal, Io, Level, Output}, spi::{slave::Spi, SpiMode}, }; use hil_test as _; diff --git a/hil-test/tests/uart_regression.rs b/hil-test/tests/uart_regression.rs index 11324542b39..1892ddaeadf 100644 --- a/hil-test/tests/uart_regression.rs +++ b/hil-test/tests/uart_regression.rs @@ -9,7 +9,7 @@ #[embedded_test::tests] mod tests { use esp_hal::{ - gpio::{Io, PeripheralOutput}, + gpio::Io, prelude::*, uart::{UartRx, UartTx}, };