From b66e36e232312e399206fd417c2f61ba5101b3f0 Mon Sep 17 00:00:00 2001 From: Scott Mabin Date: Thu, 18 Apr 2024 20:29:07 +0100 Subject: [PATCH] Ensure all structs are consistently CamelCased --- esp-hal/src/analog/adc/esp32.rs | 8 +-- esp-hal/src/analog/adc/riscv.rs | 6 +- esp-hal/src/analog/adc/xtensa.rs | 6 +- esp-hal/src/analog/dac.rs | 8 +-- esp-hal/src/gpio/lp_io.rs | 4 +- esp-hal/src/gpio/mod.rs | 88 ++++++--------------------- esp-hal/src/ledc/mod.rs | 4 +- esp-hal/src/mcpwm/mod.rs | 4 +- esp-hal/src/otg_fs.rs | 8 +-- esp-hal/src/pcnt/mod.rs | 4 +- esp-hal/src/rtc_cntl/sleep/esp32.rs | 6 +- esp-hal/src/rtc_cntl/sleep/esp32c3.rs | 4 +- esp-hal/src/rtc_cntl/sleep/esp32c6.rs | 4 +- esp-hal/src/rtc_cntl/sleep/esp32s3.rs | 8 +-- esp-hal/src/rtc_cntl/sleep/mod.rs | 4 +- examples/src/bin/sleep_timer_ext1.rs | 4 +- examples/src/bin/sleep_timer_lpio.rs | 4 +- examples/src/bin/sleep_timer_rtcio.rs | 4 +- 18 files changed, 64 insertions(+), 114 deletions(-) diff --git a/esp-hal/src/analog/adc/esp32.rs b/esp-hal/src/analog/adc/esp32.rs index d9200235f44..18a5823ef0f 100644 --- a/esp-hal/src/analog/adc/esp32.rs +++ b/esp-hal/src/analog/adc/esp32.rs @@ -192,13 +192,13 @@ impl RegisterAccess for ADC2 { } /// Analog-to-Digital Converter peripheral driver. -pub struct ADC<'d, ADC> { +pub struct Adc<'d, ADC> { _adc: PeripheralRef<'d, ADC>, attenuations: [Option; NUM_ATTENS], active_channel: Option, } -impl<'d, ADCI> ADC<'d, ADCI> +impl<'d, ADCI> Adc<'d, ADCI> where ADCI: RegisterAccess, { @@ -323,7 +323,7 @@ where } } -impl<'d, ADC1> ADC<'d, ADC1> { +impl<'d, ADC1> Adc<'d, ADC1> { pub fn enable_hall_sensor() { // Connect hall sensor unsafe { &*RTC_IO::ptr() } @@ -341,7 +341,7 @@ impl<'d, ADC1> ADC<'d, ADC1> { #[cfg(feature = "embedded-hal-02")] impl<'d, ADCI, PIN> embedded_hal_02::adc::OneShot> - for ADC<'d, ADCI> + for Adc<'d, ADCI> where PIN: embedded_hal_02::adc::Channel + super::AdcChannel, ADCI: RegisterAccess, diff --git a/esp-hal/src/analog/adc/riscv.rs b/esp-hal/src/analog/adc/riscv.rs index 672da8ae358..424b8a29569 100644 --- a/esp-hal/src/analog/adc/riscv.rs +++ b/esp-hal/src/analog/adc/riscv.rs @@ -397,13 +397,13 @@ impl super::CalibrationAccess for crate::peripherals::ADC2 { } /// Analog-to-Digital Converter peripheral driver. -pub struct ADC<'d, ADCI> { +pub struct Adc<'d, ADCI> { _adc: PeripheralRef<'d, ADCI>, attenuations: [Option; NUM_ATTENS], active_channel: Option, } -impl<'d, ADCI> ADC<'d, ADCI> +impl<'d, ADCI> Adc<'d, ADCI> where ADCI: RegisterAccess + 'd, { @@ -540,7 +540,7 @@ impl super::AdcCalEfuse for crate::peripherals::ADC2 { #[cfg(feature = "embedded-hal-02")] impl<'d, ADCI, PIN, CS> embedded_hal_02::adc::OneShot> - for ADC<'d, ADCI> + for Adc<'d, ADCI> where PIN: embedded_hal_02::adc::Channel + super::AdcChannel, ADCI: RegisterAccess, diff --git a/esp-hal/src/analog/adc/xtensa.rs b/esp-hal/src/analog/adc/xtensa.rs index 9d9fada97c3..e8a29737ed2 100644 --- a/esp-hal/src/analog/adc/xtensa.rs +++ b/esp-hal/src/analog/adc/xtensa.rs @@ -401,13 +401,13 @@ impl super::CalibrationAccess for crate::peripherals::ADC2 { } /// Analog-to-Digital Converter peripheral driver. -pub struct ADC<'d, ADC> { +pub struct Adc<'d, ADC> { _adc: PeripheralRef<'d, ADC>, active_channel: Option, last_init_code: u16, } -impl<'d, ADCI> ADC<'d, ADCI> +impl<'d, ADCI> Adc<'d, ADCI> where ADCI: RegisterAccess, { @@ -605,7 +605,7 @@ impl super::AdcCalEfuse for crate::peripherals::ADC2 { #[cfg(feature = "embedded-hal-02")] impl<'d, ADCI, PIN, CS> embedded_hal_02::adc::OneShot> - for ADC<'d, ADCI> + for Adc<'d, ADCI> where PIN: embedded_hal_02::adc::Channel + AdcChannel, ADCI: RegisterAccess, diff --git a/esp-hal/src/analog/dac.rs b/esp-hal/src/analog/dac.rs index e7ff5492f61..d7b47d19b39 100644 --- a/esp-hal/src/analog/dac.rs +++ b/esp-hal/src/analog/dac.rs @@ -53,11 +53,11 @@ cfg_if::cfg_if! { } /// Digital-to-Analog Converter (DAC) Channel 1 -pub struct DAC1<'d> { +pub struct Dac1<'d> { _inner: PeripheralRef<'d, peripherals::DAC1>, } -impl<'d> DAC1<'d> { +impl<'d> Dac1<'d> { /// Constructs a new DAC instance. pub fn new(dac: impl Peripheral

+ 'd, _pin: Dac1Gpio) -> Self { crate::into_ref!(dac); @@ -90,11 +90,11 @@ impl<'d> DAC1<'d> { } /// Digital-to-Analog Converter (DAC) Channel 2 -pub struct DAC2<'d> { +pub struct Dac2<'d> { _inner: PeripheralRef<'d, peripherals::DAC2>, } -impl<'d> DAC2<'d> { +impl<'d> Dac2<'d> { /// Constructs a new DAC instance. pub fn new(dac: impl Peripheral

+ 'd, _pin: Dac2Gpio) -> Self { crate::into_ref!(dac); diff --git a/esp-hal/src/gpio/lp_io.rs b/esp-hal/src/gpio/lp_io.rs index fff66ecdac7..487f1d343e3 100644 --- a/esp-hal/src/gpio/lp_io.rs +++ b/esp-hal/src/gpio/lp_io.rs @@ -180,7 +180,7 @@ macro_rules! lp_gpio { } } - impl $crate::gpio::RTCPin for GpioPin { + impl $crate::gpio::RtcPin for GpioPin { unsafe fn apply_wakeup(&mut self, wakeup: bool, level: u8) { let lp_io = &*$crate::peripherals::LP_IO::ptr(); lp_io.[< pin $gpionum >]().modify(|_, w| { @@ -232,7 +232,7 @@ macro_rules! lp_gpio { } } - impl $crate::gpio::RTCPinWithResistors for GpioPin { + impl $crate::gpio::RtcPinWithResistors for GpioPin { fn rtcio_pullup(&mut self, enable: bool) { let lp_io = unsafe { &*$crate::peripherals::LP_IO::ptr() }; lp_io.[< gpio $gpionum >]().modify(|_, w| w.fun_wpu().bit(enable)); diff --git a/esp-hal/src/gpio/mod.rs b/esp-hal/src/gpio/mod.rs index 885188684ec..4b4afadb328 100644 --- a/esp-hal/src/gpio/mod.rs +++ b/esp-hal/src/gpio/mod.rs @@ -12,11 +12,11 @@ //! interface for GPIO pins. //! //! To get access to the pins, you first need to convert them into a HAL -//! designed struct from the pac struct `GPIO` and `IO_MUX` using `IO::new`. +//! designed struct from the pac struct `GPIO` and `IO_MUX` using `Io::new`. //! //! ## Example //! ```no_run -//! let io = IO::new(peripherals.GPIO, peripherals.IO_MUX); +//! let io = Io::new(peripherals.GPIO, peripherals.IO_MUX); //! let mut led = io.pins.gpio5.into_push_pull_output(); //! ``` //! @@ -100,7 +100,7 @@ impl InputMode for Unknown { } /// RTC input pin mode -pub struct RTCInput { +pub struct RtcInput { _mode: PhantomData, } @@ -142,7 +142,7 @@ impl OutputMode for Unknown { } /// RTC output pin mode -pub struct RTCOutput { +pub struct RtcOutput { _mode: PhantomData, } @@ -155,20 +155,6 @@ pub struct PushPull; /// Analog mode pub struct Analog; -/// Alternate mode -pub struct Alternate { - _mode: PhantomData, -} - -#[doc(hidden)] -pub struct AF0; - -#[doc(hidden)] -pub struct AF1; - -#[doc(hidden)] -pub struct AF2; - /// Drive strength (values are approximates) #[allow(missing_docs)] pub enum DriveStrength { @@ -199,7 +185,7 @@ pub enum RtcFunction { } /// Trait implemented by RTC pins -pub trait RTCPin: Pin { +pub trait RtcPin: Pin { /// RTC number of the pin #[cfg(xtensa)] fn rtc_number(&self) -> u8; @@ -221,7 +207,7 @@ pub trait RTCPin: Pin { /// Trait implemented by RTC pins which supporting internal pull-up / pull-down /// resistors. -pub trait RTCPinWithResistors: RTCPin { +pub trait RtcPinWithResistors: RtcPin { /// Enable/disable the internal pull-up resistor fn rtcio_pullup(&mut self, enable: bool); /// Enable/disable the internal pull-down resistor @@ -229,15 +215,15 @@ pub trait RTCPinWithResistors: RTCPin { } /// Marker for RTC pins which support input mode -pub trait RTCInputPin: RTCPin {} +pub trait RtcInputPin: RtcPin {} /// Marker for RTC pins which support output mode -pub trait RTCOutputPin: RTCPin {} +pub trait RtcOutputPin: RtcPin {} /// Marker for pins which support analog mode pub trait AnalogPin {} /// Common trait implemented by pins -pub trait Pin { +pub trait Pin: crate::private::Sealed { /// GPIO number fn number(&self) -> u8; @@ -304,7 +290,7 @@ pub trait InputPin: Pin { /// Remove a connected `signal` from this input pin. /// - /// Clears the entry in the GPIO matrix / IO mux that associates this input + /// Clears the entry in the GPIO matrix / Io mux that associates this input /// pin with the given [input `signal`](`InputSignal`). Any other /// connected signals remain intact. fn disconnect_input_from_peripheral(&mut self, signal: InputSignal) -> &mut Self; @@ -374,7 +360,7 @@ pub trait OutputPin: Pin { /// Remove this output pin from a connected [signal](`InputSignal`). /// - /// Clears the entry in the GPIO matrix / IO mux that associates this output + /// Clears the entry in the GPIO matrix / Io mux that associates this output /// pin with a previously connected [signal](`InputSignal`). Any other /// outputs connected to the signal remain intact. fn disconnect_peripheral_from_output(&mut self) -> &mut Self; @@ -1146,30 +1132,6 @@ where } } -impl From> for GpioPin, GPIONUM> -where - Self: GpioProperties, - ::PinType: IsOutputPin, - GpioPin: GpioProperties, - as GpioProperties>::PinType: IsOutputPin, -{ - fn from(pin: GpioPin) -> Self { - pin.into_alternate_1() - } -} - -impl From> for GpioPin, GPIONUM> -where - Self: GpioProperties, - ::PinType: IsOutputPin, - GpioPin: GpioProperties, - as GpioProperties>::PinType: IsOutputPin, -{ - fn from(pin: GpioPin) -> Self { - pin.into_alternate_2() - } -} - impl GpioPin where Self: GpioProperties, @@ -1246,18 +1208,6 @@ where self.init_output(GPIO_FUNCTION, true); GpioPin { _mode: PhantomData } } - - /// Configures the pin into alternate mode one. - pub fn into_alternate_1(self) -> GpioPin, GPIONUM> { - self.init_output(AlternateFunction::Function1, false); - GpioPin { _mode: PhantomData } - } - - /// Configures the pin into alternate mode two. - pub fn into_alternate_2(self) -> GpioPin, GPIONUM> { - self.init_output(AlternateFunction::Function2, false); - GpioPin { _mode: PhantomData } - } } impl OutputPin for GpioPin @@ -1878,13 +1828,13 @@ impl AnyPin, TYPE> { } /// General Purpose Input/Output driver -pub struct IO { +pub struct Io { _io_mux: IO_MUX, /// The pins available on this chip pub pins: Pins, } -impl IO { +impl Io { /// Initialize the I/O driver. pub fn new(gpio: GPIO, io_mux: IO_MUX) -> Self { Self::new_with_priority(gpio, io_mux, crate::interrupt::Priority::min()) @@ -1903,7 +1853,7 @@ impl IO { let pins = gpio.split(); - IO { + Io { _io_mux: io_mux, pins, } @@ -2112,7 +2062,7 @@ macro_rules! rtc_pins { ( $pin_num:expr, $rtc_pin:expr, $pin_reg:expr, $prefix:pat, $hold:ident $(, $rue:ident, $rde:ident)? ) => { - impl $crate::gpio::RTCPin for GpioPin + impl $crate::gpio::RtcPin for GpioPin { fn rtc_number(&self) -> u8 { $rtc_pin @@ -2152,7 +2102,7 @@ macro_rules! rtc_pins { } $( - impl $crate::gpio::RTCPinWithResistors for GpioPin + impl $crate::gpio::RtcPinWithResistors for GpioPin { fn rtcio_pullup(&mut self, enable: bool) { let rtcio = unsafe { &*$crate::peripherals::RTC_IO::PTR }; @@ -2175,7 +2125,7 @@ macro_rules! rtc_pins { paste::paste!{ impl $crate::gpio::rtc_io::IntoLowPowerPin<$pin_num> for GpioPin { fn into_low_power(mut self) -> $crate::gpio::rtc_io::LowPowerPin { - use $crate::gpio::RTCPin; + use $crate::gpio::RtcPin; self.rtc_set_config(false, true, $crate::gpio::RtcFunction::Rtc); @@ -2204,7 +2154,7 @@ macro_rules! rtc_pins { ( $pin_num:expr ) => { - impl $crate::gpio::RTCPin for GpioPin { + impl $crate::gpio::RtcPin for GpioPin { unsafe fn apply_wakeup(&mut self, wakeup: bool, level: u8) { let rtc_cntl = unsafe { &*$crate::peripherals::RTC_CNTL::ptr() }; paste::paste! { @@ -2221,7 +2171,7 @@ macro_rules! rtc_pins { } } - impl $crate::gpio::RTCPinWithResistors for GpioPin { + impl $crate::gpio::RtcPinWithResistors for GpioPin { fn rtcio_pullup(&mut self, enable: bool) { let io_mux = unsafe { &*$crate::peripherals::IO_MUX::ptr() }; io_mux.gpio($pin_num).modify(|_, w| w.fun_wpu().bit(enable)); diff --git a/esp-hal/src/ledc/mod.rs b/esp-hal/src/ledc/mod.rs index b6d17439f61..b7bf3ab3e96 100644 --- a/esp-hal/src/ledc/mod.rs +++ b/esp-hal/src/ledc/mod.rs @@ -82,7 +82,7 @@ pub enum LSGlobalClkSource { } /// LEDC (LED PWM Controller) -pub struct LEDC<'d> { +pub struct Ledc<'d> { _instance: PeripheralRef<'d, crate::peripherals::LEDC>, ledc: &'d crate::peripherals::ledc::RegisterBlock, clock_control_config: &'d Clocks<'d>, @@ -108,7 +108,7 @@ impl Speed for LowSpeed { const IS_HS: bool = false; } -impl<'d> LEDC<'d> { +impl<'d> Ledc<'d> { /// Return a new LEDC pub fn new( _instance: impl Peripheral

+ 'd, diff --git a/esp-hal/src/mcpwm/mod.rs b/esp-hal/src/mcpwm/mod.rs index 373318b99e7..b767af327ae 100644 --- a/esp-hal/src/mcpwm/mod.rs +++ b/esp-hal/src/mcpwm/mod.rs @@ -81,7 +81,7 @@ type RegisterBlock = crate::peripherals::mcpwm0::RegisterBlock; /// The MCPWM peripheral #[non_exhaustive] -pub struct MCPWM<'d, PWM> { +pub struct McPwm<'d, PWM> { _inner: PeripheralRef<'d, PWM>, /// Timer0 pub timer0: Timer<0, PWM>, @@ -97,7 +97,7 @@ pub struct MCPWM<'d, PWM> { pub operator2: Operator<2, PWM>, } -impl<'d, PWM: PwmPeripheral> MCPWM<'d, PWM> { +impl<'d, PWM: PwmPeripheral> McPwm<'d, PWM> { /// `pwm_clk = clocks.crypto_pwm_clock / (prescaler + 1)` // clocks.crypto_pwm_clock normally is 160 MHz pub fn new( diff --git a/esp-hal/src/otg_fs.rs b/esp-hal/src/otg_fs.rs index 69a96a91582..49883df17ad 100644 --- a/esp-hal/src/otg_fs.rs +++ b/esp-hal/src/otg_fs.rs @@ -42,11 +42,11 @@ pub trait UsbDp: crate::private::Sealed {} #[doc(hidden)] pub trait UsbDm: crate::private::Sealed {} -pub struct USB<'d> { +pub struct Usb<'d> { _usb0: PeripheralRef<'d, peripherals::USB0>, } -impl<'d> USB<'d> { +impl<'d> Usb<'d> { pub fn new( usb0: impl Peripheral

+ 'd, _usb_dp: impl Peripheral

+ 'd, @@ -64,9 +64,9 @@ impl<'d> USB<'d> { } } -unsafe impl<'d> Sync for USB<'d> {} +unsafe impl<'d> Sync for Usb<'d> {} -unsafe impl<'d> UsbPeripheral for USB<'d> { +unsafe impl<'d> UsbPeripheral for Usb<'d> { const REGISTERS: *const () = peripherals::USB0::ptr() as *const (); const HIGH_SPEED: bool = false; diff --git a/esp-hal/src/pcnt/mod.rs b/esp-hal/src/pcnt/mod.rs index 64fed30a1cf..a040804f494 100644 --- a/esp-hal/src/pcnt/mod.rs +++ b/esp-hal/src/pcnt/mod.rs @@ -141,11 +141,11 @@ use crate::{ pub mod channel; pub mod unit; -pub struct PCNT<'d> { +pub struct Pcnt<'d> { _instance: PeripheralRef<'d, peripherals::PCNT>, } -impl<'d> PCNT<'d> { +impl<'d> Pcnt<'d> { /// Return a new PCNT pub fn new( _instance: impl Peripheral

+ 'd, diff --git a/esp-hal/src/rtc_cntl/sleep/esp32.rs b/esp-hal/src/rtc_cntl/sleep/esp32.rs index b95760348be..21723dab76f 100644 --- a/esp-hal/src/rtc_cntl/sleep/esp32.rs +++ b/esp-hal/src/rtc_cntl/sleep/esp32.rs @@ -1,6 +1,6 @@ use super::{Ext0WakeupSource, Ext1WakeupSource, TimerWakeupSource, WakeSource, WakeTriggers}; use crate::{ - gpio::{RTCPin, RtcFunction}, + gpio::{RtcFunction, RtcPin}, rtc_cntl::{sleep::WakeupLevel, Clock, Rtc, RtcClock}, }; @@ -66,7 +66,7 @@ impl WakeSource for TimerWakeupSource { } } -impl WakeSource for Ext0WakeupSource<'_, P> { +impl WakeSource for Ext0WakeupSource<'_, P> { fn apply(&self, _rtc: &Rtc, triggers: &mut WakeTriggers, sleep_config: &mut RtcSleepConfig) { // don't power down RTC peripherals sleep_config.set_rtc_peri_pd_en(false); @@ -92,7 +92,7 @@ impl WakeSource for Ext0WakeupSource<'_, P> { } } -impl Drop for Ext0WakeupSource<'_, P> { +impl Drop for Ext0WakeupSource<'_, P> { fn drop(&mut self) { // should we have saved the pin configuration first? // set pin back to IO_MUX (input_enable and func have no effect when pin is sent diff --git a/esp-hal/src/rtc_cntl/sleep/esp32c3.rs b/esp-hal/src/rtc_cntl/sleep/esp32c3.rs index 34ecb2c41bb..8a5594c47eb 100644 --- a/esp-hal/src/rtc_cntl/sleep/esp32c3.rs +++ b/esp-hal/src/rtc_cntl/sleep/esp32c3.rs @@ -1,6 +1,6 @@ use super::{TimerWakeupSource, WakeSource, WakeTriggers, WakeupLevel}; use crate::{ - gpio::{RTCPinWithResistors, RtcFunction}, + gpio::{RtcFunction, RtcPinWithResistors}, regi2c_write_mask, rtc_cntl::{sleep::RtcioWakeupSource, Clock, Rtc, RtcClock}, }; @@ -116,7 +116,7 @@ impl WakeSource for TimerWakeupSource { } impl<'a, 'b> RtcioWakeupSource<'a, 'b> { - fn apply_pin(&self, pin: &mut dyn RTCPinWithResistors, level: WakeupLevel) { + fn apply_pin(&self, pin: &mut dyn RtcPinWithResistors, level: WakeupLevel) { // The pullup/pulldown part is like in gpio_deep_sleep_wakeup_prepare let level = match level { WakeupLevel::High => { diff --git a/esp-hal/src/rtc_cntl/sleep/esp32c6.rs b/esp-hal/src/rtc_cntl/sleep/esp32c6.rs index 878dd378c02..b07eabeb83e 100644 --- a/esp-hal/src/rtc_cntl/sleep/esp32c6.rs +++ b/esp-hal/src/rtc_cntl/sleep/esp32c6.rs @@ -61,9 +61,9 @@ impl Ext1WakeupSource<'_, '_> { } fn wake_io_reset(gpio: &mut Pins) { - use crate::gpio::RTCPin; + use crate::gpio::RtcPin; - fn uninit_pin(pin: &mut impl RTCPin, wakeup_pins: u8) { + fn uninit_pin(pin: &mut impl RtcPin, wakeup_pins: u8) { if wakeup_pins & (1 << pin.number()) != 0 { pin.rtcio_pad_hold(false); pin.rtc_set_config(false, false, RtcFunction::Rtc); diff --git a/esp-hal/src/rtc_cntl/sleep/esp32s3.rs b/esp-hal/src/rtc_cntl/sleep/esp32s3.rs index beb4ecbda95..13760c0ba22 100644 --- a/esp-hal/src/rtc_cntl/sleep/esp32s3.rs +++ b/esp-hal/src/rtc_cntl/sleep/esp32s3.rs @@ -7,7 +7,7 @@ use super::{ WakeupLevel, }; use crate::{ - gpio::{RTCPin, RtcFunction}, + gpio::{RtcFunction, RtcPin}, regi2c_write_mask, rtc_cntl::{sleep::RtcioWakeupSource, Clock, Rtc, RtcClock}, }; @@ -110,7 +110,7 @@ impl WakeSource for TimerWakeupSource { } } -impl WakeSource for Ext0WakeupSource<'_, P> { +impl WakeSource for Ext0WakeupSource<'_, P> { fn apply(&self, _rtc: &Rtc, triggers: &mut WakeTriggers, sleep_config: &mut RtcSleepConfig) { // don't power down RTC peripherals sleep_config.set_rtc_peri_pd_en(false); @@ -136,7 +136,7 @@ impl WakeSource for Ext0WakeupSource<'_, P> { } } -impl Drop for Ext0WakeupSource<'_, P> { +impl Drop for Ext0WakeupSource<'_, P> { fn drop(&mut self) { // should we have saved the pin configuration first? // set pin back to IO_MUX (input_enable and func have no effect when pin is sent @@ -192,7 +192,7 @@ impl Drop for Ext1WakeupSource<'_, '_> { } impl<'a, 'b> RtcioWakeupSource<'a, 'b> { - fn apply_pin(&self, pin: &mut dyn RTCPin, level: WakeupLevel) { + fn apply_pin(&self, pin: &mut dyn RtcPin, level: WakeupLevel) { let rtcio = unsafe { &*crate::peripherals::RTC_IO::PTR }; pin.rtc_set_config(true, true, RtcFunction::Rtc); diff --git a/esp-hal/src/rtc_cntl/sleep/mod.rs b/esp-hal/src/rtc_cntl/sleep/mod.rs index e63fe94a75c..1df091fca36 100644 --- a/esp-hal/src/rtc_cntl/sleep/mod.rs +++ b/esp-hal/src/rtc_cntl/sleep/mod.rs @@ -25,9 +25,9 @@ use core::cell::RefCell; use core::time::Duration; #[cfg(any(esp32, esp32s3))] -use crate::gpio::RTCPin as RtcIoWakeupPinType; +use crate::gpio::RtcPin as RtcIoWakeupPinType; #[cfg(any(esp32c3, esp32c6))] -use crate::gpio::RTCPinWithResistors as RtcIoWakeupPinType; +use crate::gpio::RtcPinWithResistors as RtcIoWakeupPinType; use crate::rtc_cntl::Rtc; #[cfg_attr(esp32, path = "esp32.rs")] diff --git a/examples/src/bin/sleep_timer_ext1.rs b/examples/src/bin/sleep_timer_ext1.rs index f8e2087df4b..61819faec99 100644 --- a/examples/src/bin/sleep_timer_ext1.rs +++ b/examples/src/bin/sleep_timer_ext1.rs @@ -12,7 +12,7 @@ use esp_hal::{ clock::ClockControl, delay::Delay, entry, - gpio::{RTCPin, IO}, + gpio::{RtcPin, IO}, peripherals::Peripherals, prelude::*, rtc_cntl::{ @@ -47,7 +47,7 @@ fn main() -> ! { let mut delay = Delay::new(&clocks); let timer = TimerWakeupSource::new(Duration::from_secs(30)); - let mut wakeup_pins: [&mut dyn RTCPin; 2] = [&mut pin_0, &mut pin_2]; + let mut wakeup_pins: [&mut dyn RtcPin; 2] = [&mut pin_0, &mut pin_2]; let ext1 = Ext1WakeupSource::new(&mut wakeup_pins, WakeupLevel::High); println!("sleeping!"); delay.delay_millis(100); diff --git a/examples/src/bin/sleep_timer_lpio.rs b/examples/src/bin/sleep_timer_lpio.rs index 5deb512396c..dc94e6bdc77 100644 --- a/examples/src/bin/sleep_timer_lpio.rs +++ b/examples/src/bin/sleep_timer_lpio.rs @@ -12,7 +12,7 @@ use esp_hal::{ clock::ClockControl, delay::Delay, entry, - gpio::{RTCPinWithResistors, IO}, + gpio::{RtcPinWithResistors, IO}, peripherals::Peripherals, prelude::*, rtc_cntl::{ @@ -47,7 +47,7 @@ fn main() -> ! { let mut delay = Delay::new(&clocks); let timer = TimerWakeupSource::new(Duration::from_secs(10)); - let wakeup_pins: &mut [(&mut dyn RTCPinWithResistors, WakeupLevel)] = &mut [ + let wakeup_pins: &mut [(&mut dyn RtcPinWithResistors, WakeupLevel)] = &mut [ (&mut pin2, WakeupLevel::Low), (&mut pin3, WakeupLevel::High), ]; diff --git a/examples/src/bin/sleep_timer_rtcio.rs b/examples/src/bin/sleep_timer_rtcio.rs index 2ca1e39bf3d..2279f095291 100644 --- a/examples/src/bin/sleep_timer_rtcio.rs +++ b/examples/src/bin/sleep_timer_rtcio.rs @@ -47,13 +47,13 @@ fn main() -> ! { let timer = TimerWakeupSource::new(Duration::from_secs(10)); #[cfg(feature = "esp32c3")] - let wakeup_pins: &mut [(&mut dyn gpio::RTCPinWithResistors, WakeupLevel)] = &mut [ + let wakeup_pins: &mut [(&mut dyn gpio::RtcPinWithResistors, WakeupLevel)] = &mut [ (&mut io.pins.gpio2, WakeupLevel::Low), (&mut io.pins.gpio3, WakeupLevel::High), ]; #[cfg(feature = "esp32s3")] - let mut wakeup_pins: &mut [(&mut dyn gpio::RTCPin, WakeupLevel)] = + let mut wakeup_pins: &mut [(&mut dyn gpio::RtcPin, WakeupLevel)] = &mut [(&mut io.pins.gpio18, WakeupLevel::Low)]; let rtcio = RtcioWakeupSource::new(wakeup_pins);