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Copy path2FeFET_TCAM.cfg
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2FeFET_TCAM.cfg
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# This is a sample configuration for generic NVM prototype
# CAM/RAM/Cache
-DesignTarget: CAM
-ProcessNode: 45
-DeviceRoadmap: HP
-Temperature (K): 350
-MemoryCellInputFile: ./2FeFET_TCAM.cell
-Capacity (B): 512
-WordWidth (bit): 64
# H-tree/non-H-tree
-Routing: H-tree
-WithInputBuffer: No
-WithInputEnc: No
//-InputEncType: encoding_two_bit
-CustomInputEnc: No
-InternalSensing: true
# nvsim_vol/nvsim_cur/self_clock/dual_the
-TypeSenseAmp: nvsim_vol
-CustomSenseAmp: No
-WithWriteDriver: No
-WithOutputAcc: No
-WithPriorityEnc: No
-WithOutputBuffer: No
# ReadLatency/WriteLatency/ReadDynamicEnergy/WriteDynamicEnergy/ReadEDP/WriteEDP/LeakagePower/Area/Exploration
-OptimizationTarget: LeakagePower
# LocalAggressive/LocalConservative/SemiAggressive/SemiConservative/GlobalAggressive/GlobalConservative
# RepeatedNone/RepeatedOpt/Repeated5%Penalty/Repeated10%Penalty/Repeated20%Penalty/Repeated30%PenaltyRepeated40%Penalty/Repeated50%Penalty
-LocalWireType: LocalConservative
-LocalWireRepeaterType: RepeatedNone
-LocalWireUseLowSwing: No
-GlobalWireType: GlobalAggressive
-GlobalWireRepeaterType: RepeatedNone
-GlobalWireUseLowSwing: No
# latency/area/balance
-BufferDesignOptimization: latency
-RowDriverOptimization: latency
-PriorityEncOptimization: latency
#
-ForceBank (Total AxB, Active CxD): 1x1, 1x1
-ForceMat (Total AxB, Active CxD): 1x1, 1x1
-ForceMuxSenseAmp: 1
# those are for write only, not for search or read
-ForceMuxOutputLev1: 1
-ForceMuxOutputLev2: 1
-AdditionalCapOnML (fF): 0