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Open FPGA for absolute beginners #52

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acomodi opened this issue May 4, 2020 · 6 comments
Open

Open FPGA for absolute beginners #52

acomodi opened this issue May 4, 2020 · 6 comments

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@acomodi
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acomodi commented May 4, 2020

The SymbiFlow project is centered around the support for various FPGA technologies. Many projects that constitute SymbiFlow are not directly related to hardware, however they still might require some level of understanding of FPGA chips. To lower the entry threshold and open to a broader developer community that is not familiar with the FPGAs, we want to provide a bunch of useful guides introducing basic principles of FPGA operation.

Currently, most of the information is available online in scientific articles or vendors' documentation. However, the knowledge is not structured in a user-friendly way, which makes it inaccessible to those who want to start working with FPGAs using an open and vendor-neutral approach. The main point of this task is to gather available information and combine it into a introductory guide for newcomers to the world of FPGA chips. To complete this task, the writer will receive guidance, advice and necessary information from a mentor.

This is a (selected) list of available resources:

After covering the basics of FPGAs and FPGA development, the document will describe the aim of the SymbiFlow project and its role in the open source FPGA ecosystem.

@mithro
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mithro commented May 4, 2020

A lot of this could come from the Fomu workshop too.

@eine
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eine commented Jun 5, 2020

@hackfin
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hackfin commented Jun 25, 2020

I've made good experience with Jupyter NB and immediate rendering of .dot images or waveforms, however it needs a bit more love (from the Python API side) for better usability.
I've added some beginner's examples to the 'hacker space' which checks out from a secondary repo when starting the binder via the button below (follow instructions)

So basically you code 'HDL' in Python, hit Run and see the output from yosys et al.

Binder

The framework also covers co-simulation and synthesis to real hardware (ECP5 FPGAs for now), that's where the focus is currently on. So not sure how well it would integrate with Symbiflow.

@josuah
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josuah commented Apr 18, 2022

Here is are selected links from this list, in case that helps...

Gateware

http://zipcpu.com:
A long-winged effort for documenting a learning-path through verilog and hardware design.

http://stevenbell.me/:
Classes on digital logic circuits available online.

https://hdlbits.01xz.net/wiki/Step_one:
Exercises and learning material for Verilog.

https://projectf.io/:
FPGA info site oriented toward video.

https://www.fpga4fun.com/:
Lessons for practical approach to FPGAs.

HDL Languages

https://en.wikipedia.org/wiki/Verilog:
Used by most chip makers, and lingua frinca of the FPGA world.

https://en.wikipedia.org/wiki/VHDL:
If it is not Verilog, it is likely going to be VHDL.

https://clash-lang.org/:
Haskell-based HDL.

https://m-labs.hk/migen:
Python-based HDL.

https://www.chisel-lang.org/:
Scala-based HDL.

ASIC

Specifics of getting an ASIC built-up out of a circuit design.

https://www.youtube.com/watch?v=fIJCoViDIj0:
Introduction to VLSI manufacturing processes

https://hackaday.com/2022/03/18/the-open-source-asics-hack-chat-redefines-possible/:
Introduction to the ASIC world.

FPGA

https://f4pga.org/:
fpga toolchain for Xilinx 7-Series, Lattice iCE40, Lattice ECP5
FPGAs, QuickLogic EOS S3

https://www.sparkfun.com/news/1203:
Introduction to FPGAs by SparkFun

https://hackaday.io/project/27550-the-hobbyists-guide-to-fpgas:
Introduction to FPGAs published on HACKADAY.

https://vhdlwhiz.com/terminology/:
Definitions and learning material

https://joelw.id.au/FPGA/CheapFPGADevelopmentBoards:
Overview and advises of FPGA boards for getting started

Simulation

Simulating hardware at gate or circuit level.

https://www.isotel.eu/mixedsim/:
Tool building on top of ngspice for simulating circuits.

https://en.wikipedia.org/wiki/List_of_HDL_simulators:
Wikipedia list of HDL simulators

https://ghdl.github.io/ghdl/:
The great one tool for VHDL.

https://www.veripool.org/verilator/:
A simulator turning Verilog into C++, providing a thin C++ api to
interact with simulated hardware.

http://iverilog.icarus.com/:
Some other simulator that I should try some day!

@josuah
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josuah commented Apr 18, 2022

Ah, and I forgot, for visual learners: https://redirect.invidious.io/channel/UCJaq8Bzo3J7Hq5lyfhYO3Ew

@josuah
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josuah commented May 11, 2022

There is an ongoing effort to gather resources here: https://bit.ly/Learn_FPGA

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