From 017b8dd2f482a648e28fbd3a4e9823bff897448a Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Mon, 15 Mar 2021 13:48:24 +0100 Subject: [PATCH] Add Nucleo G031K8 and generic G031Kx Fix #855 Signed-off-by: Frederic Pillon --- README.md | 3 + boards.txt | 93 +++++++++ .../generic_clock.c | 35 +++- .../ldscript.ld | 177 ++++++++++++++++++ .../variant_NUCLEO_G031K8.cpp | 119 ++++++++++++ .../variant_NUCLEO_G031K8.h | 131 +++++++++++++ 6 files changed, 556 insertions(+), 2 deletions(-) create mode 100644 variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/ldscript.ld create mode 100644 variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/variant_NUCLEO_G031K8.cpp create mode 100644 variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/variant_NUCLEO_G031K8.h diff --git a/README.md b/README.md index 79613b855b..a0a322c2e9 100644 --- a/README.md +++ b/README.md @@ -114,6 +114,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :----: | :-------: | ---- | :-----: | :---- | | :green_heart: | STM32F031K6 | [Nucleo F031K6](https://www.st.com/en/evaluation-tools/nucleo-f031k6.html) | *1.9.0* | | | :green_heart: | STM32F303K8 | [Nucleo F303K8](http://www.st.com/en/evaluation-tools/nucleo-f303k8.html) | *1.1.0* | | +| :yellow_heart: | STM32G031K8 | [Nucleo G031K8](https://www.st.com/en/evaluation-tools/nucleo-g031k8.html) | **2.0.0** | | :green_heart: | STM32G431KB | [Nucleo G431KB](https://www.st.com/en/evaluation-tools/nucleo-g431kb.html) | *1.7.0* | | | :green_heart: | STM32L031K6 | [Nucleo L031K6](http://www.st.com/en/evaluation-tools/nucleo-l031k6.html) | *1.1.1* | | | :green_heart: | STM32L412KB | [Nucleo L412KB](http://www.st.com/en/evaluation-tools/nucleo-l412kb.html) | *1.5.0* | | @@ -215,7 +216,9 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :yellow_heart: | STM32G030K8 | [Aurora One](https://www.bfy.kr/aurora-one/) | **2.0.0** | | :yellow_heart: | STM32G030K6
STM32G030K8 | Generic Board | **2.0.0** | | | :yellow_heart: | STM32G031J4
STM32G031J6 | Generic Board | **2.0.0** | | +| :yellow_heart: | STM32G031K4
STM32G031K6
STM32G031K8 | Generic Board | **2.0.0** | | | :yellow_heart: | STM32G041J6 | Generic Board | **2.0.0** | | +| :yellow_heart: | STM32G041K6
STM32G041K8 | Generic Board | **2.0.0** | | | :yellow_heart: | STM32G071R6
STM32G071R8
STM32G071RB | Generic Board | **2.0.0** | | | :yellow_heart: | STM32G081RB | Generic Board | **2.0.0** | | diff --git a/boards.txt b/boards.txt index 4b8fbcb45a..ab7c45d3d5 100644 --- a/boards.txt +++ b/boards.txt @@ -508,6 +508,19 @@ Nucleo_32.menu.pnum.NUCLEO_F303K8.build.product_line=STM32F303x8 Nucleo_32.menu.pnum.NUCLEO_F303K8.build.variant=STM32F3xx/NUCLEO_F303K8 Nucleo_32.menu.pnum.NUCLEO_F303K8.build.cmsis_lib_gcc=arm_cortexM4lf_math +# NUCLEO_G031K8 board +Nucleo_32.menu.pnum.NUCLEO_G031K8=Nucleo G031K8 +Nucleo_32.menu.pnum.NUCLEO_G031K8.node=NOD_G031K8 +Nucleo_32.menu.pnum.NUCLEO_G031K8.upload.maximum_size=65536 +Nucleo_32.menu.pnum.NUCLEO_G031K8.upload.maximum_data_size=8192 +Nucleo_32.menu.pnum.NUCLEO_G031K8.build.mcu=cortex-m0plus +Nucleo_32.menu.pnum.NUCLEO_G031K8.build.board=NUCLEO_G031K8 +Nucleo_32.menu.pnum.NUCLEO_G031K8.build.series=STM32G0xx +Nucleo_32.menu.pnum.NUCLEO_G031K8.build.product_line=STM32G031xx +Nucleo_32.menu.pnum.NUCLEO_G031K8.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U) +Nucleo_32.menu.pnum.NUCLEO_G031K8.build.cmsis_lib_gcc=arm_cortexM0l_math +Nucleo_32.menu.pnum.NUCLEO_G031K8.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0 + # NUCLEO_G431KB board Nucleo_32.menu.pnum.NUCLEO_G431KB=Nucleo G431KB Nucleo_32.menu.pnum.NUCLEO_G431KB.node="NODE_G431KB,NOD_G431KB" @@ -1732,6 +1745,54 @@ GenG0.menu.pnum.GENERIC_G031J6MX.build.board=GENERIC_G031J6MX GenG0.menu.pnum.GENERIC_G031J6MX.build.product_line=STM32G031xx GenG0.menu.pnum.GENERIC_G031J6MX.build.variant=STM32G0xx/G031J(4-6)M_G041J6M +# Generic G031K4Tx +GenG0.menu.pnum.GENERIC_G031K4TX=Generic G031K4Tx +GenG0.menu.pnum.GENERIC_G031K4TX.upload.maximum_size=16384 +GenG0.menu.pnum.GENERIC_G031K4TX.upload.maximum_data_size=8192 +GenG0.menu.pnum.GENERIC_G031K4TX.build.board=GENERIC_G031K4TX +GenG0.menu.pnum.GENERIC_G031K4TX.build.product_line=STM32G031xx +GenG0.menu.pnum.GENERIC_G031K4TX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U) + +# Generic G031K6Tx +GenG0.menu.pnum.GENERIC_G031K6TX=Generic G031K6Tx +GenG0.menu.pnum.GENERIC_G031K6TX.upload.maximum_size=32768 +GenG0.menu.pnum.GENERIC_G031K6TX.upload.maximum_data_size=8192 +GenG0.menu.pnum.GENERIC_G031K6TX.build.board=GENERIC_G031K6TX +GenG0.menu.pnum.GENERIC_G031K6TX.build.product_line=STM32G031xx +GenG0.menu.pnum.GENERIC_G031K6TX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U) + +# Generic G031K8Tx +GenG0.menu.pnum.GENERIC_G031K8TX=Generic G031K8Tx +GenG0.menu.pnum.GENERIC_G031K8TX.upload.maximum_size=65536 +GenG0.menu.pnum.GENERIC_G031K8TX.upload.maximum_data_size=8192 +GenG0.menu.pnum.GENERIC_G031K8TX.build.board=GENERIC_G031K8TX +GenG0.menu.pnum.GENERIC_G031K8TX.build.product_line=STM32G031xx +GenG0.menu.pnum.GENERIC_G031K8TX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U) + +# Generic G031K4Ux +GenG0.menu.pnum.GENERIC_G031K4UX=Generic G031K4Ux +GenG0.menu.pnum.GENERIC_G031K4UX.upload.maximum_size=16384 +GenG0.menu.pnum.GENERIC_G031K4UX.upload.maximum_data_size=8192 +GenG0.menu.pnum.GENERIC_G031K4UX.build.board=GENERIC_G031K4UX +GenG0.menu.pnum.GENERIC_G031K4UX.build.product_line=STM32G031xx +GenG0.menu.pnum.GENERIC_G031K4UX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U) + +# Generic G031K6Ux +GenG0.menu.pnum.GENERIC_G031K6UX=Generic G031K6Ux +GenG0.menu.pnum.GENERIC_G031K6UX.upload.maximum_size=32768 +GenG0.menu.pnum.GENERIC_G031K6UX.upload.maximum_data_size=8192 +GenG0.menu.pnum.GENERIC_G031K6UX.build.board=GENERIC_G031K6UX +GenG0.menu.pnum.GENERIC_G031K6UX.build.product_line=STM32G031xx +GenG0.menu.pnum.GENERIC_G031K6UX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U) + +# Generic G031K8Ux +GenG0.menu.pnum.GENERIC_G031K8UX=Generic G031K8Ux +GenG0.menu.pnum.GENERIC_G031K8UX.upload.maximum_size=65536 +GenG0.menu.pnum.GENERIC_G031K8UX.upload.maximum_data_size=8192 +GenG0.menu.pnum.GENERIC_G031K8UX.build.board=GENERIC_G031K8UX +GenG0.menu.pnum.GENERIC_G031K8UX.build.product_line=STM32G031xx +GenG0.menu.pnum.GENERIC_G031K8UX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U) + # Generic G041J6Mx GenG0.menu.pnum.GENERIC_G041J6MX=Generic G041J6Mx GenG0.menu.pnum.GENERIC_G041J6MX.upload.maximum_size=32768 @@ -1740,6 +1801,38 @@ GenG0.menu.pnum.GENERIC_G041J6MX.build.board=GENERIC_G041J6MX GenG0.menu.pnum.GENERIC_G041J6MX.build.product_line=STM32G041xx GenG0.menu.pnum.GENERIC_G041J6MX.build.variant=STM32G0xx/G031J(4-6)M_G041J6M +# Generic G041K6Tx +GenG0.menu.pnum.GENERIC_G041K6TX=Generic G041K6Tx +GenG0.menu.pnum.GENERIC_G041K6TX.upload.maximum_size=32768 +GenG0.menu.pnum.GENERIC_G041K6TX.upload.maximum_data_size=8192 +GenG0.menu.pnum.GENERIC_G041K6TX.build.board=GENERIC_G041K6TX +GenG0.menu.pnum.GENERIC_G041K6TX.build.product_line=STM32G041xx +GenG0.menu.pnum.GENERIC_G041K6TX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U) + +# Generic G041K8Tx +GenG0.menu.pnum.GENERIC_G041K8TX=Generic G041K8Tx +GenG0.menu.pnum.GENERIC_G041K8TX.upload.maximum_size=65536 +GenG0.menu.pnum.GENERIC_G041K8TX.upload.maximum_data_size=8192 +GenG0.menu.pnum.GENERIC_G041K8TX.build.board=GENERIC_G041K8TX +GenG0.menu.pnum.GENERIC_G041K8TX.build.product_line=STM32G041xx +GenG0.menu.pnum.GENERIC_G041K8TX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U) + +# Generic G041K6Ux +GenG0.menu.pnum.GENERIC_G041K6UX=Generic G041K6Ux +GenG0.menu.pnum.GENERIC_G041K6UX.upload.maximum_size=32768 +GenG0.menu.pnum.GENERIC_G041K6UX.upload.maximum_data_size=8192 +GenG0.menu.pnum.GENERIC_G041K6UX.build.board=GENERIC_G041K6UX +GenG0.menu.pnum.GENERIC_G041K6UX.build.product_line=STM32G041xx +GenG0.menu.pnum.GENERIC_G041K6UX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U) + +# Generic G041K8Ux +GenG0.menu.pnum.GENERIC_G041K8UX=Generic G041K8Ux +GenG0.menu.pnum.GENERIC_G041K8UX.upload.maximum_size=65536 +GenG0.menu.pnum.GENERIC_G041K8UX.upload.maximum_data_size=8192 +GenG0.menu.pnum.GENERIC_G041K8UX.build.board=GENERIC_G041K8UX +GenG0.menu.pnum.GENERIC_G041K8UX.build.product_line=STM32G041xx +GenG0.menu.pnum.GENERIC_G041K8UX.build.variant=STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U) + # Generic G071R6Tx GenG0.menu.pnum.GENERIC_G071R6TX=Generic G071R6Tx GenG0.menu.pnum.GENERIC_G071R6TX.upload.maximum_size=32768 diff --git a/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/generic_clock.c b/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/generic_clock.c index 23de8f2b24..7553137688 100644 --- a/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/generic_clock.c +++ b/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/generic_clock.c @@ -24,8 +24,39 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + + /* Configure the main internal regulator output voltage */ + HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); + /* + * Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1; + RCC_OscInitStruct.PLL.PLLN = 8; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /* Initializes the CPU, AHB and APB buses clocks */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/ldscript.ld b/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/ldscript.ld new file mode 100644 index 0000000000..826c73df80 --- /dev/null +++ b/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/ldscript.ld @@ -0,0 +1,177 @@ +/** + ****************************************************************************** + * @file LinkerScript.ld + * @author Auto-generated by STM32CubeIDE + * Abstract : Linker script for NUCLEO-G031K8 Board embedding STM32G031K8Tx Device from stm32g0 series + * 64Kbytes FLASH + * 8Kbytes RAM + * + * Set heap size, stack size and stack location according + * to application requirements. + * + * Set memory bank area and size if external memory is used + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000+ LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/variant_NUCLEO_G031K8.cpp b/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/variant_NUCLEO_G031K8.cpp new file mode 100644 index 0000000000..220cc8ba8e --- /dev/null +++ b/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/variant_NUCLEO_G031K8.cpp @@ -0,0 +1,119 @@ +/* + ******************************************************************************* + * Copyright (c) 2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_NUCLEO_G031K8) +#include "pins_arduino.h" + +// Pin number +const PinName digitalPin[] = { + PB_7, + PB_6, + PA_15, + PB_1, + PA_10, + PA_9, + PB_0, + PB_2, + PB_8, + PA_8, + PB_9, + PB_5, + PB_4, + PB_3, + PA_0, + PA_1, + PA_4, + PA_5, + PA_12, + PA_11, + PA_6, + PA_7, + PA_9_R, + PA_10_R, + PC_6, + PA_2, + PA_3, + PA_13, + PA_14, + PC_14, + PC_15, + PF_2 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 14, // A0 + 15, // A1 + 16, // A2 + 17, // A3 + 18, // A4 + 19, // A5 + 20, // A6 + 21, // A7 + 0, // A8 + 3, // A9 + 6, // A10 + 7 // A11 +}; + +// ---------------------------------------------------------------------------- + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + + /* Configure the main internal regulator output voltage */ + HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); + /* + * Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1; + RCC_OscInitStruct.PLL.PLLN = 16; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV4; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /* Initializes the CPU, AHB and APB buses clocks */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } +} + +#ifdef __cplusplus +} +#endif +#endif /* ARDUINO_NUCLEO_G031K8 */ diff --git a/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/variant_NUCLEO_G031K8.h b/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/variant_NUCLEO_G031K8.h new file mode 100644 index 0000000000..cc5ecb45b5 --- /dev/null +++ b/variants/STM32G0xx/G031K(4-6-8)(T-U)_G041K(6-8)(T-U)/variant_NUCLEO_G031K8.h @@ -0,0 +1,131 @@ +/* + ******************************************************************************* + * Copyright (c) 2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PB7 PIN_A8 +#define PB6 1 +#define PA15 2 +#define PB1 PIN_A9 +#define PA10 4 +#define PA9 5 +#define PB0 PIN_A10 +#define PB2 PIN_A11 +#define PB8 8 +#define PA8 9 +#define PB9 10 +#define PB5 11 +#define PB4 12 +#define PB3 13 +#define PA0 PIN_A0 +#define PA1 PIN_A1 +#define PA4 PIN_A2 +#define PA5 PIN_A3 +#define PA12 PIN_A4 +#define PA11 PIN_A5 +#define PA6 PIN_A6 +#define PA7 PIN_A7 +#define PA9_R 22 +#define PA10_R 23 +#define PC6 24 // LED +#define PA2 25 // STLink Tx +#define PA3 26 // STLink Rx +#define PA13 27 // SWDIO +#define PA14 28 // SWCLK/BOOT0 +#define PC14 29 // OSC32 IN +#define PC15 30 // OSC32 OUT +#define PF2 31 // NRST or USER Button + +// Alternate pins number +#define PA2_ALT1 (PA2 | ALT1) +#define PA3_ALT1 (PA3 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PB0_ALT1 (PB0 | ALT1) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) + +#define NUM_DIGITAL_PINS 32 +#define NUM_REMAP_PINS 2 +#define NUM_ANALOG_INPUTS 12 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN PC6 +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PF2 +#endif + +// I2C Definitions +#ifndef PIN_WIRE_SDA + #define PIN_WIRE_SDA PA10 +#endif +#ifndef PIN_WIRE_SCL + #define PIN_WIRE_SCL PA9 +#endif + +// Timer Definitions +#ifndef TIMER_TONE + #define TIMER_TONE TIM14 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM16 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 101 //Connected to ST-Link +#endif + +// Default pin used for 'Serial' instance (ex: ST-Link) +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PA3 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PA2 +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #define SERIAL_PORT_MONITOR Serial + #define SERIAL_PORT_HARDWARE Serial +#endif