From 2fe08847def035cebc5f3b83ecbb6744ef430c19 Mon Sep 17 00:00:00 2001 From: Geoffrey Hunter Date: Thu, 10 Sep 2020 17:19:58 +1200 Subject: [PATCH] Added NUCLEO_F070RB Supersede #1167 Signed-off-by: Geoffrey Hunter Co-authored-by: Frederic.Pillon --- README.md | 2 + boards.txt | 20 ++ .../STM32F0xx/Generic_F070RB/PeripheralPins.c | 236 ++++++++++++++++++ .../STM32F0xx/Generic_F070RB/PinNamesVar.h | 46 ++++ variants/STM32F0xx/Generic_F070RB/ldscript.ld | 175 +++++++++++++ variants/STM32F0xx/Generic_F070RB/variant.cpp | 199 +++++++++++++++ variants/STM32F0xx/Generic_F070RB/variant.h | 188 ++++++++++++++ .../Generic_F070RB/variant_NUCLEO_F070RB.cpp | 145 +++++++++++ .../Generic_F070RB/variant_NUCLEO_F070RB.h | 191 ++++++++++++++ 9 files changed, 1202 insertions(+) create mode 100644 variants/STM32F0xx/Generic_F070RB/PeripheralPins.c create mode 100644 variants/STM32F0xx/Generic_F070RB/PinNamesVar.h create mode 100644 variants/STM32F0xx/Generic_F070RB/ldscript.ld create mode 100644 variants/STM32F0xx/Generic_F070RB/variant.cpp create mode 100644 variants/STM32F0xx/Generic_F070RB/variant.h create mode 100644 variants/STM32F0xx/Generic_F070RB/variant_NUCLEO_F070RB.cpp create mode 100644 variants/STM32F0xx/Generic_F070RB/variant_NUCLEO_F070RB.h diff --git a/README.md b/README.md index aa67429f7c..3c291b9e31 100644 --- a/README.md +++ b/README.md @@ -87,6 +87,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | Status | Device(s) | Name | Release | Notes | | :----: | :-------: | ---- | :-----: | :---- | | :green_heart: | STM32F030R8 | [Nucleo F030R8](http://www.st.com/en/evaluation-tools/nucleo-f030r8.html) | *0.2.0* | | +| :yellow_heart: | STM32F070RB | [Nucleo F070RB](http://www.st.com/en/evaluation-tools/nucleo-f070rb.html) | **2.0.0** | | | :green_heart: | STM32F072RB | [Nucleo F072RB](http://www.st.com/en/evaluation-tools/nucleo-f072rb.html) | *1.9.0* | | | :green_heart: | STM32F091RC | [Nucleo F091RC](http://www.st.com/en/evaluation-tools/nucleo-f091rc.html) | *0.1.0* | | | :green_heart: | STM32F103RB | [Nucleo F103RB](http://www.st.com/en/evaluation-tools/nucleo-f103rb.html) | *0.2.0* | | @@ -159,6 +160,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :yellow_heart: | STM32F042C4
STM32F042C6 | Generic Board | **2.0.0** | | | :yellow_heart: | STM32F051K4U
STM32F051K6U
STM32F051K8U | Generic Board | **2.0.0** | | | :yellow_heart: | STM32F070CB | Generic Board | **2.0.0** | | +| :yellow_heart: | STM32F070RB | Generic Board | **2.0.0** | | | :yellow_heart: | STM32F072C8
STM32F072CB | Generic Board | **2.0.0** | | | :yellow_heart: | STM32F072R8
STM32F072RB | Generic Board | **2.0.0** | | | :yellow_heart: | STM32F091RB
STM32F091RC | Generic Board | **2.0.0** | | diff --git a/boards.txt b/boards.txt index fadc1040f6..8ebfada3bb 100644 --- a/boards.txt +++ b/boards.txt @@ -203,6 +203,18 @@ Nucleo_64.menu.pnum.NUCLEO_F030R8.build.product_line=STM32F030x8 Nucleo_64.menu.pnum.NUCLEO_F030R8.build.variant=STM32F0xx/Generic_F030R8 Nucleo_64.menu.pnum.NUCLEO_F030R8.build.cmsis_lib_gcc=arm_cortexM0l_math +# NUCLEO_F070RB board +Nucleo_64.menu.pnum.NUCLEO_F070RB=Nucleo F070RB +Nucleo_64.menu.pnum.NUCLEO_F070RB.node="NODE_F070RB,NUCLEO" +Nucleo_64.menu.pnum.NUCLEO_F070RB.upload.maximum_size=131072 +Nucleo_64.menu.pnum.NUCLEO_F070RB.upload.maximum_data_size=16384 +Nucleo_64.menu.pnum.NUCLEO_F070RB.build.mcu=cortex-m0 +Nucleo_64.menu.pnum.NUCLEO_F070RB.build.board=NUCLEO_F070RB +Nucleo_64.menu.pnum.NUCLEO_F070RB.build.series=STM32F0xx +Nucleo_64.menu.pnum.NUCLEO_F070RB.build.product_line=STM32F070xB +Nucleo_64.menu.pnum.NUCLEO_F070RB.build.variant=STM32F0xx/Generic_F070RB +Nucleo_64.menu.pnum.NUCLEO_F070RB.build.cmsis_lib_gcc=arm_cortexM0l_math + # NUCLEO_F072RB board Nucleo_64.menu.pnum.NUCLEO_F072RB=Nucleo F072RB Nucleo_64.menu.pnum.NUCLEO_F072RB.node="NODE_F072RB,NUCLEO" @@ -924,6 +936,14 @@ GenF0.menu.pnum.GENERIC_F070CB.build.board=GENERIC_F070CB GenF0.menu.pnum.GENERIC_F070CB.build.product_line=STM32F070xB GenF0.menu.pnum.GENERIC_F070CB.build.variant=STM32F0xx/Generic_F070CB +# Generic F070RB +GenF0.menu.pnum.GENERIC_F070RB=Generic F070RB +GenF0.menu.pnum.GENERIC_F070RB.upload.maximum_size=122880 +GenF0.menu.pnum.GENERIC_F070RB.upload.maximum_data_size=16384 +GenF0.menu.pnum.GENERIC_F070RB.build.board=GENERIC_F070RB +GenF0.menu.pnum.GENERIC_F070RB.build.product_line=STM32F070xB +GenF0.menu.pnum.GENERIC_F070RB.build.variant=STM32F0xx/Generic_F070RB + # Generic F072C8 GenF0.menu.pnum.GENERIC_F072C8=Generic F072C8 GenF0.menu.pnum.GENERIC_F072C8.upload.maximum_size=65536 diff --git a/variants/STM32F0xx/Generic_F070RB/PeripheralPins.c b/variants/STM32F0xx/Generic_F070RB/PeripheralPins.c new file mode 100644 index 0000000000..25448117ef --- /dev/null +++ b/variants/STM32F0xx/Generic_F070RB/PeripheralPins.c @@ -0,0 +1,236 @@ +/* + ******************************************************************************* + * Copyright (c) 2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +/* + * Automatically generated from STM32F070RBTx.xml + * CubeMX DB release 6.0.10 + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Notes: + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other + * HW peripheral instances. You can use them the same way as any other "normal" + * pin (i.e. analogWrite(PA7_ALT0, 128);). + * + * - Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +WEAK const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC_IN1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC_IN14 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC_IN15 + {NC, NP, 0} +}; +#endif + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +WEAK const PinMap PinMap_I2C_SCL[] = { + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF5_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** TIM *** + +#ifdef HAL_TIM_MODULE_ENABLED +WEAK const PinMap PinMap_TIM[] = { + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM15, 2, 0)}, // TIM15_CH2 + {PA_4, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM14, 1, 0)}, // TIM14_CH1 + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6_ALT0, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7_ALT1, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM14, 1, 0)}, // TIM14_CH1 + {PA_7_ALT2, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM17, 1, 0)}, // TIM17_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 4, 0)}, // TIM1_CH4 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 3, 0)}, // TIM3_CH3 + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1_ALT1, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM14, 1, 0)}, // TIM14_CH1 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM17, 1, 0)}, // TIM17_CH1 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14_ALT0, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15_ALT0, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM15, 1, 1)}, // TIM15_CH1N + {PB_15_ALT1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM15, 2, 0)}, // TIM15_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM3, 1, 0)}, // TIM3_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM3, 2, 0)}, // TIM3_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM3, 3, 0)}, // TIM3_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM3, 4, 0)}, // TIM3_CH4 + {NC, NP, 0} +}; +#endif + +//*** UART *** + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_TX[] = { + {PA_0, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, + {PA_14, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART3)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART3)}, + {PC_10_ALT0, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RX[] = { + {PA_1, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART3)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART3)}, + {PC_11_ALT0, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, + {PA_15, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART4)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +WEAK const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, + {PB_7, USART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART4)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +WEAK const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** No CAN *** + +//*** No ETHERNET *** + +//*** No QUADSPI *** + +//*** USB *** + +#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED) +WEAK const PinMap PinMap_USB[] = { + {PA_11, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM + {PA_12, USB, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP + {PA_13, USB, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_USB)}, // USB_NOE + {NC, NP, 0} +}; +#endif + +//*** No SD *** diff --git a/variants/STM32F0xx/Generic_F070RB/PinNamesVar.h b/variants/STM32F0xx/Generic_F070RB/PinNamesVar.h new file mode 100644 index 0000000000..3c87bd36c5 --- /dev/null +++ b/variants/STM32F0xx/Generic_F070RB/PinNamesVar.h @@ -0,0 +1,46 @@ +/* Alternate pin name */ +PA_6_ALT0 = PA_6 | ALT0, +PA_7_ALT0 = PA_7 | ALT0, +PA_7_ALT1 = PA_7 | ALT1, +PA_7_ALT2 = PA_7 | ALT2, +PB_0_ALT0 = PB_0 | ALT0, +PB_1_ALT0 = PB_1 | ALT0, +PB_1_ALT1 = PB_1 | ALT1, +PB_14_ALT0 = PB_14 | ALT0, +PB_15_ALT0 = PB_15 | ALT0, +PB_15_ALT1 = PB_15 | ALT1, +PC_10_ALT0 = PC_10 | ALT0, +PC_11_ALT0 = PC_11 | ALT0, + +/* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = PC_5, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = PB_5, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = PB_15, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif + +/* USB */ +#ifdef USBCON + USB_DM = PA_11, + USB_DP = PA_12, + USB_NOE = PA_13, +#endif diff --git a/variants/STM32F0xx/Generic_F070RB/ldscript.ld b/variants/STM32F0xx/Generic_F070RB/ldscript.ld new file mode 100644 index 0000000000..59b3b0df29 --- /dev/null +++ b/variants/STM32F0xx/Generic_F070RB/ldscript.ld @@ -0,0 +1,175 @@ +/** + ****************************************************************************** + * @file LinkerScript.ld + * @author Auto-generated by STM32CubeIDE + * @brief Linker script for STM32F070RBTx Device from STM32F0 series + * 128Kbytes FLASH + * 16Kbytes RAM + * + * Set heap size, stack size and stack location according + * to application requirements. + * + * Set memory bank area and size if external memory is used + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2020 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/variants/STM32F0xx/Generic_F070RB/variant.cpp b/variants/STM32F0xx/Generic_F070RB/variant.cpp new file mode 100644 index 0000000000..bf0eb12617 --- /dev/null +++ b/variants/STM32F0xx/Generic_F070RB/variant.cpp @@ -0,0 +1,199 @@ +/* + ******************************************************************************* + * Copyright (c) 2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_GENERIC_F070RB) +#include "pins_arduino.h" + +#ifdef __cplusplus +extern "C" { +#endif + +// Digital PinName array +const PinName digitalPin[] = { + PA_0, + PA_1, + PA_2, + PA_3, + PA_4, + PA_5, + PA_6, + PA_7, + PA_8, + PA_9, + PA_10, + PA_11, + PA_12, + PA_13, + PA_14, + PA_15, + PB_0, + PB_1, + PB_2, + PB_3, + PB_4, + PB_5, + PB_6, + PB_7, + PB_8, + PB_9, + PB_10, + PB_11, + PB_12, + PB_13, + PB_14, + PB_15, + PC_0, + PC_1, + PC_2, + PC_3, + PC_4, + PC_5, + PC_6, + PC_7, + PC_8, + PC_9, + PC_10, + PC_11, + PC_12, + PC_13, + PC_14, + PC_15, + PD_2, + PF_0, + PF_1 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 0, // A0, PA0 + 1, // A1, PA1 + 2, // A2, PA2 + 3, // A3, PA3 + 4, // A4, PA4 + 5, // A5, PA5 + 6, // A6, PA6 + 7, // A7, PA7 + 16, // A8, PB0 + 17, // A9, PB1 + 32, // A10, PC0 + 33, // A11, PC1 + 34, // A12, PC2 + 35, // A13, PC3 + 36, // A14, PC4 + 37 // A15, PC5 +}; + +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ +static bool SetSysClock_PLL_HSE(bool bypass) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + bool ret = false; + /* + * Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + if (bypass == false) { + RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT + } else { + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN + } + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { + /* Initializes the CPU, AHB and APB buses clocks */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) == HAL_OK) { + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) { + ret = true; + } + } + } + return ret; +} + +/******************************************************************************/ +/* PLL (clocked by HSI) used as System clock source */ +/******************************************************************************/ +static bool SetSysClock_PLL_HSI(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + bool ret = false; + /* + * Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { + /* Initializes the CPU, AHB and APB buses clocks */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) == HAL_OK) { + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) == HAL_OK) { + ret = true; + } + } + } + return ret; +} + +WEAK void SystemClock_Config(void) +{ + /* + * HSE_VALUE defined in the stm32f0xx_hal_conf_default.h is used. + * If HSE_VALUE is not the same and you want use it, then: + * - Redefine HSE_VALUE to the correct HSE_VALUE + * or + * - Redefine SystemClock_Config() with the correct settings + */ + /* 1- Try to start with HSE and external 8MHz xtal */ + if (SetSysClock_PLL_HSE(false) == false) { + /* 2- If fail try to start with HSE and external clock */ + if (SetSysClock_PLL_HSE(true) == false) { + /* 3- If fail start with HSI clock */ + if (SetSysClock_PLL_HSI() == false) { + Error_Handler(); + } + } + } +} + +#ifdef __cplusplus +} // extern "C" +#endif +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32F0xx/Generic_F070RB/variant.h b/variants/STM32F0xx/Generic_F070RB/variant.h new file mode 100644 index 0000000000..cd3407f4b4 --- /dev/null +++ b/variants/STM32F0xx/Generic_F070RB/variant.h @@ -0,0 +1,188 @@ +/* + ******************************************************************************* + * Copyright (c) 2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if !defined(ARDUINO_GENERIC_F070RB) +#include "variant_NUCLEO_F070RB.h" +#else +#ifndef _VARIANT_ARDUINO_STM32_ +#define _VARIANT_ARDUINO_STM32_ +#ifdef __cplusplus +extern "C" { +#endif // __cplusplus + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA0 A0 +#define PA1 A1 +#define PA2 A2 +#define PA3 A3 +#define PA4 A4 +#define PA5 A5 +#define PA6 A6 +#define PA7 A7 +#define PA8 8 +#define PA9 9 +#define PA10 10 +#define PA11 11 +#define PA12 12 +#define PA13 13 +#define PA14 14 +#define PA15 15 +#define PB0 A8 +#define PB1 A9 +#define PB2 18 +#define PB3 19 +#define PB4 20 +#define PB5 21 +#define PB6 22 +#define PB7 23 +#define PB8 24 +#define PB9 25 +#define PB10 26 +#define PB11 27 +#define PB12 28 +#define PB13 29 +#define PB14 30 +#define PB15 31 +#define PC0 A10 +#define PC1 A11 +#define PC2 A12 +#define PC3 A13 +#define PC4 A14 +#define PC5 A15 +#define PC6 38 +#define PC7 39 +#define PC8 40 +#define PC9 41 +#define PC10 42 +#define PC11 43 +#define PC12 44 +#define PC13 45 +#define PC14 46 +#define PC15 47 +#define PD2 48 +#define PF0 49 +#define PF1 50 + +// Alternate pins number +#define PA6_ALT0 (PA6 | ALT0) +#define PA7_ALT0 (PA7 | ALT0) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PB0_ALT0 (PB0 | ALT0) +#define PB1_ALT0 (PB1 | ALT0) +#define PB1_ALT1 (PB1 | ALT1) +#define PB14_ALT0 (PB14 | ALT0) +#define PB15_ALT0 (PB15 | ALT0) +#define PB15_ALT1 (PB15 | ALT1) +#define PC10_ALT0 (PC10 | ALT0) +#define PC11_ALT0 (PC11 | ALT0) + +#define NUM_DIGITAL_PINS 51 +#define NUM_ALTERNATE_PINS 12 +#define NUM_ANALOG_INPUTS 16 + +// On-board LED pin number +#ifndef LED_BUILTIN +#define LED_BUILTIN PA5 +#endif + +// On-board user button +#ifndef USER_BTN +#define USER_BTN PC13 +#endif + +// SPI definitions +#ifndef PIN_SPI_SS +#define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 +#define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 +#define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 +#define PIN_SPI_SS3 PB1 +#endif +#ifndef PIN_SPI_MOSI +#define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO +#define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK +#define PIN_SPI_SCK PA5 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA +#define PIN_WIRE_SDA PB7 +#endif +#ifndef PIN_WIRE_SCL +#define PIN_WIRE_SCL PB6 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE +#define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO +#define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE +#define SERIAL_UART_INSTANCE 2 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX +#define PIN_SERIAL_RX PA3 +#endif +#ifndef PIN_SERIAL_TX +#define PIN_SERIAL_TX PA2 +#endif + +#ifdef __cplusplus +} // extern "C" +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #define SERIAL_PORT_MONITOR Serial + #define SERIAL_PORT_HARDWARE Serial +#endif + +#endif /* _VARIANT_ARDUINO_STM32_ */ +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32F0xx/Generic_F070RB/variant_NUCLEO_F070RB.cpp b/variants/STM32F0xx/Generic_F070RB/variant_NUCLEO_F070RB.cpp new file mode 100644 index 0000000000..4ed312e89c --- /dev/null +++ b/variants/STM32F0xx/Generic_F070RB/variant_NUCLEO_F070RB.cpp @@ -0,0 +1,145 @@ +/* + ******************************************************************************* + * Copyright (c) 2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_NUCLEO_F070RB) +#include "pins_arduino.h" + +#ifdef __cplusplus +extern "C" { +#endif + +// Digital PinName array +const PinName digitalPin[] = { + PA_3, + PA_2, + PA_10, + PB_3, + PB_5, + PB_4, + PB_10, + PA_8, + PA_9, + PC_7, + PB_6, + PA_7, + PA_6, + PA_5, + PB_9, + PB_8, + // ST Morpho + // CN7 Left Side + PC_10, + PC_12, + PA_13, + PA_14, + PA_15, + PB_7, + PC_13, + PC_14, + PC_15, + PF_0, + PF_1, + PC_2, + PC_3, + // CN7 Right Side + PC_11, + PD_2, + // CN10 Left Side + PC_9, + // CN10 Right side + PC_8, + PC_6, + PC_5, + PA_12, + PA_11, + PB_12, + PB_11, + PB_2, + PB_1, + PB_15, + PB_14, + PB_13, + PC_4, + PA_0, + PA_1, + PA_4, + PB_0, + PC_1, + PC_0 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 45, //A0 + 46, //A1 + 47, //A2 + 48, //A3 + 49, //A4 + 50, //A5 + 11, //A6 + 12, //A7 + 27, //A8 + 28, //A9 + 34, //A10 + 44, //A11 + 40, //A12 + 13, //A13 + 1, //A14 + 0 //A15 +}; + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + + /* + * Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; + RCC_OscInitStruct.PLL.PREDIV = RCC_PREDIV_DIV1; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /* Initializes the CPU, AHB and APB buses clocks */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { + Error_Handler(); + } + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + Error_Handler(); + } +} + +#ifdef __cplusplus +} // extern "C" +#endif +#endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32F0xx/Generic_F070RB/variant_NUCLEO_F070RB.h b/variants/STM32F0xx/Generic_F070RB/variant_NUCLEO_F070RB.h new file mode 100644 index 0000000000..d1338738a2 --- /dev/null +++ b/variants/STM32F0xx/Generic_F070RB/variant_NUCLEO_F070RB.h @@ -0,0 +1,191 @@ +/* + ******************************************************************************* + * Copyright (c) 2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_NUCLEO_F070RB) +#ifndef _VARIANT_ARDUINO_STM32_ +#define _VARIANT_ARDUINO_STM32_ +#ifdef __cplusplus +extern "C" { +#endif // __cplusplus + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +#define PA3 A15 +#define PA2 A14 +#define PA10 2 +#define PB3 3 +#define PB5 4 +#define PB4 5 +#define PB10 6 +#define PA8 7 +#define PA9 8 +#define PC7 9 +#define PB6 10 +#define PA7 A6 +#define PA6 A7 +#define PA5 A13 +#define PB9 14 +#define PB8 15 +// ST Morpho +// CN7 Left Side +#define PC10 16 +#define PC12 17 +#define PA13 18 // SWD +#define PA14 19 // SWD +#define PA15 20 +#define PB7 21 +#define PC13 22 +#define PC14 23 +#define PC15 24 +#define PF0 25 +#define PF1 26 +#define PC2 A8 +#define PC3 A9 +// CN7 Right Side +#define PC11 29 +#define PD2 30 +// CN10 Left Side +#define PC9 31 +// CN10 Right side +#define PC8 32 +#define PC6 33 +#define PC5 A10 +#define PA12 35 +#define PA11 36 +#define PB12 37 +#define PB11 38 +#define PB2 39 +#define PB1 A12 +#define PB15 41 +#define PB14 42 +#define PB13 43 +#define PC4 A11 +#define PA0 A0 +#define PA1 A1 +#define PA4 A2 +#define PB0 A3 +#define PC1 A4 +#define PC0 A5 + +// Alternate pins number +#define PA6_ALT0 (PA6 | ALT0) +#define PA7_ALT0 (PA7 | ALT0) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PB0_ALT0 (PB0 | ALT0) +#define PB1_ALT0 (PB1 | ALT0) +#define PB1_ALT1 (PB1 | ALT1) +#define PB14_ALT0 (PB14 | ALT0) +#define PB15_ALT0 (PB15 | ALT0) +#define PB15_ALT1 (PB15 | ALT1) +#define PC10_ALT0 (PC10 | ALT0) +#define PC11_ALT0 (PC11 | ALT0) + +#define NUM_DIGITAL_PINS 51 +#define NUM_ALTERNATE_PINS 12 +#define NUM_ANALOG_INPUTS 16 + +// On-board LED pin number +#ifndef LED_BUILTIN +#define LED_BUILTIN PA5 +#endif + +// On-board user button +#ifndef USER_BTN +#define USER_BTN PC13 +#endif + +// SPI definitions +#ifndef PIN_SPI_SS +#define PIN_SPI_SS PA4 +#endif +#ifndef PIN_SPI_SS1 +#define PIN_SPI_SS1 PA15 +#endif +#ifndef PIN_SPI_SS2 +#define PIN_SPI_SS2 PB0 +#endif +#ifndef PIN_SPI_SS3 +#define PIN_SPI_SS3 PB1 +#endif +#ifndef PIN_SPI_MOSI +#define PIN_SPI_MOSI PA7 +#endif +#ifndef PIN_SPI_MISO +#define PIN_SPI_MISO PA6 +#endif +#ifndef PIN_SPI_SCK +#define PIN_SPI_SCK PA5 +#endif + +// I2C definitions +#ifndef PIN_WIRE_SDA +#define PIN_WIRE_SDA PB7 +#endif +#ifndef PIN_WIRE_SCL +#define PIN_WIRE_SCL PB6 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE +#define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO +#define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE +#define SERIAL_UART_INSTANCE 2 //Connected to ST-Link +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX +#define PIN_SERIAL_RX PA3 +#endif +#ifndef PIN_SERIAL_TX +#define PIN_SERIAL_TX PA2 +#endif + +#ifdef __cplusplus +} // extern "C" +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #define SERIAL_PORT_MONITOR Serial + #define SERIAL_PORT_HARDWARE Serial +#endif + +#endif /* _VARIANT_ARDUINO_STM32_ */ +#endif /* ARDUINO_GENERIC_* */