From fc0f540843a9c1594c52f7f611bab348c645d2ab Mon Sep 17 00:00:00 2001 From: Frederic Pillon Date: Sun, 14 Mar 2021 14:46:25 +0100 Subject: [PATCH] [variant] Add Generic L5xx and Nucleo L552ZE-Q Supersede #1256 Signed-off-by: Frederic Pillon --- README.md | 9 + boards.txt | 113 ++++++++ .../L552Z(C-E)TxQ_L562ZETxQ/generic_clock.c | 38 ++- .../L552Z(C-E)TxQ_L562ZETxQ/ldscript.ld | 186 ++++++++++++ .../variant_NUCLEO_L552ZE_Q.cpp | 228 +++++++++++++++ .../variant_NUCLEO_L552ZE_Q.h | 269 ++++++++++++++++++ 6 files changed, 841 insertions(+), 2 deletions(-) create mode 100644 variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/ldscript.ld create mode 100644 variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/variant_NUCLEO_L552ZE_Q.cpp create mode 100644 variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/variant_NUCLEO_L552ZE_Q.h diff --git a/README.md b/README.md index 1b7dce50c7..2a1896d954 100644 --- a/README.md +++ b/README.md @@ -61,6 +61,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d - [Generic STM32H7 boards](#generic-stm32h7-boards) - [Generic STM32L0 boards](#generic-stm32l0-boards) - [Generic STM32L4 boards](#generic-stm32l4-boards) + - [Generic STM32L5 boards](#generic-stm32l5-boards) - [3D printer boards](#3d-printer-boards) - [LoRa boards](#lora-boards) - [Electronic Speed Controller boards](#electronic-speed-controller-boards) @@ -82,6 +83,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32L496ZG-P | [Nucleo L496ZG-P](http://www.st.com/en/evaluation-tools/nucleo-l496zg-p.html) | *1.3.0* | | | :green_heart: | STM32L4R5ZI | [Nucleo L4R5ZI](http://www.st.com/en/evaluation-tools/nucleo-l4r5zi.html) | *1.4.0* | | | :green_heart: | STM32L4R5ZI-P | [Nucleo L4R5ZI-P](http://www.st.com/en/evaluation-tools/nucleo-l4r5zi-p.html) | *1.4.0* | | +| :yellow_heart: | STM32L552ZE-Q | [Nucleo L552ZE-Q](https://www.st.com/en/evaluation-tools/nucleo-l552ze-q.html) | **2.0.0** | | | :green_heart: | STM32H743ZI | [Nucleo H743ZI(2)](https://www.st.com/en/evaluation-tools/nucleo-h743zi.html) | *1.5.0* | Nucleo H743ZI2 since 1.6.0 | ### [Nucleo 64](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-nucleo-boards.html) boards @@ -299,6 +301,13 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :yellow_heart: | STM32L4S7ZITx | Generic Board | **2.0.0** | | | :yellow_heart: | STM32L4S9ZIJx | Generic Board | **2.0.0** | | +### Generic STM32L5 boards + +| Status | Device(s) | Name | Release | Notes | +| :----: | :-------: | ---- | :-----: | :---- | +| :yellow_heart: | STM32L552ZC-Q
STM32L552ZE-Q | Generic Board | **2.0.0** | | +| :yellow_heart: | STM32L562ZE-Q | Generic Board | **2.0.0** | | + ### 3D printer boards | Status | Device(s) | Name | Release | Notes | diff --git a/boards.txt b/boards.txt index f8df383119..21f4c4d654 100644 --- a/boards.txt +++ b/boards.txt @@ -167,6 +167,19 @@ Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.build.product_line=STM32L4R5xx Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.build.variant=STM32L4xx/L4R5ZITxP Nucleo_144.menu.pnum.NUCLEO_L4R5ZI_P.build.cmsis_lib_gcc=arm_cortexM4lf_math +# NUCLEO_L552ZE-Q board +Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q=Nucleo L552ZE-Q +Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.node=NODE_L552ZE +Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.upload.maximum_size=524288 +Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.upload.maximum_data_size=196608 +Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.mcu=cortex-m33 +Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard +Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.board=NUCLEO_L552ZE_Q +Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.series=STM32L5xx +Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.product_line=STM32L552xx +Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.variant=STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ +Nucleo_144.menu.pnum.NUCLEO_L552ZE_Q.build.cmsis_lib_gcc=arm_ARMv8MMLlfsp_math + # Upload menu Nucleo_144.menu.upload_method.MassStorage=Mass Storage Nucleo_144.menu.upload_method.MassStorage.upload.protocol= @@ -2980,6 +2993,58 @@ GenL4.menu.upload_method.dfuMethod.upload.options=-g GenL4.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg ################################################################################ +# Generic L5 +GenL5.name=Generic STM32L5 series + +GenL5.build.core=arduino +GenL5.build.board=GenL5 +GenL5.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} +GenL5.build.mcu=cortex-m33 +GenL5.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard +GenL5.build.series=STM32L5xx +GenL5.build.cmsis_lib_gcc=arm_ARMv8MMLlfsp_math + +# Generic L552ZCTxQ +GenL5.menu.pnum.GENERIC_L552ZCTXQ=Generic L552ZCTxQ +GenL5.menu.pnum.GENERIC_L552ZCTXQ.upload.maximum_size=262144 +GenL5.menu.pnum.GENERIC_L552ZCTXQ.upload.maximum_data_size=196608 +GenL5.menu.pnum.GENERIC_L552ZCTXQ.build.board=GENERIC_L552ZCTXQ +GenL5.menu.pnum.GENERIC_L552ZCTXQ.build.product_line=STM32L552xx +GenL5.menu.pnum.GENERIC_L552ZCTXQ.build.variant=STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ + +# Generic L552ZETxQ +GenL5.menu.pnum.GENERIC_L552ZETXQ=Generic L552ZETxQ +GenL5.menu.pnum.GENERIC_L552ZETXQ.upload.maximum_size=524288 +GenL5.menu.pnum.GENERIC_L552ZETXQ.upload.maximum_data_size=196608 +GenL5.menu.pnum.GENERIC_L552ZETXQ.build.board=GENERIC_L552ZETXQ +GenL5.menu.pnum.GENERIC_L552ZETXQ.build.product_line=STM32L552xx +GenL5.menu.pnum.GENERIC_L552ZETXQ.build.variant=STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ + +# Generic L562ZETxQ +GenL5.menu.pnum.GENERIC_L562ZETXQ=Generic L562ZETxQ +GenL5.menu.pnum.GENERIC_L562ZETXQ.upload.maximum_size=524288 +GenL5.menu.pnum.GENERIC_L562ZETXQ.upload.maximum_data_size=196608 +GenL5.menu.pnum.GENERIC_L562ZETXQ.build.board=GENERIC_L562ZETXQ +GenL5.menu.pnum.GENERIC_L562ZETXQ.build.product_line=STM32L562xx +GenL5.menu.pnum.GENERIC_L562ZETXQ.build.variant=STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ + +# Upload menu +GenL5.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD) +GenL5.menu.upload_method.swdMethod.upload.protocol=0 +GenL5.menu.upload_method.swdMethod.upload.options=-g +GenL5.menu.upload_method.swdMethod.upload.tool=stm32CubeProg + +GenL5.menu.upload_method.serialMethod=STM32CubeProgrammer (Serial) +GenL5.menu.upload_method.serialMethod.upload.protocol=1 +GenL5.menu.upload_method.serialMethod.upload.options={serial.port.file} -s +GenL5.menu.upload_method.serialMethod.upload.tool=stm32CubeProg + +GenL5.menu.upload_method.dfuMethod=STM32CubeProgrammer (DFU) +GenL5.menu.upload_method.dfuMethod.upload.protocol=2 +GenL5.menu.upload_method.dfuMethod.upload.options=-g +GenL5.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg + +################################################################################# # Electronic Speed Controller boards ESC_board.name=Electronic speed controllers @@ -3590,6 +3655,12 @@ GenL4.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE GenL4.menu.xserial.disabled=Disabled (no Serial support) GenL4.menu.xserial.disabled.build.xSerial= +GenL5.menu.xserial.generic=Enabled (generic 'Serial') +GenL5.menu.xserial.none=Enabled (no generic 'Serial') +GenL5.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE +GenL5.menu.xserial.disabled=Disabled (no Serial support) +GenL5.menu.xserial.disabled.build.xSerial= + ESC_board.menu.xserial.generic=Enabled (generic 'Serial') ESC_board.menu.xserial.none=Enabled (no generic 'Serial') ESC_board.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE @@ -3797,6 +3868,19 @@ GenL4.menu.xusb.HS.build.usb_speed=-DUSE_USB_HS GenL4.menu.xusb.HSFS=High Speed in Full Speed mode GenL4.menu.xusb.HSFS.build.usb_speed=-DUSE_USB_HS -DUSE_USB_HS_IN_FS +GenL5.menu.usb.none=None +GenL5.menu.usb.CDCgen=CDC (generic 'Serial' supersede U(S)ART) +GenL5.menu.usb.CDCgen.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC +GenL5.menu.usb.CDC=CDC (no generic 'Serial') +GenL5.menu.usb.CDC.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB +GenL5.menu.usb.HID=HID (keyboard and mouse) +GenL5.menu.usb.HID.build.enable_usb={build.usb_flags} -DUSBD_USE_HID_COMPOSITE +GenL5.menu.xusb.FS=Low/Full Speed +GenL5.menu.xusb.HS=High Speed +GenL5.menu.xusb.HS.build.usb_speed=-DUSE_USB_HS +GenL5.menu.xusb.HSFS=High Speed in Full Speed mode +GenL5.menu.xusb.HSFS.build.usb_speed=-DUSE_USB_HS -DUSE_USB_HS_IN_FS + 3dprinter.menu.usb.none=None 3dprinter.menu.usb.CDCgen=CDC (generic 'Serial' supersede U(S)ART) 3dprinter.menu.usb.CDCgen.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC @@ -4135,6 +4219,25 @@ GenL4.menu.opt.o3lto.build.flags.optimize=-O3 -flto GenL4.menu.opt.ogstd=Debug (-g) GenL4.menu.opt.ogstd.build.flags.optimize=-g -Og +GenL5.menu.opt.osstd=Smallest (-Os default) +GenL5.menu.opt.osstd.build.flags.optimize=-Os +GenL5.menu.opt.oslto=Smallest (-Os) with LTO +GenL5.menu.opt.oslto.build.flags.optimize=-Os -flto +GenL5.menu.opt.o1std=Fast (-O1) +GenL5.menu.opt.o1std.build.flags.optimize=-O1 +GenL5.menu.opt.o1lto=Fast (-O1) with LTO +GenL5.menu.opt.o1lto.build.flags.optimize=-O1 -flto +GenL5.menu.opt.o2std=Faster (-O2) +GenL5.menu.opt.o2std.build.flags.optimize=-O2 +GenL5.menu.opt.o2lto=Faster (-O2) with LTO +GenL5.menu.opt.o2lto.build.flags.optimize=-O2 -flto +GenL5.menu.opt.o3std=Fastest (-O3) +GenL5.menu.opt.o3std.build.flags.optimize=-O3 +GenL5.menu.opt.o3lto=Fastest (-O3) with LTO +GenL5.menu.opt.o3lto.build.flags.optimize=-O3 -flto +GenL5.menu.opt.ogstd=Debug (-g) +GenL5.menu.opt.ogstd.build.flags.optimize=-g -Og + ESC_board.menu.opt.osstd=Smallest (-Os default) ESC_board.menu.opt.oslto=Smallest (-Os) with LTO ESC_board.menu.opt.oslto.build.flags.optimize=-Os -flto @@ -4404,6 +4507,16 @@ GenL4.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float GenL4.menu.rtlib.full=Newlib Standard GenL4.menu.rtlib.full.build.flags.ldspecs= +GenL5.menu.rtlib.nano=Newlib Nano (default) +GenL5.menu.rtlib.nanofp=Newlib Nano + Float Printf +GenL5.menu.rtlib.nanofp.build.flags.ldspecs=--specs=nano.specs -u _printf_float +GenL5.menu.rtlib.nanofs=Newlib Nano + Float Scanf +GenL5.menu.rtlib.nanofs.build.flags.ldspecs=--specs=nano.specs -u _scanf_float +GenL5.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf +GenL5.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float +GenL5.menu.rtlib.full=Newlib Standard +GenL5.menu.rtlib.full.build.flags.ldspecs= + ESC_board.menu.rtlib.nano=Newlib Nano (default) ESC_board.menu.rtlib.nanofp=Newlib Nano + Float Printf ESC_board.menu.rtlib.nanofp.build.flags.ldspecs=--specs=nano.specs -u _printf_float diff --git a/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/generic_clock.c b/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/generic_clock.c index b580be237b..9e5b6db0a4 100644 --- a/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/generic_clock.c +++ b/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/generic_clock.c @@ -21,8 +21,42 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + + /** Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE0) != HAL_OK) { + Error_Handler(); + } + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 4; + RCC_OscInitStruct.PLL.PLLN = 55; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/ldscript.ld b/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/ldscript.ld new file mode 100644 index 0000000000..0a3825d976 --- /dev/null +++ b/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/ldscript.ld @@ -0,0 +1,186 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Author : Auto-generated by STM32CubeIDE +** +** Abstract : Linker script for STM32L552xE Device from STM32L5 series +** 512Kbytes FLASH +** 192Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© Copyright (c) 2020 STMicroelectronics. +** All rights reserved.

+** +** This software component is licensed by ST under BSD 3-Clause license, +** the "License"; You may not use this file except in compliance with the +** License. You may obtain a copy of the License at: +** opensource.org/licenses/BSD-3-Clause +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200 ; /* required amount of heap */ +_Min_Stack_Size = 0x400 ; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM : { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/variant_NUCLEO_L552ZE_Q.cpp b/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/variant_NUCLEO_L552ZE_Q.cpp new file mode 100644 index 0000000000..bf194c156e --- /dev/null +++ b/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/variant_NUCLEO_L552ZE_Q.cpp @@ -0,0 +1,228 @@ +/* + ******************************************************************************* + * Copyright (c) 2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#if defined(ARDUINO_NUCLEO_L552ZE_Q) +#include "pins_arduino.h" + +// Digital PinName array +const PinName digitalPin[] = { + PD_9, + PD_8, + PF_15, + PE_13, + PF_14, + PE_11, + PE_9, + PF_13, + PF_12, + PD_15, + PD_14, + PA_7, + PA_6, + PA_5, + PB_9, + PB_8, + PC_6, + PD_11, + PB_13, + PD_12, + PA_4, + PB_4, + PB_5, + PB_3, + PA_4, + PB_4, + PA_2, + PB_10, + PE_15, + PB_0, + PE_12, + PE_14, + PA_0, + PA_8, + PE_0, + PB_11, + PB_10, + PE_15, + PE_14, + PE_12, + PE_10, + PE_7, + PE_8, + PC_8, + PC_9, + PC_10, + PC_11, + PC_12, + PD_2, + PF_3, + PF_5, + PD_7, + PD_6, + PD_5, + PD_4, + PD_3, + PE_2, + PE_4, + PE_5, + PE_6, + PE_3, + PF_8, + PF_7, + PF_9, + PG_1, + PG_0, + PD_1, + PD_0, + PF_0, + PF_1, + PF_2, + PB_6, + PB_2, + PA_10, + PA_11, + PA_12, + PA_13, + PA_14, + PA_15, + PA_9, + PB_14, + PB_15, + PB_7, + PC_13, + PC_14, + PC_15, + PC_7, + PD_10, + PD_13, + PE_1, + PF_10, + PF_11, + PF_4, + PF_6, + PG_10, + PG_12, + PG_13, + PG_14, + PG_15, + PG_2, + PG_3, + PG_4, + PG_5, + PG_6, + PG_7, + PG_8, + PG_9, + PH_0, + PH_1, + PH_3, + PA_3, + PC_3, + PC_1, + PC_0, + PB_1, + PC_2, + PA_1 +}; + +// Analog (Ax) pin number array +const uint32_t analogInputPin[] = { + 110, // A0 + 26, // A1 + 111, // A2 + 29, // A3 + 112, // A4 + 113, // A5 + 114, // A6 + 115, // A7 + 116, // A8 + 20, // A9 + 32, // A10 + 11, // A11 + 12, // A12 + 13 // A13 +}; + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief System Clock Configuration + * @param None + * @retval None + */ +WEAK void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {}; + + /* Configure the main internal regulator output voltage */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE0) != HAL_OK) { + Error_Handler(); + } + /* Configure LSE Drive Capability */ + HAL_PWR_EnableBkUpAccess(); + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); + /* + * Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI; + RCC_OscInitStruct.LSEState = RCC_LSE_ON; + RCC_OscInitStruct.MSIState = RCC_MSI_ON; + RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; + RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 55; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + /* Initializes the CPU, AHB and APB buses clocks */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { + Error_Handler(); + } + /* Enable MSI Auto calibration */ + HAL_RCCEx_EnableMSIPLLMode(); + /* Initializes the common periph clock */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SDMMC1; + PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; + PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLLSAI1; + PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSAI1SOURCE_MSI; + PeriphClkInit.PLLSAI1.PLLSAI1M = 1; + PeriphClkInit.PLLSAI1.PLLSAI1N = 48; + PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV7; + PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV4; + PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2; + PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { + Error_Handler(); + } +} + +#ifdef __cplusplus +} // extern "C" +#endif +#endif /* ARDUINO_NUCLEO_L552ZE_Q */ diff --git a/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/variant_NUCLEO_L552ZE_Q.h b/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/variant_NUCLEO_L552ZE_Q.h new file mode 100644 index 0000000000..089d660178 --- /dev/null +++ b/variants/STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ/variant_NUCLEO_L552ZE_Q.h @@ -0,0 +1,269 @@ +/* + ******************************************************************************* + * Copyright (c) 2021, STMicroelectronics + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ******************************************************************************* + */ +#pragma once + +/*---------------------------------------------------------------------------- + * STM32 pins number + *----------------------------------------------------------------------------*/ +// CN10 +#define PD9 0 +#define PD8 1 +#define PF15 2 +#define PE13 3 +#define PF14 4 +#define PE11 5 +#define PE9 6 +#define PF13 7 +// CN7 +#define PF12 8 +#define PD15 9 +#define PD14 10 +#define PA7 A11 +#define PA6 A12 +#define PA5 A13 +#define PB9 14 +#define PB8 15 +#define PC6 16 +#define PD11 17 +#define PB13 18 +#define PD12 19 +#define PA4 A9 +#define PB4 21 +#define PB5 22 +#define PB3 23 +// 24 is PA4 (20) +// 25 is PB4 (21) +// CN10 +#define PA2 A1 +#define PB10 27 +#define PE15 28 +#define PB0 A3 +#define PE12 30 +#define PE14 31 +#define PA0 A10 +#define PA8 33 +#define PE0 34 +#define PB11 35 +// 36 is PB10 (27) +// 37 is PE15 (28) +// 38 is PE14 (31) +// 39 is PE12 (30) +#define PE10 40 +#define PE7 41 +#define PE8 42 +// CN8 +#define PC8 43 +#define PC9 44 +#define PC10 45 +#define PC11 46 +#define PC12 47 +#define PD2 48 +#define PF3 49 +#define PF5 50 +// CN9 +#define PD7 51 +#define PD6 52 +#define PD5 53 +#define PD4 54 +#define PD3 55 +#define PE2 56 +#define PE4 57 +#define PE5 58 +#define PE6 59 +#define PE3 60 +#define PF8 61 +#define PF7 62 +#define PF9 63 +#define PG1 64 +#define PG0 65 +#define PD1 66 +#define PD0 67 +#define PF0 68 +#define PF1 69 +#define PF2 70 +#define PB6 71 +#define PB2 72 +// ST Morpho +#define PA10 73 +#define PA11 74 +#define PA12 75 +#define PA13 76 +#define PA14 77 +#define PA15 78 +#define PA9 79 +#define PB14 80 +#define PB15 81 +#define PB7 82 +#define PC13 83 +#define PC14 84 +#define PC15 85 +#define PC7 86 +#define PD10 87 +#define PD13 88 +#define PE1 89 +#define PF10 90 +#define PF11 91 +#define PF4 92 +#define PF6 93 +#define PG10 94 +#define PG12 95 +#define PG13 96 +#define PG14 97 +#define PG15 98 +#define PG2 99 +#define PG3 100 +#define PG4 101 +#define PG5 102 +#define PG6 103 +#define PG7 104 +#define PG8 105 +#define PG9 106 +#define PH0 107 +#define PH1 108 +#define PH3 109 +// Analog pins +#define PA3 A0 +#define PC3 A2 +#define PC1 A4 +#define PC0 A5 +#define PB1 A6 +#define PC2 A7 +#define PA1 A8 + +// Alternate pins number +#define PA0_ALT1 (PA0 | ALT1) +#define PA1_ALT1 (PA1 | ALT1) +#define PA1_ALT2 (PA1 | ALT2) +#define PA2_ALT1 (PA2 | ALT1) +#define PA2_ALT2 (PA2 | ALT2) +#define PA3_ALT1 (PA3 | ALT1) +#define PA3_ALT2 (PA3 | ALT2) +#define PA4_ALT1 (PA4 | ALT1) +#define PA5_ALT1 (PA5 | ALT1) +#define PA6_ALT1 (PA6 | ALT1) +#define PA7_ALT1 (PA7 | ALT1) +#define PA7_ALT2 (PA7 | ALT2) +#define PA7_ALT3 (PA7 | ALT3) +#define PA15_ALT1 (PA15 | ALT1) +#define PB0_ALT1 (PB0 | ALT1) +#define PB0_ALT2 (PB0 | ALT2) +#define PB1_ALT1 (PB1 | ALT1) +#define PB1_ALT2 (PB1 | ALT2) +#define PB3_ALT1 (PB3 | ALT1) +#define PB4_ALT1 (PB4 | ALT1) +#define PB5_ALT1 (PB5 | ALT1) +#define PB6_ALT1 (PB6 | ALT1) +#define PB7_ALT1 (PB7 | ALT1) +#define PB8_ALT1 (PB8 | ALT1) +#define PB9_ALT1 (PB9 | ALT1) +#define PB10_ALT1 (PB10 | ALT1) +#define PB11_ALT1 (PB11 | ALT1) +#define PB13_ALT1 (PB13 | ALT1) +#define PB14_ALT1 (PB14 | ALT1) +#define PB14_ALT2 (PB14 | ALT2) +#define PB15_ALT1 (PB15 | ALT1) +#define PB15_ALT2 (PB15 | ALT2) +#define PC0_ALT1 (PC0 | ALT1) +#define PC1_ALT1 (PC1 | ALT1) +#define PC2_ALT1 (PC2 | ALT1) +#define PC3_ALT1 (PC3 | ALT1) +#define PC6_ALT1 (PC6 | ALT1) +#define PC7_ALT1 (PC7 | ALT1) +#define PC8_ALT1 (PC8 | ALT1) +#define PC9_ALT1 (PC9 | ALT1) +#define PC10_ALT1 (PC10 | ALT1) +#define PC11_ALT1 (PC11 | ALT1) +#define PF9_ALT1 (PF9 | ALT1) + +#define NUM_DIGITAL_PINS 117 +#define NUM_ANALOG_INPUTS 14 + +// On-board LED pin number +#ifndef LED_BUILTIN + #define LED_BUILTIN LED1 +#endif +// Green led +#ifndef LED1 + #define LED1 PC7 +#endif +// Blue led +#ifndef LED2 + #define LED2 PB7 +#endif +// Red led +#ifndef LED3 + #define LED3 PA9 +#endif + +// On-board user button +#ifndef USER_BTN + #define USER_BTN PC13 +#endif + +// Timer Definitions +// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin +#ifndef TIMER_TONE + #define TIMER_TONE TIM6 +#endif +#ifndef TIMER_SERVO + #define TIMER_SERVO TIM7 +#endif + +// UART Definitions +#ifndef SERIAL_UART_INSTANCE + #define SERIAL_UART_INSTANCE 101 +#endif + +// Default pin used for generic 'Serial' instance +// Mandatory for Firmata +#ifndef PIN_SERIAL_RX + #define PIN_SERIAL_RX PG8 +#endif +#ifndef PIN_SERIAL_TX + #define PIN_SERIAL_TX PG7 +#endif + +// Extra HAL modules +#if !defined(HAL_DAC_MODULE_DISABLED) + #define HAL_DAC_MODULE_ENABLED +#endif +#if !defined(HAL_OSPI_MODULE_DISABLED) + #define HAL_OSPI_MODULE_ENABLED +#endif +#if !defined(HAL_SD_MODULE_DISABLED) + #define HAL_SD_MODULE_ENABLED +#endif + +/*---------------------------------------------------------------------------- + * Arduino objects - C++ only + *----------------------------------------------------------------------------*/ + +#ifdef __cplusplus + // These serial port names are intended to allow libraries and architecture-neutral + // sketches to automatically default to the correct port name for a particular type + // of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN, + // the first hardware serial port whose RX/TX pins are not dedicated to another use. + // + // SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor + // + // SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial + // + // SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library + // + // SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins. + // + // SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX + // pins are NOT connected to anything by default. + #define SERIAL_PORT_MONITOR Serial + #define SERIAL_PORT_HARDWARE Serial +#endif