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e1000_defs.rs
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e1000_defs.rs
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#![allow(dead_code)]
// FIXME: handle endian
#[repr(C)]
#[derive(Clone, Copy)]
pub(crate) struct DescFlags {
pub(crate) length: u16,
pub(crate) cso: u8,
pub(crate) cmd: u8,
}
#[repr(C)]
#[derive(Clone, Copy)]
pub(crate) union TxLower {
pub(crate) data: u32,
pub(crate) flags: DescFlags,
}
#[repr(C)]
#[derive(Clone, Copy)]
pub(crate) struct DescFields {
pub(crate) status: u8,
pub(crate) css: u8,
pub(crate) special: u16,
}
#[repr(C)]
#[derive(Clone, Copy)]
pub(crate) union TxUpper {
pub(crate) data: u32,
pub(crate) fields: DescFields,
}
#[repr(C)]
#[derive(Clone, Copy)]
pub(crate) struct TxDesc {
pub(crate) buffer_addr: u64,
pub(crate) lower: TxLower,
pub(crate) upper: TxUpper,
}
#[repr(C)]
#[derive(Clone, Copy, Default)]
pub(crate) struct RxDesc {
pub(crate) buffer_addr: u64, /* Address of the descriptor's data buffer */
pub(crate) length: u16, /* Length of data DMAed into data buffer */
pub(crate) csum: u16, /* Packet checksum */
pub(crate) status: u8, /* Descriptor status */
pub(crate) errors: u8, /* Descriptor Errors */
pub(crate) special: u16,
}
pub(crate) const E1000_IMS_ENABLE_MASK: u32 =
E1000_IMS_RXT0 | E1000_IMS_TXDW | E1000_IMS_RXDMT0 | E1000_IMS_RXSEQ | E1000_IMS_LSC;
pub(crate) const E1000_HOST_IF_MAX_SIZE: u32 = 2048;
pub(crate) const E1000_SUCCESS: u32 = 0;
pub(crate) const E1000_ERR_EEPROM: u32 = 1;
pub(crate) const E1000_ERR_PHY: u32 = 2;
pub(crate) const E1000_ERR_CONFIG: u32 = 3;
pub(crate) const E1000_ERR_PARAM: u32 = 4;
pub(crate) const E1000_ERR_MAC_TYPE: u32 = 5;
pub(crate) const E1000_ERR_PHY_TYPE: u32 = 6;
pub(crate) const E1000_ERR_RESET: u32 = 9;
pub(crate) const E1000_ERR_MASTER_REQUESTS_PENDING: u32 = 10;
pub(crate) const E1000_ERR_HOST_INTERFACE_COMMAND: u32 = 11;
pub(crate) const E1000_BLK_PHY_RESET: u32 = 12;
pub(crate) const E1000_MNG_DHCP_TX_PAYLOAD_CMD: u32 = 64;
pub(crate) const E1000_HI_MAX_MNG_DATA_LENGTH: u32 = 1784;
pub(crate) const E1000_MNG_DHCP_COMMAND_TIMEOUT: u32 = 10;
pub(crate) const E1000_MNG_DHCP_COOKIE_OFFSET: u32 = 1776;
pub(crate) const E1000_MNG_DHCP_COOKIE_LENGTH: u32 = 16;
pub(crate) const E1000_MNG_IAMT_MODE: u32 = 3;
pub(crate) const E1000_MNG_ICH_IAMT_MODE: u32 = 2;
pub(crate) const E1000_IAMT_SIGNATURE: u32 = 1414349129;
pub(crate) const E1000_MNG_DHCP_COOKIE_STATUS_PARSING_SUPPORT: u32 = 1;
pub(crate) const E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT: u32 = 2;
pub(crate) const E1000_VFTA_ENTRY_SHIFT: u32 = 5;
pub(crate) const E1000_VFTA_ENTRY_MASK: u32 = 127;
pub(crate) const E1000_VFTA_ENTRY_BIT_SHIFT_MASK: u32 = 31;
pub(crate) const E1000_DEV_ID_82542: u32 = 4096;
pub(crate) const E1000_DEV_ID_82543GC_FIBER: u32 = 4097;
pub(crate) const E1000_DEV_ID_82543GC_COPPER: u32 = 4100;
pub(crate) const E1000_DEV_ID_82544EI_COPPER: u32 = 4104;
pub(crate) const E1000_DEV_ID_82544EI_FIBER: u32 = 4105;
pub(crate) const E1000_DEV_ID_82544GC_COPPER: u32 = 4108;
pub(crate) const E1000_DEV_ID_82544GC_LOM: u32 = 4109;
pub(crate) const E1000_DEV_ID_82540EM: u32 = 4110;
pub(crate) const E1000_DEV_ID_82540EM_LOM: u32 = 4117;
pub(crate) const E1000_DEV_ID_82540EP_LOM: u32 = 4118;
pub(crate) const E1000_DEV_ID_82540EP: u32 = 4119;
pub(crate) const E1000_DEV_ID_82540EP_LP: u32 = 4126;
pub(crate) const E1000_DEV_ID_82545EM_COPPER: u32 = 4111;
pub(crate) const E1000_DEV_ID_82545EM_FIBER: u32 = 4113;
pub(crate) const E1000_DEV_ID_82545GM_COPPER: u32 = 4134;
pub(crate) const E1000_DEV_ID_82545GM_FIBER: u32 = 4135;
pub(crate) const E1000_DEV_ID_82545GM_SERDES: u32 = 4136;
pub(crate) const E1000_DEV_ID_82546EB_COPPER: u32 = 4112;
pub(crate) const E1000_DEV_ID_82546EB_FIBER: u32 = 4114;
pub(crate) const E1000_DEV_ID_82546EB_QUAD_COPPER: u32 = 4125;
pub(crate) const E1000_DEV_ID_82541EI: u32 = 4115;
pub(crate) const E1000_DEV_ID_82541EI_MOBILE: u32 = 4120;
pub(crate) const E1000_DEV_ID_82541ER_LOM: u32 = 4116;
pub(crate) const E1000_DEV_ID_82541ER: u32 = 4216;
pub(crate) const E1000_DEV_ID_82547GI: u32 = 4213;
pub(crate) const E1000_DEV_ID_82541GI: u32 = 4214;
pub(crate) const E1000_DEV_ID_82541GI_MOBILE: u32 = 4215;
pub(crate) const E1000_DEV_ID_82541GI_LF: u32 = 4220;
pub(crate) const E1000_DEV_ID_82546GB_COPPER: u32 = 4217;
pub(crate) const E1000_DEV_ID_82546GB_FIBER: u32 = 4218;
pub(crate) const E1000_DEV_ID_82546GB_SERDES: u32 = 4219;
pub(crate) const E1000_DEV_ID_82546GB_PCIE: u32 = 4234;
pub(crate) const E1000_DEV_ID_82546GB_QUAD_COPPER: u32 = 4249;
pub(crate) const E1000_DEV_ID_82547EI: u32 = 4121;
pub(crate) const E1000_DEV_ID_82547EI_MOBILE: u32 = 4122;
pub(crate) const E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: u32 = 4277;
pub(crate) const E1000_DEV_ID_INTEL_CE4100_GBE: u32 = 11886;
pub(crate) const NODE_ADDRESS_SIZE: u32 = 6;
pub(crate) const MAC_DECODE_SIZE: u32 = 131072;
pub(crate) const E1000_82542_2_0_REV_ID: u32 = 2;
pub(crate) const E1000_82542_2_1_REV_ID: u32 = 3;
pub(crate) const E1000_REVISION_0: u32 = 0;
pub(crate) const E1000_REVISION_1: u32 = 1;
pub(crate) const E1000_REVISION_2: u32 = 2;
pub(crate) const E1000_REVISION_3: u32 = 3;
pub(crate) const SPEED_10: u32 = 10;
pub(crate) const SPEED_100: u32 = 100;
pub(crate) const SPEED_1000: u32 = 1000;
pub(crate) const HALF_DUPLEX: u32 = 1;
pub(crate) const FULL_DUPLEX: u32 = 2;
pub(crate) const ENET_HEADER_SIZE: u32 = 14;
pub(crate) const MINIMUM_ETHERNET_FRAME_SIZE: u32 = 64;
pub(crate) const ETHERNET_FCS_SIZE: u32 = 4;
pub(crate) const MINIMUM_ETHERNET_PACKET_SIZE: u32 = 60;
pub(crate) const CRC_LENGTH: u32 = 4;
pub(crate) const MAX_JUMBO_FRAME_SIZE: u32 = 16128;
pub(crate) const VLAN_TAG_SIZE: u32 = 4;
pub(crate) const ETHERNET_IEEE_VLAN_TYPE: u32 = 33024;
pub(crate) const ETHERNET_IP_TYPE: u32 = 2048;
pub(crate) const ETHERNET_ARP_TYPE: u32 = 2054;
pub(crate) const IP_PROTOCOL_TCP: u32 = 6;
pub(crate) const IP_PROTOCOL_UDP: u32 = 17;
pub(crate) const E1000_RAR_ENTRIES: u32 = 15;
pub(crate) const MIN_NUMBER_OF_DESCRIPTORS: u32 = 8;
pub(crate) const MAX_NUMBER_OF_DESCRIPTORS: u32 = 65528;
pub(crate) const MAX_PS_BUFFERS: u32 = 4;
pub(crate) const E1000_RXD_STAT_DD: u32 = 1;
pub(crate) const E1000_RXD_STAT_EOP: u32 = 2;
pub(crate) const E1000_RXD_STAT_IXSM: u32 = 4;
pub(crate) const E1000_RXD_STAT_VP: u32 = 8;
pub(crate) const E1000_RXD_STAT_UDPCS: u32 = 16;
pub(crate) const E1000_RXD_STAT_TCPCS: u32 = 32;
pub(crate) const E1000_RXD_STAT_IPCS: u32 = 64;
pub(crate) const E1000_RXD_STAT_PIF: u32 = 128;
pub(crate) const E1000_RXD_STAT_IPIDV: u32 = 512;
pub(crate) const E1000_RXD_STAT_UDPV: u32 = 1024;
pub(crate) const E1000_RXD_STAT_ACK: u32 = 32768;
pub(crate) const E1000_RXD_ERR_CE: u32 = 1;
pub(crate) const E1000_RXD_ERR_SE: u32 = 2;
pub(crate) const E1000_RXD_ERR_SEQ: u32 = 4;
pub(crate) const E1000_RXD_ERR_CXE: u32 = 16;
pub(crate) const E1000_RXD_ERR_TCPE: u32 = 32;
pub(crate) const E1000_RXD_ERR_IPE: u32 = 64;
pub(crate) const E1000_RXD_ERR_RXE: u32 = 128;
pub(crate) const E1000_RXD_SPC_VLAN_MASK: u32 = 4095;
pub(crate) const E1000_RXD_SPC_PRI_MASK: u32 = 57344;
pub(crate) const E1000_RXD_SPC_PRI_SHIFT: u32 = 13;
pub(crate) const E1000_RXD_SPC_CFI_MASK: u32 = 4096;
pub(crate) const E1000_RXD_SPC_CFI_SHIFT: u32 = 12;
pub(crate) const E1000_RXDEXT_STATERR_CE: u32 = 16777216;
pub(crate) const E1000_RXDEXT_STATERR_SE: u32 = 33554432;
pub(crate) const E1000_RXDEXT_STATERR_SEQ: u32 = 67108864;
pub(crate) const E1000_RXDEXT_STATERR_CXE: u32 = 268435456;
pub(crate) const E1000_RXDEXT_STATERR_TCPE: u32 = 536870912;
pub(crate) const E1000_RXDEXT_STATERR_IPE: u32 = 1073741824;
pub(crate) const E1000_RXDEXT_STATERR_RXE: u32 = 2147483648;
pub(crate) const E1000_RXDPS_HDRSTAT_HDRSP: u32 = 32768;
pub(crate) const E1000_RXDPS_HDRSTAT_HDRLEN_MASK: u32 = 1023;
pub(crate) const E1000_RXD_ERR_FRAME_ERR_MASK: u32 = 151;
pub(crate) const E1000_RXDEXT_ERR_FRAME_ERR_MASK: u32 = 2533359616;
pub(crate) const E1000_TXD_DTYP_D: u32 = 1048576;
pub(crate) const E1000_TXD_DTYP_C: u32 = 0;
pub(crate) const E1000_TXD_POPTS_IXSM: u32 = 1;
pub(crate) const E1000_TXD_POPTS_TXSM: u32 = 2;
pub(crate) const E1000_TXD_CMD_EOP: u32 = 16777216;
pub(crate) const E1000_TXD_CMD_IFCS: u32 = 33554432;
pub(crate) const E1000_TXD_CMD_IC: u32 = 67108864;
pub(crate) const E1000_TXD_CMD_RS: u32 = 134217728;
pub(crate) const E1000_TXD_CMD_RPS: u32 = 268435456;
pub(crate) const E1000_TXD_CMD_DEXT: u32 = 536870912;
pub(crate) const E1000_TXD_CMD_VLE: u32 = 1073741824;
pub(crate) const E1000_TXD_CMD_IDE: u32 = 2147483648;
pub(crate) const E1000_TXD_STAT_DD: u32 = 1;
pub(crate) const E1000_TXD_STAT_EC: u32 = 2;
pub(crate) const E1000_TXD_STAT_LC: u32 = 4;
pub(crate) const E1000_TXD_STAT_TU: u32 = 8;
pub(crate) const E1000_TXD_CMD_TCP: u32 = 16777216;
pub(crate) const E1000_TXD_CMD_IP: u32 = 33554432;
pub(crate) const E1000_TXD_CMD_TSE: u32 = 67108864;
pub(crate) const E1000_TXD_STAT_TC: u32 = 4;
pub(crate) const E1000_NUM_UNICAST: u32 = 16;
pub(crate) const E1000_MC_TBL_SIZE: u32 = 128;
pub(crate) const E1000_VLAN_FILTER_TBL_SIZE: u32 = 128;
pub(crate) const E1000_NUM_MTA_REGISTERS: u32 = 128;
pub(crate) const E1000_WAKEUP_IP_ADDRESS_COUNT_MAX: u32 = 4;
pub(crate) const E1000_IP4AT_SIZE: u32 = 4;
pub(crate) const E1000_IP6AT_SIZE: u32 = 1;
pub(crate) const E1000_FLEXIBLE_FILTER_COUNT_MAX: u32 = 4;
pub(crate) const E1000_FLEXIBLE_FILTER_SIZE_MAX: u32 = 128;
pub(crate) const E1000_FFLT_SIZE: u32 = 4;
pub(crate) const E1000_FFMT_SIZE: u32 = 128;
pub(crate) const E1000_FFVT_SIZE: u32 = 128;
pub(crate) const E1000_DISABLE_SERDES_LOOPBACK: u32 = 1024;
pub(crate) const E1000_CTRL: u32 = 0;
pub(crate) const E1000_CTRL_DUP: u32 = 4;
pub(crate) const E1000_STATUS: u32 = 8;
pub(crate) const E1000_EECD: u32 = 16;
pub(crate) const E1000_EERD: u32 = 20;
pub(crate) const E1000_CTRL_EXT: u32 = 24;
pub(crate) const E1000_FLA: u32 = 28;
pub(crate) const E1000_MDIC: u32 = 32;
pub(crate) const E1000_SCTL: u32 = 36;
pub(crate) const E1000_FEXTNVM: u32 = 40;
pub(crate) const E1000_FCAL: u32 = 40;
pub(crate) const E1000_FCAH: u32 = 44;
pub(crate) const E1000_FCT: u32 = 48;
pub(crate) const E1000_VET: u32 = 56;
pub(crate) const E1000_ICR: u32 = 192;
pub(crate) const E1000_ITR: u32 = 196;
pub(crate) const E1000_ICS: u32 = 200;
pub(crate) const E1000_IMS: u32 = 208;
pub(crate) const E1000_IMC: u32 = 216;
pub(crate) const E1000_IAM: u32 = 224;
pub(crate) const E1000_CTL_AUX: u32 = 224;
pub(crate) const E1000_CTL_AUX_END_SEL_SHIFT: u32 = 10;
pub(crate) const E1000_CTL_AUX_ENDIANESS_SHIFT: u32 = 8;
pub(crate) const E1000_CTL_AUX_RGMII_RMII_SHIFT: u32 = 0;
pub(crate) const E1000_CTL_AUX_DES_PKT: u32 = 0;
pub(crate) const E1000_CTL_AUX_DES: u32 = 1024;
pub(crate) const E1000_CTL_AUX_PKT: u32 = 2048;
pub(crate) const E1000_CTL_AUX_ALL: u32 = 3072;
pub(crate) const E1000_CTL_AUX_RGMII: u32 = 0;
pub(crate) const E1000_CTL_AUX_RMII: u32 = 1;
pub(crate) const E1000_CTL_AUX_LWLE_BBE: u32 = 0;
pub(crate) const E1000_CTL_AUX_LWLE_BLE: u32 = 256;
pub(crate) const E1000_CTL_AUX_LWBE_BBE: u32 = 512;
pub(crate) const E1000_CTL_AUX_LWBE_BLE: u32 = 768;
pub(crate) const E1000_RCTL: u32 = 256;
pub(crate) const E1000_RDTR1: u32 = 10272;
pub(crate) const E1000_RDBAL1: u32 = 10496;
pub(crate) const E1000_RDBAH1: u32 = 10500;
pub(crate) const E1000_RDLEN1: u32 = 10504;
pub(crate) const E1000_RDH1: u32 = 10512;
pub(crate) const E1000_RDT1: u32 = 10520;
pub(crate) const E1000_FCTTV: u32 = 368;
pub(crate) const E1000_TXCW: u32 = 376;
pub(crate) const E1000_RXCW: u32 = 384;
pub(crate) const E1000_TCTL: u32 = 1024;
pub(crate) const E1000_TCTL_EXT: u32 = 1028;
pub(crate) const E1000_TIPG: u32 = 1040;
pub(crate) const E1000_TBT: u32 = 1096;
pub(crate) const E1000_AIT: u32 = 1112;
pub(crate) const E1000_LEDCTL: u32 = 3584;
pub(crate) const E1000_EXTCNF_CTRL: u32 = 3840;
pub(crate) const E1000_EXTCNF_SIZE: u32 = 3848;
pub(crate) const E1000_PHY_CTRL: u32 = 3856;
pub(crate) const FEXTNVM_SW_CONFIG: u32 = 1;
pub(crate) const E1000_PBA: u32 = 4096;
pub(crate) const E1000_PBS: u32 = 4104;
pub(crate) const E1000_EEMNGCTL: u32 = 4112;
pub(crate) const E1000_FLASH_UPDATES: u32 = 1000;
pub(crate) const E1000_EEARBC: u32 = 4132;
pub(crate) const E1000_FLASHT: u32 = 4136;
pub(crate) const E1000_EEWR: u32 = 4140;
pub(crate) const E1000_FLSWCTL: u32 = 4144;
pub(crate) const E1000_FLSWDATA: u32 = 4148;
pub(crate) const E1000_FLSWCNT: u32 = 4152;
pub(crate) const E1000_FLOP: u32 = 4156;
pub(crate) const E1000_ERT: u32 = 8200;
pub(crate) const E1000_FCRTL: u32 = 8544;
pub(crate) const E1000_FCRTH: u32 = 8552;
pub(crate) const E1000_PSRCTL: u32 = 8560;
pub(crate) const E1000_RDFH: u32 = 9232;
pub(crate) const E1000_RDFT: u32 = 9240;
pub(crate) const E1000_RDFHS: u32 = 9248;
pub(crate) const E1000_RDFTS: u32 = 9256;
pub(crate) const E1000_RDFPC: u32 = 9264;
pub(crate) const E1000_RDBAL: u32 = 10240;
pub(crate) const E1000_RDBAH: u32 = 10244;
pub(crate) const E1000_RDLEN: u32 = 10248;
pub(crate) const E1000_RDH: u32 = 10256;
pub(crate) const E1000_RDT: u32 = 10264;
pub(crate) const E1000_RDTR: u32 = 10272;
pub(crate) const E1000_RDBAL0: u32 = 10240;
pub(crate) const E1000_RDBAH0: u32 = 10244;
pub(crate) const E1000_RDLEN0: u32 = 10248;
pub(crate) const E1000_RDH0: u32 = 10256;
pub(crate) const E1000_RDT0: u32 = 10264;
pub(crate) const E1000_RDTR0: u32 = 10272;
pub(crate) const E1000_RXDCTL: u32 = 10280;
pub(crate) const E1000_RXDCTL1: u32 = 10536;
pub(crate) const E1000_RADV: u32 = 10284;
pub(crate) const E1000_RSRPD: u32 = 11264;
pub(crate) const E1000_RAID: u32 = 11272;
pub(crate) const E1000_TXDMAC: u32 = 12288;
pub(crate) const E1000_KABGTXD: u32 = 12292;
pub(crate) const E1000_TDFH: u32 = 13328;
pub(crate) const E1000_TDFT: u32 = 13336;
pub(crate) const E1000_TDFHS: u32 = 13344;
pub(crate) const E1000_TDFTS: u32 = 13352;
pub(crate) const E1000_TDFPC: u32 = 13360;
pub(crate) const E1000_TDBAL: u32 = 14336;
pub(crate) const E1000_TDBAH: u32 = 14340;
pub(crate) const E1000_TDLEN: u32 = 14344;
pub(crate) const E1000_TDH: u32 = 14352;
pub(crate) const E1000_TDT: u32 = 14360;
pub(crate) const E1000_TIDV: u32 = 14368;
pub(crate) const E1000_TXDCTL: u32 = 14376;
pub(crate) const E1000_TADV: u32 = 14380;
pub(crate) const E1000_TSPMT: u32 = 14384;
pub(crate) const E1000_TARC0: u32 = 14400;
pub(crate) const E1000_TDBAL1: u32 = 14592;
pub(crate) const E1000_TDBAH1: u32 = 14596;
pub(crate) const E1000_TDLEN1: u32 = 14600;
pub(crate) const E1000_TDH1: u32 = 14608;
pub(crate) const E1000_TDT1: u32 = 14616;
pub(crate) const E1000_TXDCTL1: u32 = 14632;
pub(crate) const E1000_TARC1: u32 = 14656;
pub(crate) const E1000_CRCERRS: u32 = 16384;
pub(crate) const E1000_ALGNERRC: u32 = 16388;
pub(crate) const E1000_SYMERRS: u32 = 16392;
pub(crate) const E1000_RXERRC: u32 = 16396;
pub(crate) const E1000_MPC: u32 = 16400;
pub(crate) const E1000_SCC: u32 = 16404;
pub(crate) const E1000_ECOL: u32 = 16408;
pub(crate) const E1000_MCC: u32 = 16412;
pub(crate) const E1000_LATECOL: u32 = 16416;
pub(crate) const E1000_COLC: u32 = 16424;
pub(crate) const E1000_DC: u32 = 16432;
pub(crate) const E1000_TNCRS: u32 = 16436;
pub(crate) const E1000_SEC: u32 = 16440;
pub(crate) const E1000_CEXTERR: u32 = 16444;
pub(crate) const E1000_RLEC: u32 = 16448;
pub(crate) const E1000_XONRXC: u32 = 16456;
pub(crate) const E1000_XONTXC: u32 = 16460;
pub(crate) const E1000_XOFFRXC: u32 = 16464;
pub(crate) const E1000_XOFFTXC: u32 = 16468;
pub(crate) const E1000_FCRUC: u32 = 16472;
pub(crate) const E1000_PRC64: u32 = 16476;
pub(crate) const E1000_PRC127: u32 = 16480;
pub(crate) const E1000_PRC255: u32 = 16484;
pub(crate) const E1000_PRC511: u32 = 16488;
pub(crate) const E1000_PRC1023: u32 = 16492;
pub(crate) const E1000_PRC1522: u32 = 16496;
pub(crate) const E1000_GPRC: u32 = 16500;
pub(crate) const E1000_BPRC: u32 = 16504;
pub(crate) const E1000_MPRC: u32 = 16508;
pub(crate) const E1000_GPTC: u32 = 16512;
pub(crate) const E1000_GORCL: u32 = 16520;
pub(crate) const E1000_GORCH: u32 = 16524;
pub(crate) const E1000_GOTCL: u32 = 16528;
pub(crate) const E1000_GOTCH: u32 = 16532;
pub(crate) const E1000_RNBC: u32 = 16544;
pub(crate) const E1000_RUC: u32 = 16548;
pub(crate) const E1000_RFC: u32 = 16552;
pub(crate) const E1000_ROC: u32 = 16556;
pub(crate) const E1000_RJC: u32 = 16560;
pub(crate) const E1000_MGTPRC: u32 = 16564;
pub(crate) const E1000_MGTPDC: u32 = 16568;
pub(crate) const E1000_MGTPTC: u32 = 16572;
pub(crate) const E1000_TORL: u32 = 16576;
pub(crate) const E1000_TORH: u32 = 16580;
pub(crate) const E1000_TOTL: u32 = 16584;
pub(crate) const E1000_TOTH: u32 = 16588;
pub(crate) const E1000_TPR: u32 = 16592;
pub(crate) const E1000_TPT: u32 = 16596;
pub(crate) const E1000_PTC64: u32 = 16600;
pub(crate) const E1000_PTC127: u32 = 16604;
pub(crate) const E1000_PTC255: u32 = 16608;
pub(crate) const E1000_PTC511: u32 = 16612;
pub(crate) const E1000_PTC1023: u32 = 16616;
pub(crate) const E1000_PTC1522: u32 = 16620;
pub(crate) const E1000_MPTC: u32 = 16624;
pub(crate) const E1000_BPTC: u32 = 16628;
pub(crate) const E1000_TSCTC: u32 = 16632;
pub(crate) const E1000_TSCTFC: u32 = 16636;
pub(crate) const E1000_IAC: u32 = 16640;
pub(crate) const E1000_ICRXPTC: u32 = 16644;
pub(crate) const E1000_ICRXATC: u32 = 16648;
pub(crate) const E1000_ICTXPTC: u32 = 16652;
pub(crate) const E1000_ICTXATC: u32 = 16656;
pub(crate) const E1000_ICTXQEC: u32 = 16664;
pub(crate) const E1000_ICTXQMTC: u32 = 16668;
pub(crate) const E1000_ICRXDMTC: u32 = 16672;
pub(crate) const E1000_ICRXOC: u32 = 16676;
pub(crate) const E1000_RXCSUM: u32 = 20480;
pub(crate) const E1000_RFCTL: u32 = 20488;
pub(crate) const E1000_MTA: u32 = 20992;
pub(crate) const E1000_RA: u32 = 21504;
pub(crate) const E1000_VFTA: u32 = 22016;
pub(crate) const E1000_WUC: u32 = 22528;
pub(crate) const E1000_WUFC: u32 = 22536;
pub(crate) const E1000_WUS: u32 = 22544;
pub(crate) const E1000_MANC: u32 = 22560;
pub(crate) const E1000_IPAV: u32 = 22584;
pub(crate) const E1000_IP4AT: u32 = 22592;
pub(crate) const E1000_IP6AT: u32 = 22656;
pub(crate) const E1000_WUPL: u32 = 22784;
pub(crate) const E1000_WUPM: u32 = 23040;
pub(crate) const E1000_FFLT: u32 = 24320;
pub(crate) const E1000_HOST_IF: u32 = 34816;
pub(crate) const E1000_FFMT: u32 = 36864;
pub(crate) const E1000_FFVT: u32 = 38912;
pub(crate) const E1000_KUMCTRLSTA: u32 = 52;
pub(crate) const E1000_MDPHYA: u32 = 60;
pub(crate) const E1000_MANC2H: u32 = 22624;
pub(crate) const E1000_SW_FW_SYNC: u32 = 23388;
pub(crate) const E1000_GCR: u32 = 23296;
pub(crate) const E1000_GSCL_1: u32 = 23312;
pub(crate) const E1000_GSCL_2: u32 = 23316;
pub(crate) const E1000_GSCL_3: u32 = 23320;
pub(crate) const E1000_GSCL_4: u32 = 23324;
pub(crate) const E1000_FACTPS: u32 = 23344;
pub(crate) const E1000_SWSM: u32 = 23376;
pub(crate) const E1000_FWSM: u32 = 23380;
pub(crate) const E1000_FFLT_DBG: u32 = 24324;
pub(crate) const E1000_HICR: u32 = 36608;
pub(crate) const E1000_CPUVEC: u32 = 11280;
pub(crate) const E1000_MRQC: u32 = 22552;
pub(crate) const E1000_RETA: u32 = 23552;
pub(crate) const E1000_RSSRK: u32 = 23680;
pub(crate) const E1000_RSSIM: u32 = 22628;
pub(crate) const E1000_RSSIR: u32 = 22632;
pub(crate) const E1000_82542_CTL_AUX: u32 = 224;
pub(crate) const E1000_82542_CTRL: u32 = 0;
pub(crate) const E1000_82542_CTRL_DUP: u32 = 4;
pub(crate) const E1000_82542_STATUS: u32 = 8;
pub(crate) const E1000_82542_EECD: u32 = 16;
pub(crate) const E1000_82542_EERD: u32 = 20;
pub(crate) const E1000_82542_CTRL_EXT: u32 = 24;
pub(crate) const E1000_82542_FLA: u32 = 28;
pub(crate) const E1000_82542_MDIC: u32 = 32;
pub(crate) const E1000_82542_SCTL: u32 = 36;
pub(crate) const E1000_82542_FEXTNVM: u32 = 40;
pub(crate) const E1000_82542_FCAL: u32 = 40;
pub(crate) const E1000_82542_FCAH: u32 = 44;
pub(crate) const E1000_82542_FCT: u32 = 48;
pub(crate) const E1000_82542_VET: u32 = 56;
pub(crate) const E1000_82542_RA: u32 = 64;
pub(crate) const E1000_82542_ICR: u32 = 192;
pub(crate) const E1000_82542_ITR: u32 = 196;
pub(crate) const E1000_82542_ICS: u32 = 200;
pub(crate) const E1000_82542_IMS: u32 = 208;
pub(crate) const E1000_82542_IMC: u32 = 216;
pub(crate) const E1000_82542_RCTL: u32 = 256;
pub(crate) const E1000_82542_RDTR: u32 = 264;
pub(crate) const E1000_82542_RDFH: u32 = 9232;
pub(crate) const E1000_82542_RDFT: u32 = 9240;
pub(crate) const E1000_82542_RDFHS: u32 = 9248;
pub(crate) const E1000_82542_RDFTS: u32 = 9256;
pub(crate) const E1000_82542_RDFPC: u32 = 9264;
pub(crate) const E1000_82542_RDBAL: u32 = 272;
pub(crate) const E1000_82542_RDBAH: u32 = 276;
pub(crate) const E1000_82542_RDLEN: u32 = 280;
pub(crate) const E1000_82542_RDH: u32 = 288;
pub(crate) const E1000_82542_RDT: u32 = 296;
pub(crate) const E1000_82542_RDTR0: u32 = 264;
pub(crate) const E1000_82542_RDBAL0: u32 = 272;
pub(crate) const E1000_82542_RDBAH0: u32 = 276;
pub(crate) const E1000_82542_RDLEN0: u32 = 280;
pub(crate) const E1000_82542_RDH0: u32 = 288;
pub(crate) const E1000_82542_RDT0: u32 = 296;
pub(crate) const E1000_82542_RDBAH3: u32 = 11012;
pub(crate) const E1000_82542_RDBAL3: u32 = 11008;
pub(crate) const E1000_82542_RDLEN3: u32 = 11016;
pub(crate) const E1000_82542_RDH3: u32 = 11024;
pub(crate) const E1000_82542_RDT3: u32 = 11032;
pub(crate) const E1000_82542_RDBAL2: u32 = 10752;
pub(crate) const E1000_82542_RDBAH2: u32 = 10756;
pub(crate) const E1000_82542_RDLEN2: u32 = 10760;
pub(crate) const E1000_82542_RDH2: u32 = 10768;
pub(crate) const E1000_82542_RDT2: u32 = 10776;
pub(crate) const E1000_82542_RDTR1: u32 = 304;
pub(crate) const E1000_82542_RDBAL1: u32 = 312;
pub(crate) const E1000_82542_RDBAH1: u32 = 316;
pub(crate) const E1000_82542_RDLEN1: u32 = 320;
pub(crate) const E1000_82542_RDH1: u32 = 328;
pub(crate) const E1000_82542_RDT1: u32 = 336;
pub(crate) const E1000_82542_FCRTH: u32 = 352;
pub(crate) const E1000_82542_FCRTL: u32 = 360;
pub(crate) const E1000_82542_FCTTV: u32 = 368;
pub(crate) const E1000_82542_TXCW: u32 = 376;
pub(crate) const E1000_82542_RXCW: u32 = 384;
pub(crate) const E1000_82542_MTA: u32 = 512;
pub(crate) const E1000_82542_TCTL: u32 = 1024;
pub(crate) const E1000_82542_TCTL_EXT: u32 = 1028;
pub(crate) const E1000_82542_TIPG: u32 = 1040;
pub(crate) const E1000_82542_TDBAL: u32 = 1056;
pub(crate) const E1000_82542_TDBAH: u32 = 1060;
pub(crate) const E1000_82542_TDLEN: u32 = 1064;
pub(crate) const E1000_82542_TDH: u32 = 1072;
pub(crate) const E1000_82542_TDT: u32 = 1080;
pub(crate) const E1000_82542_TIDV: u32 = 1088;
pub(crate) const E1000_82542_TBT: u32 = 1096;
pub(crate) const E1000_82542_AIT: u32 = 1112;
pub(crate) const E1000_82542_VFTA: u32 = 1536;
pub(crate) const E1000_82542_LEDCTL: u32 = 3584;
pub(crate) const E1000_82542_PBA: u32 = 4096;
pub(crate) const E1000_82542_PBS: u32 = 4104;
pub(crate) const E1000_82542_EEMNGCTL: u32 = 4112;
pub(crate) const E1000_82542_EEARBC: u32 = 4132;
pub(crate) const E1000_82542_FLASHT: u32 = 4136;
pub(crate) const E1000_82542_EEWR: u32 = 4140;
pub(crate) const E1000_82542_FLSWCTL: u32 = 4144;
pub(crate) const E1000_82542_FLSWDATA: u32 = 4148;
pub(crate) const E1000_82542_FLSWCNT: u32 = 4152;
pub(crate) const E1000_82542_FLOP: u32 = 4156;
pub(crate) const E1000_82542_EXTCNF_CTRL: u32 = 3840;
pub(crate) const E1000_82542_EXTCNF_SIZE: u32 = 3848;
pub(crate) const E1000_82542_PHY_CTRL: u32 = 3856;
pub(crate) const E1000_82542_ERT: u32 = 8200;
pub(crate) const E1000_82542_RXDCTL: u32 = 10280;
pub(crate) const E1000_82542_RXDCTL1: u32 = 10536;
pub(crate) const E1000_82542_RADV: u32 = 10284;
pub(crate) const E1000_82542_RSRPD: u32 = 11264;
pub(crate) const E1000_82542_TXDMAC: u32 = 12288;
pub(crate) const E1000_82542_KABGTXD: u32 = 12292;
pub(crate) const E1000_82542_TDFHS: u32 = 13344;
pub(crate) const E1000_82542_TDFTS: u32 = 13352;
pub(crate) const E1000_82542_TDFPC: u32 = 13360;
pub(crate) const E1000_82542_TXDCTL: u32 = 14376;
pub(crate) const E1000_82542_TADV: u32 = 14380;
pub(crate) const E1000_82542_TSPMT: u32 = 14384;
pub(crate) const E1000_82542_CRCERRS: u32 = 16384;
pub(crate) const E1000_82542_ALGNERRC: u32 = 16388;
pub(crate) const E1000_82542_SYMERRS: u32 = 16392;
pub(crate) const E1000_82542_RXERRC: u32 = 16396;
pub(crate) const E1000_82542_MPC: u32 = 16400;
pub(crate) const E1000_82542_SCC: u32 = 16404;
pub(crate) const E1000_82542_ECOL: u32 = 16408;
pub(crate) const E1000_82542_MCC: u32 = 16412;
pub(crate) const E1000_82542_LATECOL: u32 = 16416;
pub(crate) const E1000_82542_COLC: u32 = 16424;
pub(crate) const E1000_82542_DC: u32 = 16432;
pub(crate) const E1000_82542_TNCRS: u32 = 16436;
pub(crate) const E1000_82542_SEC: u32 = 16440;
pub(crate) const E1000_82542_CEXTERR: u32 = 16444;
pub(crate) const E1000_82542_RLEC: u32 = 16448;
pub(crate) const E1000_82542_XONRXC: u32 = 16456;
pub(crate) const E1000_82542_XONTXC: u32 = 16460;
pub(crate) const E1000_82542_XOFFRXC: u32 = 16464;
pub(crate) const E1000_82542_XOFFTXC: u32 = 16468;
pub(crate) const E1000_82542_FCRUC: u32 = 16472;
pub(crate) const E1000_82542_PRC64: u32 = 16476;
pub(crate) const E1000_82542_PRC127: u32 = 16480;
pub(crate) const E1000_82542_PRC255: u32 = 16484;
pub(crate) const E1000_82542_PRC511: u32 = 16488;
pub(crate) const E1000_82542_PRC1023: u32 = 16492;
pub(crate) const E1000_82542_PRC1522: u32 = 16496;
pub(crate) const E1000_82542_GPRC: u32 = 16500;
pub(crate) const E1000_82542_BPRC: u32 = 16504;
pub(crate) const E1000_82542_MPRC: u32 = 16508;
pub(crate) const E1000_82542_GPTC: u32 = 16512;
pub(crate) const E1000_82542_GORCL: u32 = 16520;
pub(crate) const E1000_82542_GORCH: u32 = 16524;
pub(crate) const E1000_82542_GOTCL: u32 = 16528;
pub(crate) const E1000_82542_GOTCH: u32 = 16532;
pub(crate) const E1000_82542_RNBC: u32 = 16544;
pub(crate) const E1000_82542_RUC: u32 = 16548;
pub(crate) const E1000_82542_RFC: u32 = 16552;
pub(crate) const E1000_82542_ROC: u32 = 16556;
pub(crate) const E1000_82542_RJC: u32 = 16560;
pub(crate) const E1000_82542_MGTPRC: u32 = 16564;
pub(crate) const E1000_82542_MGTPDC: u32 = 16568;
pub(crate) const E1000_82542_MGTPTC: u32 = 16572;
pub(crate) const E1000_82542_TORL: u32 = 16576;
pub(crate) const E1000_82542_TORH: u32 = 16580;
pub(crate) const E1000_82542_TOTL: u32 = 16584;
pub(crate) const E1000_82542_TOTH: u32 = 16588;
pub(crate) const E1000_82542_TPR: u32 = 16592;
pub(crate) const E1000_82542_TPT: u32 = 16596;
pub(crate) const E1000_82542_PTC64: u32 = 16600;
pub(crate) const E1000_82542_PTC127: u32 = 16604;
pub(crate) const E1000_82542_PTC255: u32 = 16608;
pub(crate) const E1000_82542_PTC511: u32 = 16612;
pub(crate) const E1000_82542_PTC1023: u32 = 16616;
pub(crate) const E1000_82542_PTC1522: u32 = 16620;
pub(crate) const E1000_82542_MPTC: u32 = 16624;
pub(crate) const E1000_82542_BPTC: u32 = 16628;
pub(crate) const E1000_82542_TSCTC: u32 = 16632;
pub(crate) const E1000_82542_TSCTFC: u32 = 16636;
pub(crate) const E1000_82542_RXCSUM: u32 = 20480;
pub(crate) const E1000_82542_WUC: u32 = 22528;
pub(crate) const E1000_82542_WUFC: u32 = 22536;
pub(crate) const E1000_82542_WUS: u32 = 22544;
pub(crate) const E1000_82542_MANC: u32 = 22560;
pub(crate) const E1000_82542_IPAV: u32 = 22584;
pub(crate) const E1000_82542_IP4AT: u32 = 22592;
pub(crate) const E1000_82542_IP6AT: u32 = 22656;
pub(crate) const E1000_82542_WUPL: u32 = 22784;
pub(crate) const E1000_82542_WUPM: u32 = 23040;
pub(crate) const E1000_82542_FFLT: u32 = 24320;
pub(crate) const E1000_82542_TDFH: u32 = 32784;
pub(crate) const E1000_82542_TDFT: u32 = 32792;
pub(crate) const E1000_82542_FFMT: u32 = 36864;
pub(crate) const E1000_82542_FFVT: u32 = 38912;
pub(crate) const E1000_82542_HOST_IF: u32 = 34816;
pub(crate) const E1000_82542_IAM: u32 = 224;
pub(crate) const E1000_82542_PSRCTL: u32 = 8560;
pub(crate) const E1000_82542_RAID: u32 = 11272;
pub(crate) const E1000_82542_TARC0: u32 = 14400;
pub(crate) const E1000_82542_TDBAL1: u32 = 14592;
pub(crate) const E1000_82542_TDBAH1: u32 = 14596;
pub(crate) const E1000_82542_TDLEN1: u32 = 14600;
pub(crate) const E1000_82542_TDH1: u32 = 14608;
pub(crate) const E1000_82542_TDT1: u32 = 14616;
pub(crate) const E1000_82542_TXDCTL1: u32 = 14632;
pub(crate) const E1000_82542_TARC1: u32 = 14656;
pub(crate) const E1000_82542_RFCTL: u32 = 20488;
pub(crate) const E1000_82542_GCR: u32 = 23296;
pub(crate) const E1000_82542_GSCL_1: u32 = 23312;
pub(crate) const E1000_82542_GSCL_2: u32 = 23316;
pub(crate) const E1000_82542_GSCL_3: u32 = 23320;
pub(crate) const E1000_82542_GSCL_4: u32 = 23324;
pub(crate) const E1000_82542_FACTPS: u32 = 23344;
pub(crate) const E1000_82542_SWSM: u32 = 23376;
pub(crate) const E1000_82542_FWSM: u32 = 23380;
pub(crate) const E1000_82542_FFLT_DBG: u32 = 24324;
pub(crate) const E1000_82542_IAC: u32 = 16640;
pub(crate) const E1000_82542_ICRXPTC: u32 = 16644;
pub(crate) const E1000_82542_ICRXATC: u32 = 16648;
pub(crate) const E1000_82542_ICTXPTC: u32 = 16652;
pub(crate) const E1000_82542_ICTXATC: u32 = 16656;
pub(crate) const E1000_82542_ICTXQEC: u32 = 16664;
pub(crate) const E1000_82542_ICTXQMTC: u32 = 16668;
pub(crate) const E1000_82542_ICRXDMTC: u32 = 16672;
pub(crate) const E1000_82542_ICRXOC: u32 = 16676;
pub(crate) const E1000_82542_HICR: u32 = 36608;
pub(crate) const E1000_82542_CPUVEC: u32 = 11280;
pub(crate) const E1000_82542_MRQC: u32 = 22552;
pub(crate) const E1000_82542_RETA: u32 = 23552;
pub(crate) const E1000_82542_RSSRK: u32 = 23680;
pub(crate) const E1000_82542_RSSIM: u32 = 22628;
pub(crate) const E1000_82542_RSSIR: u32 = 22632;
pub(crate) const E1000_82542_KUMCTRLSTA: u32 = 52;
pub(crate) const E1000_82542_SW_FW_SYNC: u32 = 23388;
pub(crate) const E1000_EEPROM_SWDPIN0: u32 = 1;
pub(crate) const E1000_EEPROM_LED_LOGIC: u32 = 32;
pub(crate) const E1000_EEPROM_RW_REG_DATA: u32 = 16;
pub(crate) const E1000_EEPROM_RW_REG_DONE: u32 = 2;
pub(crate) const E1000_EEPROM_RW_REG_START: u32 = 1;
pub(crate) const E1000_EEPROM_RW_ADDR_SHIFT: u32 = 2;
pub(crate) const E1000_EEPROM_POLL_WRITE: u32 = 1;
pub(crate) const E1000_EEPROM_POLL_READ: u32 = 0;
pub(crate) const E1000_CTRL_FD: u32 = 1;
pub(crate) const E1000_CTRL_BEM: u32 = 2;
pub(crate) const E1000_CTRL_PRIOR: u32 = 4;
pub(crate) const E1000_CTRL_GIO_MASTER_DISABLE: u32 = 4;
pub(crate) const E1000_CTRL_LRST: u32 = 8;
pub(crate) const E1000_CTRL_TME: u32 = 16;
pub(crate) const E1000_CTRL_SLE: u32 = 32;
pub(crate) const E1000_CTRL_ASDE: u32 = 32;
pub(crate) const E1000_CTRL_SLU: u32 = 64;
pub(crate) const E1000_CTRL_ILOS: u32 = 128;
pub(crate) const E1000_CTRL_SPD_SEL: u32 = 768;
pub(crate) const E1000_CTRL_SPD_10: u32 = 0;
pub(crate) const E1000_CTRL_SPD_100: u32 = 256;
pub(crate) const E1000_CTRL_SPD_1000: u32 = 512;
pub(crate) const E1000_CTRL_BEM32: u32 = 1024;
pub(crate) const E1000_CTRL_FRCSPD: u32 = 2048;
pub(crate) const E1000_CTRL_FRCDPX: u32 = 4096;
pub(crate) const E1000_CTRL_D_UD_EN: u32 = 8192;
pub(crate) const E1000_CTRL_D_UD_POLARITY: u32 = 16384;
pub(crate) const E1000_CTRL_FORCE_PHY_RESET: u32 = 32768;
pub(crate) const E1000_CTRL_EXT_LINK_EN: u32 = 65536;
pub(crate) const E1000_CTRL_SWDPIN0: u32 = 262144;
pub(crate) const E1000_CTRL_SWDPIN1: u32 = 524288;
pub(crate) const E1000_CTRL_SWDPIN2: u32 = 1048576;
pub(crate) const E1000_CTRL_SWDPIN3: u32 = 2097152;
pub(crate) const E1000_CTRL_SWDPIO0: u32 = 4194304;
pub(crate) const E1000_CTRL_SWDPIO1: u32 = 8388608;
pub(crate) const E1000_CTRL_SWDPIO2: u32 = 16777216;
pub(crate) const E1000_CTRL_SWDPIO3: u32 = 33554432;
pub(crate) const E1000_CTRL_RST: u32 = 67108864;
pub(crate) const E1000_CTRL_RFCE: u32 = 134217728;
pub(crate) const E1000_CTRL_TFCE: u32 = 268435456;
pub(crate) const E1000_CTRL_RTE: u32 = 536870912;
pub(crate) const E1000_CTRL_VME: u32 = 1073741824;
pub(crate) const E1000_CTRL_PHY_RST: u32 = 2147483648;
pub(crate) const E1000_CTRL_SW2FW_INT: u32 = 33554432;
pub(crate) const E1000_STATUS_FD: u32 = 1;
pub(crate) const E1000_STATUS_LU: u32 = 2;
pub(crate) const E1000_STATUS_FUNC_MASK: u32 = 12;
pub(crate) const E1000_STATUS_FUNC_SHIFT: u32 = 2;
pub(crate) const E1000_STATUS_FUNC_0: u32 = 0;
pub(crate) const E1000_STATUS_FUNC_1: u32 = 4;
pub(crate) const E1000_STATUS_TXOFF: u32 = 16;
pub(crate) const E1000_STATUS_TBIMODE: u32 = 32;
pub(crate) const E1000_STATUS_SPEED_MASK: u32 = 192;
pub(crate) const E1000_STATUS_SPEED_10: u32 = 0;
pub(crate) const E1000_STATUS_SPEED_100: u32 = 64;
pub(crate) const E1000_STATUS_SPEED_1000: u32 = 128;
pub(crate) const E1000_STATUS_LAN_INIT_DONE: u32 = 512;
pub(crate) const E1000_STATUS_ASDV: u32 = 768;
pub(crate) const E1000_STATUS_DOCK_CI: u32 = 2048;
pub(crate) const E1000_STATUS_GIO_MASTER_ENABLE: u32 = 524288;
pub(crate) const E1000_STATUS_MTXCKOK: u32 = 1024;
pub(crate) const E1000_STATUS_PCI66: u32 = 2048;
pub(crate) const E1000_STATUS_BUS64: u32 = 4096;
pub(crate) const E1000_STATUS_PCIX_MODE: u32 = 8192;
pub(crate) const E1000_STATUS_PCIX_SPEED: u32 = 49152;
pub(crate) const E1000_STATUS_BMC_SKU_0: u32 = 1048576;
pub(crate) const E1000_STATUS_BMC_SKU_1: u32 = 2097152;
pub(crate) const E1000_STATUS_BMC_SKU_2: u32 = 4194304;
pub(crate) const E1000_STATUS_BMC_CRYPTO: u32 = 8388608;
pub(crate) const E1000_STATUS_BMC_LITE: u32 = 16777216;
pub(crate) const E1000_STATUS_RGMII_ENABLE: u32 = 33554432;
pub(crate) const E1000_STATUS_FUSE_8: u32 = 67108864;
pub(crate) const E1000_STATUS_FUSE_9: u32 = 134217728;
pub(crate) const E1000_STATUS_SERDES0_DIS: u32 = 268435456;
pub(crate) const E1000_STATUS_SERDES1_DIS: u32 = 536870912;
pub(crate) const E1000_STATUS_PCIX_SPEED_66: u32 = 0;
pub(crate) const E1000_STATUS_PCIX_SPEED_100: u32 = 16384;
pub(crate) const E1000_STATUS_PCIX_SPEED_133: u32 = 32768;
pub(crate) const E1000_EECD_SK: u32 = 1;
pub(crate) const E1000_EECD_CS: u32 = 2;
pub(crate) const E1000_EECD_DI: u32 = 4;
pub(crate) const E1000_EECD_DO: u32 = 8;
pub(crate) const E1000_EECD_FWE_MASK: u32 = 48;
pub(crate) const E1000_EECD_FWE_DIS: u32 = 16;
pub(crate) const E1000_EECD_FWE_EN: u32 = 32;
pub(crate) const E1000_EECD_FWE_SHIFT: u32 = 4;
pub(crate) const E1000_EECD_REQ: u32 = 64;
pub(crate) const E1000_EECD_GNT: u32 = 128;
pub(crate) const E1000_EECD_PRES: u32 = 256;
pub(crate) const E1000_EECD_SIZE: u32 = 512;
pub(crate) const E1000_EECD_ADDR_BITS: u32 = 1024;
pub(crate) const E1000_EECD_TYPE: u32 = 8192;
pub(crate) const E1000_EEPROM_GRANT_ATTEMPTS: u32 = 1000;
pub(crate) const E1000_EECD_AUTO_RD: u32 = 512;
pub(crate) const E1000_EECD_SIZE_EX_MASK: u32 = 30720;
pub(crate) const E1000_EECD_SIZE_EX_SHIFT: u32 = 11;
pub(crate) const E1000_EECD_NVADDS: u32 = 98304;
pub(crate) const E1000_EECD_SELSHAD: u32 = 131072;
pub(crate) const E1000_EECD_INITSRAM: u32 = 262144;
pub(crate) const E1000_EECD_FLUPD: u32 = 524288;
pub(crate) const E1000_EECD_AUPDEN: u32 = 1048576;
pub(crate) const E1000_EECD_SHADV: u32 = 2097152;
pub(crate) const E1000_EECD_SEC1VAL: u32 = 4194304;
pub(crate) const E1000_EECD_SECVAL_SHIFT: u32 = 22;
pub(crate) const E1000_STM_OPCODE: u32 = 56064;
pub(crate) const E1000_HICR_FW_RESET: u32 = 192;
pub(crate) const E1000_SHADOW_RAM_WORDS: u32 = 2048;
pub(crate) const E1000_ICH_NVM_SIG_WORD: u32 = 19;
pub(crate) const E1000_ICH_NVM_SIG_MASK: u32 = 192;
pub(crate) const E1000_EERD_START: u32 = 1;
pub(crate) const E1000_EERD_DONE: u32 = 16;
pub(crate) const E1000_EERD_ADDR_SHIFT: u32 = 8;
pub(crate) const E1000_EERD_ADDR_MASK: u32 = 65280;
pub(crate) const E1000_EERD_DATA_SHIFT: u32 = 16;
pub(crate) const E1000_EERD_DATA_MASK: u32 = 4294901760;
pub(crate) const EEPROM_STATUS_RDY_SPI: u32 = 1;
pub(crate) const EEPROM_STATUS_WEN_SPI: u32 = 2;
pub(crate) const EEPROM_STATUS_BP0_SPI: u32 = 4;
pub(crate) const EEPROM_STATUS_BP1_SPI: u32 = 8;
pub(crate) const EEPROM_STATUS_WPEN_SPI: u32 = 128;
pub(crate) const E1000_CTRL_EXT_GPI0_EN: u32 = 1;
pub(crate) const E1000_CTRL_EXT_GPI1_EN: u32 = 2;
pub(crate) const E1000_CTRL_EXT_PHYINT_EN: u32 = 2;
pub(crate) const E1000_CTRL_EXT_GPI2_EN: u32 = 4;
pub(crate) const E1000_CTRL_EXT_GPI3_EN: u32 = 8;
pub(crate) const E1000_CTRL_EXT_SDP4_DATA: u32 = 16;
pub(crate) const E1000_CTRL_EXT_SDP5_DATA: u32 = 32;
pub(crate) const E1000_CTRL_EXT_PHY_INT: u32 = 32;
pub(crate) const E1000_CTRL_EXT_SDP6_DATA: u32 = 64;
pub(crate) const E1000_CTRL_EXT_SDP7_DATA: u32 = 128;
pub(crate) const E1000_CTRL_EXT_SDP4_DIR: u32 = 256;
pub(crate) const E1000_CTRL_EXT_SDP5_DIR: u32 = 512;
pub(crate) const E1000_CTRL_EXT_SDP6_DIR: u32 = 1024;
pub(crate) const E1000_CTRL_EXT_SDP7_DIR: u32 = 2048;
pub(crate) const E1000_CTRL_EXT_ASDCHK: u32 = 4096;
pub(crate) const E1000_CTRL_EXT_EE_RST: u32 = 8192;
pub(crate) const E1000_CTRL_EXT_IPS: u32 = 16384;
pub(crate) const E1000_CTRL_EXT_SPD_BYPS: u32 = 32768;
pub(crate) const E1000_CTRL_EXT_RO_DIS: u32 = 131072;
pub(crate) const E1000_CTRL_EXT_LINK_MODE_MASK: u32 = 12582912;
pub(crate) const E1000_CTRL_EXT_LINK_MODE_GMII: u32 = 0;
pub(crate) const E1000_CTRL_EXT_LINK_MODE_TBI: u32 = 12582912;
pub(crate) const E1000_CTRL_EXT_LINK_MODE_KMRN: u32 = 0;
pub(crate) const E1000_CTRL_EXT_LINK_MODE_SERDES: u32 = 12582912;
pub(crate) const E1000_CTRL_EXT_LINK_MODE_SGMII: u32 = 8388608;
pub(crate) const E1000_CTRL_EXT_WR_WMARK_MASK: u32 = 50331648;
pub(crate) const E1000_CTRL_EXT_WR_WMARK_256: u32 = 0;
pub(crate) const E1000_CTRL_EXT_WR_WMARK_320: u32 = 16777216;
pub(crate) const E1000_CTRL_EXT_WR_WMARK_384: u32 = 33554432;
pub(crate) const E1000_CTRL_EXT_WR_WMARK_448: u32 = 50331648;
pub(crate) const E1000_CTRL_EXT_DRV_LOAD: u32 = 268435456;
pub(crate) const E1000_CTRL_EXT_IAME: u32 = 134217728;
pub(crate) const E1000_CTRL_EXT_INT_TIMER_CLR: u32 = 536870912;
pub(crate) const E1000_CRTL_EXT_PB_PAREN: u32 = 16777216;
pub(crate) const E1000_CTRL_EXT_DF_PAREN: u32 = 33554432;
pub(crate) const E1000_CTRL_EXT_GHOST_PAREN: u32 = 1073741824;
pub(crate) const E1000_MDIC_DATA_MASK: u32 = 65535;
pub(crate) const E1000_MDIC_REG_MASK: u32 = 2031616;
pub(crate) const E1000_MDIC_REG_SHIFT: u32 = 16;
pub(crate) const E1000_MDIC_PHY_MASK: u32 = 65011712;
pub(crate) const E1000_MDIC_PHY_SHIFT: u32 = 21;
pub(crate) const E1000_MDIC_OP_WRITE: u32 = 67108864;
pub(crate) const E1000_MDIC_OP_READ: u32 = 134217728;
pub(crate) const E1000_MDIC_READY: u32 = 268435456;
pub(crate) const E1000_MDIC_INT_EN: u32 = 536870912;
pub(crate) const E1000_MDIC_ERROR: u32 = 1073741824;
pub(crate) const INTEL_CE_GBE_MDIC_OP_WRITE: u32 = 67108864;
pub(crate) const INTEL_CE_GBE_MDIC_OP_READ: u32 = 0;
pub(crate) const INTEL_CE_GBE_MDIC_GO: u32 = 2147483648;
pub(crate) const INTEL_CE_GBE_MDIC_READ_ERROR: u32 = 2147483648;
pub(crate) const E1000_KUMCTRLSTA_MASK: u32 = 65535;
pub(crate) const E1000_KUMCTRLSTA_OFFSET: u32 = 2031616;
pub(crate) const E1000_KUMCTRLSTA_OFFSET_SHIFT: u32 = 16;
pub(crate) const E1000_KUMCTRLSTA_REN: u32 = 2097152;
pub(crate) const E1000_KUMCTRLSTA_OFFSET_FIFO_CTRL: u32 = 0;
pub(crate) const E1000_KUMCTRLSTA_OFFSET_CTRL: u32 = 1;
pub(crate) const E1000_KUMCTRLSTA_OFFSET_INB_CTRL: u32 = 2;
pub(crate) const E1000_KUMCTRLSTA_OFFSET_DIAG: u32 = 3;
pub(crate) const E1000_KUMCTRLSTA_OFFSET_TIMEOUTS: u32 = 4;
pub(crate) const E1000_KUMCTRLSTA_OFFSET_INB_PARAM: u32 = 9;
pub(crate) const E1000_KUMCTRLSTA_OFFSET_HD_CTRL: u32 = 16;
pub(crate) const E1000_KUMCTRLSTA_OFFSET_M2P_SERDES: u32 = 30;
pub(crate) const E1000_KUMCTRLSTA_OFFSET_M2P_MODES: u32 = 31;
pub(crate) const E1000_KUMCTRLSTA_FIFO_CTRL_RX_BYPASS: u32 = 8;
pub(crate) const E1000_KUMCTRLSTA_FIFO_CTRL_TX_BYPASS: u32 = 2048;
pub(crate) const E1000_KUMCTRLSTA_INB_CTRL_LINK_STATUS_TX_TIMEOUT_DEFAULT: u32 = 1280;
pub(crate) const E1000_KUMCTRLSTA_INB_CTRL_DIS_PADDING: u32 = 16;
pub(crate) const E1000_KUMCTRLSTA_HD_CTRL_10_100_DEFAULT: u32 = 4;
pub(crate) const E1000_KUMCTRLSTA_HD_CTRL_1000_DEFAULT: u32 = 0;
pub(crate) const E1000_KUMCTRLSTA_OFFSET_K0S_CTRL: u32 = 30;
pub(crate) const E1000_KUMCTRLSTA_DIAG_FELPBK: u32 = 8192;
pub(crate) const E1000_KUMCTRLSTA_DIAG_NELPBK: u32 = 4096;
pub(crate) const E1000_KUMCTRLSTA_K0S_100_EN: u32 = 8192;
pub(crate) const E1000_KUMCTRLSTA_K0S_GBE_EN: u32 = 4096;
pub(crate) const E1000_KUMCTRLSTA_K0S_ENTRY_LATENCY_MASK: u32 = 3;
pub(crate) const E1000_KABGTXD_BGSQLBIAS: u32 = 327680;
pub(crate) const E1000_PHY_CTRL_SPD_EN: u32 = 1;
pub(crate) const E1000_PHY_CTRL_D0A_LPLU: u32 = 2;
pub(crate) const E1000_PHY_CTRL_NOND0A_LPLU: u32 = 4;
pub(crate) const E1000_PHY_CTRL_NOND0A_GBE_DISABLE: u32 = 8;
pub(crate) const E1000_PHY_CTRL_GBE_DISABLE: u32 = 64;
pub(crate) const E1000_PHY_CTRL_B2B_EN: u32 = 128;
pub(crate) const E1000_LEDCTL_LED0_MODE_MASK: u32 = 15;
pub(crate) const E1000_LEDCTL_LED0_MODE_SHIFT: u32 = 0;
pub(crate) const E1000_LEDCTL_LED0_BLINK_RATE: u32 = 32;
pub(crate) const E1000_LEDCTL_LED0_IVRT: u32 = 64;
pub(crate) const E1000_LEDCTL_LED0_BLINK: u32 = 128;
pub(crate) const E1000_LEDCTL_LED1_MODE_MASK: u32 = 3840;
pub(crate) const E1000_LEDCTL_LED1_MODE_SHIFT: u32 = 8;
pub(crate) const E1000_LEDCTL_LED1_BLINK_RATE: u32 = 8192;
pub(crate) const E1000_LEDCTL_LED1_IVRT: u32 = 16384;
pub(crate) const E1000_LEDCTL_LED1_BLINK: u32 = 32768;
pub(crate) const E1000_LEDCTL_LED2_MODE_MASK: u32 = 983040;
pub(crate) const E1000_LEDCTL_LED2_MODE_SHIFT: u32 = 16;
pub(crate) const E1000_LEDCTL_LED2_BLINK_RATE: u32 = 2097152;
pub(crate) const E1000_LEDCTL_LED2_IVRT: u32 = 4194304;
pub(crate) const E1000_LEDCTL_LED2_BLINK: u32 = 8388608;
pub(crate) const E1000_LEDCTL_LED3_MODE_MASK: u32 = 251658240;
pub(crate) const E1000_LEDCTL_LED3_MODE_SHIFT: u32 = 24;
pub(crate) const E1000_LEDCTL_LED3_BLINK_RATE: u32 = 536870912;
pub(crate) const E1000_LEDCTL_LED3_IVRT: u32 = 1073741824;
pub(crate) const E1000_LEDCTL_LED3_BLINK: u32 = 2147483648;
pub(crate) const E1000_LEDCTL_MODE_LINK_10_1000: u32 = 0;
pub(crate) const E1000_LEDCTL_MODE_LINK_100_1000: u32 = 1;
pub(crate) const E1000_LEDCTL_MODE_LINK_UP: u32 = 2;
pub(crate) const E1000_LEDCTL_MODE_ACTIVITY: u32 = 3;
pub(crate) const E1000_LEDCTL_MODE_LINK_ACTIVITY: u32 = 4;
pub(crate) const E1000_LEDCTL_MODE_LINK_10: u32 = 5;
pub(crate) const E1000_LEDCTL_MODE_LINK_100: u32 = 6;
pub(crate) const E1000_LEDCTL_MODE_LINK_1000: u32 = 7;
pub(crate) const E1000_LEDCTL_MODE_PCIX_MODE: u32 = 8;
pub(crate) const E1000_LEDCTL_MODE_FULL_DUPLEX: u32 = 9;
pub(crate) const E1000_LEDCTL_MODE_COLLISION: u32 = 10;
pub(crate) const E1000_LEDCTL_MODE_BUS_SPEED: u32 = 11;
pub(crate) const E1000_LEDCTL_MODE_BUS_SIZE: u32 = 12;
pub(crate) const E1000_LEDCTL_MODE_PAUSED: u32 = 13;
pub(crate) const E1000_LEDCTL_MODE_LED_ON: u32 = 14;
pub(crate) const E1000_LEDCTL_MODE_LED_OFF: u32 = 15;
pub(crate) const E1000_RAH_AV: u32 = 2147483648;
pub(crate) const E1000_ICR_TXDW: u32 = 1;
pub(crate) const E1000_ICR_TXQE: u32 = 2;
pub(crate) const E1000_ICR_LSC: u32 = 4;
pub(crate) const E1000_ICR_RXSEQ: u32 = 8;
pub(crate) const E1000_ICR_RXDMT0: u32 = 16;
pub(crate) const E1000_ICR_RXO: u32 = 64;
pub(crate) const E1000_ICR_RXT0: u32 = 128;
pub(crate) const E1000_ICR_MDAC: u32 = 512;
pub(crate) const E1000_ICR_RXCFG: u32 = 1024;
pub(crate) const E1000_ICR_GPI_EN0: u32 = 2048;
pub(crate) const E1000_ICR_GPI_EN1: u32 = 4096;
pub(crate) const E1000_ICR_GPI_EN2: u32 = 8192;
pub(crate) const E1000_ICR_GPI_EN3: u32 = 16384;
pub(crate) const E1000_ICR_TXD_LOW: u32 = 32768;
pub(crate) const E1000_ICR_SRPD: u32 = 65536;
pub(crate) const E1000_ICR_ACK: u32 = 131072;
pub(crate) const E1000_ICR_MNG: u32 = 262144;
pub(crate) const E1000_ICR_DOCK: u32 = 524288;
pub(crate) const E1000_ICR_INT_ASSERTED: u32 = 2147483648;
pub(crate) const E1000_ICR_RXD_FIFO_PAR0: u32 = 1048576;
pub(crate) const E1000_ICR_TXD_FIFO_PAR0: u32 = 2097152;
pub(crate) const E1000_ICR_HOST_ARB_PAR: u32 = 4194304;
pub(crate) const E1000_ICR_PB_PAR: u32 = 8388608;
pub(crate) const E1000_ICR_RXD_FIFO_PAR1: u32 = 16777216;
pub(crate) const E1000_ICR_TXD_FIFO_PAR1: u32 = 33554432;
pub(crate) const E1000_ICR_ALL_PARITY: u32 = 66060288;
pub(crate) const E1000_ICR_DSW: u32 = 32;
pub(crate) const E1000_ICR_PHYINT: u32 = 4096;
pub(crate) const E1000_ICR_EPRST: u32 = 1048576;
pub(crate) const E1000_ICS_TXDW: u32 = 1;
pub(crate) const E1000_ICS_TXQE: u32 = 2;
pub(crate) const E1000_ICS_LSC: u32 = 4;
pub(crate) const E1000_ICS_RXSEQ: u32 = 8;
pub(crate) const E1000_ICS_RXDMT0: u32 = 16;
pub(crate) const E1000_ICS_RXO: u32 = 64;
pub(crate) const E1000_ICS_RXT0: u32 = 128;
pub(crate) const E1000_ICS_MDAC: u32 = 512;
pub(crate) const E1000_ICS_RXCFG: u32 = 1024;
pub(crate) const E1000_ICS_GPI_EN0: u32 = 2048;
pub(crate) const E1000_ICS_GPI_EN1: u32 = 4096;
pub(crate) const E1000_ICS_GPI_EN2: u32 = 8192;
pub(crate) const E1000_ICS_GPI_EN3: u32 = 16384;
pub(crate) const E1000_ICS_TXD_LOW: u32 = 32768;
pub(crate) const E1000_ICS_SRPD: u32 = 65536;
pub(crate) const E1000_ICS_ACK: u32 = 131072;
pub(crate) const E1000_ICS_MNG: u32 = 262144;
pub(crate) const E1000_ICS_DOCK: u32 = 524288;
pub(crate) const E1000_ICS_RXD_FIFO_PAR0: u32 = 1048576;
pub(crate) const E1000_ICS_TXD_FIFO_PAR0: u32 = 2097152;
pub(crate) const E1000_ICS_HOST_ARB_PAR: u32 = 4194304;
pub(crate) const E1000_ICS_PB_PAR: u32 = 8388608;
pub(crate) const E1000_ICS_RXD_FIFO_PAR1: u32 = 16777216;
pub(crate) const E1000_ICS_TXD_FIFO_PAR1: u32 = 33554432;
pub(crate) const E1000_ICS_DSW: u32 = 32;
pub(crate) const E1000_ICS_PHYINT: u32 = 4096;
pub(crate) const E1000_ICS_EPRST: u32 = 1048576;
pub(crate) const E1000_IMS_TXDW: u32 = 1;
pub(crate) const E1000_IMS_TXQE: u32 = 2;
pub(crate) const E1000_IMS_LSC: u32 = 4;
pub(crate) const E1000_IMS_RXSEQ: u32 = 8;
pub(crate) const E1000_IMS_RXDMT0: u32 = 16;
pub(crate) const E1000_IMS_RXO: u32 = 64;
pub(crate) const E1000_IMS_RXT0: u32 = 128;
pub(crate) const E1000_IMS_MDAC: u32 = 512;
pub(crate) const E1000_IMS_RXCFG: u32 = 1024;
pub(crate) const E1000_IMS_GPI_EN0: u32 = 2048;
pub(crate) const E1000_IMS_GPI_EN1: u32 = 4096;
pub(crate) const E1000_IMS_GPI_EN2: u32 = 8192;
pub(crate) const E1000_IMS_GPI_EN3: u32 = 16384;
pub(crate) const E1000_IMS_TXD_LOW: u32 = 32768;
pub(crate) const E1000_IMS_SRPD: u32 = 65536;
pub(crate) const E1000_IMS_ACK: u32 = 131072;
pub(crate) const E1000_IMS_MNG: u32 = 262144;
pub(crate) const E1000_IMS_DOCK: u32 = 524288;
pub(crate) const E1000_IMS_RXD_FIFO_PAR0: u32 = 1048576;
pub(crate) const E1000_IMS_TXD_FIFO_PAR0: u32 = 2097152;
pub(crate) const E1000_IMS_HOST_ARB_PAR: u32 = 4194304;
pub(crate) const E1000_IMS_PB_PAR: u32 = 8388608;
pub(crate) const E1000_IMS_RXD_FIFO_PAR1: u32 = 16777216;
pub(crate) const E1000_IMS_TXD_FIFO_PAR1: u32 = 33554432;
pub(crate) const E1000_IMS_DSW: u32 = 32;
pub(crate) const E1000_IMS_PHYINT: u32 = 4096;
pub(crate) const E1000_IMS_EPRST: u32 = 1048576;
pub(crate) const E1000_IMC_TXDW: u32 = 1;
pub(crate) const E1000_IMC_TXQE: u32 = 2;
pub(crate) const E1000_IMC_LSC: u32 = 4;
pub(crate) const E1000_IMC_RXSEQ: u32 = 8;
pub(crate) const E1000_IMC_RXDMT0: u32 = 16;
pub(crate) const E1000_IMC_RXO: u32 = 64;
pub(crate) const E1000_IMC_RXT0: u32 = 128;
pub(crate) const E1000_IMC_MDAC: u32 = 512;
pub(crate) const E1000_IMC_RXCFG: u32 = 1024;
pub(crate) const E1000_IMC_GPI_EN0: u32 = 2048;
pub(crate) const E1000_IMC_GPI_EN1: u32 = 4096;
pub(crate) const E1000_IMC_GPI_EN2: u32 = 8192;
pub(crate) const E1000_IMC_GPI_EN3: u32 = 16384;
pub(crate) const E1000_IMC_TXD_LOW: u32 = 32768;
pub(crate) const E1000_IMC_SRPD: u32 = 65536;
pub(crate) const E1000_IMC_ACK: u32 = 131072;
pub(crate) const E1000_IMC_MNG: u32 = 262144;
pub(crate) const E1000_IMC_DOCK: u32 = 524288;
pub(crate) const E1000_IMC_RXD_FIFO_PAR0: u32 = 1048576;
pub(crate) const E1000_IMC_TXD_FIFO_PAR0: u32 = 2097152;
pub(crate) const E1000_IMC_HOST_ARB_PAR: u32 = 4194304;
pub(crate) const E1000_IMC_PB_PAR: u32 = 8388608;
pub(crate) const E1000_IMC_RXD_FIFO_PAR1: u32 = 16777216;
pub(crate) const E1000_IMC_TXD_FIFO_PAR1: u32 = 33554432;
pub(crate) const E1000_IMC_DSW: u32 = 32;
pub(crate) const E1000_IMC_PHYINT: u32 = 4096;
pub(crate) const E1000_IMC_EPRST: u32 = 1048576;
pub(crate) const E1000_RCTL_RST: u32 = 1;
pub(crate) const E1000_RCTL_EN: u32 = 2;
pub(crate) const E1000_RCTL_SBP: u32 = 4;
pub(crate) const E1000_RCTL_UPE: u32 = 8;
pub(crate) const E1000_RCTL_MPE: u32 = 16;