diff --git a/CHANGELOG.md b/CHANGELOG.md index 30a8a1a5..5bbf0330 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,5 +1,10 @@ # Changelog +## 0.15.0 (TBD) + +* **Gpio**: (Breaking change) Rename `PullUpDown` enum to `Bias`, and `set_pullupdown` to `set_bias`. +* **Gpio**: (Breaking change) Add support for new modes `Alt6`, `Alt7` and `Alt8`. + ## 0.14.1 (November 25, 2022) * **Gpio**: Fix subtract underflow panic in software-based PWM. diff --git a/src/gpio.rs b/src/gpio.rs index 15a0abaf..eea2d942 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -298,18 +298,18 @@ impl Not for Level { /// Built-in pull-up/pull-down resistor states. #[derive(Debug, PartialEq, Eq, Copy, Clone)] -pub enum PullUpDown { +pub enum Bias { Off = 0b00, PullDown = 0b01, PullUp = 0b10, } -impl fmt::Display for PullUpDown { +impl fmt::Display for Bias { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { match *self { - PullUpDown::Off => write!(f, "Off"), - PullUpDown::PullDown => write!(f, "PullDown"), - PullUpDown::PullUp => write!(f, "PullUp"), + Bias::Off => write!(f, "Off"), + Bias::PullDown => write!(f, "PullDown"), + Bias::PullUp => write!(f, "PullUp"), } } } diff --git a/src/gpio/gpiomem.rs b/src/gpio/gpiomem.rs index f6ba78b6..189a7be2 100644 --- a/src/gpio/gpiomem.rs +++ b/src/gpio/gpiomem.rs @@ -1,4 +1,4 @@ -use crate::gpio::{Level, Mode, PullUpDown}; +use crate::gpio::{Bias, Level, Mode}; pub mod bcm; pub mod rp1; @@ -9,5 +9,5 @@ pub(crate) trait GpioRegisters: std::fmt::Debug + Sync + Send { fn level(&self, pin: u8) -> Level; fn mode(&self, pin: u8) -> Mode; fn set_mode(&self, pin: u8, mode: Mode); - fn set_pullupdown(&self, pin: u8, pud: PullUpDown); + fn set_bias(&self, pin: u8, bias: Bias); } diff --git a/src/gpio/gpiomem/bcm.rs b/src/gpio/gpiomem/bcm.rs index 2b684147..63f9cebb 100644 --- a/src/gpio/gpiomem/bcm.rs +++ b/src/gpio/gpiomem/bcm.rs @@ -11,7 +11,7 @@ use std::time::Duration; use libc::{self, c_void, off_t, size_t, MAP_FAILED, MAP_SHARED, O_SYNC, PROT_READ, PROT_WRITE}; use crate::gpio::gpiomem::GpioRegisters; -use crate::gpio::{Error, Level, Mode, PullUpDown, Result}; +use crate::gpio::{Bias, Error, Level, Mode, Result}; use crate::system::{DeviceInfo, SoC}; const PATH_DEV_GPIOMEM: &str = "/dev/gpiomem"; @@ -248,7 +248,7 @@ impl GpioRegisters for GpioMem { self.locks[offset].store(false, Ordering::SeqCst); } - fn set_pullupdown(&self, pin: u8, pud: PullUpDown) { + fn set_bias(&self, pin: u8, bias: Bias) { // Offset for register. let offset: usize; // Bit shift for pin position within register value. @@ -263,10 +263,10 @@ impl GpioRegisters for GpioMem { let lock = GPPUD_CNTRL_REG0 + pin as usize / 32; // Pull up vs pull down has a reverse bit pattern on BCM2711 vs others. - let pud = match pud { - PullUpDown::Off => 0b00u32, - PullUpDown::PullDown => 0b10, - PullUpDown::PullUp => 0b01, + let pud = match bias { + Bias::Off => 0b00u32, + Bias::PullDown => 0b10, + Bias::PullUp => 0b01, }; loop { @@ -304,7 +304,7 @@ impl GpioRegisters for GpioMem { // Set the control signal in GPPUD. let reg_value = self.read(GPPUD); - self.write(GPPUD, (reg_value & !0b11) | ((pud as u32) & 0b11)); + self.write(GPPUD, (reg_value & !0b11) | ((bias as u32) & 0b11)); // The datasheet mentions waiting at least 150 cycles for set-up and hold, but // doesn't state which clock is used. This is likely the VPU clock (see diff --git a/src/gpio/gpiomem/rp1.rs b/src/gpio/gpiomem/rp1.rs index 511162fc..6dafe6f3 100644 --- a/src/gpio/gpiomem/rp1.rs +++ b/src/gpio/gpiomem/rp1.rs @@ -7,7 +7,7 @@ use std::ptr; use libc::{self, c_void, size_t, MAP_FAILED, MAP_SHARED, O_SYNC, PROT_READ, PROT_WRITE}; -use crate::gpio::{Error, Level, Mode, PullUpDown, Result}; +use crate::gpio::{Bias, Error, Level, Mode, Result}; use crate::system::{DeviceInfo, SoC}; use super::GpioRegisters; @@ -151,7 +151,7 @@ impl GpioRegisters for GpioMem { unimplemented!() } - fn set_pullupdown(&self, pin: u8, pud: PullUpDown) { + fn set_bias(&self, pin: u8, bias: Bias) { unimplemented!() } } diff --git a/src/gpio/pin.rs b/src/gpio/pin.rs index 2c5abc29..ee5820ca 100644 --- a/src/gpio/pin.rs +++ b/src/gpio/pin.rs @@ -4,7 +4,7 @@ use std::sync::Arc; use std::time::Duration; use super::soft_pwm::SoftPwm; -use crate::gpio::{interrupt::AsyncInterrupt, GpioState, Level, Mode, PullUpDown, Result, Trigger}; +use crate::gpio::{interrupt::AsyncInterrupt, Bias, GpioState, Level, Mode, Result, Trigger}; const NANOS_PER_SEC: f64 = 1_000_000_000.0; @@ -207,8 +207,8 @@ macro_rules! impl_drop { self.pin.set_mode(prev_mode); } - if self.pud_mode != PullUpDown::Off { - self.pin.set_pullupdown(PullUpDown::Off); + if self.bias != Bias::Off { + self.pin.set_bias(Bias::Off); } } } @@ -296,7 +296,7 @@ impl Pin { /// [`Input`]: enum.Mode.html#variant.Input #[inline] pub fn into_input(self) -> InputPin { - InputPin::new(self, PullUpDown::Off) + InputPin::new(self, Bias::Off) } /// Consumes the `Pin` and returns an [`InputPin`]. Sets the mode to [`Input`] @@ -310,7 +310,7 @@ impl Pin { /// [`reset_on_drop`]: struct.InputPin.html#method.set_reset_on_drop #[inline] pub fn into_input_pulldown(self) -> InputPin { - InputPin::new(self, PullUpDown::PullDown) + InputPin::new(self, Bias::PullDown) } /// Consumes the `Pin` and returns an [`InputPin`]. Sets the mode to [`Input`] @@ -324,7 +324,7 @@ impl Pin { /// [`reset_on_drop`]: struct.InputPin.html#method.set_reset_on_drop #[inline] pub fn into_input_pullup(self) -> InputPin { - InputPin::new(self, PullUpDown::PullUp) + InputPin::new(self, Bias::PullUp) } /// Consumes the `Pin` and returns an [`OutputPin`]. Sets the mode to [`Mode::Output`] @@ -367,8 +367,8 @@ impl Pin { } #[inline] - pub(crate) fn set_pullupdown(&mut self, pud: PullUpDown) { - self.gpio_state.gpio_mem.set_pullupdown(self.pin, pud); + pub(crate) fn set_bias(&mut self, bias: Bias) { + self.gpio_state.gpio_mem.set_bias(self.pin, bias); } #[inline] @@ -424,11 +424,11 @@ pub struct InputPin { prev_mode: Option, async_interrupt: Option, reset_on_drop: bool, - pud_mode: PullUpDown, + bias: Bias, } impl InputPin { - pub(crate) fn new(mut pin: Pin, pud_mode: PullUpDown) -> InputPin { + pub(crate) fn new(mut pin: Pin, bias: Bias) -> InputPin { let prev_mode = pin.mode(); let prev_mode = if prev_mode == Mode::Input { @@ -438,14 +438,14 @@ impl InputPin { Some(prev_mode) }; - pin.set_pullupdown(pud_mode); + pin.set_bias(bias); InputPin { pin, prev_mode, async_interrupt: None, reset_on_drop: true, - pud_mode, + bias, } } @@ -578,7 +578,7 @@ pub struct OutputPin { pin: Pin, prev_mode: Option, reset_on_drop: bool, - pud_mode: PullUpDown, + bias: Bias, pub(crate) soft_pwm: Option, // Stores the softpwm frequency. Used for embedded_hal::PwmPin. #[cfg(feature = "hal")] @@ -603,7 +603,7 @@ impl OutputPin { pin, prev_mode, reset_on_drop: true, - pud_mode: PullUpDown::Off, + bias: Bias::Off, soft_pwm: None, #[cfg(feature = "hal")] frequency: 0.0, @@ -671,7 +671,7 @@ pub struct IoPin { mode: Mode, prev_mode: Option, reset_on_drop: bool, - pud_mode: PullUpDown, + bias: Bias, pub(crate) soft_pwm: Option, // Stores the softpwm frequency. Used for embedded_hal::PwmPin. #[cfg(feature = "hal")] @@ -697,7 +697,7 @@ impl IoPin { mode, prev_mode, reset_on_drop: true, - pud_mode: PullUpDown::Off, + bias: Bias::Off, soft_pwm: None, #[cfg(feature = "hal")] frequency: 0.0, @@ -730,9 +730,9 @@ impl IoPin { /// Configures the built-in pull-up/pull-down resistors. #[inline] - pub fn set_pullupdown(&mut self, pud: PullUpDown) { - self.pin.set_pullupdown(pud); - self.pud_mode = pud; + pub fn set_bias(&mut self, bias: Bias) { + self.pin.set_bias(bias); + self.bias = bias; } impl_input!();