ElyisanVMU FPGA is an incomplete implementation of the Sega Dreamcast's Visual Memory Unit in VHDL, based on the ElysianVMU emulator (written in C). This project was originally created as an end-of-semester project for a graduate-level FPGA course and is no longer maintained due to the fact that I simply don't have the time to complete it.
The initial scope was only to finish the CPU core and memory BUSes, so there is no implementation for peripherals such as the timers, interrupt controller, or serial interface.
I have received many emails and messages regarding the state of the project and FPGA implementations of the VMU in general. I would love to see the device get the FPGA core it deserves, and despite the incompleteness of this codebase, I would be more than happy to offer help, guidance, and resources on the VMU and its architecture. Furthermore, I'll make sure you have access to the latest ElysianVMU C codebase to reference.