is_array API to pyHDLParser

[michael-etzkorn]

I was reviewing hdl/pyHDLParser#10 which looked to fix something here in Symbolator with is_array not working. But I believe @kammoh's change more suitably belongs here. is_array expects a string so perhaps the following code should be passing in p.data_type.name?

symbolator/symbolator.py

Line 306 in 3f02d90

bus = extractor.is_array(p.data_type)

[michael-etzkorn]

Actually, this seems to be working just fine? At least, for my test, data_type seems to be a string here.

However, there's a similar issue with .replace expecting a string when it doesn't seem to be a string on this line for some test input:
https://github.com/hdl/symbolator/blob/main/symbolator.py#L462

My test code:

package foobar is 
type custom_array is array(integer range <>) of boolean;
subtype custom_subtype is custom_array(1 to 10);


  component FA is
    port (a, b, c_in: in custom_array;
              s, c_out: out std_logic);
  end component;

end package; 

Change I had to make for output:

def reformat_array_params(vo):
  '''Convert array ranges to Verilog style'''
  for p in vo.ports:
    # Replace VHDL downto and to
-   data_type = p.data_type.replace(' downto ', ':').replace(' to ', '\u2799')
+   data_type = p.data_type.name.replace(' downto ', ':').replace(' to ', '\u2799')
    # Convert to Verilog style array syntax
    data_type = re.sub(r'([^(]+)\((.*)\)$', r'\1[\2]', data_type)

I imagine there's input that breaks data_type passed into is_array in make_section for a similar dynamic typing reason. I'll leave @kammoh to explain the is_array failure further. I get correct is_array output with this test case.