{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":469080934,"defaultBranch":"main","name":"Validation-Microcontroller-CPU-SystemVerilog","ownerLogin":"ihsanalhafiz","currentUserCanPush":false,"isFork":false,"isEmpty":false,"createdAt":"2022-03-12T12:48:53.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/14932642?v=4","public":true,"private":false,"isOrgOwned":false},"refInfo":{"name":"","listCacheKey":"v0:1663943972.574816","currentOid":""},"activityList":{"items":[],"hasNextPage":false,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"cursor":"","startCursor":null,"endCursor":null}},"title":"Activity · ihsanalhafiz/Validation-Microcontroller-CPU-SystemVerilog"}