diff --git a/doc/components/floating_point.md b/doc/components/floating_point.md
index 751ceff3b..641df2312 100644
--- a/doc/components/floating_point.md
+++ b/doc/components/floating_point.md
@@ -22,7 +22,7 @@ Appropriate string representations, comparison operations, and operators are ava
 
 ### Floating Point Constants
 
-The various IEEE constants representing corner cases of the field of floating-point values for a given size of [FloatingPointValue](https://intel.github.io/rohd-hcl/rohd_hcl/FloatingPointValue-class.html): infinities, zeros, limits for normal (e.g. mantissa in the range of $[1,2)$ and sub-normal numbers (zero exponent, and mantissa <1).
+The various IEEE constants representing corner cases of the field of floating-point values for a given size of [FloatingPointValue](https://intel.github.io/rohd-hcl/rohd_hcl/FloatingPointValue-class.html): infinities, zeros, limits for normal (e.g. mantissa in the range of $[1,2)$) and sub-normal numbers (zero exponent, and mantissa <1).
 
 For any basic arbitrary width `FloatingPointValue` ROHD-HCL supports the following constants in that format.
 
@@ -36,8 +36,8 @@ For any basic arbitrary width `FloatingPointValue` ROHD-HCL supports the followi
 - `one`: The number one
 - `smallestLargerThanOne`: Smallest number greater than one
 - `largestNormal`: Largest positive number, most positive exponent, full mantissa
-- `infinity`: Largest possible number:  all 1s in the exponent, all 0s in the mantissa
-- `nan`:  Not a Number, demarked by all 1s in exponent and any 1 in mantissa (we use the LSB)
+- `infinity`: Largest possible number: all 1s in the exponent, all 0s in the mantissa
+- `nan`: Not a Number, designated by all 1s in exponent and any 1 in mantissa (we use the LSB)
 
 ### Special subtypes
 
@@ -73,7 +73,7 @@ A very basic [FloatingPointMultiplierSimple] component is available which does n
 
 It has options to control its performance:
 
-- 'radix':  used to specify the radix of the Booth encoder (default radix=4: options are [2,4,8,16])'.
-
-- 'adderGen':  used to specify the kind of [Adder] used for key functions like the mantiss addition. Defaults to [NativeAdder], but you can select a [ParallelPrefixAdder] of  your choice.
-- 'ppTree':  used to specify the type of ['ParallelPrefix'](https://intel.github.io/rohd-hcl/rohd_hcl/ParallelPrefix-class.html) used in the pther critical functions like leading-one detect.
+- `radix`: used to specify the radix of the Booth encoder (default radix=4: options are [2,4,8,16])'.
+- `adderGen`: used to specify the kind of [Adder] used for key functions like the mantissa addition. Defaults to [NativeAdder], but you can select a [ParallelPrefixAdder] of your choice.
+- `seGen`: type of sign extension routine used, base class is [PartialProductSignExtension].
+- `ppTree`: used to specify the type of ['ParallelPrefix'](https://intel.github.io/rohd-hcl/rohd_hcl/ParallelPrefix-class.html) used in the other critical functions like leading-one detect.
diff --git a/lib/src/arbiters/arbiter.dart b/lib/src/arbiters/arbiter.dart
index 8bbe3ccc4..9a78bfd2e 100644
--- a/lib/src/arbiters/arbiter.dart
+++ b/lib/src/arbiters/arbiter.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // arbiter.dart
@@ -32,7 +32,9 @@ abstract class Arbiter extends Module {
 
   /// Constructs an arbiter where each element in [requests] is a one-bit signal
   /// requesting a corresponding bit from [grants].
-  Arbiter(List<Logic> requests, {super.name = 'arbiter'}) {
+  Arbiter(List<Logic> requests,
+      {super.name = 'arbiter', String? definitionName})
+      : super(definitionName: definitionName ?? 'Arbiter_W${requests.length}') {
     for (var i = 0; i < requests.length; i++) {
       if (requests[i].width != 1) {
         throw RohdHclException('Each request must be 1 bit,'
diff --git a/lib/src/arbiters/mask_round_robin_arbiter.dart b/lib/src/arbiters/mask_round_robin_arbiter.dart
index 766f90829..cf3aa690a 100644
--- a/lib/src/arbiters/mask_round_robin_arbiter.dart
+++ b/lib/src/arbiters/mask_round_robin_arbiter.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // mask_round_robin_arbiter.dart
@@ -34,7 +34,8 @@ class MaskRoundRobinArbiter extends StatefulArbiter
   /// and keeping record of requests already granted, in order to mask it until
   /// granting the turn of each request to start again
   MaskRoundRobinArbiter(super.requests,
-      {required super.clk, required super.reset}) {
+      {required super.clk, required super.reset})
+      : super(definitionName: 'MaskRoundRobinArbiter_W${requests.length}') {
     _requestMask = List.generate(count, (i) => Logic(name: 'requestMask$i'));
     _grantMask = List.generate(count, (i) => Logic(name: 'grantMask$i'));
     Sequential(clk, [
diff --git a/lib/src/arbiters/priority_arbiter.dart b/lib/src/arbiters/priority_arbiter.dart
index df112920f..005fe21f7 100644
--- a/lib/src/arbiters/priority_arbiter.dart
+++ b/lib/src/arbiters/priority_arbiter.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // priority_arbiter.dart
@@ -14,7 +14,8 @@ import 'package:rohd_hcl/rohd_hcl.dart';
 class PriorityArbiter extends Arbiter {
   /// Constructs an arbiter where the grant is given to the lowest-indexed
   /// request.
-  PriorityArbiter(super.requests, {super.name = 'priority_arbiter'}) {
+  PriorityArbiter(super.requests, {super.name = 'priority_arbiter'})
+      : super(definitionName: 'PriorityArbiter_W${requests.length}') {
     Combinational([
       CaseZ(requests.rswizzle(), conditionalType: ConditionalType.priority, [
         for (var i = 0; i < count; i++)
diff --git a/lib/src/arbiters/rotate_round_robin_arbiter.dart b/lib/src/arbiters/rotate_round_robin_arbiter.dart
index 80556b93b..44105c32a 100644
--- a/lib/src/arbiters/rotate_round_robin_arbiter.dart
+++ b/lib/src/arbiters/rotate_round_robin_arbiter.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // rotate_round_robin_arbiter.dart
@@ -15,7 +15,8 @@ class RotateRoundRobinArbiter extends StatefulArbiter
     implements RoundRobinArbiter {
   /// Creates an [Arbiter] that fairly takes turns between [requests].
   RotateRoundRobinArbiter(super.requests,
-      {required super.clk, required super.reset}) {
+      {required super.clk, required super.reset})
+      : super(definitionName: 'RotateRoundRobinArbiter_W${requests.length}') {
     final preference = Logic(name: 'preference', width: log2Ceil(count));
 
     final rotatedReqs = requests
diff --git a/lib/src/arbiters/stateful_arbiter.dart b/lib/src/arbiters/stateful_arbiter.dart
index be62a012c..52688ce64 100644
--- a/lib/src/arbiters/stateful_arbiter.dart
+++ b/lib/src/arbiters/stateful_arbiter.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // stateful_arbiter.dart
@@ -26,7 +26,11 @@ abstract class StatefulArbiter extends Arbiter {
   late final Logic reset = input('reset');
 
   /// Creates a new [StatefulArbiter] with associated [clk] and [reset].
-  StatefulArbiter(super.requests, {required Logic clk, required Logic reset}) {
+  StatefulArbiter(super.requests,
+      {required Logic clk, required Logic reset, String? definitionName})
+      : super(
+            definitionName:
+                definitionName ?? 'StatefulArbiter_W${requests.length}') {
     addInput('clk', clk);
     addInput('reset', reset);
   }
diff --git a/lib/src/arithmetic/adder.dart b/lib/src/arithmetic/adder.dart
index c1cf28881..ce3b68338 100644
--- a/lib/src/arithmetic/adder.dart
+++ b/lib/src/arithmetic/adder.dart
@@ -34,7 +34,8 @@ abstract class Adder extends Module {
 
   /// Takes in input [a] and input [b] and return the [sum] of the addition
   /// result. The width of input [a] and [b] must be the same.
-  Adder(Logic a, Logic b, {Logic? carryIn, super.name}) : super() {
+  Adder(Logic a, Logic b, {Logic? carryIn, super.name, String? definitionName})
+      : super(definitionName: definitionName ?? 'Adder_W${a.width}') {
     if (a.width != b.width) {
       throw RohdHclException('inputs of a and b should have same width.');
     }
@@ -72,7 +73,8 @@ class FullAdder extends Adder {
 /// into other modules as a parameter for using the native operation.
 class NativeAdder extends Adder {
   /// The width of input [a] and [b] must be the same.
-  NativeAdder(super.a, super.b, {super.carryIn, super.name = 'native_adder'}) {
+  NativeAdder(super.a, super.b, {super.carryIn, super.name = 'native_adder'})
+      : super(definitionName: 'NativeAdder_W${a.width}') {
     if (a.width != b.width) {
       throw RohdHclException('inputs of a and b should have same width.');
     }
diff --git a/lib/src/arithmetic/carry_save_mutiplier.dart b/lib/src/arithmetic/carry_save_mutiplier.dart
index 2f046a1b3..e52d55def 100644
--- a/lib/src/arithmetic/carry_save_mutiplier.dart
+++ b/lib/src/arithmetic/carry_save_mutiplier.dart
@@ -43,7 +43,10 @@ class CarrySaveMultiplier extends Multiplier {
       {required Logic clk,
       required Logic reset,
       super.name = 'carry_save_multiplier'})
-      : super(signedMultiplicand: false, signedMultiplier: false) {
+      : super(
+            signedMultiplicand: false,
+            signedMultiplier: false,
+            definitionName: 'CarrySaveMultiplier_W${a.width}') {
     if (a.width != b.width) {
       throw RohdHclException('inputs of a and b should have same width.');
     }
diff --git a/lib/src/arithmetic/divider.dart b/lib/src/arithmetic/divider.dart
index a15a1e918..84646db55 100644
--- a/lib/src/arithmetic/divider.dart
+++ b/lib/src/arithmetic/divider.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2024 Intel Corporation
+// Copyright (C) 2024-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // divider.dart
@@ -128,7 +128,9 @@ class MultiCycleDivider extends Module {
   MultiCycleDivider(MultiCycleDividerInterface interface)
       : dataWidth = interface.dataWidth,
         logDataWidth = log2Ceil(interface.dataWidth),
-        super(name: 'divider') {
+        super(
+            name: 'divider',
+            definitionName: 'MultiCycleDivider_W${interface.dataWidth}') {
     intf = MultiCycleDividerInterface.match(interface)
       ..pairConnectIO(
         this,
diff --git a/lib/src/arithmetic/fixed_to_float.dart b/lib/src/arithmetic/fixed_to_float.dart
index 16b27020d..bd26006eb 100644
--- a/lib/src/arithmetic/fixed_to_float.dart
+++ b/lib/src/arithmetic/fixed_to_float.dart
@@ -33,7 +33,10 @@ class FixedToFloat extends Module {
   FixedToFloat(FixedPoint fixed,
       {required this.exponentWidth,
       required this.mantissaWidth,
-      super.name = 'FixedToFloat'}) {
+      super.name = 'FixedToFloat'})
+      : super(
+            definitionName:
+                'Fixed${fixed.width}ToFloatE${exponentWidth}M$mantissaWidth') {
     fixed = fixed.clone()..gets(addInput('fixed', fixed, width: fixed.width));
     addOutput('float', width: _float.width) <= _float;
 
diff --git a/lib/src/arithmetic/float_to_fixed.dart b/lib/src/arithmetic/float_to_fixed.dart
index 799b3417f..43cfe7fa7 100644
--- a/lib/src/arithmetic/float_to_fixed.dart
+++ b/lib/src/arithmetic/float_to_fixed.dart
@@ -31,7 +31,10 @@ class FloatToFixed extends Module {
   late final FixedPoint fixed = _fixed.clone()..gets(output('fixed'));
 
   /// Constructor
-  FloatToFixed(FloatingPoint float, {super.name = 'FloatToFixed'}) {
+  FloatToFixed(FloatingPoint float, {super.name = 'FloatToFixed'})
+      : super(
+            definitionName: 'FloatE${float.exponent.width}'
+                'M${float.mantissa.width}ToFixed') {
     float = float.clone()..gets(addInput('float', float, width: float.width));
 
     final bias = FloatingPointValue.computeBias(float.exponent.width);
diff --git a/lib/src/arithmetic/floating_point/floating_point_adder.dart b/lib/src/arithmetic/floating_point/floating_point_adder.dart
index 6176732ec..2de2218e4 100644
--- a/lib/src/arithmetic/floating_point/floating_point_adder.dart
+++ b/lib/src/arithmetic/floating_point/floating_point_adder.dart
@@ -57,10 +57,14 @@ abstract class FloatingPointAdder extends Module {
       {Logic? clk,
       Logic? reset,
       Logic? enable,
-      super.name = 'floating_point_adder'})
+      super.name = 'floating_point_adder',
+      String? definitionName})
       : exponentWidth = a.exponent.width,
         mantissaWidth = a.mantissa.width,
-        super() {
+        super(
+            definitionName: definitionName ??
+                'FloatingPointAdder_E${a.exponent.width}'
+                    'M${a.mantissa.width}') {
     if (b.exponent.width != exponentWidth ||
         b.mantissa.width != mantissaWidth) {
       throw RohdHclException('FloatingPoint widths must match');
diff --git a/lib/src/arithmetic/floating_point/floating_point_adder_round.dart b/lib/src/arithmetic/floating_point/floating_point_adder_round.dart
index 5998cc1ad..341ac437d 100644
--- a/lib/src/arithmetic/floating_point/floating_point_adder_round.dart
+++ b/lib/src/arithmetic/floating_point/floating_point_adder_round.dart
@@ -35,7 +35,10 @@ class FloatingPointAdderRound extends FloatingPointAdder {
       ParallelPrefix Function(
               List<Logic> inps, Logic Function(Logic term1, Logic term2) op)
           ppTree = KoggeStone.new,
-      super.name = 'floating_point_adder_round'}) {
+      super.name = 'floating_point_adder_round'})
+      : super(
+            definitionName: 'FloatingPointAdderRound_'
+                'E${a.exponent.width}M${a.mantissa.width}') {
     final outputSum = FloatingPoint(
         exponentWidth: exponentWidth, mantissaWidth: mantissaWidth);
     output('sum') <= outputSum;
diff --git a/lib/src/arithmetic/floating_point/floating_point_adder_simple.dart b/lib/src/arithmetic/floating_point/floating_point_adder_simple.dart
index d679380b1..c33144387 100644
--- a/lib/src/arithmetic/floating_point/floating_point_adder_simple.dart
+++ b/lib/src/arithmetic/floating_point/floating_point_adder_simple.dart
@@ -28,7 +28,9 @@ class FloatingPointAdderSimple extends FloatingPointAdder {
               List<Logic> inps, Logic Function(Logic term1, Logic term2) op)
           ppTree = KoggeStone.new,
       super.name = 'floatingpoint_adder_simple'})
-      : super() {
+      : super(
+            definitionName: 'FloatingPointAdderSimple_'
+                'E${a.exponent.width}M${a.mantissa.width}') {
     final outputSum = FloatingPoint(
         exponentWidth: exponentWidth,
         mantissaWidth: mantissaWidth,
diff --git a/lib/src/arithmetic/floating_point/floating_point_multiplier.dart b/lib/src/arithmetic/floating_point/floating_point_multiplier.dart
index 4b7f0da20..42f812e0d 100644
--- a/lib/src/arithmetic/floating_point/floating_point_multiplier.dart
+++ b/lib/src/arithmetic/floating_point/floating_point_multiplier.dart
@@ -68,7 +68,12 @@ abstract class FloatingPointMultiplier extends Module {
       // ignore: avoid_unused_constructor_parameters
       ParallelPrefix Function(List<Logic>, Logic Function(Logic, Logic)) ppGen =
           KoggeStone.new,
-      super.name = 'floating_point_multiplier'}) {
+      super.name = 'floating_point_multiplier',
+      String? definitionName})
+      : super(
+            definitionName: definitionName ??
+                'FloatingPointMultiplier_E${a.exponent.width}'
+                    'M${a.mantissa.width}') {
     if (b.exponent.width != a.exponent.width ||
         b.mantissa.width != a.mantissa.width) {
       throw RohdHclException('FloatingPoint widths must match');
diff --git a/lib/src/arithmetic/floating_point/floating_point_multiplier_simple.dart b/lib/src/arithmetic/floating_point/floating_point_multiplier_simple.dart
index edeb6ab25..bb54aa93f 100644
--- a/lib/src/arithmetic/floating_point/floating_point_multiplier_simple.dart
+++ b/lib/src/arithmetic/floating_point/floating_point_multiplier_simple.dart
@@ -32,7 +32,12 @@ class FloatingPointMultiplierSimple extends FloatingPointMultiplier {
       ParallelPrefix Function(
               List<Logic> inps, Logic Function(Logic term1, Logic term2) op)
           ppTree = KoggeStone.new,
-      super.name}) {
+      super.name})
+      : super(
+            definitionName: 'FloatingPointMultiplierSimple_'
+                'E${a.exponent.width}M${a.mantissa.width}'
+                '${outProduct != null ? '_OE${outProduct.exponent.width}_'
+                    'OM${outProduct.mantissa.width}' : ''}') {
     if (exponentWidth < a.exponent.width) {
       throw RohdHclException('product exponent width must be >= '
           ' input exponent width');
diff --git a/lib/src/arithmetic/multiplier.dart b/lib/src/arithmetic/multiplier.dart
index 118deb615..c572d7060 100644
--- a/lib/src/arithmetic/multiplier.dart
+++ b/lib/src/arithmetic/multiplier.dart
@@ -88,7 +88,11 @@ abstract class Multiplier extends Module {
       this.signedMultiplier = false,
       Logic? selectSignedMultiplicand,
       Logic? selectSignedMultiplier,
-      super.name = 'multiplier'}) {
+      super.name = 'multiplier',
+      String? definitionName})
+      : super(
+            definitionName:
+                definitionName ?? 'Multiplier_W${a.width}x${b.width}') {
     if (signedMultiplicand && (selectSignedMultiplicand != null)) {
       throw RohdHclException('multiplicand sign reconfiguration requires '
           'signedMultiplicand=false');
@@ -136,7 +140,8 @@ class NativeMultiplier extends Multiplier {
       super.signedMultiplier = false,
       super.selectSignedMultiplicand,
       super.selectSignedMultiplier,
-      super.name = 'native_multiplier'}) {
+      super.name = 'native_multiplier'})
+      : super(definitionName: 'NativeMultiplier_W${a.width}') {
     if (a.width != b.width) {
       throw RohdHclException('inputs of a and b should have same width.');
     }
@@ -267,7 +272,12 @@ abstract class MultiplyAccumulate extends Module {
       Logic? selectSignedMultiplicand,
       Logic? selectSignedMultiplier,
       Logic? selectSignedAddend,
-      super.name}) {
+      super.name,
+      String? definitionName})
+      : super(
+            definitionName: definitionName ??
+                'MultiplyAccumulate_W${a.width}x${b.width}_'
+                    'Acc${c.width}') {
     this.clk = (clk != null) ? addInput('clk', clk) : null;
     this.reset = (reset != null) ? addInput('reset', reset) : null;
     this.enable = (enable != null) ? addInput('enable', enable) : null;
@@ -343,7 +353,15 @@ class CompressionTreeMultiplier extends Multiplier {
       PartialProductSignExtension Function(PartialProductGeneratorBase pp,
               {String name})
           seGen = CompactRectSignExtension.new,
-      super.name = 'compression_tree_multiplier'}) {
+      super.name = 'compression_tree_multiplier'})
+      : super(
+            definitionName: 'CompressionTreeMultiplier_W${a.width}x'
+                '${b.width}_'
+                '${signedMultiplicand ? 'SD_' : ''}'
+                '${signedMultiplier ? 'SM_' : ''}'
+                '${selectSignedMultiplicand != null ? 'SSD_' : ''}'
+                '${selectSignedMultiplier != null ? 'SSM_' : ''}'
+                'with${adderGen(a, b).definitionName}') {
 // Should be done in base TODO(desmonddak):
     final product = addOutput('product', width: a.width + b.width);
     final pp = PartialProductGenerator(
diff --git a/lib/src/arithmetic/ones_complement_adder.dart b/lib/src/arithmetic/ones_complement_adder.dart
index 657aca7ad..05f32056b 100644
--- a/lib/src/arithmetic/ones_complement_adder.dart
+++ b/lib/src/arithmetic/ones_complement_adder.dart
@@ -38,7 +38,8 @@ class OnesComplementAdder extends Adder {
       Logic? carryOut,
       Logic? carryIn,
       bool? subtract,
-      super.name = 'ones_complement_adder'}) {
+      super.name = 'ones_complement_adder'})
+      : super(definitionName: 'OnesComplementAdder_W${a.width}') {
     if (subtractIn != null) {
       subtractIn = addInput('subtractIn', subtractIn);
     }
diff --git a/lib/src/arithmetic/parallel_prefix_operations.dart b/lib/src/arithmetic/parallel_prefix_operations.dart
index f1cec58a7..da4611a9a 100644
--- a/lib/src/arithmetic/parallel_prefix_operations.dart
+++ b/lib/src/arithmetic/parallel_prefix_operations.dart
@@ -29,7 +29,10 @@ class ParallelPrefix extends Module {
   List<Logic> get val => UnmodifiableListView(_oseq);
 
   /// ParallePrefix recursion
-  ParallelPrefix(List<Logic> inps, String name) : super(name: name) {
+  ParallelPrefix(List<Logic> inps, String name)
+      : super(
+            name: name,
+            definitionName: 'ParallelPrefix_${name}_W${inps.length}') {
     if (inps.isEmpty) {
       throw Exception("Don't use {name} with an empty sequence");
     }
@@ -169,7 +172,8 @@ class ParallelPrefixOrScan extends Module {
       {ParallelPrefix Function(
               List<Logic> inps, Logic Function(Logic term1, Logic term2) op)
           ppGen = KoggeStone.new,
-      super.name = 'parallel_prefix_orscan'}) {
+      super.name = 'parallel_prefix_orscan'})
+      : super(definitionName: 'ParallelPrefixOrScan_W${inp.width}') {
     inp = addInput('inp', inp, width: inp.width);
     final u = ppGen(inp.elements, (a, b) => a | b);
     addOutput('out', width: inp.width) <= u.val.rswizzle();
@@ -187,7 +191,8 @@ class ParallelPrefixPriorityFinder extends Module {
       {ParallelPrefix Function(
               List<Logic> inps, Logic Function(Logic term1, Logic term2) op)
           ppGen = KoggeStone.new,
-      super.name = 'parallel_prefix_finder'}) {
+      super.name = 'parallel_prefix_finder'})
+      : super(definitionName: 'ParallelPrefixPriorityFinder_W${inp.width}') {
     inp = addInput('inp', inp, width: inp.width);
     final u = ParallelPrefixOrScan(inp, ppGen: ppGen);
     addOutput('out', width: inp.width) <=
@@ -219,7 +224,8 @@ class ParallelPrefixPriorityEncoder extends Module {
               List<Logic> inps, Logic Function(Logic term1, Logic term2) op)
           ppGen = KoggeStone.new,
       Logic? valid,
-      super.name = 'parallel_prefix_encoder'}) {
+      super.name = 'parallel_prefix_encoder'})
+      : super(definitionName: 'ParallelPrefixPriorityEncoder_W${inp.width}') {
     inp = addInput('inp', inp, width: inp.width);
     final sz = log2Ceil(inp.width + 1);
     addOutput('out', width: sz);
@@ -249,7 +255,8 @@ class ParallelPrefixAdder extends Adder {
       ParallelPrefix Function(
               List<Logic> inps, Logic Function(Logic term1, Logic term2) op)
           ppGen = KoggeStone.new,
-      super.name = 'parallel_prefix_adder'}) {
+      super.name = 'parallel_prefix_adder'})
+      : super(definitionName: 'ParallelPrefixAdder_W${a.width}') {
     final l = List<Logic>.generate(a.width - 1,
         (i) => [a[i + 1] & b[i + 1], a[i + 1] | b[i + 1]].swizzle());
     final cin = carryIn ?? Const(0);
@@ -286,7 +293,8 @@ class ParallelPrefixIncr extends Module {
       {ParallelPrefix Function(
               List<Logic> inps, Logic Function(Logic term1, Logic term2) op)
           ppGen = KoggeStone.new,
-      super.name = 'parallel_prefix_incr'}) {
+      super.name = 'parallel_prefix_incr'})
+      : super(definitionName: 'ParallelPrefixIncr_W${inp.width}') {
     inp = addInput('inp', inp, width: inp.width);
     final u = ppGen(inp.elements, (lhs, rhs) => rhs & lhs);
     addOutput('out', width: inp.width) <=
@@ -308,7 +316,8 @@ class ParallelPrefixDecr extends Module {
       {ParallelPrefix Function(
               List<Logic> inps, Logic Function(Logic term1, Logic term2) op)
           ppGen = KoggeStone.new,
-      super.name = 'parallel_prefix_decr'}) {
+      super.name = 'parallel_prefix_decr'})
+      : super(definitionName: 'ParallelPrefixDecr_W${inp.width}') {
     inp = addInput('inp', inp, width: inp.width);
     final u = ppGen((~inp).elements, (lhs, rhs) => rhs & lhs);
     addOutput('out', width: inp.width) <=
diff --git a/lib/src/arithmetic/ripple_carry_adder.dart b/lib/src/arithmetic/ripple_carry_adder.dart
index b4178a1a0..502f370e3 100644
--- a/lib/src/arithmetic/ripple_carry_adder.dart
+++ b/lib/src/arithmetic/ripple_carry_adder.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // ripple_carry_adder.dart
@@ -19,7 +19,8 @@ import 'package:rohd_hcl/rohd_hcl.dart';
 class RippleCarryAdder extends Adder {
   /// Constructs an n-bit adder based on inputs List of inputs.
   RippleCarryAdder(super.a, super.b,
-      {super.carryIn, super.name = 'ripple_carry_adder_carry_in'}) {
+      {super.carryIn, super.name = 'ripple_carry_adder_carry_in'})
+      : super(definitionName: 'RippleCarryAdder_W${a.width}') {
     Logic? carry;
     final sumList = <Logic>[];
     for (var i = 0; i < a.width; i++) {
diff --git a/lib/src/arithmetic/sign_magnitude_adder.dart b/lib/src/arithmetic/sign_magnitude_adder.dart
index a21966c32..e3dffa9de 100644
--- a/lib/src/arithmetic/sign_magnitude_adder.dart
+++ b/lib/src/arithmetic/sign_magnitude_adder.dart
@@ -38,8 +38,8 @@ class SignMagnitudeAdder extends Adder {
   // TODO(desmonddak): this adder may need a carry-in for rounding
   SignMagnitudeAdder(this.aSign, super.a, this.bSign, super.b,
       Adder Function(Logic a, Logic b, {Logic? carryIn}) adderGen,
-      {this.largestMagnitudeFirst = false,
-      super.name = 'sign_magnitude_adder'}) {
+      {this.largestMagnitudeFirst = false, super.name = 'sign_magnitude_adder'})
+      : super(definitionName: 'SignMagnitudeAdder_W${a.width}') {
     aSign = addInput('aSign', aSign);
     bSign = addInput('bSign', bSign);
     _sign = addOutput('sign');
diff --git a/lib/src/binary_gray.dart b/lib/src/binary_gray.dart
index ef280c245..65cbb60be 100644
--- a/lib/src/binary_gray.dart
+++ b/lib/src/binary_gray.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // binary_gray.dart
@@ -30,7 +30,8 @@ class BinaryToGrayConverter extends Module {
   /// The [binary] parameter is the binary input that you want to convert
   /// to Gray code. The width of the input [binary] determines the width
   /// of the Gray code output.
-  BinaryToGrayConverter(Logic binary) {
+  BinaryToGrayConverter(Logic binary)
+      : super(definitionName: 'BinaryToGrayConverter_W${binary.width}') {
     final inputWidth = binary.width;
     binary = addInput('binary', binary, width: inputWidth);
     final grayVal = addOutput('gray', width: inputWidth);
@@ -97,7 +98,8 @@ class GrayToBinaryConverter extends Module {
   /// The [gray] parameter is the Gray code input that you want to convert to
   /// binary. The width of the input [gray] determines the width of the binary
   /// output.
-  GrayToBinaryConverter(Logic gray) {
+  GrayToBinaryConverter(Logic gray)
+      : super(definitionName: 'GrayToBinaryConverter_W${gray.width}') {
     final inputWidth = gray.width;
     gray = addInput('gray', gray, width: inputWidth);
     final binaryVal = addOutput('binary', width: inputWidth);
diff --git a/lib/src/count.dart b/lib/src/count.dart
index cf097a83e..44c25a444 100644
--- a/lib/src/count.dart
+++ b/lib/src/count.dart
@@ -28,7 +28,8 @@ class Count extends Module {
   ///
   /// Takes in [bus] of type [Logic]. by default performs [countOne] (`1`)
   /// if [countOne] is `false` will count `0`
-  Count(Logic bus, {bool countOne = true}) {
+  Count(Logic bus, {bool countOne = true})
+      : super(definitionName: 'Count_W${bus.width}') {
     bus = addInput('bus', bus, width: bus.width);
     Logic count = Const(0, width: max(1, log2Ceil(bus.width + 1)));
     for (var i = 0; i < bus.width; i++) {
diff --git a/lib/src/edge_detector.dart b/lib/src/edge_detector.dart
index 7c8fc7878..f9a590982 100644
--- a/lib/src/edge_detector.dart
+++ b/lib/src/edge_detector.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2024 Intel Corporation
+// Copyright (C) 2024-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // edge_detector.dart
@@ -38,7 +38,9 @@ class EdgeDetector extends Module {
     dynamic resetValue,
     this.edgeType = Edge.pos,
     String? name,
-  }) : super(name: name ?? '${edgeType.name}_edge_detector') {
+  }) : super(
+            name: name ?? '${edgeType.name}_edge_detector',
+            definitionName: 'EdgeDetector_T${edgeType.name}') {
     if (signal.width != 1 ||
         (resetValue is Logic && resetValue.width != 1) ||
         (resetValue is LogicValue && resetValue.width != 1)) {
diff --git a/lib/src/encodings/binary_to_one_hot.dart b/lib/src/encodings/binary_to_one_hot.dart
index 98b954b64..3c64d9c10 100644
--- a/lib/src/encodings/binary_to_one_hot.dart
+++ b/lib/src/encodings/binary_to_one_hot.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // binary_to_one_hot.dart
@@ -17,7 +17,8 @@ class BinaryToOneHot extends Module {
 
   /// Constructs a [Module] which encodes a 2's complement number [binary]
   /// into a one-hot, or thermometer code
-  BinaryToOneHot(Logic binary, {super.name = 'binary_to_one_hot'}) {
+  BinaryToOneHot(Logic binary, {super.name = 'binary_to_one_hot'})
+      : super(definitionName: 'BinaryToOneHot_W${binary.width}') {
     binary = addInput('binary', binary, width: binary.width);
     addOutput('encoded', width: pow(2, binary.width).toInt());
     encoded <= Const(1, width: encoded.width) << binary;
diff --git a/lib/src/encodings/one_hot_to_binary.dart b/lib/src/encodings/one_hot_to_binary.dart
index 51ccefef0..cfaee5e12 100644
--- a/lib/src/encodings/one_hot_to_binary.dart
+++ b/lib/src/encodings/one_hot_to_binary.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // one_hot_to_binary.dart
@@ -51,7 +51,12 @@ abstract class OneHotToBinary extends Module {
   /// Constructs a [Module] which decodes a one-hot number [onehot] into a 2s
   /// complement number [binary] by encoding the position of the '1'.
   OneHotToBinary.base(Logic onehot,
-      {this.generateError = false, super.name = 'one_hot_to_binary'}) {
+      {this.generateError = false,
+      super.name = 'one_hot_to_binary',
+      String? definitionName})
+      : super(
+            definitionName:
+                definitionName ?? 'OneHotToBinary_W${onehot.width}') {
     onehot = addInput('onehot', onehot, width: onehot.width);
     addOutput('binary', width: max(log2Ceil(onehot.width), 1));
 
diff --git a/lib/src/encodings/tree_one_hot_to_binary.dart b/lib/src/encodings/tree_one_hot_to_binary.dart
index 5a36252c3..02e168778 100644
--- a/lib/src/encodings/tree_one_hot_to_binary.dart
+++ b/lib/src/encodings/tree_one_hot_to_binary.dart
@@ -26,7 +26,10 @@ class _NodeOneHotToBinary extends Module {
 
   /// Build a shorter-input module for recursion
   /// (borrowed from Chisel OHToUInt)
-  _NodeOneHotToBinary(Logic onehot) : super(name: 'node_one_hot_to_binary') {
+  _NodeOneHotToBinary(Logic onehot)
+      : super(
+            name: 'node_one_hot_to_binary',
+            definitionName: 'NodeOneHotToBinary_W${onehot.width}') {
     final wid = onehot.width;
     onehot = addInput('onehot', onehot, width: wid);
 
diff --git a/lib/src/error_checking/parity.dart b/lib/src/error_checking/parity.dart
index 7294c917e..5c7e06702 100644
--- a/lib/src/error_checking/parity.dart
+++ b/lib/src/error_checking/parity.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // parity.dart
@@ -19,7 +19,7 @@ class ParityTransmitter extends ErrorCheckingTransmitter {
 
   /// Creates a transmitter that sends data with a parity bit.
   ParityTransmitter(super.data, {super.name = 'parity_tx'})
-      : super(codeWidth: 1);
+      : super(codeWidth: 1, definitionName: 'ParityTransmitter_W${data.width}');
 
   @override
   @protected
@@ -33,7 +33,10 @@ class ParityReceiver extends ErrorCheckingReceiver {
   /// into 2 parts: the [originalData], and the error bit upon which [error] is
   /// calculated for parity error checking.
   ParityReceiver(super.transmission, {super.name = 'parity_rx'})
-      : super(codeWidth: 1, supportsErrorCorrection: false);
+      : super(
+            codeWidth: 1,
+            supportsErrorCorrection: false,
+            definitionName: 'ParityReceiver_W${transmission.width}');
 
   @override
   @protected
diff --git a/lib/src/extrema.dart b/lib/src/extrema.dart
index f35b4dd60..259a9f1cf 100644
--- a/lib/src/extrema.dart
+++ b/lib/src/extrema.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2024 Intel Corporation
+// Copyright (C) 2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // extrema.dart
@@ -25,7 +25,8 @@ class Extrema extends Module {
   /// If [max] is `true`, will find maximum value, else will find minimum.
   ///
   /// Outputs the [index] and [val] of the extrema in the list of [signals].
-  Extrema(List<Logic> signals, {bool max = true}) {
+  Extrema(List<Logic> signals, {bool max = true})
+      : super(definitionName: 'Extrema_L${signals.length}') {
     // List to consume inputs internally.
     final logics = <Logic>[];
 
diff --git a/lib/src/fifo.dart b/lib/src/fifo.dart
index ce19e23fa..6c7ad5482 100644
--- a/lib/src/fifo.dart
+++ b/lib/src/fifo.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // fifo.dart
@@ -88,7 +88,8 @@ class Fifo extends Module {
       this.generateBypass = false,
       super.name = 'fifo'})
       : dataWidth = writeData.width,
-        _addrWidth = max(1, log2Ceil(depth)) {
+        _addrWidth = max(1, log2Ceil(depth)),
+        super(definitionName: 'Fifo_D${depth}_W${writeData.width}') {
     if (depth <= 0) {
       throw RohdHclException('Depth must be at least 1.');
     }
diff --git a/lib/src/find.dart b/lib/src/find.dart
index e38e57172..f5b15282f 100644
--- a/lib/src/find.dart
+++ b/lib/src/find.dart
@@ -36,8 +36,8 @@ class Find extends Module {
   /// [n] starts from `0` as first find.
   ///
   /// Outputs pin `index` contains position. position starts from `1` based.
-  Find(Logic bus,
-      {bool countOne = true, Logic? n, this.generateError = false}) {
+  Find(Logic bus, {bool countOne = true, Logic? n, this.generateError = false})
+      : super(definitionName: 'Find_W${bus.width}') {
     bus = addInput('bus', bus, width: bus.width);
     final oneHotList = <Logic>[];
 
diff --git a/lib/src/memory/memory.dart b/lib/src/memory/memory.dart
index c0545c1e6..723e681df 100644
--- a/lib/src/memory/memory.dart
+++ b/lib/src/memory/memory.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // memory.dart
@@ -123,7 +123,7 @@ abstract class Memory extends Module {
   /// Must provide at least one port (read or write).
   Memory(Logic clk, Logic reset, List<DataPortInterface> writePorts,
       List<DataPortInterface> readPorts,
-      {super.name = 'memory'})
+      {super.name = 'memory', String? definitionName})
       : numWrites = writePorts.length,
         numReads = readPorts.length,
         dataWidth = (writePorts.isNotEmpty)
@@ -135,8 +135,10 @@ abstract class Memory extends Module {
             ? writePorts[0].addrWidth
             : (readPorts.isNotEmpty)
                 ? readPorts[0].addrWidth
-                : 0 // at least one of these must exist
-  {
+                : 0, // at least one of these must exist
+        super(
+            definitionName: definitionName ??
+                'Memory_WP${writePorts.length}_RP${readPorts.length}') {
     if (writePorts.isEmpty && readPorts.isEmpty) {
       throw RohdHclException(
           'Must specify at least one read port or one write port.');
diff --git a/lib/src/memory/register_file.dart b/lib/src/memory/register_file.dart
index 5d7742afb..924c7e5e6 100644
--- a/lib/src/memory/register_file.dart
+++ b/lib/src/memory/register_file.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // register_file.dart
@@ -23,7 +23,10 @@ class RegisterFile extends Memory {
   /// [MaskedDataPortInterface]s are supported on `writePorts`, but not on
   /// `readPorts`.
   RegisterFile(super.clk, super.reset, super.writePorts, super.readPorts,
-      {this.numEntries = 8, super.name = 'rf'}) {
+      {this.numEntries = 8, super.name = 'rf'})
+      : super(
+            definitionName: 'RegisterFile_WP${writePorts.length}'
+                '_RP${readPorts.length}_E$numEntries') {
     _buildLogic();
   }
 
diff --git a/lib/src/rotate.dart b/lib/src/rotate.dart
index f7ef3923f..661b529d4 100644
--- a/lib/src/rotate.dart
+++ b/lib/src/rotate.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // rotate.dart
@@ -40,10 +40,9 @@ abstract class _Rotate extends Module {
   /// represented by the maximum value of [rotateAmount].
   _Rotate(this._direction, Logic original, Logic rotateAmount,
       {int? maxAmount, super.name = 'rotate'})
-      : maxAmount = min(
-          maxAmount ?? original.width,
-          pow(2, rotateAmount.width).toInt() - 1,
-        ) {
+      : maxAmount = min(maxAmount ?? original.width,
+            pow(2, rotateAmount.width).toInt() - 1),
+        super(definitionName: 'Rotate_${_direction.name}_W${original.width}') {
     original = addInput('original', original, width: original.width);
     rotateAmount =
         addInput('rotate_amount', rotateAmount, width: rotateAmount.width);
@@ -109,7 +108,9 @@ class _RotateFixed extends Module {
   /// Rotates [original] by [rotateAmount] to the [_direction].
   _RotateFixed(this._direction, Logic original, this.rotateAmount,
       {super.name = 'rotate_fixed'})
-      : super(definitionName: 'rotate_${_direction.name}_by_$rotateAmount') {
+      : super(
+            definitionName: 'RotateFixed_${_direction.name}_'
+                'by_$rotateAmount') {
     original = addInput('original', original, width: original.width);
     addOutput('rotated', width: original.width);
 
diff --git a/lib/src/serialization/deserializer.dart b/lib/src/serialization/deserializer.dart
index 7faa64208..53d69a979 100644
--- a/lib/src/serialization/deserializer.dart
+++ b/lib/src/serialization/deserializer.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2024 Intel Corporation
+// Copyright (C) 2024-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // deserializer.dart
@@ -36,7 +36,8 @@ class Deserializer extends Module {
       {required Logic clk,
       required Logic reset,
       Logic? enable,
-      super.name = 'deserializer'}) {
+      super.name = 'deserializer'})
+      : super(definitionName: 'Deserializer_W${serialized.width}_L$length') {
     clk = addInput('clk', clk);
     reset = addInput('reset', reset);
     if (enable != null) {
diff --git a/lib/src/serialization/serializer.dart b/lib/src/serialization/serializer.dart
index 97f591746..582ebb9f2 100644
--- a/lib/src/serialization/serializer.dart
+++ b/lib/src/serialization/serializer.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2024 Intel Corporation
+// Copyright (C) 2024-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // serializer.dart
@@ -38,7 +38,10 @@ class Serializer extends Module {
       required Logic reset,
       Logic? enable,
       bool flopInput = false,
-      super.name = 'serializer'}) {
+      super.name = 'serializer'})
+      : super(
+            definitionName: 'Serializer_W${deserialized.width}_'
+                '${deserialized.elementWidth}') {
     clk = addInput('clk', clk);
     reset = addInput('reset', reset);
     if (enable != null) {
diff --git a/lib/src/shift_register.dart b/lib/src/shift_register.dart
index ac4acc268..3c854ed71 100644
--- a/lib/src/shift_register.dart
+++ b/lib/src/shift_register.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // shift_register.dart
@@ -53,7 +53,10 @@ class ShiftRegister extends Module {
     dynamic resetValue,
     this.dataName = 'data',
   })  : width = dataIn.width,
-        super(name: '${dataName}_shift_register') {
+        super(
+            name: '${dataName}_shift_register',
+            definitionName: 'ShiftRegister_W${dataIn.width}'
+                '_D$depth') {
     dataIn = addInput('${dataName}_in', dataIn, width: width);
     clk = addInput('clk', clk);
 
diff --git a/lib/src/signed_shifter.dart b/lib/src/signed_shifter.dart
index 8f3820e99..230759041 100644
--- a/lib/src/signed_shifter.dart
+++ b/lib/src/signed_shifter.dart
@@ -17,7 +17,8 @@ class SignedShifter extends Module {
   /// Create a [SignedShifter] that treats shift as signed
   /// - [bits] is the input to be shifted
   /// - [shift] is the signed amount to be shifted
-  SignedShifter(Logic bits, Logic shift, {super.name = 'shifter'}) {
+  SignedShifter(Logic bits, Logic shift, {super.name = 'shifter'})
+      : super(definitionName: 'SignedShifter_W${bits.width}') {
     bits = addInput('bits', bits, width: bits.width);
     shift = addInput('shift', shift, width: shift.width);
 
diff --git a/lib/src/sort.dart b/lib/src/sort.dart
index d350ea64a..792afaeeb 100644
--- a/lib/src/sort.dart
+++ b/lib/src/sort.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // sort.dart
@@ -24,7 +24,11 @@ abstract class Sort extends Module {
 
   /// Sort algorithm MUST have List of [toSort], direction of
   /// sort [isAscending] and a name for the sorting module.
-  Sort({required this.toSort, this.isAscending = true, super.name});
+  Sort(
+      {required this.toSort,
+      this.isAscending = true,
+      super.name,
+      super.definitionName});
 }
 
 /// Compare and Swap [Logic] to the specified order.
@@ -51,7 +55,9 @@ class _CompareSwap extends Module {
   /// swapping.
   _CompareSwap(Logic clk, Logic reset, List<Logic> toSort, int i, int j,
       {required this.isAscending})
-      : super(name: 'compare_swap_${i}_$j') {
+      : super(
+            name: 'compare_swap_${i}_$j',
+            definitionName: '_CompareSwap_W${toSort.length}') {
     clk = addInput('clk', clk);
     reset = addInput('reset', reset);
 
@@ -109,7 +115,7 @@ class _BitonicMerge extends Module {
     required bool isAscending,
     required Iterable<Logic> bitonicSequence,
     super.name = 'bitonic_merge',
-  }) {
+  }) : super(definitionName: '_BitonicMerge_W${bitonicSequence.length}') {
     clk = addInput('clk', clk);
     reset = addInput('reset', reset);
 
@@ -205,7 +211,8 @@ class BitonicSort extends Sort {
   /// await sortMod.build();
   /// ```
   BitonicSort(Logic clk, Logic reset,
-      {required super.toSort, super.isAscending, super.name}) {
+      {required super.toSort, super.isAscending, super.name})
+      : super(definitionName: 'BitonicSort_W${toSort.length}') {
     clk = addInput('clk', clk);
     reset = addInput('reset', reset);
 
diff --git a/lib/src/toggle_gate.dart b/lib/src/toggle_gate.dart
index 2fa978c50..11126f7db 100644
--- a/lib/src/toggle_gate.dart
+++ b/lib/src/toggle_gate.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2024 Intel Corporation
+// Copyright (C) 2024-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // toggle_gate.dart
@@ -37,7 +37,7 @@ class ToggleGate extends Module {
     dynamic resetValue,
     ClockGateControlInterface? clockGateControlIntf,
     super.name = 'toggle_gate',
-  }) {
+  }) : super(definitionName: 'ToggleGate_W${data.width}') {
     enable = addInput('enable', enable);
     data = addInput('data', data, width: data.width);
     clk = addInput('clk', clk);
diff --git a/test/configurator_test.dart b/test/configurator_test.dart
index f0dda0990..925fb2470 100644
--- a/test/configurator_test.dart
+++ b/test/configurator_test.dart
@@ -1,4 +1,4 @@
-// Copyright (C) 2023-2024 Intel Corporation
+// Copyright (C) 2023-2025 Intel Corporation
 // SPDX-License-Identifier: BSD-3-Clause
 //
 // configurator_test.dart
@@ -73,7 +73,7 @@ void main() {
     test('should return RotateRight module when generate() with default value',
         () async {
       final rotate = RotateConfigurator();
-      expect(await rotate.generateSV(), contains('RotateRight'));
+      expect(await rotate.generateSV(), contains('Rotate_right'));
     });
 
     test('should return RotateLeft when invoke generate() with default value',
@@ -87,7 +87,7 @@ void main() {
       rotate.rotateWidthKnob.value = rotateAmountWidth;
 
       final sv = await rotate.generateSV();
-      expect(sv, contains('RotateLeft'));
+      expect(sv, contains('Rotate_left'));
       expect(sv, contains('input logic [9:0] original'));
       expect(sv, contains('input logic [4:0] rotate_amount'));
     });
@@ -271,7 +271,7 @@ void main() {
       final sv = await bitonicSortGenerator.generateSV();
 
       expect(sv, contains('input logic [7:0]'));
-      expect(sv, contains('BitonicSort_2'));
+      expect(sv, contains('BitonicSort_W2'));
       expect(sv, contains('if((toSort1 > toSort3)) begin'));
     });
 
@@ -289,7 +289,7 @@ void main() {
       final sv = await bitonicSortGenerator.generateSV();
 
       expect(sv, contains('input logic [7:0]'));
-      expect(sv, contains('BitonicSort_2'));
+      expect(sv, contains('BitonicSort_W2'));
       expect(sv, contains('if((toSort1 < toSort3)) begin'));
     });
   });