Replies: 3 comments 1 reply
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Good to bring up using It seems that using I am totally fine with using |
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I like the idea of reusing Regarding the strategy of exposing
This is very neat, I like this principle. One thing that is interesting to add might be-- For example, in either InstructionAbort or DataAbort, HPFAR_EL2 and FAR_EL2 are only allowed to access. However, it might be effective for restricting access to specific asm instructions (e.g., tlb flush).
It totally makes sense as well. We need some ways to ensure the logic of MMU settings is implemented correctly. (e.g., tlb_flush should be called at the right time) This seems like a special case of "safety" tag as it involves assembly instructions. |
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Applied. #331 |
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I propose that we transition our aarch64 development to use the
aarch64-cpu
crate for the following reasons:Background
unsafe
code.aarch64-cpu
crate, which is the most widely used crate for creating OS or Hypervisor on Aarch64 targets with approximately 300,000 downloads, defines and uses registers via thetock-register-interface
. (Ref. crate.io)Key Differences
The primary difference between the
aarch64-cpu
crate and our current approach is that theaarch64-cpu
crate does not exposeunsafe
by default for setting and getting registers.This decision was made after extensive discussions (tock-registers: Make Register Access Unsafe tock/tock#2593), RFC: Unsafe
WriteOnly
,ReadWrite
, andReadOnly
(?) variants for tock-register-interface? tock/tock#3244) and concluded that:unsafe
.unsafe
.Additional Features:
aarch64-cpu
crate allows us to define register permissions such as Read Only and Read Write, which we currently do not have.Proposed Actions
Transition to
aarch64-cpu
:aarch64-cpu
crate, implying that register settings do not useunsafe
by default.Explicit
unsafe
Usage:setup_el2
and MMU settings asunsafe
and provide detailed safety documentation for them.By adopting these changes, we can leverage a more robust and community-supported approach to hardware register management while maintaining the safety and clarity of our code.
Reference Links
aarch64-cpu
cratePlease share your thoughts and any concerns you might have regarding this proposal.
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