cpen391_group5_qsys.qsys

<?xml version="1.0" encoding="UTF-8"?>
<system name="$${FILENAME}">
 <component
   name="$${FILENAME}"
   displayName="$${FILENAME}"
   version="1.0"
   description=""
   tags=""
   categories="System" />
 <parameter name="bonusData"><![CDATA[bonusData 
{
   element $${FILENAME}
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element Draw_Subsystem
   {
      datum _sortIndex
      {
         value = "12";
         type = "int";
      }
   }
   element Draw_Subsystem.dma_regs
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "2097152";
         type = "String";
      }
   }
   element Video_Subsystem
   {
      datum _sortIndex
      {
         value = "13";
         type = "int";
      }
   }
   element Video_Subsystem.video_frame_buffer
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
   }
   element clocks
   {
      datum _sortIndex
      {
         value = "0";
         type = "int";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element cpen391_group5_qsys
   {
      datum _originalDeviceFamily
      {
         value = "Cyclone V";
         type = "String";
      }
   }
   element graphics_controller_0
   {
      datum _sortIndex
      {
         value = "11";
         type = "int";
      }
   }
   element graphics_controller_0.mm
   {
      datum baseAddress
      {
         value = "67108864";
         type = "String";
      }
   }
   element hps_0
   {
      datum _sortIndex
      {
         value = "1";
         type = "int";
      }
   }
   element hps_0.f2h_sdram0_data
   {
      datum baseAddress
      {
         value = "0";
         type = "String";
      }
   }
   element hps_0.f2h_sdram1_data
   {
      datum baseAddress
      {
         value = "0";
         type = "String";
      }
   }
   element hps_nios_fifo
   {
      datum _sortIndex
      {
         value = "8";
         type = "int";
      }
   }
   element hps_nios_fifo.in
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "1064960";
         type = "String";
      }
   }
   element hps_nios_fifo.in_csr
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "1064992";
         type = "String";
      }
   }
   element hps_nios_fifo.out
   {
      datum baseAddress
      {
         value = "528648";
         type = "String";
      }
   }
   element hps_nios_fifo.out_csr
   {
      datum baseAddress
      {
         value = "528512";
         type = "String";
      }
   }
   element hps_nios_uart
   {
      datum _sortIndex
      {
         value = "7";
         type = "int";
      }
   }
   element hps_nios_uart.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "1064960";
         type = "String";
      }
   }
   element jtag_uart_0
   {
      datum _sortIndex
      {
         value = "16";
         type = "int";
      }
   }
   element jtag_uart_0.avalon_jtag_slave
   {
      datum baseAddress
      {
         value = "528640";
         type = "String";
      }
   }
   element main_timer
   {
      datum _sortIndex
      {
         value = "17";
         type = "int";
      }
   }
   element main_timer.s1
   {
      datum baseAddress
      {
         value = "528608";
         type = "String";
      }
   }
   element mm_reset_0
   {
      datum _sortIndex
      {
         value = "2";
         type = "int";
      }
   }
   element mm_reset_0.mm
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
   }
   element nios2
   {
      datum _sortIndex
      {
         value = "18";
         type = "int";
      }
   }
   element nios2.jtag_debug_module
   {
      datum baseAddress
      {
         value = "526336";
         type = "String";
      }
   }
   element nios_hps_fifo
   {
      datum _sortIndex
      {
         value = "9";
         type = "int";
      }
   }
   element nios_hps_fifo.in
   {
      datum baseAddress
      {
         value = "528652";
         type = "String";
      }
   }
   element nios_hps_fifo.in_csr
   {
      datum baseAddress
      {
         value = "528544";
         type = "String";
      }
   }
   element nios_hps_fifo.out
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "1065216";
         type = "String";
      }
   }
   element nios_hps_fifo.out_csr
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "1065248";
         type = "String";
      }
   }
   element nios_hps_uart
   {
      datum _sortIndex
      {
         value = "10";
         type = "int";
      }
   }
   element nios_hps_uart.s1
   {
      datum baseAddress
      {
         value = "528576";
         type = "String";
      }
   }
   element pixel_cluster_0
   {
      datum _sortIndex
      {
         value = "14";
         type = "int";
      }
   }
   element pixel_cluster_0.mm
   {
      datum baseAddress
      {
         value = "528448";
         type = "String";
      }
   }
   element pixel_cluster_1
   {
      datum _sortIndex
      {
         value = "15";
         type = "int";
      }
   }
   element pixel_cluster_1.mm
   {
      datum baseAddress
      {
         value = "528384";
         type = "String";
      }
   }
   element sdram
   {
      datum _sortIndex
      {
         value = "19";
         type = "int";
      }
   }
   element sdram.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "0";
         type = "String";
      }
   }
   element touchscreen_uart
   {
      datum _sortIndex
      {
         value = "3";
         type = "int";
      }
   }
   element touchscreen_uart.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "268435456";
         type = "String";
      }
   }
   element uart_4
   {
      datum _sortIndex
      {
         value = "6";
         type = "int";
      }
   }
   element uart_4.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "268447744";
         type = "String";
      }
   }
   element video_uart
   {
      datum _sortIndex
      {
         value = "4";
         type = "int";
      }
   }
   element video_uart.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "268439552";
         type = "String";
      }
   }
   element wifi_uart
   {
      datum _sortIndex
      {
         value = "5";
         type = "int";
      }
   }
   element wifi_uart.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "268443648";
         type = "String";
      }
   }
}
]]></parameter>
 <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
 <parameter name="device" value="5CSEMA5F31C6" />
 <parameter name="deviceFamily" value="Cyclone V" />
 <parameter name="deviceSpeedGrade" value="6" />
 <parameter name="fabricMode" value="QSYS" />
 <parameter name="generateLegacySim" value="false" />
 <parameter name="generationId" value="0" />
 <parameter name="globalResetBus" value="false" />
 <parameter name="hdlLanguage" value="VERILOG" />
 <parameter name="hideFromIPCatalog" value="false" />
 <parameter name="lockedInterfaceDefinition" value="" />
 <parameter name="maxAdditionalLatency" value="1" />
 <parameter name="projectName" value="cpen391_group5.qpf" />
 <parameter name="sopcBorderPoints" value="false" />
 <parameter name="systemHash" value="0" />
 <parameter name="testBenchDutName" value="" />
 <parameter name="timeStamp" value="0" />
 <parameter name="useTestBenchNamingPattern" value="false" />
 <instanceScript></instanceScript>
 <interface name="clk" internal="clocks.ref_clk" type="clock" dir="end" />
 <interface name="hps_io" internal="hps_0.hps_io" type="conduit" dir="end" />
 <interface name="hps_mem" internal="hps_0.memory" type="conduit" dir="end" />
 <interface name="hps_uart" internal="hps_nios_uart.external_connection" />
 <interface name="nios_uart" internal="nios_hps_uart.external_connection" />
 <interface name="reset" internal="clocks.ref_reset" type="reset" dir="end" />
 <interface name="sdram_clk" internal="clocks.sdram_clk" type="clock" dir="start" />
 <interface name="sdram_wire" internal="sdram.wire" type="conduit" dir="end" />
 <interface
   name="touchscreen"
   internal="touchscreen_uart.external_connection"
   type="conduit"
   dir="end" />
 <interface
   name="uart_4"
   internal="uart_4.external_connection"
   type="conduit"
   dir="end" />
 <interface
   name="vga_controller"
   internal="Video_Subsystem.vga_controller"
   type="conduit"
   dir="end" />
 <interface
   name="video"
   internal="video_uart.external_connection"
   type="conduit"
   dir="end" />
 <interface
   name="video_in_decoder"
   internal="Video_Subsystem.video_in_decoder"
   type="conduit"
   dir="end" />
 <interface
   name="wifi"
   internal="wifi_uart.external_connection"
   type="conduit"
   dir="end" />
 <module
   name="Draw_Subsystem"
   kind="cpen391_group5_qsys_draw"
   version="1.0"
   enabled="1">
  <parameter name="AUTO_CLK_CLOCK_DOMAIN" value="5" />
  <parameter name="AUTO_CLK_CLOCK_RATE" value="50000000" />
  <parameter name="AUTO_CLK_RESET_DOMAIN" value="5" />
  <parameter name="AUTO_DEVICE" value="5CSEMA5F31C6" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone V" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="6" />
  <parameter name="AUTO_DMA_MASTER_ADDRESS_MAP"><![CDATA[<address-map><slave name='hps_0_bridges.f2h_sdram0_data' start='0x0' end='0x100000000' /></address-map>]]></parameter>
  <parameter name="AUTO_DMA_MASTER_ADDRESS_WIDTH">com.altera.entityinterfaces.moduleext.AddressWidthType@6668769b</parameter>
  <parameter name="AUTO_GENERATION_ID" value="0" />
  <parameter name="AUTO_UNIQUE_ID">$${FILENAME}_Draw_Subsystem</parameter>
 </module>
 <module
   name="Video_Subsystem"
   kind="cpen391_group5_qsys_video"
   version="1.0"
   enabled="1">
  <parameter name="AUTO_CLK_CLOCK_DOMAIN" value="5" />
  <parameter name="AUTO_CLK_CLOCK_RATE" value="50000000" />
  <parameter name="AUTO_CLK_RESET_DOMAIN" value="5" />
  <parameter name="AUTO_DEVICE" value="5CSEMA5F31C6" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone V" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="6" />
  <parameter name="AUTO_GENERATION_ID" value="0" />
  <parameter name="AUTO_UNIQUE_ID">$${FILENAME}_Video_Subsystem</parameter>
 </module>
 <module
   name="clocks"
   kind="altera_up_avalon_sys_sdram_pll"
   version="15.0"
   enabled="1">
  <parameter name="AUTO_DEVICE" value="5CSEMA5F31C6" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="6" />
  <parameter name="CIII_boards" value="DE0" />
  <parameter name="CIV_boards" value="DE2-115" />
  <parameter name="CV_boards" value="DE1-SoC" />
  <parameter name="device_family" value="Cyclone V" />
  <parameter name="gui_outclk" value="50.0" />
  <parameter name="gui_refclk" value="50.0" />
  <parameter name="other_boards" value="None" />
 </module>
 <module
   name="graphics_controller_0"
   kind="graphics_controller"
   version="1.0"
   enabled="1">
  <parameter name="pixel_idle" value="0" />
  <parameter name="pixel_write" value="1" />
  <parameter name="rec_cmp_x" value="3" />
  <parameter name="rec_cmp_y" value="5" />
  <parameter name="rec_idle" value="0" />
  <parameter name="rec_inc_x" value="12" />
  <parameter name="rec_inc_y" value="22" />
  <parameter name="rec_init" value="1" />
  <parameter name="rec_write" value="34" />
 </module>
 <module name="hps_0" kind="altera_hps" version="15.0" enabled="1">
  <parameter name="ABSTRACT_REAL_COMPARE_TEST" value="false" />
  <parameter name="ABS_RAM_MEM_INIT_FILENAME" value="meminit" />
  <parameter name="ACV_PHY_CLK_ADD_FR_PHASE" value="0.0" />
  <parameter name="AC_PACKAGE_DESKEW" value="false" />
  <parameter name="AC_ROM_USER_ADD_0" value="0_0000_0000_0000" />
  <parameter name="AC_ROM_USER_ADD_1" value="0_0000_0000_1000" />
  <parameter name="ADDR_ORDER" value="0" />
  <parameter name="ADD_EFFICIENCY_MONITOR" value="false" />
  <parameter name="ADD_EXTERNAL_SEQ_DEBUG_NIOS" value="false" />
  <parameter name="ADVANCED_CK_PHASES" value="false" />
  <parameter name="ADVERTIZE_SEQUENCER_SW_BUILD_FILES" value="false" />
  <parameter name="AFI_DEBUG_INFO_WIDTH" value="32" />
  <parameter name="ALTMEMPHY_COMPATIBLE_MODE" value="false" />
  <parameter name="AP_MODE" value="false" />
  <parameter name="AP_MODE_EN" value="0" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="6" />
  <parameter name="AUTO_PD_CYCLES" value="0" />
  <parameter name="AUTO_POWERDN_EN" value="false" />
  <parameter name="AVL_DATA_WIDTH_PORT" value="32,32,32,32,32,32" />
  <parameter name="AVL_MAX_SIZE" value="4" />
  <parameter name="BONDING_OUT_ENABLED" value="false" />
  <parameter name="BOOTFROMFPGA_Enable" value="false" />
  <parameter name="BSEL" value="1" />
  <parameter name="BSEL_EN" value="false" />
  <parameter name="BYTE_ENABLE" value="true" />
  <parameter name="C2P_WRITE_CLOCK_ADD_PHASE" value="0.0" />
  <parameter name="CALIBRATION_MODE" value="Skip" />
  <parameter name="CALIB_REG_WIDTH" value="8" />
  <parameter name="CAN0_Mode" value="N/A" />
  <parameter name="CAN0_PinMuxing" value="Unused" />
  <parameter name="CAN1_Mode" value="N/A" />
  <parameter name="CAN1_PinMuxing" value="Unused" />
  <parameter name="CFG_DATA_REORDERING_TYPE" value="INTER_BANK" />
  <parameter name="CFG_REORDER_DATA" value="true" />
  <parameter name="CFG_TCCD_NS" value="2.5" />
  <parameter name="COMMAND_PHASE" value="0.0" />
  <parameter name="CONTROLLER_LATENCY" value="5" />
  <parameter name="CORE_DEBUG_CONNECTION" value="EXPORT" />
  <parameter name="CPORT_TYPE_PORT">Bidirectional,Bidirectional,Bidirectional,Bidirectional,Bidirectional,Bidirectional</parameter>
  <parameter name="CSEL" value="0" />
  <parameter name="CSEL_EN" value="false" />
  <parameter name="CTI_Enable" value="false" />
  <parameter name="CTL_AUTOPCH_EN" value="false" />
  <parameter name="CTL_CMD_QUEUE_DEPTH" value="8" />
  <parameter name="CTL_CSR_CONNECTION" value="INTERNAL_JTAG" />
  <parameter name="CTL_CSR_ENABLED" value="false" />
  <parameter name="CTL_CSR_READ_ONLY" value="1" />
  <parameter name="CTL_DEEP_POWERDN_EN" value="false" />
  <parameter name="CTL_DYNAMIC_BANK_ALLOCATION" value="false" />
  <parameter name="CTL_DYNAMIC_BANK_NUM" value="4" />
  <parameter name="CTL_ECC_AUTO_CORRECTION_ENABLED" value="false" />
  <parameter name="CTL_ECC_ENABLED" value="false" />
  <parameter name="CTL_ENABLE_BURST_INTERRUPT" value="false" />
  <parameter name="CTL_ENABLE_BURST_TERMINATE" value="false" />
  <parameter name="CTL_HRB_ENABLED" value="false" />
  <parameter name="CTL_LOOK_AHEAD_DEPTH" value="4" />
  <parameter name="CTL_SELF_REFRESH_EN" value="false" />
  <parameter name="CTL_USR_REFRESH_EN" value="false" />
  <parameter name="CTL_ZQCAL_EN" value="false" />
  <parameter name="CUT_NEW_FAMILY_TIMING" value="true" />
  <parameter name="DAT_DATA_WIDTH" value="32" />
  <parameter name="DEBUGAPB_Enable" value="false" />
  <parameter name="DEBUG_MODE" value="false" />
  <parameter name="DEVICE_DEPTH" value="1" />
  <parameter name="DEVICE_FAMILY_PARAM" value="" />
  <parameter name="DISABLE_CHILD_MESSAGING" value="false" />
  <parameter name="DISCRETE_FLY_BY" value="true" />
  <parameter name="DLL_SHARING_MODE" value="None" />
  <parameter name="DMA_Enable">No,No,No,No,No,No,No,No</parameter>
  <parameter name="DQS_DQSN_MODE" value="DIFFERENTIAL" />
  <parameter name="DQ_INPUT_REG_USE_CLKN" value="false" />
  <parameter name="DUPLICATE_AC" value="false" />
  <parameter name="ED_EXPORT_SEQ_DEBUG" value="false" />
  <parameter name="EMAC0_Mode" value="N/A" />
  <parameter name="EMAC0_PinMuxing" value="Unused" />
  <parameter name="EMAC1_Mode" value="RGMII" />
  <parameter name="EMAC1_PinMuxing" value="HPS I/O Set 0" />
  <parameter name="ENABLE_ABS_RAM_MEM_INIT" value="false" />
  <parameter name="ENABLE_BONDING" value="false" />
  <parameter name="ENABLE_BURST_MERGE" value="false" />
  <parameter name="ENABLE_CTRL_AVALON_INTERFACE" value="true" />
  <parameter name="ENABLE_DELAY_CHAIN_WRITE" value="false" />
  <parameter name="ENABLE_EMIT_BFM_MASTER" value="false" />
  <parameter name="ENABLE_EXPORT_SEQ_DEBUG_BRIDGE" value="false" />
  <parameter name="ENABLE_EXTRA_REPORTING" value="false" />
  <parameter name="ENABLE_ISS_PROBES" value="false" />
  <parameter name="ENABLE_NON_DESTRUCTIVE_CALIB" value="false" />
  <parameter name="ENABLE_NON_DES_CAL" value="false" />
  <parameter name="ENABLE_NON_DES_CAL_TEST" value="false" />
  <parameter name="ENABLE_SEQUENCER_MARGINING_ON_BY_DEFAULT" value="false" />
  <parameter name="ENABLE_USER_ECC" value="false" />
  <parameter name="EXPORT_AFI_HALF_CLK" value="false" />
  <parameter name="EXTRA_SETTINGS" value="" />
  <parameter name="F2H_AXI_CLOCK_FREQ" value="50000000" />
  <parameter name="F2H_SDRAM0_CLOCK_FREQ" value="50000000" />
  <parameter name="F2H_SDRAM1_CLOCK_FREQ" value="50000000" />
  <parameter name="F2H_SDRAM2_CLOCK_FREQ" value="100" />
  <parameter name="F2H_SDRAM3_CLOCK_FREQ" value="100" />
  <parameter name="F2H_SDRAM4_CLOCK_FREQ" value="100" />
  <parameter name="F2H_SDRAM5_CLOCK_FREQ" value="100" />
  <parameter name="F2SCLK_COLDRST_Enable" value="false" />
  <parameter name="F2SCLK_DBGRST_Enable" value="false" />
  <parameter name="F2SCLK_PERIPHCLK_Enable" value="false" />
  <parameter name="F2SCLK_PERIPHCLK_FREQ" value="0" />
  <parameter name="F2SCLK_SDRAMCLK_Enable" value="false" />
  <parameter name="F2SCLK_SDRAMCLK_FREQ" value="0" />
  <parameter name="F2SCLK_WARMRST_Enable" value="false" />
  <parameter name="F2SDRAM_Type">Avalon-MM Bidirectional,Avalon-MM Bidirectional</parameter>
  <parameter name="F2SDRAM_Width" value="64,64" />
  <parameter name="F2SINTERRUPT_Enable" value="true" />
  <parameter name="F2S_Width" value="1" />
  <parameter name="FORCED_NON_LDC_ADDR_CMD_MEM_CK_INVERT" value="false" />
  <parameter name="FORCED_NUM_WRITE_FR_CYCLE_SHIFTS" value="0" />
  <parameter name="FORCE_DQS_TRACKING" value="AUTO" />
  <parameter name="FORCE_MAX_LATENCY_COUNT_WIDTH" value="0" />
  <parameter name="FORCE_SEQUENCER_TCL_DEBUG_MODE" value="false" />
  <parameter name="FORCE_SHADOW_REGS" value="AUTO" />
  <parameter name="FORCE_SYNTHESIS_LANGUAGE" value="" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC0_RX_CLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC0_TX_CLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC1_RX_CLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC1_TX_CLK_IN" value="100" />
  <parameter
     name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC_PTP_REF_CLOCK"
     value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_I2C0_SCL_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_I2C1_SCL_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_I2C2_SCL_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_I2C3_SCL_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_SDIO_CLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_SPIS0_SCLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_SPIS1_SCLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_USB0_CLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_USB1_CLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_EMAC0_GTX_CLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_EMAC0_MD_CLK" value="2.5" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_EMAC1_GTX_CLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_EMAC1_MD_CLK" value="2.5" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_I2C0_CLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_I2C1_CLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_I2C2_CLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_I2C3_CLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_QSPI_SCLK_OUT" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_SDIO_CCLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_SPIM0_SCLK_OUT" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_SPIM1_SCLK_OUT" value="100" />
  <parameter name="GPIO_Enable">No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No</parameter>
  <parameter name="GP_Enable" value="false" />
  <parameter name="H2F_AXI_CLOCK_FREQ" value="50000000" />
  <parameter name="H2F_CTI_CLOCK_FREQ" value="100" />
  <parameter name="H2F_DEBUG_APB_CLOCK_FREQ" value="100" />
  <parameter name="H2F_LW_AXI_CLOCK_FREQ" value="100" />
  <parameter name="H2F_TPIU_CLOCK_IN_FREQ" value="100" />
  <parameter name="HARD_EMIF" value="true" />
  <parameter name="HCX_COMPAT_MODE" value="false" />
  <parameter name="HHP_HPS" value="true" />
  <parameter name="HHP_HPS_SIMULATION" value="false" />
  <parameter name="HHP_HPS_VERIFICATION" value="false" />
  <parameter name="HLGPI_Enable" value="false" />
  <parameter name="HPS_PROTOCOL" value="DDR3" />
  <parameter name="I2C0_Mode" value="I2C" />
  <parameter name="I2C0_PinMuxing" value="HPS I/O Set 1" />
  <parameter name="I2C1_Mode" value="N/A" />
  <parameter name="I2C1_PinMuxing" value="Unused" />
  <parameter name="I2C2_Mode" value="N/A" />
  <parameter name="I2C2_PinMuxing" value="Unused" />
  <parameter name="I2C3_Mode" value="N/A" />
  <parameter name="I2C3_PinMuxing" value="Unused" />
  <parameter name="INCLUDE_BOARD_DELAY_MODEL" value="false" />
  <parameter name="INCLUDE_MULTIRANK_BOARD_DELAY_MODEL" value="false" />
  <parameter name="IS_ES_DEVICE" value="false" />
  <parameter name="LOANIO_Enable">No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No</parameter>
  <parameter name="LOCAL_ID_WIDTH" value="8" />
  <parameter name="LRDIMM_EXTENDED_CONFIG">0x000000000000000000</parameter>
  <parameter name="LWH2F_Enable" value="false" />
  <parameter name="MARGIN_VARIATION_TEST" value="false" />
  <parameter name="MAX_PENDING_RD_CMD" value="32" />
  <parameter name="MAX_PENDING_WR_CMD" value="16" />
  <parameter name="MEM_ASR" value="Manual" />
  <parameter name="MEM_ATCL" value="Disabled" />
  <parameter name="MEM_AUTO_LEVELING_MODE" value="true" />
  <parameter name="MEM_BANKADDR_WIDTH" value="3" />
  <parameter name="MEM_BL" value="OTF" />
  <parameter name="MEM_BT" value="Sequential" />
  <parameter name="MEM_CK_PHASE" value="0.0" />
  <parameter name="MEM_CK_WIDTH" value="1" />
  <parameter name="MEM_CLK_EN_WIDTH" value="1" />
  <parameter name="MEM_CLK_FREQ" value="400.0" />
  <parameter name="MEM_CLK_FREQ_MAX" value="800.0" />
  <parameter name="MEM_COL_ADDR_WIDTH" value="10" />
  <parameter name="MEM_CS_WIDTH" value="1" />
  <parameter name="MEM_DEVICE" value="MISSING_MODEL" />
  <parameter name="MEM_DLL_EN" value="true" />
  <parameter name="MEM_DQ_PER_DQS" value="8" />
  <parameter name="MEM_DQ_WIDTH" value="32" />
  <parameter name="MEM_DRV_STR" value="RZQ/7" />
  <parameter name="MEM_FORMAT" value="DISCRETE" />
  <parameter name="MEM_GUARANTEED_WRITE_INIT" value="false" />
  <parameter name="MEM_IF_BOARD_BASE_DELAY" value="10" />
  <parameter name="MEM_IF_DM_PINS_EN" value="true" />
  <parameter name="MEM_IF_DQSN_EN" value="true" />
  <parameter name="MEM_IF_SIM_VALID_WINDOW" value="0" />
  <parameter name="MEM_INIT_EN" value="false" />
  <parameter name="MEM_INIT_FILE" value="" />
  <parameter name="MEM_MIRROR_ADDRESSING" value="0" />
  <parameter name="MEM_NUMBER_OF_DIMMS" value="1" />
  <parameter name="MEM_NUMBER_OF_RANKS_PER_DEVICE" value="1" />
  <parameter name="MEM_NUMBER_OF_RANKS_PER_DIMM" value="1" />
  <parameter name="MEM_PD" value="DLL off" />
  <parameter name="MEM_RANK_MULTIPLICATION_FACTOR" value="1" />
  <parameter name="MEM_ROW_ADDR_WIDTH" value="15" />
  <parameter name="MEM_RTT_NOM" value="RZQ/4" />
  <parameter name="MEM_RTT_WR" value="RZQ/4" />
  <parameter name="MEM_SRT" value="Normal" />
  <parameter name="MEM_TCL" value="11" />
  <parameter name="MEM_TFAW_NS" value="30.0" />
  <parameter name="MEM_TINIT_US" value="500" />
  <parameter name="MEM_TMRD_CK" value="4" />
  <parameter name="MEM_TRAS_NS" value="35.0" />
  <parameter name="MEM_TRCD_NS" value="13.75" />
  <parameter name="MEM_TREFI_US" value="7.8" />
  <parameter name="MEM_TRFC_NS" value="260.0" />
  <parameter name="MEM_TRP_NS" value="13.75" />
  <parameter name="MEM_TRRD_NS" value="7.5" />
  <parameter name="MEM_TRTP_NS" value="7.5" />
  <parameter name="MEM_TWR_NS" value="15.0" />
  <parameter name="MEM_TWTR" value="4" />
  <parameter name="MEM_USER_LEVELING_MODE" value="Leveling" />
  <parameter name="MEM_VENDOR" value="Other" />
  <parameter name="MEM_VERBOSE" value="true" />
  <parameter name="MEM_VOLTAGE" value="1.5V DDR3" />
  <parameter name="MEM_WTCL" value="8" />
  <parameter name="MPU_EVENTS_Enable" value="false" />
  <parameter name="MRS_MIRROR_PING_PONG_ATSO" value="false" />
  <parameter name="MULTICAST_EN" value="false" />
  <parameter name="NAND_Mode" value="N/A" />
  <parameter name="NAND_PinMuxing" value="Unused" />
  <parameter name="NEXTGEN" value="true" />
  <parameter name="NIOS_ROM_DATA_WIDTH" value="32" />
  <parameter name="NUM_DLL_SHARING_INTERFACES" value="1" />
  <parameter name="NUM_EXTRA_REPORT_PATH" value="10" />
  <parameter name="NUM_OCT_SHARING_INTERFACES" value="1" />
  <parameter name="NUM_OF_PORTS" value="1" />
  <parameter name="NUM_PLL_SHARING_INTERFACES" value="1" />
  <parameter name="OCT_SHARING_MODE" value="None" />
  <parameter name="P2C_READ_CLOCK_ADD_PHASE" value="0.0" />
  <parameter name="PACKAGE_DESKEW" value="false" />
  <parameter name="PARSE_FRIENDLY_DEVICE_FAMILY_PARAM" value="" />
  <parameter name="PARSE_FRIENDLY_DEVICE_FAMILY_PARAM_VALID" value="false" />
  <parameter name="PHY_CSR_CONNECTION" value="INTERNAL_JTAG" />
  <parameter name="PHY_CSR_ENABLED" value="false" />
  <parameter name="PHY_ONLY" value="false" />
  <parameter name="PINGPONGPHY_EN" value="false" />
  <parameter name="PLL_ADDR_CMD_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_ADDR_CMD_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_ADDR_CMD_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_ADDR_CMD_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_ADDR_CMD_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_ADDR_CMD_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_AFI_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_AFI_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_AFI_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_AFI_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_AFI_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_AFI_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_AFI_HALF_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_AFI_HALF_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_AFI_HALF_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_AFI_HALF_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_AFI_HALF_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_AFI_HALF_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_AFI_PHY_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_AFI_PHY_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_AFI_PHY_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_AFI_PHY_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_AFI_PHY_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_AFI_PHY_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_C2P_WRITE_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_C2P_WRITE_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_C2P_WRITE_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_C2P_WRITE_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_C2P_WRITE_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_C2P_WRITE_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_CLK_PARAM_VALID" value="false" />
  <parameter name="PLL_CONFIG_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_CONFIG_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_CONFIG_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_CONFIG_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_CONFIG_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_CONFIG_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_DR_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_DR_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_DR_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_DR_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_DR_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_DR_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_HR_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_HR_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_HR_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_HR_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_HR_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_HR_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_LOCATION" value="Top_Bottom" />
  <parameter name="PLL_MEM_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_MEM_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_MEM_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_MEM_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_MEM_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_MEM_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_NIOS_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_NIOS_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_NIOS_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_NIOS_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_NIOS_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_NIOS_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_P2C_READ_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_P2C_READ_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_P2C_READ_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_P2C_READ_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_P2C_READ_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_P2C_READ_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_SHARING_MODE" value="None" />
  <parameter name="PLL_WRITE_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_WRITE_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_WRITE_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_WRITE_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_WRITE_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_WRITE_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="POWER_OF_TWO_BUS" value="false" />
  <parameter name="PRIORITY_PORT" value="1,1,1,1,1,1" />
  <parameter name="QSPI_Mode" value="1 SS" />
  <parameter name="QSPI_PinMuxing" value="HPS I/O Set 0" />
  <parameter name="RATE" value="Full" />
  <parameter name="RDIMM_CONFIG" value="0000000000000000" />
  <parameter name="READ_DQ_DQS_CLOCK_SOURCE" value="INVERTED_DQS_BUS" />
  <parameter name="READ_FIFO_SIZE" value="8" />
  <parameter name="REFRESH_BURST_VALIDATION" value="false" />
  <parameter name="REFRESH_INTERVAL" value="15000" />
  <parameter name="REF_CLK_FREQ" value="25.0" />
  <parameter name="REF_CLK_FREQ_MAX_PARAM" value="0.0" />
  <parameter name="REF_CLK_FREQ_MIN_PARAM" value="0.0" />
  <parameter name="REF_CLK_FREQ_PARAM_VALID" value="false" />
  <parameter name="S2FCLK_COLDRST_Enable" value="false" />
  <parameter name="S2FCLK_PENDINGRST_Enable" value="false" />
  <parameter name="S2FCLK_USER0CLK_Enable" value="false" />
  <parameter name="S2FCLK_USER1CLK_Enable" value="false" />
  <parameter name="S2FCLK_USER1CLK_FREQ" value="100.0" />
  <parameter name="S2FCLK_USER2CLK_Enable" value="false" />
  <parameter name="S2FCLK_USER2CLK_FREQ" value="100.0" />
  <parameter name="S2FINTERRUPT_CAN_Enable" value="false" />
  <parameter name="S2FINTERRUPT_CLOCKPERIPHERAL_Enable" value="false" />
  <parameter name="S2FINTERRUPT_CTI_Enable" value="false" />
  <parameter name="S2FINTERRUPT_DMA_Enable" value="false" />
  <parameter name="S2FINTERRUPT_EMAC_Enable" value="false" />
  <parameter name="S2FINTERRUPT_FPGAMANAGER_Enable" value="false" />
  <parameter name="S2FINTERRUPT_GPIO_Enable" value="false" />
  <parameter name="S2FINTERRUPT_I2CEMAC_Enable" value="false" />
  <parameter name="S2FINTERRUPT_I2CPERIPHERAL_Enable" value="false" />
  <parameter name="S2FINTERRUPT_L4TIMER_Enable" value="false" />
  <parameter name="S2FINTERRUPT_NAND_Enable" value="false" />
  <parameter name="S2FINTERRUPT_OSCTIMER_Enable" value="false" />
  <parameter name="S2FINTERRUPT_QSPI_Enable" value="false" />
  <parameter name="S2FINTERRUPT_SDMMC_Enable" value="false" />
  <parameter name="S2FINTERRUPT_SPIMASTER_Enable" value="false" />
  <parameter name="S2FINTERRUPT_SPISLAVE_Enable" value="false" />
  <parameter name="S2FINTERRUPT_UART_Enable" value="false" />
  <parameter name="S2FINTERRUPT_USB_Enable" value="false" />
  <parameter name="S2FINTERRUPT_WATCHDOG_Enable" value="false" />
  <parameter name="S2F_Width" value="1" />
  <parameter name="SDIO_Mode" value="4-bit Data" />
  <parameter name="SDIO_PinMuxing" value="HPS I/O Set 0" />
  <parameter name="SEQUENCER_TYPE" value="NIOS" />
  <parameter name="SEQ_MODE" value="0" />
  <parameter name="SKIP_MEM_INIT" value="true" />
  <parameter name="SOPC_COMPAT_RESET" value="false" />
  <parameter name="SPEED_GRADE" value="7" />
  <parameter name="SPIM0_Mode" value="N/A" />
  <parameter name="SPIM0_PinMuxing" value="Unused" />
  <parameter name="SPIM1_Mode" value="N/A" />
  <parameter name="SPIM1_PinMuxing" value="Unused" />
  <parameter name="SPIS0_Mode" value="N/A" />
  <parameter name="SPIS0_PinMuxing" value="Unused" />
  <parameter name="SPIS1_Mode" value="N/A" />
  <parameter name="SPIS1_PinMuxing" value="Unused" />
  <parameter name="STARVE_LIMIT" value="10" />
  <parameter name="STM_Enable" value="false" />
  <parameter name="SYS_INFO_DEVICE_FAMILY" value="Cyclone V" />
  <parameter name="TEST_Enable" value="false" />
  <parameter name="TIMING_BOARD_AC_EYE_REDUCTION_H" value="0.0" />
  <parameter name="TIMING_BOARD_AC_EYE_REDUCTION_SU" value="0.0" />
  <parameter name="TIMING_BOARD_AC_SKEW" value="0.02" />
  <parameter name="TIMING_BOARD_AC_SLEW_RATE" value="1.0" />
  <parameter name="TIMING_BOARD_AC_TO_CK_SKEW" value="0.01" />
  <parameter name="TIMING_BOARD_CK_CKN_SLEW_RATE" value="2.0" />
  <parameter name="TIMING_BOARD_DELTA_DQS_ARRIVAL_TIME" value="0.0" />
  <parameter name="TIMING_BOARD_DELTA_READ_DQS_ARRIVAL_TIME" value="0.0" />
  <parameter name="TIMING_BOARD_DERATE_METHOD" value="AUTO" />
  <parameter name="TIMING_BOARD_DQS_DQSN_SLEW_RATE" value="2.0" />
  <parameter name="TIMING_BOARD_DQ_EYE_REDUCTION" value="0.0" />
  <parameter name="TIMING_BOARD_DQ_SLEW_RATE" value="1.0" />
  <parameter name="TIMING_BOARD_DQ_TO_DQS_SKEW" value="0.05" />
  <parameter name="TIMING_BOARD_ISI_METHOD" value="AUTO" />
  <parameter name="TIMING_BOARD_MAX_CK_DELAY" value="0.03" />
  <parameter name="TIMING_BOARD_MAX_DQS_DELAY" value="0.02" />
  <parameter name="TIMING_BOARD_READ_DQ_EYE_REDUCTION" value="0.0" />
  <parameter name="TIMING_BOARD_SKEW_BETWEEN_DIMMS" value="0.05" />
  <parameter name="TIMING_BOARD_SKEW_BETWEEN_DQS" value="0.06" />
  <parameter name="TIMING_BOARD_SKEW_CKDQS_DIMM_MAX" value="0.12" />
  <parameter name="TIMING_BOARD_SKEW_CKDQS_DIMM_MIN" value="0.06" />
  <parameter name="TIMING_BOARD_SKEW_WITHIN_DQS" value="0.01" />
  <parameter name="TIMING_BOARD_TDH" value="0.0" />
  <parameter name="TIMING_BOARD_TDS" value="0.0" />
  <parameter name="TIMING_BOARD_TIH" value="0.0" />
  <parameter name="TIMING_BOARD_TIS" value="0.0" />
  <parameter name="TIMING_TDH" value="65" />
  <parameter name="TIMING_TDQSCK" value="255" />
  <parameter name="TIMING_TDQSCKDL" value="1200" />
  <parameter name="TIMING_TDQSCKDM" value="900" />
  <parameter name="TIMING_TDQSCKDS" value="450" />
  <parameter name="TIMING_TDQSH" value="0.35" />
  <parameter name="TIMING_TDQSQ" value="125" />
  <parameter name="TIMING_TDQSS" value="0.25" />
  <parameter name="TIMING_TDS" value="30" />
  <parameter name="TIMING_TDSH" value="0.2" />
  <parameter name="TIMING_TDSS" value="0.2" />
  <parameter name="TIMING_TIH" value="140" />
  <parameter name="TIMING_TIS" value="180" />
  <parameter name="TIMING_TQH" value="0.38" />
  <parameter name="TIMING_TQHS" value="300" />
  <parameter name="TIMING_TQSH" value="0.4" />
  <parameter name="TPIUFPGA_Enable" value="false" />
  <parameter name="TPIUFPGA_alt" value="false" />
  <parameter name="TRACE_Mode" value="N/A" />
  <parameter name="TRACE_PinMuxing" value="Unused" />
  <parameter name="TRACKING_ERROR_TEST" value="false" />
  <parameter name="TRACKING_WATCH_TEST" value="false" />
  <parameter name="TREFI" value="35100" />
  <parameter name="TRFC" value="350" />
  <parameter name="UART0_Mode" value="No Flow Control" />
  <parameter name="UART0_PinMuxing" value="HPS I/O Set 2" />
  <parameter name="UART1_Mode" value="N/A" />
  <parameter name="UART1_PinMuxing" value="Unused" />
  <parameter name="USB0_Mode" value="N/A" />
  <parameter name="USB0_PinMuxing" value="Unused" />
  <parameter name="USB1_Mode" value="SDR" />
  <parameter name="USB1_PinMuxing" value="HPS I/O Set 0" />
  <parameter name="USER_DEBUG_LEVEL" value="1" />
  <parameter name="USE_AXI_ADAPTOR" value="false" />
  <parameter name="USE_FAKE_PHY" value="false" />
  <parameter name="USE_MEM_CLK_FREQ" value="false" />
  <parameter name="USE_MM_ADAPTOR" value="true" />
  <parameter name="USE_SEQUENCER_BFM" value="false" />
  <parameter name="WEIGHT_PORT" value="0,0,0,0,0,0" />
  <parameter name="WRBUFFER_ADDR_WIDTH" value="6" />
  <parameter name="can0_clk_div" value="1" />
  <parameter name="can1_clk_div" value="1" />
  <parameter name="configure_advanced_parameters" value="false" />
  <parameter name="customize_device_pll_info" value="false" />
  <parameter name="dbctrl_stayosc1" value="true" />
  <parameter name="dbg_at_clk_div" value="0" />
  <parameter name="dbg_clk_div" value="1" />
  <parameter name="dbg_trace_clk_div" value="0" />
  <parameter name="desired_can0_clk_mhz" value="100.0" />
  <parameter name="desired_can1_clk_mhz" value="100.0" />
  <parameter name="desired_cfg_clk_mhz" value="100.0" />
  <parameter name="desired_emac0_clk_mhz" value="250.0" />
  <parameter name="desired_emac1_clk_mhz" value="250.0" />
  <parameter name="desired_gpio_db_clk_hz" value="32000" />
  <parameter name="desired_l4_mp_clk_mhz" value="100.0" />
  <parameter name="desired_l4_sp_clk_mhz" value="100.0" />
  <parameter name="desired_mpu_clk_mhz" value="800.0" />
  <parameter name="desired_nand_clk_mhz" value="12.5" />
  <parameter name="desired_qspi_clk_mhz" value="400.0" />
  <parameter name="desired_sdmmc_clk_mhz" value="200.0" />
  <parameter name="desired_spi_m_clk_mhz" value="200.0" />
  <parameter name="desired_usb_mp_clk_mhz" value="200.0" />
  <parameter name="device_name" value="5CSEMA5F31C6" />
  <parameter name="device_pll_info_manual">{320000000 1600000000} {320000000 1000000000} {800000000 400000000 400000000}</parameter>
  <parameter name="eosc1_clk_mhz" value="25.0" />
  <parameter name="eosc2_clk_mhz" value="25.0" />
  <parameter name="gpio_db_clk_div" value="6249" />
  <parameter name="l3_mp_clk_div" value="1" />
  <parameter name="l3_sp_clk_div" value="1" />
  <parameter name="l4_mp_clk_div" value="1" />
  <parameter name="l4_mp_clk_source" value="1" />
  <parameter name="l4_sp_clk_div" value="1" />
  <parameter name="l4_sp_clk_source" value="1" />
  <parameter name="main_pll_c3" value="3" />
  <parameter name="main_pll_c4" value="3" />
  <parameter name="main_pll_c5" value="15" />
  <parameter name="main_pll_m" value="63" />
  <parameter name="main_pll_n" value="0" />
  <parameter name="nand_clk_source" value="2" />
  <parameter name="periph_pll_c0" value="3" />
  <parameter name="periph_pll_c1" value="3" />
  <parameter name="periph_pll_c2" value="1" />
  <parameter name="periph_pll_c3" value="19" />
  <parameter name="periph_pll_c4" value="4" />
  <parameter name="periph_pll_c5" value="9" />
  <parameter name="periph_pll_m" value="79" />
  <parameter name="periph_pll_n" value="1" />
  <parameter name="periph_pll_source" value="0" />
  <parameter name="qspi_clk_source" value="1" />
  <parameter
     name="quartus_ini_hps_ip_enable_all_peripheral_fpga_interfaces"
     value="false" />
  <parameter name="quartus_ini_hps_ip_enable_bsel_csel" value="false" />
  <parameter
     name="quartus_ini_hps_ip_enable_emac0_peripheral_fpga_interface"
     value="false" />
  <parameter
     name="quartus_ini_hps_ip_enable_low_speed_serial_fpga_interfaces"
     value="false" />
  <parameter name="quartus_ini_hps_ip_enable_test_interface" value="false" />
  <parameter name="quartus_ini_hps_ip_f2sdram_bonding_out" value="false" />
  <parameter name="quartus_ini_hps_ip_fast_f2sdram_sim_model" value="false" />
  <parameter name="quartus_ini_hps_ip_suppress_sdram_synth" value="false" />
  <parameter name="sdmmc_clk_source" value="2" />
  <parameter name="show_advanced_parameters" value="false" />
  <parameter name="show_debug_info_as_warning_msg" value="false" />
  <parameter name="show_warning_as_error_msg" value="false" />
  <parameter name="spi_m_clk_div" value="0" />
  <parameter name="usb_mp_clk_div" value="0" />
  <parameter name="use_default_mpu_clk" value="true" />
 </module>
 <module
   name="hps_nios_fifo"
   kind="altera_avalon_fifo"
   version="15.0"
   enabled="1">
  <parameter name="avalonMMAvalonMMDataWidth" value="32" />
  <parameter name="avalonMMAvalonSTDataWidth" value="32" />
  <parameter name="bitsPerSymbol" value="16" />
  <parameter name="channelWidth" value="8" />
  <parameter name="deviceFamilyString" value="Cyclone V" />
  <parameter name="errorWidth" value="8" />
  <parameter name="fifoDepth" value="64" />
  <parameter name="fifoInputInterfaceOptions" value="AVALONMM_WRITE" />
  <parameter name="fifoOutputInterfaceOptions" value="AVALONMM_READ" />
  <parameter name="showHiddenFeatures" value="false" />
  <parameter name="singleClockMode" value="false" />
  <parameter name="singleResetMode" value="false" />
  <parameter name="symbolsPerBeat" value="2" />
  <parameter name="useBackpressure" value="false" />
  <parameter name="useIRQ" value="false" />
  <parameter name="usePacket" value="true" />
  <parameter name="useReadControl" value="true" />
  <parameter name="useRegister" value="false" />
  <parameter name="useWriteControl" value="true" />
 </module>
 <module
   name="hps_nios_uart"
   kind="altera_avalon_uart"
   version="15.0"
   enabled="0">
  <parameter name="baud" value="115200" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="dataBits" value="8" />
  <parameter name="fixedBaud" value="true" />
  <parameter name="parity" value="NONE" />
  <parameter name="simCharStream" value="" />
  <parameter name="simInteractiveInputEnable" value="false" />
  <parameter name="simInteractiveOutputEnable" value="false" />
  <parameter name="simTrueBaud" value="false" />
  <parameter name="stopBits" value="1" />
  <parameter name="syncRegDepth" value="2" />
  <parameter name="useCtsRts" value="false" />
  <parameter name="useEopRegister" value="false" />
  <parameter name="useRelativePathForSimFile" value="false" />
 </module>
 <module
   name="jtag_uart_0"
   kind="altera_avalon_jtag_uart"
   version="15.0"
   enabled="1">
  <parameter name="allowMultipleConnections" value="false" />
  <parameter name="avalonSpec" value="2.0" />
  <parameter name="clkFreq" value="50000000" />
  <parameter name="hubInstanceID" value="0" />
  <parameter name="readBufferDepth" value="64" />
  <parameter name="readIRQThreshold" value="8" />
  <parameter name="simInputCharacterStream" value="" />
  <parameter name="simInteractiveOptions">NO_INTERACTIVE_WINDOWS</parameter>
  <parameter name="useRegistersForReadBuffer" value="false" />
  <parameter name="useRegistersForWriteBuffer" value="false" />
  <parameter name="useRelativePathForSimFile" value="false" />
  <parameter name="writeBufferDepth" value="64" />
  <parameter name="writeIRQThreshold" value="8" />
 </module>
 <module
   name="main_timer"
   kind="altera_avalon_timer"
   version="15.0"
   enabled="1">
  <parameter name="alwaysRun" value="false" />
  <parameter name="counterSize" value="32" />
  <parameter name="fixedPeriod" value="false" />
  <parameter name="period" value="1" />
  <parameter name="periodUnits" value="MSEC" />
  <parameter name="resetOutput" value="false" />
  <parameter name="snapshot" value="true" />
  <parameter name="systemFrequency" value="50000000" />
  <parameter name="timeoutPulseOutput" value="false" />
  <parameter name="watchdogPulse" value="2" />
 </module>
 <module name="mm_reset_0" kind="mm_reset" version="1.0" enabled="1">
  <parameter name="ADDR_BITS" value="2" />
  <parameter name="CYCLES" value="1000000" />
  <parameter name="N_REGS" value="4" />
  <parameter name="REG_BITS" value="32" />
 </module>
 <module name="nios2" kind="altera_nios2_qsys" version="15.0" enabled="1">
  <parameter name="bht_ramBlockType" value="Automatic" />
  <parameter name="breakOffset" value="32" />
  <parameter name="breakSlave">nios2.jtag_debug_module</parameter>
  <parameter name="clockFrequency" value="50000000" />
  <parameter name="cpuID" value="0" />
  <parameter name="cpuID_stored" value="0" />
  <parameter name="cpuReset" value="false" />
  <parameter name="customInstSlavesSystemInfo" value="&lt;info/&gt;" />
  <parameter name="dataAddrWidth" value="28" />
  <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='Video_Subsystem_Video_Frame_Buffer.s2' start='0x0' end='0x4B000' /><slave name='nios2.jtag_debug_module' start='0x80800' end='0x81000' /><slave name='pixel_cluster_1.mm' start='0x81000' end='0x81040' /><slave name='pixel_cluster_0.mm' start='0x81040' end='0x81080' /><slave name='hps_nios_fifo.out_csr' start='0x81080' end='0x810A0' /><slave name='nios_hps_fifo.in_csr' start='0x810A0' end='0x810C0' /><slave name='main_timer.s1' start='0x810E0' end='0x81100' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x81100' end='0x81108' /><slave name='hps_nios_fifo.out' start='0x81108' end='0x8110C' /><slave name='nios_hps_fifo.in' start='0x8110C' end='0x81110' /><slave name='graphics_controller_0.mm' start='0x4000000' end='0x8000000' /><slave name='sdram.s1' start='0x8000000' end='0xC000000' /></address-map>]]></parameter>
  <parameter name="dcache_bursts" value="true" />
  <parameter name="dcache_lineSize" value="32" />
  <parameter name="dcache_numTCDM" value="0" />
  <parameter name="dcache_omitDataMaster" value="false" />
  <parameter name="dcache_ramBlockType" value="Automatic" />
  <parameter name="dcache_size" value="1024" />
  <parameter name="dcache_tagramBlockType" value="Automatic" />
  <parameter name="dcache_victim_buf_impl" value="reg" />
  <parameter name="debug_OCIOnchipTrace" value="_128" />
  <parameter name="debug_assignJtagInstanceID" value="false" />
  <parameter name="debug_debugReqSignals" value="false" />
  <parameter name="debug_embeddedPLL" value="true" />
  <parameter name="debug_jtagInstanceID" value="0" />
  <parameter name="debug_level" value="Level1" />
  <parameter name="debug_triggerArming" value="true" />
  <parameter name="deviceFamilyName" value="Cyclone V" />
  <parameter name="deviceFeaturesSystemInfo">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 1 HARDCOPY 0 HAS_18_BIT_MULTS 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 1 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 1 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 1 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 1 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
  <parameter name="exceptionOffset" value="32" />
  <parameter name="exceptionSlave" value="sdram.s1" />
  <parameter name="icache_burstType" value="None" />
  <parameter name="icache_numTCIM" value="0" />
  <parameter name="icache_ramBlockType" value="Automatic" />
  <parameter name="icache_size" value="1024" />
  <parameter name="icache_tagramBlockType" value="Automatic" />
  <parameter name="impl" value="Tiny" />
  <parameter name="instAddrWidth" value="28" />
  <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='nios2.jtag_debug_module' start='0x80800' end='0x81000' /><slave name='sdram.s1' start='0x8000000' end='0xC000000' /></address-map>]]></parameter>
  <parameter name="internalIrqMaskSystemInfo" value="47" />
  <parameter name="manuallyAssignCpuID" value="true" />
  <parameter name="mmu_TLBMissExcOffset" value="0" />
  <parameter name="mmu_TLBMissExcSlave" value="None" />
  <parameter name="mmu_autoAssignTlbPtrSz" value="true" />
  <parameter name="mmu_enabled" value="false" />
  <parameter name="mmu_processIDNumBits" value="8" />
  <parameter name="mmu_ramBlockType" value="Automatic" />
  <parameter name="mmu_tlbNumWays" value="16" />
  <parameter name="mmu_tlbPtrSz" value="7" />
  <parameter name="mmu_udtlbNumEntries" value="6" />
  <parameter name="mmu_uitlbNumEntries" value="4" />
  <parameter name="mpu_enabled" value="false" />
  <parameter name="mpu_minDataRegionSize" value="12" />
  <parameter name="mpu_minInstRegionSize" value="12" />
  <parameter name="mpu_numOfDataRegion" value="8" />
  <parameter name="mpu_numOfInstRegion" value="8" />
  <parameter name="mpu_useLimit" value="false" />
  <parameter name="muldiv_divider" value="false" />
  <parameter name="muldiv_multiplierType" value="EmbeddedMulFast" />
  <parameter name="ocimem_ramBlockType" value="Automatic" />
  <parameter name="regfile_ramBlockType" value="Automatic" />
  <parameter name="resetOffset" value="0" />
  <parameter name="resetSlave" value="sdram.s1" />
  <parameter name="resetrequest_enabled" value="true" />
  <parameter name="setting_HBreakTest" value="false" />
  <parameter name="setting_HDLSimCachesCleared" value="true" />
  <parameter name="setting_activateModelChecker" value="false" />
  <parameter name="setting_activateMonitors" value="true" />
  <parameter name="setting_activateTestEndChecker" value="false" />
  <parameter name="setting_activateTrace" value="true" />
  <parameter name="setting_activateTrace_user" value="false" />
  <parameter name="setting_allowFullAddressRange" value="false" />
  <parameter name="setting_alwaysEncrypt" value="true" />
  <parameter name="setting_asic_enabled" value="false" />
  <parameter name="setting_asic_synopsys_translate_on_off" value="false" />
  <parameter name="setting_avalonDebugPortPresent" value="false" />
  <parameter name="setting_bhtIndexPcOnly" value="false" />
  <parameter name="setting_bhtPtrSz" value="8" />
  <parameter name="setting_bigEndian" value="false" />
  <parameter name="setting_bit31BypassDCache" value="true" />
  <parameter name="setting_branchPredictionType" value="Automatic" />
  <parameter name="setting_breakslaveoveride" value="false" />
  <parameter name="setting_clearXBitsLDNonBypass" value="true" />
  <parameter name="setting_dc_ecc_present" value="false" />
  <parameter name="setting_debugSimGen" value="false" />
  <parameter name="setting_dtcm_ecc_present" value="false" />
  <parameter name="setting_ecc_present" value="false" />
  <parameter name="setting_ecc_sim_test_ports" value="false" />
  <parameter name="setting_exportPCB" value="false" />
  <parameter name="setting_export_large_RAMs" value="false" />
  <parameter name="setting_exportvectors" value="false" />
  <parameter name="setting_extraExceptionInfo" value="false" />
  <parameter name="setting_fullWaveformSignals" value="false" />
  <parameter name="setting_ic_ecc_present" value="true" />
  <parameter name="setting_illegalInstructionsTrap" value="false" />
  <parameter name="setting_illegalMemAccessDetection" value="false" />
  <parameter name="setting_interruptControllerType" value="Internal" />
  <parameter name="setting_itcm_ecc_present" value="false" />
  <parameter name="setting_mmu_ecc_present" value="true" />
  <parameter name="setting_oci_export_jtag_signals" value="false" />
  <parameter name="setting_perfCounterWidth" value="32" />
  <parameter name="setting_performanceCounter" value="false" />
  <parameter name="setting_preciseDivisionErrorException" value="false" />
  <parameter name="setting_preciseIllegalMemAccessException" value="false" />
  <parameter name="setting_preciseSlaveAccessErrorException" value="false" />
  <parameter name="setting_removeRAMinit" value="false" />
  <parameter name="setting_rf_ecc_present" value="true" />
  <parameter name="setting_shadowRegisterSets" value="0" />
  <parameter name="setting_showInternalSettings" value="false" />
  <parameter name="setting_showUnpublishedSettings" value="false" />
  <parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster0MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster1MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster2MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster3MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
  <parameter name="userDefinedSettings" value="" />
 </module>
 <module
   name="nios_hps_fifo"
   kind="altera_avalon_fifo"
   version="15.0"
   enabled="1">
  <parameter name="avalonMMAvalonMMDataWidth" value="32" />
  <parameter name="avalonMMAvalonSTDataWidth" value="32" />
  <parameter name="bitsPerSymbol" value="16" />
  <parameter name="channelWidth" value="8" />
  <parameter name="deviceFamilyString" value="Cyclone V" />
  <parameter name="errorWidth" value="8" />
  <parameter name="fifoDepth" value="64" />
  <parameter name="fifoInputInterfaceOptions" value="AVALONMM_WRITE" />
  <parameter name="fifoOutputInterfaceOptions" value="AVALONMM_READ" />
  <parameter name="showHiddenFeatures" value="false" />
  <parameter name="singleClockMode" value="false" />
  <parameter name="singleResetMode" value="false" />
  <parameter name="symbolsPerBeat" value="2" />
  <parameter name="useBackpressure" value="false" />
  <parameter name="useIRQ" value="false" />
  <parameter name="usePacket" value="true" />
  <parameter name="useReadControl" value="true" />
  <parameter name="useRegister" value="false" />
  <parameter name="useWriteControl" value="true" />
 </module>
 <module
   name="nios_hps_uart"
   kind="altera_avalon_uart"
   version="15.0"
   enabled="0">
  <parameter name="baud" value="115200" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="dataBits" value="8" />
  <parameter name="fixedBaud" value="true" />
  <parameter name="parity" value="NONE" />
  <parameter name="simCharStream" value="" />
  <parameter name="simInteractiveInputEnable" value="false" />
  <parameter name="simInteractiveOutputEnable" value="false" />
  <parameter name="simTrueBaud" value="false" />
  <parameter name="stopBits" value="1" />
  <parameter name="syncRegDepth" value="2" />
  <parameter name="useCtsRts" value="false" />
  <parameter name="useEopRegister" value="false" />
  <parameter name="useRelativePathForSimFile" value="false" />
 </module>
 <module name="pixel_cluster_0" kind="pixel_cluster" version="1.0" enabled="1">
  <parameter name="ADDR_BITS" value="4" />
  <parameter name="COLOR_BITS" value="8" />
  <parameter name="COUNTER_BITS" value="16" />
  <parameter name="N_CLUSTERS" value="4" />
  <parameter name="N_COLORS" value="3" />
  <parameter name="REG_BITS" value="32" />
  <parameter name="X_MAX" value="320" />
  <parameter name="X_Y_BITS" value="16" />
  <parameter name="Y_MAX" value="240" />
 </module>
 <module name="pixel_cluster_1" kind="pixel_cluster" version="1.0" enabled="1">
  <parameter name="ADDR_BITS" value="4" />
  <parameter name="COLOR_BITS" value="8" />
  <parameter name="COUNTER_BITS" value="16" />
  <parameter name="N_CLUSTERS" value="4" />
  <parameter name="N_COLORS" value="3" />
  <parameter name="REG_BITS" value="32" />
  <parameter name="X_MAX" value="320" />
  <parameter name="X_Y_BITS" value="16" />
  <parameter name="Y_MAX" value="240" />
 </module>
 <module
   name="sdram"
   kind="altera_avalon_new_sdram_controller"
   version="15.0"
   enabled="1">
  <parameter name="TAC" value="5.4" />
  <parameter name="TMRD" value="3" />
  <parameter name="TRCD" value="15.0" />
  <parameter name="TRFC" value="70.0" />
  <parameter name="TRP" value="15.0" />
  <parameter name="TWR" value="14.0" />
  <parameter name="casLatency" value="3" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="columnWidth" value="10" />
  <parameter name="componentName" value="$${FILENAME}_sdram" />
  <parameter name="dataWidth" value="16" />
  <parameter name="generateSimulationModel" value="false" />
  <parameter name="initNOPDelay" value="0.0" />
  <parameter name="initRefreshCommands" value="2" />
  <parameter name="masteredTristateBridgeSlave" value="0" />
  <parameter name="model">single_Micron_MT48LC4M32B2_7_chip</parameter>
  <parameter name="numberOfBanks" value="4" />
  <parameter name="numberOfChipSelects" value="1" />
  <parameter name="pinsSharedViaTriState" value="false" />
  <parameter name="powerUpDelay" value="100.0" />
  <parameter name="refreshPeriod" value="7.8125" />
  <parameter name="registerDataIn" value="true" />
  <parameter name="rowWidth" value="13" />
 </module>
 <module
   name="touchscreen_uart"
   kind="altera_avalon_uart"
   version="15.0"
   enabled="1">
  <parameter name="baud" value="9600" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="dataBits" value="8" />
  <parameter name="fixedBaud" value="false" />
  <parameter name="parity" value="NONE" />
  <parameter name="simCharStream" value="" />
  <parameter name="simInteractiveInputEnable" value="false" />
  <parameter name="simInteractiveOutputEnable" value="false" />
  <parameter name="simTrueBaud" value="false" />
  <parameter name="stopBits" value="1" />
  <parameter name="syncRegDepth" value="2" />
  <parameter name="useCtsRts" value="false" />
  <parameter name="useEopRegister" value="false" />
  <parameter name="useRelativePathForSimFile" value="false" />
 </module>
 <module name="uart_4" kind="altera_avalon_uart" version="15.0" enabled="1">
  <parameter name="baud" value="115200" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="dataBits" value="8" />
  <parameter name="fixedBaud" value="false" />
  <parameter name="parity" value="NONE" />
  <parameter name="simCharStream" value="" />
  <parameter name="simInteractiveInputEnable" value="false" />
  <parameter name="simInteractiveOutputEnable" value="false" />
  <parameter name="simTrueBaud" value="false" />
  <parameter name="stopBits" value="1" />
  <parameter name="syncRegDepth" value="2" />
  <parameter name="useCtsRts" value="false" />
  <parameter name="useEopRegister" value="false" />
  <parameter name="useRelativePathForSimFile" value="false" />
 </module>
 <module
   name="video_uart"
   kind="altera_avalon_uart"
   version="15.0"
   enabled="1">
  <parameter name="baud" value="38400" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="dataBits" value="8" />
  <parameter name="fixedBaud" value="false" />
  <parameter name="parity" value="NONE" />
  <parameter name="simCharStream" value="" />
  <parameter name="simInteractiveInputEnable" value="false" />
  <parameter name="simInteractiveOutputEnable" value="false" />
  <parameter name="simTrueBaud" value="false" />
  <parameter name="stopBits" value="1" />
  <parameter name="syncRegDepth" value="2" />
  <parameter name="useCtsRts" value="false" />
  <parameter name="useEopRegister" value="false" />
  <parameter name="useRelativePathForSimFile" value="false" />
 </module>
 <module name="wifi_uart" kind="altera_avalon_uart" version="15.0" enabled="1">
  <parameter name="baud" value="115200" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="dataBits" value="8" />
  <parameter name="fixedBaud" value="false" />
  <parameter name="parity" value="NONE" />
  <parameter name="simCharStream" value="" />
  <parameter name="simInteractiveInputEnable" value="false" />
  <parameter name="simInteractiveOutputEnable" value="false" />
  <parameter name="simTrueBaud" value="false" />
  <parameter name="stopBits" value="1" />
  <parameter name="syncRegDepth" value="2" />
  <parameter name="useCtsRts" value="false" />
  <parameter name="useEopRegister" value="false" />
  <parameter name="useRelativePathForSimFile" value="false" />
 </module>
 <connection
   kind="avalon"
   version="15.0"
   start="graphics_controller_0.avalon_master"
   end="hps_0.f2h_sdram1_data">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.data_master"
   end="jtag_uart_0.avalon_jtag_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00081100" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.data_master"
   end="nios_hps_fifo.in">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0008110c" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.data_master"
   end="nios_hps_fifo.in_csr">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x000810a0" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.data_master"
   end="nios2.jtag_debug_module">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00080800" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.data_master"
   end="pixel_cluster_0.mm">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00081040" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.data_master"
   end="graphics_controller_0.mm">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x04000000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.data_master"
   end="pixel_cluster_1.mm">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00081000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.data_master"
   end="hps_nios_fifo.out">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00081108" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.data_master"
   end="hps_nios_fifo.out_csr">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00081080" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection kind="avalon" version="15.0" start="nios2.data_master" end="sdram.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x08000000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.data_master"
   end="main_timer.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x000810e0" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.data_master"
   end="nios_hps_uart.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x000810c0" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.data_master"
   end="Video_Subsystem.video_frame_buffer">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="Draw_Subsystem.dma_master"
   end="hps_0.f2h_sdram0_data">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="Draw_Subsystem.dma_regs">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00200000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="hps_nios_fifo.in">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00104000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="hps_nios_fifo.in_csr">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00104020" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="graphics_controller_0.mm">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x04000000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="mm_reset_0.mm">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00300000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="nios_hps_fifo.out">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00104100" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="nios_hps_fifo.out_csr">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00104120" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="sdram.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x08000000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="uart_4.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00103000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="wifi_uart.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00102000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="video_uart.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00101000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="touchscreen_uart.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00100000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="hps_nios_uart.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00104000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="hps_0.h2f_axi_master"
   end="Video_Subsystem.video_frame_buffer">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.instruction_master"
   end="nios2.jtag_debug_module">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00080800" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="15.0"
   start="nios2.instruction_master"
   end="sdram.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x08000000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon_streaming"
   version="15.0"
   start="Video_Subsystem.video_0"
   end="pixel_cluster_0.video_in" />
 <connection
   kind="avalon_streaming"
   version="15.0"
   start="Video_Subsystem.video_1"
   end="pixel_cluster_1.video_in" />
 <connection
   kind="avalon_streaming"
   version="15.0"
   start="Draw_Subsystem.video_foreground"
   end="Video_Subsystem.video_foreground" />
 <connection kind="clock" version="15.0" start="clocks.sys_clk" end="nios2.clk" />
 <connection kind="clock" version="15.0" start="clocks.sys_clk" end="sdram.clk" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="jtag_uart_0.clk" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="main_timer.clk" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="Video_Subsystem.clk" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="Draw_Subsystem.clk" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="touchscreen_uart.clk" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="video_uart.clk" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="wifi_uart.clk" />
 <connection kind="clock" version="15.0" start="clocks.sys_clk" end="uart_4.clk" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="hps_nios_uart.clk" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="nios_hps_uart.clk" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="nios_hps_fifo.clk_in" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="hps_nios_fifo.clk_in" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="hps_nios_fifo.clk_out" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="nios_hps_fifo.clk_out" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="pixel_cluster_0.clock" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="graphics_controller_0.clock" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="pixel_cluster_1.clock" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="mm_reset_0.clock" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="hps_0.f2h_axi_clock" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="hps_0.f2h_sdram0_clock" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="hps_0.f2h_sdram1_clock" />
 <connection
   kind="clock"
   version="15.0"
   start="clocks.sys_clk"
   end="hps_0.h2f_axi_clock" />
 <connection
   kind="interrupt"
   version="15.0"
   start="nios2.d_irq"
   end="pixel_cluster_0.frame_complete_irq">
  <parameter name="irqNumber" value="2" />
 </connection>
 <connection
   kind="interrupt"
   version="15.0"
   start="nios2.d_irq"
   end="pixel_cluster_1.frame_complete_irq">
  <parameter name="irqNumber" value="3" />
 </connection>
 <connection
   kind="interrupt"
   version="15.0"
   start="nios2.d_irq"
   end="graphics_controller_0.interrupt_sender">
  <parameter name="irqNumber" value="5" />
 </connection>
 <connection
   kind="interrupt"
   version="15.0"
   start="nios2.d_irq"
   end="jtag_uart_0.irq">
  <parameter name="irqNumber" value="0" />
 </connection>
 <connection
   kind="interrupt"
   version="15.0"
   start="nios2.d_irq"
   end="main_timer.irq">
  <parameter name="irqNumber" value="1" />
 </connection>
 <connection
   kind="interrupt"
   version="15.0"
   start="nios2.d_irq"
   end="nios_hps_uart.irq">
  <parameter name="irqNumber" value="6" />
 </connection>
 <connection
   kind="interrupt"
   version="15.0"
   start="hps_0.f2h_irq1"
   end="touchscreen_uart.irq">
  <parameter name="irqNumber" value="0" />
 </connection>
 <connection
   kind="interrupt"
   version="15.0"
   start="hps_0.f2h_irq1"
   end="video_uart.irq">
  <parameter name="irqNumber" value="1" />
 </connection>
 <connection
   kind="interrupt"
   version="15.0"
   start="hps_0.f2h_irq1"
   end="wifi_uart.irq">
  <parameter name="irqNumber" value="2" />
 </connection>
 <connection
   kind="interrupt"
   version="15.0"
   start="hps_0.f2h_irq1"
   end="uart_4.irq">
  <parameter name="irqNumber" value="3" />
 </connection>
 <connection
   kind="interrupt"
   version="15.0"
   start="hps_0.f2h_irq1"
   end="hps_nios_uart.irq">
  <parameter name="irqNumber" value="4" />
 </connection>
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="touchscreen_uart.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="video_uart.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="wifi_uart.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="uart_4.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="graphics_controller_0.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="Draw_Subsystem.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="Video_Subsystem.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="hps_nios_uart.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="nios_hps_uart.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="mm_reset_0.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="hps_nios_fifo.reset_in" />
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="nios_hps_fifo.reset_in" />
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="nios_hps_fifo.reset_out" />
 <connection
   kind="reset"
   version="15.0"
   start="hps_0.h2f_reset"
   end="hps_nios_fifo.reset_out" />
 <connection
   kind="reset"
   version="15.0"
   start="nios2.jtag_debug_module_reset"
   end="sdram.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="nios2.jtag_debug_module_reset"
   end="jtag_uart_0.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="nios2.jtag_debug_module_reset"
   end="main_timer.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="nios2.jtag_debug_module_reset"
   end="graphics_controller_0.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="nios2.jtag_debug_module_reset"
   end="hps_nios_uart.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="nios2.jtag_debug_module_reset"
   end="nios_hps_uart.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="nios2.jtag_debug_module_reset"
   end="hps_nios_fifo.reset_in" />
 <connection
   kind="reset"
   version="15.0"
   start="nios2.jtag_debug_module_reset"
   end="nios_hps_fifo.reset_in" />
 <connection
   kind="reset"
   version="15.0"
   start="nios2.jtag_debug_module_reset"
   end="nios2.reset_n" />
 <connection
   kind="reset"
   version="15.0"
   start="nios2.jtag_debug_module_reset"
   end="hps_nios_fifo.reset_out" />
 <connection
   kind="reset"
   version="15.0"
   start="nios2.jtag_debug_module_reset"
   end="nios_hps_fifo.reset_out" />
 <connection
   kind="reset"
   version="15.0"
   start="mm_reset_0.persistent_reset_0"
   end="jtag_uart_0.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="mm_reset_0.persistent_reset_0"
   end="nios_hps_fifo.reset_in" />
 <connection
   kind="reset"
   version="15.0"
   start="mm_reset_0.persistent_reset_0"
   end="hps_nios_fifo.reset_in" />
 <connection
   kind="reset"
   version="15.0"
   start="mm_reset_0.persistent_reset_0"
   end="nios2.reset_n" />
 <connection
   kind="reset"
   version="15.0"
   start="mm_reset_0.persistent_reset_0"
   end="nios_hps_fifo.reset_out" />
 <connection
   kind="reset"
   version="15.0"
   start="mm_reset_0.persistent_reset_0"
   end="hps_nios_fifo.reset_out" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="sdram.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="jtag_uart_0.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="main_timer.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="Video_Subsystem.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="pixel_cluster_0.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="graphics_controller_0.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="wifi_uart.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="video_uart.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="touchscreen_uart.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="uart_4.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="pixel_cluster_1.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="Draw_Subsystem.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="hps_nios_uart.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="nios_hps_uart.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="mm_reset_0.reset" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="nios_hps_fifo.reset_in" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="hps_nios_fifo.reset_in" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="nios2.reset_n" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="hps_nios_fifo.reset_out" />
 <connection
   kind="reset"
   version="15.0"
   start="clocks.reset_source"
   end="nios_hps_fifo.reset_out" />
 <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
 <interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
 <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
 <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
</system>