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Eve2_81x.c
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Eve2_81x.c
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// EVE Processor Agnostic Library (Condensed)
//
// This library is for the FT812, FT813, BT815, BT816, BT817, BT818
//
// This "library" consists of the files "Eve2_81x.c" and "Eve2_81x.h".
//
// In persuit of the common goal of simplicity and understandability I find that I am unable to
// make function prototypes that match Bridgetek example code. I draw the line between the
// EVE and all other hardware. The library is "clean" and includes no abstraction at all, unlike
// much of the example code on the Internet which is sort of application and abstraction mixed
// together in a confusing abuse of my eye-holes.
// My intent is to be as straight forward and understandable as possible, so while function
// names and parameter lists are different than Bridgetek code examples, they should be easily
// recognizable. I have also made every attempt to reference Bridgetek documentation against
// the code to act as a translation to help in understanding.
//
// Notes on the operation of the EVE command processing engine - THE FIFO
//
// First be aware that the FTDI/Bridgetek documentation variously refers to you as "User", "MCU",
// "Host".
//
// The FIFO, like all FIFO's needs pointers to indicate the starting address of buffered data and
// the end address of buffered data. There is wrapping involved, but the basic idea is clear.
// EVE takes data into it's FIFO using a fully defined write operation to a memory address - that
// is, you need to take care of the wrapping - to you, it is not a FIFO - it is a piece of memory.
// EVE keeps track of it's own read address location, but relies on you to write the address
// of the end of buffered data.
//
// So as commands are loaded into RAM - into the FIFO space - EVE will do nothing in response.
// EVE is happy to take your data and store it for you while it sits with it's read address and
// write address set to the same value. Once the commands are loaded, the next available address
// is manually written (by you) to the register in which Eve stores the FIFO write pointer
// (REG_CMD_WRITE).
//
// Following this, EVE discovers that the addresses are different and begins processing commands
// while updating it's own read pointer until the read and write pointers are the same.
//
// Be aware that EVE stores only the offset into the "FIFO" as 16 bits, so any use of the offset
// requires adding the base address (RAM_CMD 0x308000) to the resultant 32 bit value.
#include "Eve2_81x.h" // Header for this file with prototypes, defines, and typedefs
#include "MatrixEve2Conf.h" // Header for display selection
//#include "ST7789V.h" // For 2.4" and 2.8" displays
//#include "hw_api.h" // For SPI abstraction
#include <stdbool.h> // For true/false
#include <stdint.h> // Find integer types like "uint8_t"
#include <stdio.h>
#include "SPI_CPU.h"
#define WorkBuffSz 512
#define Log printf
// Global Variables
uint16_t FifoWriteLocation = 0;
char LogBuf[WorkBuffSz]; // The singular universal data array used for all things including logging
const uint8_t Touch70I_WG[] = {
26, 255, 255, 255, 32, 32, 48, 0, 4, 0, 0, 0, 2, 0, 0, 0, 26, 255, 255,
255, 0, 176, 48, 0, 4, 0, 0, 0, 82, 3, 0, 0, 34, 255, 255, 255, 0, 176,
48, 0, 120, 218, 181, 83, 79, 104, 156, 85, 16, 159, 183, 111, 179, 154, 68, 214, 239,
43, 165, 20, 201, 7, 251, 109, 54, 46, 237, 182, 80, 76, 68, 4, 133, 121, 73, 91,
218, 132, 80, 180, 7, 115, 16, 250, 222, 183, 113, 255, 125, 43, 33, 120, 17, 137, 118,
170, 32, 30, 62, 248, 240, 210, 122, 48, 197, 131, 171, 72, 192, 147, 65, 165, 7, 5,
107, 144, 98, 201, 65, 40, 69, 8, 120, 40, 165, 167, 230, 146, 34, 168, 176, 206, 124,
187, 74, 241, 36, 98, 120, 204, 155, 121, 243, 222, 252, 121, 51, 191, 121, 81, 3, 0,
37, 13, 69, 105, 84, 117, 158, 11, 226, 15, 29, 80, 218, 244, 220, 186, 243, 153, 170,
46, 177, 85, 150, 68, 95, 117, 34, 137, 28, 196, 242, 118, 240, 62, 136, 255, 146, 18,
171, 155, 73, 99, 12, 147, 6, 123, 104, 121, 46, 109, 233, 86, 210, 96, 190, 2, 157,
164, 49, 141, 105, 84, 68, 221, 122, 174, 164, 221, 243, 144, 218, 196, 22, 241, 56, 62,
11, 190, 77, 35, 142, 222, 134, 14, 231, 209, 172, 146, 34, 207, 77, 219, 148, 179, 152,
7, 191, 235, 185, 60, 38, 221, 2, 142, 211, 2, 46, 192, 57, 148, 88, 58, 242, 156,
31, 103, 59, 71, 213, 43, 79, 179, 190, 128, 85, 182, 0, 10, 98, 223, 190, 94, 170,
88, 69, 186, 190, 90, 58, 132, 75, 56, 129, 197, 108, 15, 226, 57, 108, 131, 118, 19,
168, 93, 234, 138, 120, 144, 234, 40, 63, 58, 192, 92, 126, 177, 132, 135, 232, 37, 212,
182, 140, 79, 12, 111, 14, 255, 125, 51, 193, 55, 169, 149, 204, 70, 9, 56, 39, 221,
78, 235, 143, 177, 148, 54, 129, 214, 17, 26, 31, 149, 18, 11, 52, 70, 126, 247, 211,
146, 228, 238, 219, 47, 74, 248, 110, 15, 79, 225, 231, 252, 91, 232, 108, 64, 234, 122,
216, 131, 99, 116, 22, 106, 180, 136, 138, 142, 210, 180, 213, 238, 40, 91, 140, 225, 247,
165, 30, 126, 203, 47, 20, 213, 72, 172, 107, 116, 22, 175, 101, 239, 32, 123, 55, 208,
108, 195, 54, 123, 184, 129, 155, 248, 53, 211, 77, 248, 73, 246, 225, 233, 6, 108, 97,
15, 175, 161, 248, 187, 199, 17, 107, 180, 137, 208, 189, 197, 22, 181, 44, 142, 220, 109,
226, 45, 184, 72, 121, 250, 128, 251, 253, 43, 26, 212, 203, 183, 113, 155, 181, 190, 125,
132, 116, 123, 151, 121, 97, 200, 71, 134, 60, 63, 228, 122, 200, 115, 67, 174, 50, 190,
139, 119, 48, 12, 1, 18, 107, 88, 74, 163, 59, 88, 54, 15, 45, 165, 232, 119, 156,
50, 64, 187, 144, 195, 93, 152, 50, 39, 212, 140, 41, 255, 99, 157, 80, 83, 230, 41,
163, 221, 14, 148, 233, 60, 148, 152, 42, 76, 33, 247, 250, 164, 41, 226, 105, 51, 201,
167, 28, 230, 176, 223, 135, 134, 111, 251, 253, 196, 114, 191, 35, 193, 164, 104, 214, 237,
203, 166, 128, 121, 122, 6, 151, 204, 73, 117, 90, 157, 83, 103, 148, 216, 78, 209, 2,
140, 144, 111, 161, 115, 193, 156, 194, 87, 195, 196, 102, 127, 90, 89, 11, 165, 131, 122,
85, 47, 191, 169, 82, 39, 218, 26, 190, 29, 78, 195, 64, 42, 96, 197, 190, 101, 94,
97, 116, 4, 241, 69, 245, 36, 251, 240, 237, 28, 234, 200, 183, 151, 195, 30, 66, 231,
125, 182, 57, 198, 218, 227, 148, 116, 71, 153, 10, 76, 208, 16, 156, 113, 77, 149, 33,
65, 64, 145, 174, 194, 39, 230, 203, 112, 13, 5, 177, 208, 245, 221, 107, 166, 234, 156,
9, 98, 193, 239, 119, 74, 116, 121, 198, 86, 17, 215, 240, 7, 154, 31, 234, 37, 151,
143, 205, 31, 160, 184, 66, 51, 230, 81, 210, 171, 105, 4, 116, 221, 108, 153, 29, 70,
202, 117, 37, 178, 231, 182, 140, 50, 59, 48, 78, 139, 28, 225, 126, 40, 158, 128, 231,
204, 99, 212, 64, 253, 110, 232, 187, 11, 102, 14, 101, 90, 70, 8, 154, 191, 132, 111,
224, 30, 219, 141, 211, 85, 220, 11, 95, 48, 243, 230, 12, 72, 197, 244, 242, 17, 142,
247, 56, 219, 142, 225, 111, 225, 17, 70, 152, 200, 80, 230, 122, 242, 63, 30, 40, 184,
244, 192, 112, 223, 103, 57, 135, 118, 62, 167, 248, 52, 154, 203, 101, 59, 208, 21, 115,
153, 54, 56, 159, 43, 102, 239, 210, 6, 220, 54, 50, 109, 178, 180, 245, 232, 71, 206,
27, 168, 138, 139, 147, 131, 252, 103, 140, 94, 46, 240, 204, 105, 59, 99, 22, 232, 29,
35, 8, 26, 72, 227, 44, 233, 168, 156, 221, 104, 119, 128, 107, 17, 196, 89, 102, 245,
165, 178, 47, 211, 200, 154, 138, 149, 169, 235, 127, 35, 149, 213, 237, 32, 254, 204, 136,
134, 43, 29, 137, 213, 127, 245, 255, 222, 62, 251, 255, 106, 159, 253, 223, 219, 103, 255,
135, 39, 255, 127, 255, 21, 251, 112, 132, 32, 230, 41, 108, 233, 250, 226, 191, 138, 132,
108, 47, 235, 103, 117, 112, 118, 98, 86, 49, 246, 206, 235, 63, 1, 55, 97, 247, 70,
0, 0, 26, 255, 255, 255, 32, 32, 48, 0, 4, 0, 0, 0, 0, 0, 0, 0};
static uint32_t Width;
static uint32_t Height;
static uint32_t HOffset;
static uint32_t VOffset;
static uint8_t Touch;
int DWIDTH;
int DHEIGHT;
int PIXVOFFSET;
int PIXHOFFSET;
int HCYCLE;
int HOFFSET;
int HSYNC0;
int HSYNC1;
int VCYCLE;
int VOFFSET;
int VSYNC0;
int VSYNC1;
int PCLK;
int SWIZZLE;
int PCLK_POL;
int HSIZE;
int VSIZE;
int CSPREAD;
int DITHER;
uint32_t Display_Width()
{
return Width;
}
uint32_t Display_Height()
{
return Height;
}
uint8_t Display_Touch()
{
return Touch;
}
uint32_t Display_HOffset()
{
return HOffset;
}
uint32_t Display_VOffset()
{
return VOffset;
}
// Call this function once at powerup to reset and initialize the EVE chip
int FT81x_Init(int display, int board, int touch)
{
uint32_t Ready = false;
switch (display)
{
case DISPLAY_70:
DWIDTH = 800;
DHEIGHT = 480;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 928;
HOFFSET = 88;
HSYNC0 = 0;
HSYNC1 = 48;
VCYCLE = 525;
VOFFSET = 32;
VSYNC0 = 0;
VSYNC1 = 3;
PCLK = 2;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 800;
VSIZE = 480;
CSPREAD = 0;
DITHER = 1;
break;
case DISPLAY_50:
DWIDTH = 800;
DHEIGHT = 480;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 928;
HOFFSET = 88;
HSYNC0 = 0;
HSYNC1 = 48;
VCYCLE = 525;
VOFFSET = 32;
VSYNC0 = 0;
VSYNC1 = 3;
PCLK = 2;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 800;
VSIZE = 480;
CSPREAD = 0;
DITHER = 1;
break;
case DISPLAY_43:
DWIDTH = 480;
DHEIGHT = 272;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 548;
HOFFSET = 43;
HSYNC0 = 0;
HSYNC1 = 41;
VCYCLE = 292;
VOFFSET = 12;
VSYNC0 = 0;
VSYNC1 = 10;
PCLK = 5;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 480;
VSIZE = 272;
CSPREAD = 1;
DITHER = 1;
break;
case DISPLAY_39:
DWIDTH = 480;
DHEIGHT = 128;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 524;
HOFFSET = 17;
HSYNC1 = 27;
HSYNC0 = 0;
VCYCLE = 288;
VOFFSET = 12;
VSYNC1 = 8;
VSYNC0 = 7;
PCLK = 5;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 480;
VSIZE = 272;
CSPREAD = 1;
DITHER = 1;
break;
case DISPLAY_38:
DWIDTH = 480;
DHEIGHT = 116;
PIXVOFFSET = 10;
PIXHOFFSET = 0;
HCYCLE = 524;
HOFFSET = 43;
HSYNC0 = 0;
HSYNC1 = 41;
VCYCLE = 292;
VOFFSET = 12;
VSYNC0 = 152;
VSYNC1 = 10;
PCLK = 5;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 480;
VSIZE = 272;
CSPREAD = 1;
DITHER = 1;
break;
case DISPLAY_35:
DWIDTH = 320;
DHEIGHT = 240;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 408;
HOFFSET = 68;
HSYNC0 = 0;
HSYNC1 = 10;
VCYCLE = 262;
VOFFSET = 18;
VSYNC0 = 0;
VSYNC1 = 2;
PCLK = 8;
SWIZZLE = 0;
PCLK_POL = 0;
HSIZE = 320;
VSIZE = 240;
CSPREAD = 1;
DITHER = 1;
break;
case DISPLAY_29:
DWIDTH = 320;
DHEIGHT = 102;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 408;
HOFFSET = 70;
HSYNC0 = 0;
HSYNC1 = 10;
VCYCLE = 262;
VOFFSET = 156;
VSYNC0 = 0;
VSYNC1 = 2;
PCLK = 8;
SWIZZLE = 0;
PCLK_POL = 0;
HSIZE = 320;
VSIZE = 102;
CSPREAD = 1;
DITHER = 1;
break;
case DISPLAY_40:
DWIDTH = 720;
DHEIGHT = 720;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 812;
HOFFSET = 91;
HSYNC0 = 46;
HSYNC1 = 48;
VCYCLE = 756;
VOFFSET = 35;
VSYNC0 = 16;
VSYNC1 = 18;
PCLK = 2;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 720;
VSIZE = 720;
CSPREAD = 0;
DITHER = 0;
break;
case DISPLAY_101:
DWIDTH = 1280;
DHEIGHT = 800;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 1440;
HOFFSET = 158;
HSYNC0 = 78;
HSYNC1 = 80;
VCYCLE = 823;
VOFFSET = 22;
VSYNC0 = 11;
VSYNC1 = 12;
PCLK = 1;
SWIZZLE = 0;
PCLK_POL = 0;
HSIZE = 1280;
VSIZE = 800;
CSPREAD = 0;
DITHER = 1;
break;
case DISPLAY_70I:
case DISPLAY_70I_WG:
DWIDTH = 1024;
DHEIGHT = 600;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 1344;
HOFFSET = 319;
HSYNC0 = 12;
HSYNC1 = 230;
VCYCLE = 635;
VOFFSET = 34;
VSYNC0 = 12;
VSYNC1 = 22;
PCLK = 1;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 1024;
VSIZE = 600;
CSPREAD = 0;
DITHER = 1;
break;
case DISPLAY_24:
DWIDTH = 240;
DHEIGHT = 320;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 298;
HOFFSET = 57;
HSYNC0 = 38;
HSYNC1 = 48;
VCYCLE = 336;
VOFFSET = 15;
VSYNC0 = 8;
VSYNC1 = 8;
PCLK = 6;
SWIZZLE = 0;
PCLK_POL = 0;
HSIZE = 240;
VSIZE = 320;
CSPREAD = 1;
DITHER = 1;
break;
default:
printf("Unknown display type\n");
return 0;
break;
}
Width = DWIDTH;
Height = DHEIGHT;
HOffset = PIXHOFFSET;
VOffset = PIXVOFFSET;
Touch = touch;
Eve_Reset(); // Hard reset of the EVE chip
// Wakeup EVE
if (board >= BOARD_EVE3)
{
HostCommand(HCMD_CLKEXT);
}
HostCommand(HCMD_ACTIVE);
HAL_Delay(300);
do
{
Ready = Cmd_READ_REG_ID();
} while (!Ready);
do
{
Ready = rd16(REG_CPU_RESET);
} while (!Ready);
// Log("EVE now ACTIVE\n"); //
Ready = rd32(REG_CHIP_ID);
uint16_t ValH = Ready >> 16;
uint16_t ValL = Ready & 0xFFFF;
Log("Chip ID = 0x%04x%04x\n", ValH, ValL);
if (display == DISPLAY_101)
{
wr32(REG_FREQUENCY + RAM_REG, 80000000); // Configure the system clock to 80MHz
}
else
{
wr32(REG_FREQUENCY + RAM_REG, 60000000); // Configure the system clock to 60MHz
}
// Before we go any further with EVE, it is a good idea to check to see if the EVE is wigging out
// about something that happened before the last reset. If EVE has just done a power cycle, this
// would be unnecessary.
if (rd16(REG_CMD_READ + RAM_REG) == 0xFFF)
{
// EVE is unhappy - needs a paddling.
uint32_t Patch_Add = rd32(REG_COPRO_PATCH_PTR + RAM_REG);
wr8(REG_CPU_RESET + RAM_REG, 1);
wr16(REG_CMD_READ + RAM_REG, 0);
wr16(REG_CMD_WRITE + RAM_REG, 0);
wr16(REG_CMD_DL + RAM_REG, 0);
wr8(REG_CPU_RESET + RAM_REG, 0);
wr32(REG_COPRO_PATCH_PTR + RAM_REG, Patch_Add);
}
// Turn off screen output during startup
wr16(REG_GPIOX + RAM_REG,
rd16(REG_GPIOX + RAM_REG) &
~(1 << 15)); // Set REG_GPIOX bit 15 to 0 to turn off the LCD DISP signal
wr8(REG_PCLK + RAM_REG, 0); // Pixel Clock Output disable
//if (display == DISPLAY_24)
// MO_ST7789V_init();
// Load parameters of the physical screen to the EVE
// All of these registers are 32 bits, but most bits are reserved, so only write what is actually
// used
wr16(REG_HCYCLE + RAM_REG, HCYCLE); // Set H_Cycle to 548
wr16(REG_HOFFSET + RAM_REG, HOFFSET); // Set H_Offset to 43
wr16(REG_HSYNC0 + RAM_REG, HSYNC0); // Set H_SYNC_0 to 0
wr16(REG_HSYNC1 + RAM_REG, HSYNC1); // Set H_SYNC_1 to 41
wr16(REG_VCYCLE + RAM_REG, VCYCLE); // Set V_Cycle to 292
wr16(REG_VOFFSET + RAM_REG, VOFFSET); // Set V_OFFSET to 12
wr16(REG_VSYNC0 + RAM_REG, VSYNC0); // Set V_SYNC_0 to 0
wr16(REG_VSYNC1 + RAM_REG, VSYNC1); // Set V_SYNC_1 to 10
wr8(REG_SWIZZLE + RAM_REG, SWIZZLE); // Set SWIZZLE to 0
wr8(REG_PCLK_POL + RAM_REG, PCLK_POL); // Set PCLK_POL to 1
wr16(REG_HSIZE + RAM_REG, HSIZE); // Set H_SIZE to 480
wr16(REG_VSIZE + RAM_REG, VSIZE); // Set V_SIZE to 272
wr8(REG_CSPREAD + RAM_REG, CSPREAD); // Set CSPREAD to 1 (32 bit register - write only 8 bits)
wr8(REG_DITHER + RAM_REG, DITHER); // Set DITHER to 1 (32 bit register - write only 8 bits)
/* Reset the touch engine, since it has sometimes issues starting up. */
wr32(RAM_REG + REG_CPU_RESET, 1 << 1);
HAL_Delay(10);
wr32(RAM_REG + REG_CPU_RESET, 0);
HAL_Delay(10);
// Configure touch & audio
if (touch == TOUCH_TPR)
{
wr16(REG_TOUCH_CONFIG + RAM_REG, 0x8381);
}
else if (touch == TOUCH_TPC)
{
if (display == DISPLAY_40)
wr16(REG_TOUCH_CONFIG + RAM_REG, 0x480); // FT6336U touch controller
else
wr16(REG_TOUCH_CONFIG + RAM_REG, 0x5d0);
if (board == BOARD_EVE2)
{
Cap_Touch_Upload();
}
if (board == BOARD_EVE4 && DISPLAY_70I_WG)
{
UploadTouchFirmware(Touch70I_WG, sizeof(Touch70I_WG));
}
}
wr16(REG_TOUCH_RZTHRESH + RAM_REG, 1200); // Set touch resistance threshold
wr8(REG_TOUCH_MODE + RAM_REG, 0x02); // Set touch on: continous - this is default
wr8(REG_TOUCH_ADC_MODE + RAM_REG, 0x01); // Set ADC mode: differential - this is default
wr8(REG_TOUCH_OVERSAMPLE + RAM_REG, 15); // Set touch oversampling to max
wr16(REG_GPIOX_DIR + RAM_REG, 0x8000 | (1<<3)); // Set Disp GPIO Direction
wr16(REG_GPIOX + RAM_REG, 0x8000 | (1<<3)); // Enable Disp (if used)
wr16(REG_GPIOX_DIR + RAM_REG, 0xffff); // Make GPIOs output
if (display == DISPLAY_101)
wr16(REG_GPIOX + RAM_REG,
0x80f7); // Motor (GPIO 3, active high) is off, speaker (GPIO 2) is on
else
wr16(REG_GPIOX + RAM_REG, 0x80ff); // Motor (GPIO 3, active low) is off, speaker (GPIO 2) is on
wr16(REG_PWM_HZ + RAM_REG, 0x00FA); // Backlight PWM frequency
wr8(REG_PWM_DUTY + RAM_REG, 128); // Backlight PWM duty (on)
// write first display list (which is a clear and blank screen)
wr32(RAM_DL + 0, CLEAR_COLOR_RGB(0, 0, 0));
wr32(RAM_DL + 4, CLEAR(1, 1, 1));
wr32(RAM_DL + 8, DISPLAY());
wr8(REG_DLSWAP + RAM_REG, DLSWAP_FRAME); // Swap display lists
wr8(REG_PCLK + RAM_REG, PCLK); // After this display is visible on the TFT
return 1;
}
// Call this function once at powerup to reset and initialize the EVE chip
int FT81x_Init_VisualC(int display, int board, int touch)
{
//This function was writen following the settings in the Visual C example provided by Matrix Orbital:
//https://github.com/MatrixOrbital/EVE-Basic-Demo-Windows
uint32_t Ready = false;
switch (display)
{
case DISPLAY_70:
DWIDTH = 800;
DHEIGHT = 480;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 928;
HOFFSET = 88;
HSYNC0 = 0;
HSYNC1 = 48;
VCYCLE = 525;
VOFFSET = 32;
VSYNC0 = 0;
VSYNC1 = 3;
PCLK = 2;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 800;
VSIZE = 480;
CSPREAD = 0;
DITHER = 1;
break;
case DISPLAY_50:
DWIDTH = 800;
DHEIGHT = 480;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 928;
HOFFSET = 88;
HSYNC0 = 0;
HSYNC1 = 48;
VCYCLE = 525;
VOFFSET = 32;
VSYNC0 = 0;
VSYNC1 = 3;
PCLK = 2;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 800;
VSIZE = 480;
CSPREAD = 0;
DITHER = 1;
break;
case DISPLAY_43:
DWIDTH = 480;
DHEIGHT = 272;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 548;
HOFFSET = 43;
HSYNC0 = 0;
HSYNC1 = 41;
VCYCLE = 292;
VOFFSET = 12;
VSYNC0 = 0;
VSYNC1 = 10;
PCLK = 5;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 480;
VSIZE = 272;
CSPREAD = 1;
DITHER = 1;
break;
case DISPLAY_39:
DWIDTH = 480;
DHEIGHT = 128;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 524;
HOFFSET = 17;
HSYNC1 = 27;
HSYNC0 = 0;
VCYCLE = 288;
VOFFSET = 12;
VSYNC1 = 8;
VSYNC0 = 7;
PCLK = 5;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 480;
VSIZE = 272;
CSPREAD = 1;
DITHER = 1;
break;
case DISPLAY_38:
DWIDTH = 480;
DHEIGHT = 116;
PIXVOFFSET = 10;
PIXHOFFSET = 0;
HCYCLE = 524;
HOFFSET = 43;
HSYNC0 = 0;
HSYNC1 = 41;
VCYCLE = 292;
VOFFSET = 12;
VSYNC0 = 152;
VSYNC1 = 10;
PCLK = 5;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 480;
VSIZE = 272;
CSPREAD = 1;
DITHER = 1;
break;
case DISPLAY_35:
DWIDTH = 320;
DHEIGHT = 240;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 408;
HOFFSET = 68;
HSYNC0 = 0;
HSYNC1 = 10;
VCYCLE = 262;
VOFFSET = 18;
VSYNC0 = 0;
VSYNC1 = 2;
PCLK = 8;
SWIZZLE = 0;
PCLK_POL = 0;
HSIZE = 320;
VSIZE = 240;
CSPREAD = 1;
DITHER = 1;
break;
case DISPLAY_29:
DWIDTH = 320;
DHEIGHT = 102;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 408;
HOFFSET = 70;
HSYNC0 = 0;
HSYNC1 = 10;
VCYCLE = 262;
VOFFSET = 156;
VSYNC0 = 0;
VSYNC1 = 2;
PCLK = 8;
SWIZZLE = 0;
PCLK_POL = 0;
HSIZE = 320;
VSIZE = 102;
CSPREAD = 1;
DITHER = 1;
break;
case DISPLAY_40:
DWIDTH = 720;
DHEIGHT = 720;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 812;
HOFFSET = 91;
HSYNC0 = 46;
HSYNC1 = 48;
VCYCLE = 756;
VOFFSET = 35;
VSYNC0 = 16;
VSYNC1 = 18;
PCLK = 2;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 720;
VSIZE = 720;
CSPREAD = 0;
DITHER = 0;
break;
case DISPLAY_101:
DWIDTH = 1280;
DHEIGHT = 800;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 1440;
HOFFSET = 158;
HSYNC0 = 78;
HSYNC1 = 80;
VCYCLE = 823;
VOFFSET = 22;
VSYNC0 = 11;
VSYNC1 = 12;
PCLK = 1;
SWIZZLE = 0;
PCLK_POL = 0;
HSIZE = 1280;
VSIZE = 800;
CSPREAD = 0;
DITHER = 1;
break;
case DISPLAY_70I:
case DISPLAY_70I_WG:
DWIDTH = 1024;
DHEIGHT = 600;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 1344;
HOFFSET = 319;
HSYNC0 = 12;
HSYNC1 = 230;
VCYCLE = 635;
VOFFSET = 34;
VSYNC0 = 12;
VSYNC1 = 22;
PCLK = 1;
SWIZZLE = 0;
PCLK_POL = 1;
HSIZE = 1024;
VSIZE = 600;
CSPREAD = 0;
DITHER = 1;
break;
case DISPLAY_24:
DWIDTH = 240;
DHEIGHT = 320;
PIXVOFFSET = 0;
PIXHOFFSET = 0;
HCYCLE = 298;
HOFFSET = 57;
HSYNC0 = 38;
HSYNC1 = 48;
VCYCLE = 336;
VOFFSET = 15;
VSYNC0 = 8;
VSYNC1 = 8;
PCLK = 6;
SWIZZLE = 0;
PCLK_POL = 0;
HSIZE = 240;
VSIZE = 320;
CSPREAD = 1;
DITHER = 1;
break;
default:
printf("Unknown display type\n");
return 0;
break;
}
Width = DWIDTH;
Height = DHEIGHT;
HOffset = PIXHOFFSET;
VOffset = PIXVOFFSET;
Touch = touch;
Eve_Reset(); // Hard reset of the EVE chip
// Wakeup EVE
if (board >= BOARD_EVE3)
{
HostCommand(HCMD_CLKEXT);
}
HostCommand(HCMD_ACTIVE);
HAL_Delay(300);
do
{
Ready = Cmd_READ_REG_ID();
} while (!Ready);
do
{
Ready = rd16(REG_CPU_RESET);
} while (!Ready);
Log("EVE now ACTIVE\n");
Ready = rd32(REG_CHIP_ID);
uint16_t ValH = Ready >> 16;
uint16_t ValL = Ready & 0xFFFF;
Log("Chip ID = 0x%04x%04x\n", ValH, ValL);
wr32(REG_FREQUENCY + RAM_REG, 0x3938700); // Configure the system clock to 60MHz
// Before we go any further with Eve, it is a good idea to check to see if she is wigging out about something
// that happened before the last reset. If Eve has just done a power cycle, this would be unnecessary.
if( rd16(REG_CMD_READ + RAM_REG) == 0xFFF )
{
// Eve is unhappy - needs a paddling.
uint32_t Patch_Add = rd32(REG_COPRO_PATCH_PTR + RAM_REG);
wr8(REG_CPU_RESET + RAM_REG, 1);
wr16(REG_CMD_READ + RAM_REG, 0);
wr16(REG_CMD_WRITE + RAM_REG, 0);
wr16(REG_CMD_DL + RAM_REG, 0);
wr8(REG_CPU_RESET + RAM_REG, 0);
wr32(REG_COPRO_PATCH_PTR + RAM_REG, Patch_Add);
}
// turn off screen output during startup
wr8(REG_GPIOX + RAM_REG, 0); // Set REG_GPIOX to 0 to turn off the LCD DISP signal
wr8(REG_PCLK + RAM_REG, 0); // Pixel Clock Output disable
// load parameters of the physical screen to the Eve
// All of these registers are 32 bits, but most bits are reserved, so only write what is actually used
wr16(REG_HCYCLE + RAM_REG, HCYCLE); // Set H_Cycle to 548
wr16(REG_HOFFSET + RAM_REG, HOFFSET); // Set H_Offset to 43
wr16(REG_HSYNC0 + RAM_REG, HSYNC0); // Set H_SYNC_0 to 0
wr16(REG_HSYNC1 + RAM_REG, HSYNC1); // Set H_SYNC_1 to 41
wr16(REG_VCYCLE + RAM_REG, VCYCLE); // Set V_Cycle to 292
wr16(REG_VOFFSET + RAM_REG, VOFFSET); // Set V_OFFSET to 12
wr16(REG_VSYNC0 + RAM_REG, VSYNC0); // Set V_SYNC_0 to 0
wr16(REG_VSYNC1 + RAM_REG, VSYNC1); // Set V_SYNC_1 to 10
wr8(REG_SWIZZLE + RAM_REG, SWIZZLE); // Set SWIZZLE to 0
wr8(REG_PCLK_POL + RAM_REG, PCLK_POL); // Set PCLK_POL to 1
wr16(REG_HSIZE + RAM_REG, HSIZE); // Set H_SIZE to 480
wr16(REG_VSIZE + RAM_REG, VSIZE); // Set V_SIZE to 272
wr8(REG_CSPREAD + RAM_REG, CSPREAD); // Set CSPREAD to 1 (32 bit register - write only 8 bits)
wr8(REG_DITHER + RAM_REG, DITHER); // Set DITHER to 1 (32 bit register - write only 8 bits)
wr16(REG_TOUCH_CONFIG + RAM_REG, 0x5d0); //this is for capacitive touch
wr16(REG_TOUCH_RZTHRESH + RAM_REG, 1200); // set touch resistance threshold
wr8(REG_TOUCH_MODE + RAM_REG, 0x02); // set touch on: continous - this is default
wr8(REG_TOUCH_ADC_MODE + RAM_REG, 0x01); // set ADC mode: differential - this is default
wr8(REG_TOUCH_OVERSAMPLE + RAM_REG, 15); // set touch oversampling to max
wr16(REG_GPIOX_DIR + RAM_REG, 0x8000); // Set Disp GPIO Direction
wr16(REG_GPIOX + RAM_REG, 0x8000); // Enable Disp (if used)
wr16(REG_PWM_HZ + RAM_REG, 0x00FA); // Backlight PWM frequency
wr8(REG_PWM_DUTY + RAM_REG, 128); // Backlight PWM duty (on)
// write first display list (which is a clear and blank screen)
wr32(RAM_DL+0, CLEAR_COLOR_RGB(0,0,0));
wr32(RAM_DL+4, CLEAR(1,1,1));
wr32(RAM_DL+8, DISPLAY());
wr8(REG_DLSWAP + RAM_REG, DLSWAP_FRAME); // swap display lists
wr8(REG_PCLK + RAM_REG, PCLK); // after this display is visible on the LCD
return 1;
}
// Reset EVE chip via the hardware PDN line
//void Eve_Reset(void)
//{
// HAL_Eve_Reset_HW();
//}
// Upload Goodix Calibration file, ex GT911
void Cap_Touch_Upload(void)
{
// This makes the Arduino uno run out of space so sadly
// we cannot support this.
#if !defined(__AVR__)
#include "touch_cap_811.h"
//---Goodix911 Configuration from AN336
// Load the TOUCH_DATA_U8 or TOUCH_DATA_U32 array from file “touch_cap_811.h” via the FT81x
// command buffer RAM_CMD
uint8_t CTOUCH_CONFIG_DATA_G911[] = {TOUCH_DATA_U8};
CoProWrCmdBuf(CTOUCH_CONFIG_DATA_G911, TOUCH_DATA_LEN);
// Execute the commands till completion
UpdateFIFO();
Wait4CoProFIFOEmpty();
// Hold the touch engine in reset(write REG_CPURESET = 2)
wr8(REG_CPU_RESET + RAM_REG, 2);
// Set GPIO3 output LOW
wr8(REG_GPIOX_DIR + RAM_REG, (rd8(RAM_REG + REG_GPIOX_DIR) | 0x08)); // Set Disp GPIO Direction
wr8(REG_GPIOX + RAM_REG, (rd8(RAM_REG + REG_GPIOX) | 0xF7)); // Clear GPIO
// Wait more than 100us
HAL_Delay(1);
// Write REG_CPURESET=0
wr8(REG_CPU_RESET + RAM_REG, 0);
// Wait more than 55ms
HAL_Delay(100);
// Set GPIO3 to input (floating)
wr8(REG_GPIOX_DIR + RAM_REG, (rd8(RAM_REG + REG_GPIOX_DIR) & 0xF7)); // Set Disp GPIO Direction
#endif
}
// *** Host Command - FT81X Embedded Video Engine Datasheet - 4.1.5
// ********************************************** Host Command is a function for changing hardware
// related parameters of the Eve chip. The name is confusing. These are related to power modes and
// the like. All defined parameters have HCMD_ prefix
void HostCommand(uint8_t HCMD)
{
//Ported TC397 code
g_qspi.spiBuffers.spiMasterTxBuffer[0]=HCMD;
g_qspi.spiBuffers.spiMasterTxBuffer[1]=0x00;
g_qspi.spiBuffers.spiMasterTxBuffer[2]=0x00;
IfxQspi_SpiMaster_exchange(&g_qspi.spiMasterChannel, &g_qspi.spiBuffers.spiMasterTxBuffer[0], &g_qspi.spiBuffers.spiMasterRxBuffer[0], 3);
while(IfxQspi_SpiMaster_getStatus(&g_qspi.spiMasterChannel) == SpiIf_Status_busy) {}
//Original library Code
// // Log("Inside HostCommand\n");
//
// HAL_SPI_Enable();
//
// /* HAL_SPI_Write(HCMD | 0x40); // In case the manual is making you believe that you just found
// * the bug you were looking for - no. */
// HAL_SPI_Write(HCMD);
// HAL_SPI_Write(0x00); // This second byte is set to 0 but if there is need for fancy, never used
// // setups, then rewrite.
// HAL_SPI_Write(0x00);
//
// HAL_SPI_Disable();
}
// *** EVE API Reference Definitions
// ***************************************************************************** FT81X Embedded
// Video Engine Datasheet 1.3 - Section 4.1.4, page 16 These are all functions related to writing /
// reading data of various lengths with a memory address of 32 bits
// ***************************************************************************************************************
void wr32(uint32_t address, uint32_t parameter)
{
//Ported TC397 code
g_qspi.spiBuffers.spiMasterTxBuffer[0]=((address >> 16) | 0x80); // RAM_REG = 0x302000 and high bit is set - result always 0xB0;
g_qspi.spiBuffers.spiMasterTxBuffer[1]=(uint8_t)(address >> 8); // Next byte of the register address;
g_qspi.spiBuffers.spiMasterTxBuffer[2]=(uint8_t)address; // Low byte of register address - usually just the 1 byte offset;
g_qspi.spiBuffers.spiMasterTxBuffer[3]=(uint8_t)(parameter & 0xff);
g_qspi.spiBuffers.spiMasterTxBuffer[4]=(uint8_t)((parameter >> 8) & 0xff);
g_qspi.spiBuffers.spiMasterTxBuffer[5]=(uint8_t)((parameter >> 16) & 0xff);
g_qspi.spiBuffers.spiMasterTxBuffer[6]=(uint8_t)((parameter >> 24) & 0xff);
IfxQspi_SpiMaster_exchange(&g_qspi.spiMasterChannel, &g_qspi.spiBuffers.spiMasterTxBuffer[0], &g_qspi.spiBuffers.spiMasterRxBuffer[0], 7);
while(IfxQspi_SpiMaster_getStatus(&g_qspi.spiMasterChannel) == SpiIf_Status_busy) {}
//Original library code
// HAL_SPI_Enable();
// uint8_t buffer[16];
// int idx = 0;
//
// buffer[idx++] =
// ((address >> 16) | 0x80); // RAM_REG = 0x302000 and high bit is set - result always 0xB0
// buffer[idx++] = (uint8_t)(address >> 8); // Next byte of the register address
// buffer[idx++] =
// (uint8_t)address; // Low byte of register address - usually just the 1 byte offset
//
// buffer[idx++] = (uint8_t)(parameter & 0xff); // Little endian (yes, it is most significant bit
// // first and least significant byte first)
// buffer[idx++] = (uint8_t)((parameter >> 8) & 0xff);
// buffer[idx++] = (uint8_t)((parameter >> 16) & 0xff);
// buffer[idx++] = (uint8_t)((parameter >> 24) & 0xff);
// HAL_SPI_WriteBuffer(buffer, idx);
//
// HAL_SPI_Disable();
}
void wr16(uint32_t address, uint16_t parameter)
{
//Ported TC397 code
g_qspi.spiBuffers.spiMasterTxBuffer[0]=((address >> 16) | 0x80); // RAM_REG = 0x302000 and high bit is set - result always 0xB0;
g_qspi.spiBuffers.spiMasterTxBuffer[1]=(uint8_t)(address >> 8); // Next byte of the register address;
g_qspi.spiBuffers.spiMasterTxBuffer[2]=(uint8_t)address; // Low byte of register address - usually just the 1 byte offset;
g_qspi.spiBuffers.spiMasterTxBuffer[3]=(uint8_t)(parameter & 0xff);
g_qspi.spiBuffers.spiMasterTxBuffer[4]=(uint8_t)((parameter >> 8) & 0xff);
IfxQspi_SpiMaster_exchange(&g_qspi.spiMasterChannel, &g_qspi.spiBuffers.spiMasterTxBuffer[0], &g_qspi.spiBuffers.spiMasterRxBuffer[0], 5);
while(IfxQspi_SpiMaster_getStatus(&g_qspi.spiMasterChannel) == SpiIf_Status_busy) {}
//Original library code
// HAL_SPI_Enable();
//
// HAL_SPI_Write((uint8_t)((address >> 16) |
// 0x80)); // RAM_REG = 0x302000 and high bit is set - result always 0xB0
// HAL_SPI_Write((uint8_t)(address >> 8)); // Next byte of the register address
// HAL_SPI_Write((uint8_t)address); // Low byte of register address - usually just the 1 byte offset
//
// HAL_SPI_Write((uint8_t)(parameter & 0xff)); // Little endian (yes, it is most significant bit
// // first and least significant byte first)