diff --git a/clang-tools-extra/clang-tidy/readability/ElseAfterReturnCheck.cpp b/clang-tools-extra/clang-tidy/readability/ElseAfterReturnCheck.cpp index a80328b7e91d40..98ca34eb620c27 100644 --- a/clang-tools-extra/clang-tidy/readability/ElseAfterReturnCheck.cpp +++ b/clang-tools-extra/clang-tidy/readability/ElseAfterReturnCheck.cpp @@ -26,6 +26,7 @@ static const char BreakStr[] = "break"; static const char ThrowStr[] = "throw"; static const char WarningMessage[] = "do not use 'else' after '%0'"; static const char WarnOnUnfixableStr[] = "WarnOnUnfixable"; +static const char WarnOnConditionVariablesStr[] = "WarnOnConditionVariables"; const DeclRefExpr *findUsage(const Stmt *Node, int64_t DeclIdentifier) { if (!Node) @@ -138,10 +139,13 @@ void removeElseAndBrackets(DiagnosticBuilder &Diag, ASTContext &Context, ElseAfterReturnCheck::ElseAfterReturnCheck(StringRef Name, ClangTidyContext *Context) : ClangTidyCheck(Name, Context), - WarnOnUnfixable(Options.get(WarnOnUnfixableStr, true)) {} + WarnOnUnfixable(Options.get(WarnOnUnfixableStr, true)), + WarnOnConditionVariables(Options.get(WarnOnConditionVariablesStr, true)) { +} void ElseAfterReturnCheck::storeOptions(ClangTidyOptions::OptionMap &Opts) { Options.store(Opts, WarnOnUnfixableStr, WarnOnUnfixable); + Options.store(Opts, WarnOnConditionVariablesStr, WarnOnConditionVariables); } void ElseAfterReturnCheck::registerMatchers(MatchFinder *Finder) { @@ -186,6 +190,8 @@ void ElseAfterReturnCheck::check(const MatchFinder::MatchResult &Result) { } if (checkConditionVarUsageInElse(If) != nullptr) { + if (!WarnOnConditionVariables) + return; if (IsLastInScope) { // If the if statement is the last statement its enclosing statements // scope, we can pull the decl out of the if statement. @@ -219,6 +225,8 @@ void ElseAfterReturnCheck::check(const MatchFinder::MatchResult &Result) { } if (checkInitDeclUsageInElse(If) != nullptr) { + if (!WarnOnConditionVariables) + return; if (IsLastInScope) { // If the if statement is the last statement its enclosing statements // scope, we can pull the decl out of the if statement. diff --git a/clang-tools-extra/clang-tidy/readability/ElseAfterReturnCheck.h b/clang-tools-extra/clang-tidy/readability/ElseAfterReturnCheck.h index 990d4b4c3f6b7a..07d6314640a8bf 100644 --- a/clang-tools-extra/clang-tidy/readability/ElseAfterReturnCheck.h +++ b/clang-tools-extra/clang-tidy/readability/ElseAfterReturnCheck.h @@ -28,6 +28,7 @@ class ElseAfterReturnCheck : public ClangTidyCheck { private: const bool WarnOnUnfixable; + const bool WarnOnConditionVariables; }; } // namespace readability diff --git a/clang-tools-extra/docs/ReleaseNotes.rst b/clang-tools-extra/docs/ReleaseNotes.rst index c92e18a57821e5..7593554d896d16 100644 --- a/clang-tools-extra/docs/ReleaseNotes.rst +++ b/clang-tools-extra/docs/ReleaseNotes.rst @@ -200,6 +200,11 @@ Changes in existing checks Now checks ``std::basic_string_view`` by default. +- Improved :doc:`readability-else-after-return + ` check now supports a + `WarnOnConditionVariables` option to control whether to refactor condition + variables where possible. + - Improved :doc:`readability-identifier-naming ` check. diff --git a/clang-tools-extra/docs/clang-tidy/checks/readability-else-after-return.rst b/clang-tools-extra/docs/clang-tidy/checks/readability-else-after-return.rst index c178a6a68ec90a..fccb01d0e6b295 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/readability-else-after-return.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/readability-else-after-return.rst @@ -59,6 +59,21 @@ Would be transformed into: } } +Options +------- + +.. option:: WarnOnUnfixable + + When `true`, emit a warning for cases where the check can't output a + Fix-It. These can occur with declarations inside the ``else`` branch that + would have an extended lifetime if the ``else`` branch was removed. + Default value is `true`. + +.. option:: WarnOnConditionVariables + + When `true`, the check will attempt to refactor a variable defined inside + the condition of the ``if`` statement that is used in the ``else`` branch + defining them just before the ``if`` statement. This can only be done if + the ``if`` statement is the last statement in its parents scope. + Default value is `true`. -This check helps to enforce this `LLVM Coding Standards recommendation -`_. diff --git a/clang-tools-extra/test/clang-tidy/checkers/readability-else-after-return-no-cond-var-refactor.cpp b/clang-tools-extra/test/clang-tidy/checkers/readability-else-after-return-no-cond-var-refactor.cpp new file mode 100644 index 00000000000000..0d43240f1c6a6e --- /dev/null +++ b/clang-tools-extra/test/clang-tidy/checkers/readability-else-after-return-no-cond-var-refactor.cpp @@ -0,0 +1,42 @@ +// RUN: %check_clang_tidy %s readability-else-after-return %t -- \ +// RUN: -config='{CheckOptions: [ \ +// RUN: {key: readability-else-after-return.WarnOnConditionVariables, value: false}, \ +// RUN: ]}' + +bool foo(int Y) { + // Excess scopes are here so that the check would have to opportunity to + // refactor the variable out of the condition. + + // Expect warnings here as we don't need to move declaration of 'X' out of the + // if condition as its not used in the else. + { + if (int X = Y) + return X < 0; + else + // CHECK-MESSAGES: :[[@LINE-1]]:5: warning: do not use 'else' after 'return' + return false; + } + { + if (int X = Y; X) + return X < 0; + else + // CHECK-MESSAGES: :[[@LINE-1]]:5: warning: do not use 'else' after 'return' + return false; + } + + // Expect no warnings for these cases, as even though its safe to move + // declaration of 'X' out of the if condition, that has been disabled + // by the options. + { + if (int X = Y) + return false; + else + return X < 0; + } + { + if (int X = Y; X) + return false; + else + return X < 0; + } +} diff --git a/clang/include/clang/Basic/DiagnosticLexKinds.td b/clang/include/clang/Basic/DiagnosticLexKinds.td index fa07e9ae76c853..9cb06cf5b5e11a 100644 --- a/clang/include/clang/Basic/DiagnosticLexKinds.td +++ b/clang/include/clang/Basic/DiagnosticLexKinds.td @@ -312,6 +312,9 @@ def pp_macro_not_used : Warning<"macro is not used">, DefaultIgnore, def warn_pp_undef_identifier : Warning< "%0 is not defined, evaluates to 0">, InGroup>, DefaultIgnore; +def warn_pp_undef_prefix : Warning< + "%0 is not defined, evaluates to 0">, + InGroup>, DefaultIgnore; def warn_pp_ambiguous_macro : Warning< "ambiguous expansion of macro %0">, InGroup; def note_pp_ambiguous_macro_chosen : Note< diff --git a/clang/include/clang/Basic/DiagnosticOptions.h b/clang/include/clang/Basic/DiagnosticOptions.h index 3e3c4e50a9e0f3..7fbe534c5994b2 100644 --- a/clang/include/clang/Basic/DiagnosticOptions.h +++ b/clang/include/clang/Basic/DiagnosticOptions.h @@ -98,6 +98,10 @@ class DiagnosticOptions : public RefCountedBase{ /// prefixes removed. std::vector Warnings; + /// The list of prefixes from -Wundef-prefix=... used to generate warnings + /// for undefined macros. + std::vector UndefPrefixes; + /// The list of -R... options used to alter the diagnostic mappings, with the /// prefixes removed. std::vector Remarks; diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td index eca822c6afa34f..d030468514c3da 100644 --- a/clang/include/clang/Driver/Options.td +++ b/clang/include/clang/Driver/Options.td @@ -483,6 +483,9 @@ def Wnonportable_cfstrings : Joined<["-"], "Wnonportable-cfstrings">, Group, HelpText<"Pass the comma separated arguments in to the preprocessor">, MetaVarName<"">, Group; +def Wundef_prefix_EQ : CommaJoined<["-"], "Wundef-prefix=">, Group, + Flags<[CC1Option, CoreOption, HelpHidden]>, MetaVarName<"">, + HelpText<"Enable warnings for undefined macros with a prefix in the comma separated list ">; def Wwrite_strings : Flag<["-"], "Wwrite-strings">, Group, Flags<[CC1Option, HelpHidden]>; def Wno_write_strings : Flag<["-"], "Wno-write-strings">, Group, Flags<[CC1Option, HelpHidden]>; def W_Joined : Joined<["-"], "W">, Group, Flags<[CC1Option, CoreOption]>, diff --git a/clang/lib/AST/ASTImporterLookupTable.cpp b/clang/lib/AST/ASTImporterLookupTable.cpp index 7390329d4ed8d4..4d6fff8f34191a 100644 --- a/clang/lib/AST/ASTImporterLookupTable.cpp +++ b/clang/lib/AST/ASTImporterLookupTable.cpp @@ -45,7 +45,11 @@ struct Builder : RecursiveASTVisitor { LT.add(RTy->getAsCXXRecordDecl()); else if (const auto *SpecTy = dyn_cast(Ty)) LT.add(SpecTy->getAsCXXRecordDecl()); - else if (isa(Ty)) { + else if (const auto *SubstTy = + dyn_cast(Ty)) { + if (SubstTy->getAsCXXRecordDecl()) + LT.add(SubstTy->getAsCXXRecordDecl()); + } else if (isa(Ty)) { // We do not put friend typedefs to the lookup table because // ASTImporter does not organize typedefs into redecl chains. } else { diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp index b2117727c643e1..25c02cb888c1b0 100644 --- a/clang/lib/Basic/Targets/AArch64.cpp +++ b/clang/lib/Basic/Targets/AArch64.cpp @@ -308,8 +308,22 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts, Builder.defineMacro("__ARM_FEATURE_BF16", "1"); Builder.defineMacro("__ARM_FEATURE_BF16_VECTOR_ARITHMETIC", "1"); Builder.defineMacro("__ARM_BF16_FORMAT_ALTERNATIVE", "1"); + Builder.defineMacro("__ARM_FEATURE_BF16_SCALAR_ARITHMETIC", "1"); } + if ((FPU & SveMode) && HasBFloat16) { + Builder.defineMacro("__ARM_FEATURE_SVE_BF16", "1"); + } + + if ((FPU & SveMode) && HasMatmulFP64) + Builder.defineMacro("__ARM_FEATURE_SVE_MATMUL_FP64", "1"); + + if ((FPU & SveMode) && HasMatmulFP32) + Builder.defineMacro("__ARM_FEATURE_SVE_MATMUL_FP32", "1"); + + if ((FPU & SveMode) && HasMatMul) + Builder.defineMacro("__ARM_FEATURE_SVE_MATMUL_INT8", "1"); + if ((FPU & NeonMode) && HasFP16FML) Builder.defineMacro("__ARM_FEATURE_FP16FML", "1"); @@ -374,7 +388,8 @@ bool AArch64TargetInfo::hasFeature(StringRef Feature) const { (Feature == "neon" && (FPU & NeonMode)) || ((Feature == "sve" || Feature == "sve2" || Feature == "sve2-bitperm" || Feature == "sve2-aes" || Feature == "sve2-sha3" || - Feature == "sve2-sm4") && + Feature == "sve2-sm4" || Feature == "f64mm" || Feature == "f32mm" || + Feature == "i8mm" || Feature == "bf16") && (FPU & SveMode)); } @@ -396,6 +411,8 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector &Features, HasSVE2SHA3 = false; HasSVE2SM4 = false; HasSVE2BitPerm = false; + HasMatmulFP64 = false; + HasMatmulFP32 = false; ArchKind = llvm::AArch64::ArchKind::ARMV8A; @@ -435,6 +452,14 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector &Features, HasSVE2 = 1; HasSVE2BitPerm = 1; } + if (Feature == "+f32mm") { + FPU |= SveMode; + HasMatmulFP32 = true; + } + if (Feature == "+f64mm") { + FPU |= SveMode; + HasMatmulFP64 = true; + } if (Feature == "+crc") HasCRC = true; if (Feature == "+crypto") diff --git a/clang/lib/Basic/Targets/AArch64.h b/clang/lib/Basic/Targets/AArch64.h index 08636f955a9b15..d1982897d84e26 100644 --- a/clang/lib/Basic/Targets/AArch64.h +++ b/clang/lib/Basic/Targets/AArch64.h @@ -42,6 +42,8 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo { bool HasSVE2SHA3; bool HasSVE2SM4; bool HasSVE2BitPerm; + bool HasMatmulFP64; + bool HasMatmulFP32; llvm::AArch64::ArchKind ArchKind; diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp index 4b61f3c5536f0d..30f4570ecc0275 100644 --- a/clang/lib/Basic/Targets/X86.cpp +++ b/clang/lib/Basic/Targets/X86.cpp @@ -110,342 +110,12 @@ bool X86TargetInfo::initFeatureMap( setFeatureEnabledImpl(Features, "sse2", true); using namespace llvm::X86; - const enum CPUKind Kind = parseArchX86(CPU); - // Enable X87 for all X86 processors but Lakemont. - if (Kind != CK_Lakemont) - setFeatureEnabledImpl(Features, "x87", true); + SmallVector CPUFeatures; + getFeaturesForCPU(CPU, CPUFeatures); + for (auto &F : CPUFeatures) + setFeatureEnabledImpl(Features, F, true); - // Enable cmpxchg8 for i586 and greater CPUs. Include generic for backwards - // compatibility. - if (Kind >= CK_i586 || Kind == CK_None) - setFeatureEnabledImpl(Features, "cx8", true); - - switch (Kind) { - case CK_None: - case CK_i386: - case CK_i486: - case CK_i586: - case CK_Pentium: - case CK_PentiumPro: - case CK_i686: - case CK_Lakemont: - break; - - case CK_Cooperlake: - // CPX inherits all CLX features plus AVX512BF16 - setFeatureEnabledImpl(Features, "avx512bf16", true); - LLVM_FALLTHROUGH; - case CK_Cascadelake: - // CLX inherits all SKX features plus AVX512VNNI - setFeatureEnabledImpl(Features, "avx512vnni", true); - LLVM_FALLTHROUGH; - case CK_SkylakeServer: - setFeatureEnabledImpl(Features, "avx512f", true); - setFeatureEnabledImpl(Features, "avx512cd", true); - setFeatureEnabledImpl(Features, "avx512dq", true); - setFeatureEnabledImpl(Features, "avx512bw", true); - setFeatureEnabledImpl(Features, "avx512vl", true); - setFeatureEnabledImpl(Features, "clwb", true); - setFeatureEnabledImpl(Features, "pku", true); - // SkylakeServer cores inherits all SKL features, except SGX - goto SkylakeCommon; - - case CK_Tigerlake: - setFeatureEnabledImpl(Features, "avx512vp2intersect", true); - setFeatureEnabledImpl(Features, "movdiri", true); - setFeatureEnabledImpl(Features, "movdir64b", true); - setFeatureEnabledImpl(Features, "shstk", true); - // Tigerlake cores inherits IcelakeClient, except pconfig and wbnoinvd - goto IcelakeCommon; - - case CK_IcelakeServer: - setFeatureEnabledImpl(Features, "pconfig", true); - setFeatureEnabledImpl(Features, "wbnoinvd", true); - LLVM_FALLTHROUGH; - case CK_IcelakeClient: -IcelakeCommon: - setFeatureEnabledImpl(Features, "vaes", true); - setFeatureEnabledImpl(Features, "gfni", true); - setFeatureEnabledImpl(Features, "vpclmulqdq", true); - setFeatureEnabledImpl(Features, "avx512bitalg", true); - setFeatureEnabledImpl(Features, "avx512vbmi2", true); - setFeatureEnabledImpl(Features, "avx512vnni", true); - setFeatureEnabledImpl(Features, "avx512vpopcntdq", true); - setFeatureEnabledImpl(Features, "rdpid", true); - setFeatureEnabledImpl(Features, "clwb", true); - LLVM_FALLTHROUGH; - case CK_Cannonlake: - setFeatureEnabledImpl(Features, "avx512f", true); - setFeatureEnabledImpl(Features, "avx512cd", true); - setFeatureEnabledImpl(Features, "avx512dq", true); - setFeatureEnabledImpl(Features, "avx512bw", true); - setFeatureEnabledImpl(Features, "avx512vl", true); - setFeatureEnabledImpl(Features, "avx512ifma", true); - setFeatureEnabledImpl(Features, "avx512vbmi", true); - setFeatureEnabledImpl(Features, "pku", true); - setFeatureEnabledImpl(Features, "sha", true); - LLVM_FALLTHROUGH; - case CK_SkylakeClient: - setFeatureEnabledImpl(Features, "sgx", true); - // SkylakeServer cores inherits all SKL features, except SGX -SkylakeCommon: - setFeatureEnabledImpl(Features, "xsavec", true); - setFeatureEnabledImpl(Features, "xsaves", true); - setFeatureEnabledImpl(Features, "clflushopt", true); - setFeatureEnabledImpl(Features, "aes", true); - LLVM_FALLTHROUGH; - case CK_Broadwell: - setFeatureEnabledImpl(Features, "rdseed", true); - setFeatureEnabledImpl(Features, "adx", true); - setFeatureEnabledImpl(Features, "prfchw", true); - LLVM_FALLTHROUGH; - case CK_Haswell: - setFeatureEnabledImpl(Features, "avx2", true); - setFeatureEnabledImpl(Features, "lzcnt", true); - setFeatureEnabledImpl(Features, "bmi", true); - setFeatureEnabledImpl(Features, "bmi2", true); - setFeatureEnabledImpl(Features, "fma", true); - setFeatureEnabledImpl(Features, "invpcid", true); - setFeatureEnabledImpl(Features, "movbe", true); - LLVM_FALLTHROUGH; - case CK_IvyBridge: - setFeatureEnabledImpl(Features, "rdrnd", true); - setFeatureEnabledImpl(Features, "f16c", true); - setFeatureEnabledImpl(Features, "fsgsbase", true); - LLVM_FALLTHROUGH; - case CK_SandyBridge: - setFeatureEnabledImpl(Features, "avx", true); - setFeatureEnabledImpl(Features, "xsave", true); - setFeatureEnabledImpl(Features, "xsaveopt", true); - LLVM_FALLTHROUGH; - case CK_Westmere: - setFeatureEnabledImpl(Features, "pclmul", true); - LLVM_FALLTHROUGH; - case CK_Nehalem: - setFeatureEnabledImpl(Features, "sse4.2", true); - setFeatureEnabledImpl(Features, "popcnt", true); - LLVM_FALLTHROUGH; - case CK_Penryn: - setFeatureEnabledImpl(Features, "sse4.1", true); - LLVM_FALLTHROUGH; - case CK_Core2: - setFeatureEnabledImpl(Features, "ssse3", true); - setFeatureEnabledImpl(Features, "sahf", true); - LLVM_FALLTHROUGH; - case CK_Nocona: - setFeatureEnabledImpl(Features, "cx16", true); - LLVM_FALLTHROUGH; - case CK_Yonah: - case CK_Prescott: - setFeatureEnabledImpl(Features, "sse3", true); - LLVM_FALLTHROUGH; - case CK_PentiumM: - case CK_Pentium4: - case CK_x86_64: - setFeatureEnabledImpl(Features, "sse2", true); - LLVM_FALLTHROUGH; - case CK_Pentium3: - case CK_C3_2: - setFeatureEnabledImpl(Features, "sse", true); - LLVM_FALLTHROUGH; - case CK_Pentium2: - setFeatureEnabledImpl(Features, "fxsr", true); - LLVM_FALLTHROUGH; - case CK_PentiumMMX: - case CK_K6: - case CK_WinChipC6: - setFeatureEnabledImpl(Features, "mmx", true); - break; - - case CK_Tremont: - setFeatureEnabledImpl(Features, "clwb", true); - setFeatureEnabledImpl(Features, "gfni", true); - LLVM_FALLTHROUGH; - case CK_GoldmontPlus: - setFeatureEnabledImpl(Features, "ptwrite", true); - setFeatureEnabledImpl(Features, "rdpid", true); - setFeatureEnabledImpl(Features, "sgx", true); - LLVM_FALLTHROUGH; - case CK_Goldmont: - setFeatureEnabledImpl(Features, "sha", true); - setFeatureEnabledImpl(Features, "rdseed", true); - setFeatureEnabledImpl(Features, "xsave", true); - setFeatureEnabledImpl(Features, "xsaveopt", true); - setFeatureEnabledImpl(Features, "xsavec", true); - setFeatureEnabledImpl(Features, "xsaves", true); - setFeatureEnabledImpl(Features, "clflushopt", true); - setFeatureEnabledImpl(Features, "fsgsbase", true); - setFeatureEnabledImpl(Features, "aes", true); - LLVM_FALLTHROUGH; - case CK_Silvermont: - setFeatureEnabledImpl(Features, "rdrnd", true); - setFeatureEnabledImpl(Features, "pclmul", true); - setFeatureEnabledImpl(Features, "sse4.2", true); - setFeatureEnabledImpl(Features, "popcnt", true); - setFeatureEnabledImpl(Features, "prfchw", true); - LLVM_FALLTHROUGH; - case CK_Bonnell: - setFeatureEnabledImpl(Features, "movbe", true); - setFeatureEnabledImpl(Features, "ssse3", true); - setFeatureEnabledImpl(Features, "fxsr", true); - setFeatureEnabledImpl(Features, "cx16", true); - setFeatureEnabledImpl(Features, "sahf", true); - setFeatureEnabledImpl(Features, "mmx", true); - break; - - case CK_KNM: - // TODO: Add avx5124fmaps/avx5124vnniw. - setFeatureEnabledImpl(Features, "avx512vpopcntdq", true); - LLVM_FALLTHROUGH; - case CK_KNL: - setFeatureEnabledImpl(Features, "avx512f", true); - setFeatureEnabledImpl(Features, "avx512cd", true); - setFeatureEnabledImpl(Features, "avx512er", true); - setFeatureEnabledImpl(Features, "avx512pf", true); - setFeatureEnabledImpl(Features, "prfchw", true); - setFeatureEnabledImpl(Features, "prefetchwt1", true); - setFeatureEnabledImpl(Features, "fxsr", true); - setFeatureEnabledImpl(Features, "rdseed", true); - setFeatureEnabledImpl(Features, "adx", true); - setFeatureEnabledImpl(Features, "lzcnt", true); - setFeatureEnabledImpl(Features, "popcnt", true); - setFeatureEnabledImpl(Features, "bmi", true); - setFeatureEnabledImpl(Features, "bmi2", true); - setFeatureEnabledImpl(Features, "fma", true); - setFeatureEnabledImpl(Features, "rdrnd", true); - setFeatureEnabledImpl(Features, "f16c", true); - setFeatureEnabledImpl(Features, "fsgsbase", true); - setFeatureEnabledImpl(Features, "aes", true); - setFeatureEnabledImpl(Features, "pclmul", true); - setFeatureEnabledImpl(Features, "cx16", true); - setFeatureEnabledImpl(Features, "xsaveopt", true); - setFeatureEnabledImpl(Features, "xsave", true); - setFeatureEnabledImpl(Features, "movbe", true); - setFeatureEnabledImpl(Features, "sahf", true); - setFeatureEnabledImpl(Features, "mmx", true); - break; - - case CK_K6_2: - case CK_K6_3: - case CK_WinChip2: - case CK_C3: - setFeatureEnabledImpl(Features, "3dnow", true); - break; - - case CK_AMDFAM10: - setFeatureEnabledImpl(Features, "sse4a", true); - setFeatureEnabledImpl(Features, "lzcnt", true); - setFeatureEnabledImpl(Features, "popcnt", true); - setFeatureEnabledImpl(Features, "sahf", true); - setFeatureEnabledImpl(Features, "prfchw", true); - setFeatureEnabledImpl(Features, "cx16", true); - LLVM_FALLTHROUGH; - case CK_K8SSE3: - setFeatureEnabledImpl(Features, "sse3", true); - LLVM_FALLTHROUGH; - case CK_K8: - setFeatureEnabledImpl(Features, "sse2", true); - LLVM_FALLTHROUGH; - case CK_AthlonXP: - setFeatureEnabledImpl(Features, "sse", true); - setFeatureEnabledImpl(Features, "fxsr", true); - LLVM_FALLTHROUGH; - case CK_Athlon: - case CK_Geode: - setFeatureEnabledImpl(Features, "3dnowa", true); - break; - - case CK_BTVER2: - setFeatureEnabledImpl(Features, "avx", true); - setFeatureEnabledImpl(Features, "aes", true); - setFeatureEnabledImpl(Features, "pclmul", true); - setFeatureEnabledImpl(Features, "bmi", true); - setFeatureEnabledImpl(Features, "f16c", true); - setFeatureEnabledImpl(Features, "xsaveopt", true); - setFeatureEnabledImpl(Features, "xsave", true); - setFeatureEnabledImpl(Features, "movbe", true); - LLVM_FALLTHROUGH; - case CK_BTVER1: - setFeatureEnabledImpl(Features, "ssse3", true); - setFeatureEnabledImpl(Features, "sse4a", true); - setFeatureEnabledImpl(Features, "lzcnt", true); - setFeatureEnabledImpl(Features, "popcnt", true); - setFeatureEnabledImpl(Features, "prfchw", true); - setFeatureEnabledImpl(Features, "cx16", true); - setFeatureEnabledImpl(Features, "fxsr", true); - setFeatureEnabledImpl(Features, "sahf", true); - setFeatureEnabledImpl(Features, "mmx", true); - break; - - case CK_ZNVER2: - setFeatureEnabledImpl(Features, "clwb", true); - setFeatureEnabledImpl(Features, "rdpid", true); - setFeatureEnabledImpl(Features, "wbnoinvd", true); - LLVM_FALLTHROUGH; - case CK_ZNVER1: - setFeatureEnabledImpl(Features, "adx", true); - setFeatureEnabledImpl(Features, "aes", true); - setFeatureEnabledImpl(Features, "avx2", true); - setFeatureEnabledImpl(Features, "bmi", true); - setFeatureEnabledImpl(Features, "bmi2", true); - setFeatureEnabledImpl(Features, "clflushopt", true); - setFeatureEnabledImpl(Features, "clzero", true); - setFeatureEnabledImpl(Features, "cx16", true); - setFeatureEnabledImpl(Features, "f16c", true); - setFeatureEnabledImpl(Features, "fma", true); - setFeatureEnabledImpl(Features, "fsgsbase", true); - setFeatureEnabledImpl(Features, "fxsr", true); - setFeatureEnabledImpl(Features, "lzcnt", true); - setFeatureEnabledImpl(Features, "mmx", true); - setFeatureEnabledImpl(Features, "mwaitx", true); - setFeatureEnabledImpl(Features, "movbe", true); - setFeatureEnabledImpl(Features, "pclmul", true); - setFeatureEnabledImpl(Features, "popcnt", true); - setFeatureEnabledImpl(Features, "prfchw", true); - setFeatureEnabledImpl(Features, "rdrnd", true); - setFeatureEnabledImpl(Features, "rdseed", true); - setFeatureEnabledImpl(Features, "sahf", true); - setFeatureEnabledImpl(Features, "sha", true); - setFeatureEnabledImpl(Features, "sse4a", true); - setFeatureEnabledImpl(Features, "xsave", true); - setFeatureEnabledImpl(Features, "xsavec", true); - setFeatureEnabledImpl(Features, "xsaveopt", true); - setFeatureEnabledImpl(Features, "xsaves", true); - break; - - case CK_BDVER4: - setFeatureEnabledImpl(Features, "avx2", true); - setFeatureEnabledImpl(Features, "bmi2", true); - setFeatureEnabledImpl(Features, "movbe", true); - setFeatureEnabledImpl(Features, "rdrnd", true); - setFeatureEnabledImpl(Features, "mwaitx", true); - LLVM_FALLTHROUGH; - case CK_BDVER3: - setFeatureEnabledImpl(Features, "fsgsbase", true); - setFeatureEnabledImpl(Features, "xsaveopt", true); - LLVM_FALLTHROUGH; - case CK_BDVER2: - setFeatureEnabledImpl(Features, "bmi", true); - setFeatureEnabledImpl(Features, "fma", true); - setFeatureEnabledImpl(Features, "f16c", true); - setFeatureEnabledImpl(Features, "tbm", true); - LLVM_FALLTHROUGH; - case CK_BDVER1: - // xop implies avx, sse4a and fma4. - setFeatureEnabledImpl(Features, "xop", true); - setFeatureEnabledImpl(Features, "lwp", true); - setFeatureEnabledImpl(Features, "lzcnt", true); - setFeatureEnabledImpl(Features, "aes", true); - setFeatureEnabledImpl(Features, "pclmul", true); - setFeatureEnabledImpl(Features, "prfchw", true); - setFeatureEnabledImpl(Features, "cx16", true); - setFeatureEnabledImpl(Features, "fxsr", true); - setFeatureEnabledImpl(Features, "xsave", true); - setFeatureEnabledImpl(Features, "sahf", true); - setFeatureEnabledImpl(Features, "mmx", true); - break; - } if (!TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec)) return false; @@ -1531,7 +1201,7 @@ bool X86TargetInfo::validateCpuSupports(StringRef FeatureStr) const { static llvm::X86::ProcessorFeatures getFeature(StringRef Name) { return llvm::StringSwitch(Name) -#define X86_FEATURE_COMPAT(ENUM, STR) .Case(STR, llvm::X86::ENUM) +#define X86_FEATURE_COMPAT(ENUM, STR) .Case(STR, llvm::X86::FEATURE_##ENUM) #include "llvm/Support/X86TargetParser.def" ; // Note, this function should only be used after ensuring the value is diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 0a3adf6fbf246e..265fee392a8252 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -11688,7 +11688,7 @@ CodeGenFunction::GetX86CpuSupportsMask(ArrayRef FeatureStrs) { for (const StringRef &FeatureStr : FeatureStrs) { unsigned Feature = StringSwitch(FeatureStr) -#define X86_FEATURE_COMPAT(ENUM, STR) .Case(STR, llvm::X86::ENUM) +#define X86_FEATURE_COMPAT(ENUM, STR) .Case(STR, llvm::X86::FEATURE_##ENUM) #include "llvm/Support/X86TargetParser.def" ; FeaturesMask |= (1ULL << Feature); diff --git a/clang/lib/Frontend/CompilerInvocation.cpp b/clang/lib/Frontend/CompilerInvocation.cpp index 8bd248c9503063..e12931a5a1b430 100644 --- a/clang/lib/Frontend/CompilerInvocation.cpp +++ b/clang/lib/Frontend/CompilerInvocation.cpp @@ -1688,6 +1688,9 @@ bool clang::ParseDiagnosticArgs(DiagnosticOptions &Opts, ArgList &Args, } Opts.MessageLength = getLastArgIntValue(Args, OPT_fmessage_length_EQ, 0, Diags); + + Opts.UndefPrefixes = Args.getAllArgValues(OPT_Wundef_prefix_EQ); + addDiagnosticArgs(Args, OPT_W_Group, OPT_W_value_Group, Opts.Warnings); addDiagnosticArgs(Args, OPT_R_Group, OPT_R_value_Group, Opts.Remarks); diff --git a/clang/lib/Lex/PPExpressions.cpp b/clang/lib/Lex/PPExpressions.cpp index e5ec2b99f50743..7a158a31490d29 100644 --- a/clang/lib/Lex/PPExpressions.cpp +++ b/clang/lib/Lex/PPExpressions.cpp @@ -15,7 +15,6 @@ // //===----------------------------------------------------------------------===// -#include "clang/Lex/Preprocessor.h" #include "clang/Basic/IdentifierTable.h" #include "clang/Basic/SourceLocation.h" #include "clang/Basic/SourceManager.h" @@ -26,9 +25,12 @@ #include "clang/Lex/LiteralSupport.h" #include "clang/Lex/MacroInfo.h" #include "clang/Lex/PPCallbacks.h" +#include "clang/Lex/Preprocessor.h" #include "clang/Lex/Token.h" #include "llvm/ADT/APSInt.h" +#include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallString.h" +#include "llvm/ADT/StringExtras.h" #include "llvm/ADT/StringRef.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/SaveAndRestore.h" @@ -251,8 +253,24 @@ static bool EvaluateValue(PPValue &Result, Token &PeekTok, DefinedTracker &DT, // If this identifier isn't 'defined' or one of the special // preprocessor keywords and it wasn't macro expanded, it turns // into a simple 0 - if (ValueLive) + if (ValueLive) { PP.Diag(PeekTok, diag::warn_pp_undef_identifier) << II; + + const DiagnosticsEngine &DiagEngine = PP.getDiagnostics(); + // If 'Wundef' is enabled, do not emit 'undef-prefix' diagnostics. + if (DiagEngine.isIgnored(diag::warn_pp_undef_identifier, + PeekTok.getLocation())) { + const std::vector UndefPrefixes = + DiagEngine.getDiagnosticOptions().UndefPrefixes; + const StringRef IdentifierName = II->getName(); + if (llvm::any_of(UndefPrefixes, + [&IdentifierName](const std::string &Prefix) { + return IdentifierName.startswith(Prefix); + })) + PP.Diag(PeekTok, diag::warn_pp_undef_prefix) + << AddFlagValue{llvm::join(UndefPrefixes, ",")} << II; + } + } Result.Val = 0; Result.Val.setIsUnsigned(false); // "0" is signed intmax_t 0. Result.setIdentifier(II); diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c index 34b26b00ac1d81..2d07f3419d7395 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c index fdcce2a35b9b7b..dd88b486e57e19 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c index 13aae295532c96..f68976458d56bf 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c index 0b9483de6acc2f..e38baea73e709d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c index cf8e829a881994..3e66d7d98b0767 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c @@ -1,10 +1,10 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. // ASM-NOT: warning diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c index 3dd84dc705fc90..0182f2e6775e76 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c @@ -1,10 +1,10 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. // ASM-NOT: warning diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c index 45174ff9ef51ac..e3e07a1ef18e4b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c @@ -1,10 +1,10 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. // ASM-NOT: warning diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c index b8b0630981c5f9..52d92d04d69828 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c index cb5160e76fc841..28e14972f0981c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c index 42130f5ac502de..36bdf7c05fca0e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c index 924c3df2e3859f..dea8e20dc267c2 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c index 86c5d9c6576151..50c5fb543a7063 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c index 4e0508f3941278..3830f482aff336 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c @@ -1,10 +1,10 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. // ASM-NOT: warning diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c index 2b3603242eed99..66694789162c70 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c @@ -1,10 +1,10 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. // ASM-NOT: warning diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c index 52bca99b3f9448..6ed1d36cf30ea8 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c @@ -1,9 +1,9 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. // ASM-NOT: warning diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c index c2ed817ab09abc..cd585cc867e4d7 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c index bfb86ba9b05502..ae9bc08eac113b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c index 96f1a49ece3361..4d5eb50e1b2adc 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c index 30d65995fbda30..9d1b4672d587d1 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c @@ -1,10 +1,10 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. // ASM-NOT: warning diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c index cb02d2dc60ad68..d5cc626b9733d5 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c @@ -1,10 +1,10 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. // ASM-NOT: warning diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c index 5c8abb55a077bf..57f0e794243144 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c @@ -1,10 +1,10 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. // ASM-NOT: warning diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c index 94ce7321eb20b4..e85eced4b5a6bf 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c index 852cf27a14aafe..d9639a2c75b08a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c index 38268c438dcc6c..bb4711943ad1ef 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c index 203187a9d6f7b8..bd5fdc6da7a970 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c index 8bad4d95b16b07..171e320883223c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c index 274661a7ab6916..94446e10413884 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c index b9b37ec379680b..953ebfb692262f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c index 628716bd075004..7897a71ac2cc81 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c index bd1478061437dd..438e5d196cf73e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include #ifdef SVE_OVERLOADED_FORMS diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c index 64df268f59a98b..db61ea68308ea3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c index d636e7a824e66b..c084590039b3f9 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c @@ -1,9 +1,9 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. // ASM-NOT: warning diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c index 7398fce0c232c2..4ad3ed39a6d4a6 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP32 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP32 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f32mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f32mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c index 8a86e0c3c69987..e287734f1afe9e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c index 5ba3c85afdb55f..642cb1ca3ffa30 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_INT8 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_INT8 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c index 5cacc8a0bcd6de..90547a09b6e4e3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c @@ -1,8 +1,8 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c index b21474d2d82a62..1feab6ed6ec90f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c index 3754d2d44c8eaf..d803d2ffdf4d76 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c @@ -1,9 +1,9 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. // ASM-NOT: warning diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c index 47c7f92974c180..b44d6264a711eb 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c index e1e1a197b66828..1d5881d074e762 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c index 09f52a8ebf43b2..b824cace2b78b7 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c index f6fac70426ac1c..b9d0c7944ae403 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c @@ -1,9 +1,9 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. // ASM-NOT: warning diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c index b3756c8f7f904a..feee5434e54319 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c index ef5dee8c5d3c18..4b2235e63afe73 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c index 56a228d9258385..37ec4af4364681 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c index 394abdad1186a8..538331b107dcb1 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c index d0c92fd8ef5654..78ddddc6b1b7ac 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c index edb2937748b768..70904c3fb8fd7f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_INT8 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_INT8 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c index 565fda92d93041..1c68586d2fed51 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c @@ -1,10 +1,10 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null 2>%t // RUN: FileCheck --check-prefix=ASM --allow-empty %s <%t -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s // If this check fails please read test/CodeGen/aarch64-sve-intrinsics/README for instructions on how to resolve it. // ASM-NOT: warning diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c index ab308705f6c8ca..fb60ce3e15b92b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c index 36189f73a22753..c6f8e4a92c742e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c index f968c1524a8b69..a8cbbc660b23ae 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c index cf00930dd71ddf..62c9a7daf9ee39 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c index 34bda8955fb937..16f4bce584611a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c index fc26ec2b5658f6..21ea2cbc17a1f3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c index 07e974ca7179c3..16b789ca840350 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c index 629b4ae0839f77..a65560d837b0fb 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c index dd577b19c477db..6e0ae7ce1ce734 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c index 49d708d27e8fb8..6907451d2475fc 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c index 8b21bea365185e..0c361bac167fd5 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_INT8 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_INT8 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c index b11472e301e782..ffc98e9745b1d4 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c index 8c9e0322cde016..4aa8833073a439 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c index cb96efa7f519ad..ab63a5fd071441 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c index dd625390a70736..bf3dd928c4fe36 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c index 477ec516bdafdf..aaca01a5105dca 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c index 122d5c536cc08f..5b3b1b5443dea5 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c index 1712860f20b3ed..d9c6581e11f078 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c index 06969ffccc996e..36ec40f5b91ea9 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c index 1e9e81dc45bbef..47ced73fd86018 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c index a25daa6327538a..bde8800a57ca70 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c index 0856f06b5a2714..a3b04e6d67256f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -D__ARM_FEATURE_SVE_BF16 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c index ad33f565af89ad..20a12479e8b7ca 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE_MATMUL_FP64 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s #include diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c index c9ceededb80d53..e3169988466dff 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c @@ -1,9 +1,9 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c index cd56e8d88713ec..1b8cac3656f1c9 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c @@ -1,9 +1,9 @@ // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE_BF16 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include diff --git a/clang/test/Preprocessor/aarch64-target-features.c b/clang/test/Preprocessor/aarch64-target-features.c index c30764f22b8db0..bef145930697ff 100644 --- a/clang/test/Preprocessor/aarch64-target-features.c +++ b/clang/test/Preprocessor/aarch64-target-features.c @@ -95,6 +95,23 @@ // RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE %s // CHECK-SVE: __ARM_FEATURE_SVE 1 +// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve+bf16 -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE-BF16 %s +// CHECK-SVE-BF16: __ARM_FEATURE_BF16_SCALAR_ARITHMETIC 1 +// CHECK-SVE-BF16: __ARM_FEATURE_SVE 1 +// CHECK-SVE-BF16: __ARM_FEATURE_SVE_BF16 1 + +// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve+i8mm -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE-I8MM %s +// CHECK-SVE-I8MM: __ARM_FEATURE_SVE 1 +// CHECK-SVE-I8MM: __ARM_FEATURE_SVE_MATMUL_INT8 1 + +// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve+f32mm -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE-F32MM %s +// CHECK-SVE-F32MM: __ARM_FEATURE_SVE 1 +// CHECK-SVE-F32MM: __ARM_FEATURE_SVE_MATMUL_FP32 1 + +// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-a+sve+f64mm -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SVE-F64MM %s +// CHECK-SVE-F64MM: __ARM_FEATURE_SVE 1 +// CHECK-SVE-F64MM: __ARM_FEATURE_SVE_MATMUL_FP64 1 + // The following tests may need to be revised in the future since // SVE2 is currently still part of Future Architecture Technologies // (https://developer.arm.com/docs/ddi0602/latest) diff --git a/clang/test/Preprocessor/predefined-arch-macros.c b/clang/test/Preprocessor/predefined-arch-macros.c index 79a95c356b3905..e457a0479b3300 100644 --- a/clang/test/Preprocessor/predefined-arch-macros.c +++ b/clang/test/Preprocessor/predefined-arch-macros.c @@ -2832,6 +2832,7 @@ // CHECK_ZNVER1_M32: #define __CLFLUSHOPT__ 1 // CHECK_ZNVER1_M32: #define __CLZERO__ 1 // CHECK_ZNVER1_M32: #define __F16C__ 1 +// CHECK_ZNVER1_M32-NOT: #define __FMA4__ 1 // CHECK_ZNVER1_M32: #define __FMA__ 1 // CHECK_ZNVER1_M32: #define __FSGSBASE__ 1 // CHECK_ZNVER1_M32: #define __LZCNT__ 1 @@ -2852,6 +2853,8 @@ // CHECK_ZNVER1_M32: #define __SSE_MATH__ 1 // CHECK_ZNVER1_M32: #define __SSE__ 1 // CHECK_ZNVER1_M32: #define __SSSE3__ 1 +// CHECK_ZNVER1_M32-NOT: #define __TBM__ 1 +// CHECK_ZNVER1_M32-NOT: #define __XOP__ 1 // CHECK_ZNVER1_M32: #define __XSAVEC__ 1 // CHECK_ZNVER1_M32: #define __XSAVEOPT__ 1 // CHECK_ZNVER1_M32: #define __XSAVES__ 1 @@ -2876,6 +2879,7 @@ // CHECK_ZNVER1_M64: #define __CLFLUSHOPT__ 1 // CHECK_ZNVER1_M64: #define __CLZERO__ 1 // CHECK_ZNVER1_M64: #define __F16C__ 1 +// CHECK_ZNVER1_M64-NOT: #define __FMA4__ 1 // CHECK_ZNVER1_M64: #define __FMA__ 1 // CHECK_ZNVER1_M64: #define __FSGSBASE__ 1 // CHECK_ZNVER1_M64: #define __LZCNT__ 1 @@ -2896,6 +2900,8 @@ // CHECK_ZNVER1_M64: #define __SSE_MATH__ 1 // CHECK_ZNVER1_M64: #define __SSE__ 1 // CHECK_ZNVER1_M64: #define __SSSE3__ 1 +// CHECK_ZNVER1_M64-NOT: #define __TBM__ 1 +// CHECK_ZNVER1_M64-NOT: #define __XOP__ 1 // CHECK_ZNVER1_M64: #define __XSAVEC__ 1 // CHECK_ZNVER1_M64: #define __XSAVEOPT__ 1 // CHECK_ZNVER1_M64: #define __XSAVES__ 1 @@ -2923,6 +2929,7 @@ // CHECK_ZNVER2_M32: #define __CLWB__ 1 // CHECK_ZNVER2_M32: #define __CLZERO__ 1 // CHECK_ZNVER2_M32: #define __F16C__ 1 +// CHECK_ZNVER2_M32-NOT: #define __FMA4__ 1 // CHECK_ZNVER2_M32: #define __FMA__ 1 // CHECK_ZNVER2_M32: #define __FSGSBASE__ 1 // CHECK_ZNVER2_M32: #define __LZCNT__ 1 @@ -2943,7 +2950,9 @@ // CHECK_ZNVER2_M32: #define __SSE_MATH__ 1 // CHECK_ZNVER2_M32: #define __SSE__ 1 // CHECK_ZNVER2_M32: #define __SSSE3__ 1 +// CHECK_ZNVER2_M32-NOT: #define __TBM__ 1 // CHECK_ZNVER2_M32: #define __WBNOINVD__ 1 +// CHECK_ZNVER2_M32-NOT: #define __XOP__ 1 // CHECK_ZNVER2_M32: #define __XSAVEC__ 1 // CHECK_ZNVER2_M32: #define __XSAVEOPT__ 1 // CHECK_ZNVER2_M32: #define __XSAVES__ 1 @@ -2969,6 +2978,7 @@ // CHECK_ZNVER2_M64: #define __CLWB__ 1 // CHECK_ZNVER2_M64: #define __CLZERO__ 1 // CHECK_ZNVER2_M64: #define __F16C__ 1 +// CHECK_ZNVER2_M64-NOT: #define __FMA4__ 1 // CHECK_ZNVER2_M64: #define __FMA__ 1 // CHECK_ZNVER2_M64: #define __FSGSBASE__ 1 // CHECK_ZNVER2_M64: #define __LZCNT__ 1 @@ -2989,7 +2999,9 @@ // CHECK_ZNVER2_M64: #define __SSE_MATH__ 1 // CHECK_ZNVER2_M64: #define __SSE__ 1 // CHECK_ZNVER2_M64: #define __SSSE3__ 1 +// CHECK_ZNVER2_M64-NOT: #define __TBM__ 1 // CHECK_ZNVER2_M64: #define __WBNOINVD__ 1 +// CHECK_ZNVER2_M64-NOT: #define __XOP__ 1 // CHECK_ZNVER2_M64: #define __XSAVEC__ 1 // CHECK_ZNVER2_M64: #define __XSAVEOPT__ 1 // CHECK_ZNVER2_M64: #define __XSAVES__ 1 diff --git a/clang/test/Preprocessor/warn-macro-undef.c b/clang/test/Preprocessor/warn-macro-undef.c new file mode 100644 index 00000000000000..e7d16c836076ac --- /dev/null +++ b/clang/test/Preprocessor/warn-macro-undef.c @@ -0,0 +1,52 @@ +// RUN: %clang_cc1 %s -Eonly -Wundef -verify=undef +// RUN: %clang_cc1 %s -Eonly -Wundef-prefix=A,BC -verify=undef-prefix +// RUN: %clang_cc1 %s -Eonly -Wundef -Wundef-prefix=A,BC -verify=both +// RUN: %clang_cc1 %s -Eonly -Werror=undef -verify=undef-error +// RUN: %clang_cc1 %s -Eonly -Werror=undef-prefix -Wundef-prefix=A,BC -verify=undef-prefix-error +// RUN: %clang_cc1 %s -Eonly -Werror=undef -Wundef-prefix=A,BC -verify=both-error + +extern int x; + +#if AB // #1 +#endif +// undef-warning@#1 {{'AB' is not defined, evaluates to 0}} +// undef-prefix-warning@#1 {{'AB' is not defined, evaluates to 0}} +// both-warning@#1 {{'AB' is not defined, evaluates to 0}} +// undef-error-error@#1 {{'AB' is not defined, evaluates to 0}} +// undef-prefix-error-error@#1 {{'AB' is not defined, evaluates to 0}} +// both-error-error@#1 {{'AB' is not defined, evaluates to 0}} + +#if B // #2 +#endif +// undef-warning@#2 {{'B' is not defined, evaluates to 0}} +// no warning for undef-prefix +// both-warning@#2 {{'B' is not defined, evaluates to 0}} +// undef-error-error@#2 {{'B' is not defined, evaluates to 0}} +// no error for undef-prefix +// both-error-error@#2 {{'B' is not defined, evaluates to 0}} + +#define BC 0 +#if BC // no warning/error +#endif + +#undef BC +#if BC // #3 +#endif +// undef-warning@#3 {{'BC' is not defined, evaluates to 0}} +// undef-prefix-warning@#3 {{'BC' is not defined, evaluates to 0}} +// both-warning@#3 {{'BC' is not defined, evaluates to 0}} +// undef-error-error@#3 {{'BC' is not defined, evaluates to 0}} +// undef-prefix-error-error@#3 {{'BC' is not defined, evaluates to 0}} +// both-error-error@#3 {{'BC' is not defined, evaluates to 0}} + +// Test that #pragma-enabled 'Wundef' can override 'Wundef-prefix' +#pragma clang diagnostic error "-Wundef" + +#if C // #4 +#endif +// undef-error@#4 {{'C' is not defined, evaluates to 0}} +// undef-prefix-error@#4 {{'C' is not defined, evaluates to 0}} +// both-error@#4 {{'C' is not defined, evaluates to 0}} +// undef-error-error@#4 {{'C' is not defined, evaluates to 0}} +// undef-prefix-error-error@#4 {{'C' is not defined, evaluates to 0}} +// both-error-error@#4 {{'C' is not defined, evaluates to 0}} diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_mac.h b/compiler-rt/lib/sanitizer_common/sanitizer_mac.h index 922307a9b9779c..90ecff4815c2e9 100644 --- a/compiler-rt/lib/sanitizer_common/sanitizer_mac.h +++ b/compiler-rt/lib/sanitizer_common/sanitizer_mac.h @@ -47,9 +47,7 @@ struct VersionBase { }; struct MacosVersion : VersionBase { - MacosVersion(u16 ten, u16 major) : VersionBase(ten, major) { - CHECK_EQ(ten, 10); - } + MacosVersion(u16 major, u16 minor) : VersionBase(major, minor) {} }; struct DarwinKernelVersion : VersionBase { diff --git a/libcxx/test/libcxx/containers/associative/non_const_comparator.verify.cpp b/libcxx/test/libcxx/containers/associative/non_const_comparator.verify.cpp index d60b3be3157388..61cdc2f10bd992 100644 --- a/libcxx/test/libcxx/containers/associative/non_const_comparator.verify.cpp +++ b/libcxx/test/libcxx/containers/associative/non_const_comparator.verify.cpp @@ -12,8 +12,9 @@ // Test that libc++ generates a warning diagnostic when the container is // provided a non-const callable comparator. -#include #include +#include +#include // for __invokable struct BadCompare { template diff --git a/libcxx/test/libcxx/selftest/dsl/dsl.sh.py b/libcxx/test/libcxx/selftest/dsl/dsl.sh.py index 7205f35e7dc552..ff4ac2147bf68b 100644 --- a/libcxx/test/libcxx/selftest/dsl/dsl.sh.py +++ b/libcxx/test/libcxx/selftest/dsl/dsl.sh.py @@ -6,11 +6,15 @@ # #===----------------------------------------------------------------------===## -# RUN: %{python} %s %S %T %{escaped_exec} \ -# RUN: %{escaped_cxx} \ -# RUN: %{escaped_flags} \ -# RUN: %{escaped_compile_flags} \ -# RUN: %{escaped_link_flags} +# Note: We prepend arguments with 'x' to avoid thinking there are too few +# arguments in case an argument is an empty string. +# RUN: %{python} %s x%S \ +# RUN: x%T \ +# RUN: x%{escaped_exec} \ +# RUN: x%{escaped_cxx} \ +# RUN: x%{escaped_flags} \ +# RUN: x%{escaped_compile_flags} \ +# RUN: x%{escaped_link_flags} # END. import base64 @@ -33,7 +37,8 @@ # Steal some parameters from the config running this test so that we can # bootstrap our own TestingConfig. -SOURCE_ROOT, EXEC_PATH, EXEC, CXX, FLAGS, COMPILE_FLAGS, LINK_FLAGS = sys.argv[1:8] +args = list(map(lambda s: s[1:], sys.argv[1:8])) # Remove the leading 'x' +SOURCE_ROOT, EXEC_PATH, EXEC, CXX, FLAGS, COMPILE_FLAGS, LINK_FLAGS = args sys.argv[1:8] = [] class SetupConfigs(unittest.TestCase): diff --git a/libcxx/utils/libcxx/test/config.py b/libcxx/utils/libcxx/test/config.py index 69b01f14d384ff..30a59a068a7ad2 100644 --- a/libcxx/utils/libcxx/test/config.py +++ b/libcxx/utils/libcxx/test/config.py @@ -344,38 +344,6 @@ def configure_compile_flags(self): self.cxx.compile_flags += shlex.split(additional_flags) def configure_default_compile_flags(self): - # Try and get the std version from the command line. Fall back to - # default given in lit.site.cfg is not present. If default is not - # present then force c++11. - std = self.get_lit_conf('std') - if not std: - # Choose the newest possible language dialect if none is given. - possible_stds = ['c++2a', 'c++17', 'c++1z', 'c++14', 'c++11', - 'c++03'] - if self.cxx.type == 'gcc': - maj_v, _, _ = self.cxx.version - maj_v = int(maj_v) - if maj_v < 7: - possible_stds.remove('c++1z') - possible_stds.remove('c++17') - # FIXME: How many C++14 tests actually fail under GCC 5 and 6? - # Should we XFAIL them individually instead? - if maj_v <= 6: - possible_stds.remove('c++14') - for s in possible_stds: - if self.cxx.hasCompileFlag('-std=%s' % s): - std = s - self.lit_config.note( - 'inferred language dialect as: %s' % std) - break - if not std: - self.lit_config.fatal( - 'Failed to infer a supported language dialect from one of %r' - % possible_stds) - self.cxx.compile_flags += ['-std={0}'.format(std)] - std_feature = std.replace('gnu++', 'c++') - std_feature = std.replace('1z', '17') - self.config.available_features.add(std_feature) # Configure include paths self.configure_compile_flags_header_includes() self.target_info.add_cxx_compile_flags(self.cxx.compile_flags) diff --git a/libcxx/utils/libcxx/test/params.py b/libcxx/utils/libcxx/test/params.py index 43674de2c213fe..8509624071c455 100644 --- a/libcxx/utils/libcxx/test/params.py +++ b/libcxx/utils/libcxx/test/params.py @@ -8,7 +8,17 @@ from libcxx.test.dsl import * +_allStandards = ['c++98', 'c++03', 'c++11', 'c++14', 'c++17', 'c++2a'] + parameters = [ + # Core parameters of the test suite + Parameter(name='std', choices=_allStandards, type=str, + help="The version of the standard to compile the test suite with.", + default=lambda cfg: next(s for s in reversed(_allStandards) if hasCompileFlag(cfg, '-std='+s)), + feature=lambda std: + Feature(name=std, compileFlag='-std={}'.format(std), + when=lambda cfg: hasCompileFlag(cfg, '-std={}'.format(std)))), + Parameter(name='enable_exceptions', choices=[True, False], type=bool, default=True, help="Whether to enable exceptions when compiling the test suite.", feature=lambda exceptions: None if exceptions else diff --git a/lld/COFF/PDB.cpp b/lld/COFF/PDB.cpp index be6af13f364795..49d04add5be04f 100644 --- a/lld/COFF/PDB.cpp +++ b/lld/COFF/PDB.cpp @@ -946,12 +946,12 @@ static pdb::BulkPublic createPublic(Defined *def) { } else if (isa(def)) { flags = PublicSymFlags::Function; } - pub.Flags = static_cast(flags); + pub.setFlags(flags); OutputSection *os = def->getChunk()->getOutputSection(); assert(os && "all publics should be in final image"); pub.Offset = def->getRVA() - os->getRVA(); - pub.U.Segment = os->sectionIndex; + pub.Segment = os->sectionIndex; return pub; } diff --git a/lldb/packages/Python/lldbsuite/test/decorators.py b/lldb/packages/Python/lldbsuite/test/decorators.py index 0ef2f931542c66..ec084184cd6566 100644 --- a/lldb/packages/Python/lldbsuite/test/decorators.py +++ b/lldb/packages/Python/lldbsuite/test/decorators.py @@ -411,14 +411,15 @@ def expectedFailureOS( debug_info=debug_info) -def expectedFailureDarwin(bugnumber=None, compilers=None, debug_info=None): +def expectedFailureDarwin(bugnumber=None, compilers=None, debug_info=None, archs=None): # For legacy reasons, we support both "darwin" and "macosx" as OS X # triples. return expectedFailureOS( lldbplatform.darwin_all, bugnumber, compilers, - debug_info=debug_info) + debug_info=debug_info, + archs=archs) def expectedFailureAndroid(bugnumber=None, api_levels=None, archs=None): diff --git a/lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp b/lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp index 6f3e8b637cf291..7b0d6f343c0300 100644 --- a/lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp +++ b/lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp @@ -681,11 +681,16 @@ bool DynamicLoaderDarwin::AddModulesUsingImageInfos( loaded_module_list.AppendIfNeeded(image_module_sp); } - // macCatalyst support: - // Update the module's platform with the DYLD info. + // To support macCatalyst and legacy iOS simulator, + // update the module's platform with the DYLD info. ArchSpec dyld_spec = image_infos[idx].GetArchitecture(); - if (dyld_spec.GetTriple().getOS() == llvm::Triple::IOS && - dyld_spec.GetTriple().getEnvironment() == llvm::Triple::MacABI) + auto &dyld_triple = dyld_spec.GetTriple(); + if ((dyld_triple.getEnvironment() == llvm::Triple::MacABI && + dyld_triple.getOS() == llvm::Triple::IOS) || + (dyld_triple.getEnvironment() == llvm::Triple::Simulator && + (dyld_triple.getOS() == llvm::Triple::IOS || + dyld_triple.getOS() == llvm::Triple::TvOS || + dyld_triple.getOS() == llvm::Triple::WatchOS))) image_module_sp->MergeArchitecture(dyld_spec); } } @@ -748,13 +753,23 @@ lldb_private::ArchSpec DynamicLoaderDarwin::ImageInfo::GetArchitecture() const { // Update the module's platform with the DYLD info. lldb_private::ArchSpec arch_spec(lldb_private::eArchTypeMachO, header.cputype, header.cpusubtype); - if (os_type == llvm::Triple::IOS && os_env == llvm::Triple::MacABI) { - llvm::Triple triple(llvm::Twine("x86_64-apple-ios") + min_version_os_sdk + - "-macabi"); + if (os_env == llvm::Triple::MacABI && os_type == llvm::Triple::IOS) { + llvm::Triple triple(llvm::Twine(arch_spec.GetArchitectureName()) + + "-apple-ios" + min_version_os_sdk + "-macabi"); ArchSpec maccatalyst_spec(triple); if (arch_spec.IsCompatibleMatch(maccatalyst_spec)) arch_spec.MergeFrom(maccatalyst_spec); } + if (os_env == llvm::Triple::Simulator && + (os_type == llvm::Triple::IOS || os_type == llvm::Triple::TvOS || + os_type == llvm::Triple::WatchOS)) { + llvm::Triple triple(llvm::Twine(arch_spec.GetArchitectureName()) + + "-apple-" + llvm::Triple::getOSTypeName(os_type) + + min_version_os_sdk + "-simulator"); + ArchSpec sim_spec(triple); + if (arch_spec.IsCompatibleMatch(sim_spec)) + arch_spec.MergeFrom(sim_spec); + } return arch_spec; } diff --git a/lldb/source/Utility/Scalar.cpp b/lldb/source/Utility/Scalar.cpp index 610c935409ace3..d275f6211e5c3c 100644 --- a/lldb/source/Utility/Scalar.cpp +++ b/lldb/source/Utility/Scalar.cpp @@ -736,7 +736,17 @@ long long Scalar::SLongLong(long long fail_value) const { } unsigned long long Scalar::ULongLong(unsigned long long fail_value) const { - return GetAsUnsigned(fail_value); + switch (m_type) { + case e_double: { + double d_val = m_float.convertToDouble(); + llvm::APInt rounded_double = + llvm::APIntOps::RoundDoubleToAPInt(d_val, sizeof(ulonglong_t) * 8); + return static_cast( + (rounded_double.zextOrTrunc(sizeof(ulonglong_t) * 8)).getZExtValue()); + } + default: + return GetAsUnsigned(fail_value); + } } llvm::APInt Scalar::SInt128(const llvm::APInt &fail_value) const { diff --git a/lldb/test/API/functionalities/return-value/TestReturnValue.py b/lldb/test/API/functionalities/return-value/TestReturnValue.py index 24aa504a593c62..08293ca48b95bd 100644 --- a/lldb/test/API/functionalities/return-value/TestReturnValue.py +++ b/lldb/test/API/functionalities/return-value/TestReturnValue.py @@ -165,7 +165,7 @@ def test_with_python(self): archs=["i386"]) @expectedFailureAll(compiler=["gcc"], archs=["x86_64", "i386"]) @expectedFailureAll(oslist=["windows"], bugnumber="llvm.org/pr24778") - @skipIfDarwinEmbedded # ABIMacOSX_arm64 doesn't get structs this big correctly + @expectedFailureDarwin(archs=["arm64"]) # ABIMacOSX_arm64 doesn't get structs this big correctly def test_vector_values(self): self.build() exe = self.getBuildArtifact("a.out") diff --git a/lldb/test/API/iohandler/resize/TestIOHandlerResizeNoEditline.py b/lldb/test/API/iohandler/resize/TestIOHandlerResizeNoEditline.py index 4a99ff6d0ead22..b0ef259fd85f55 100644 --- a/lldb/test/API/iohandler/resize/TestIOHandlerResizeNoEditline.py +++ b/lldb/test/API/iohandler/resize/TestIOHandlerResizeNoEditline.py @@ -8,6 +8,7 @@ class TestCase(TestBase): mydir = TestBase.compute_mydir(__file__) @no_debug_info_test + @skipIfReproducer def test_resize_no_editline(self): """ Tests terminal resizing if the editline isn't used. """ dbg = lldb.SBDebugger.Create(False) diff --git a/lldb/test/API/macosx/simulator/TestSimulatorPlatform.py b/lldb/test/API/macosx/simulator/TestSimulatorPlatform.py index 4cc7ea6b865611..c12e920e3b8226 100644 --- a/lldb/test/API/macosx/simulator/TestSimulatorPlatform.py +++ b/lldb/test/API/macosx/simulator/TestSimulatorPlatform.py @@ -12,10 +12,23 @@ class TestSimulatorPlatformLaunching(TestBase): mydir = TestBase.compute_mydir(__file__) NO_DEBUG_INFO_TESTCASE = True - def run_with(self, arch, platform, os, env): - self.build(dictionary={'TRIPLE': arch+'-apple-'+os+'-'+env, 'ARCH': arch}) + def check_load_commands(self, expected_load_command): + """sanity check the built binary for the expected number of load commands""" + load_cmds = subprocess.check_output( + ['otool', '-l', self.getBuildArtifact()] + ).decode("utf-8") + found = 0 + for line in load_cmds.split('\n'): + if expected_load_command in line: + found += 1 + self.assertEquals(found, 1, "wrong load command") + + + def run_with(self, arch, os, env, expected_load_command): + self.build(dictionary={'TRIPLE': arch+'-apple-'+os+'-'+env}) lldbutil.run_to_source_breakpoint(self, "break here", lldb.SBFileSpec("hello.c")) + self.check_load_commands(expected_load_command) self.expect('image list -b -t', patterns=['a\.out '+arch+'-apple-'+os+'.*-'+env]) @@ -26,7 +39,7 @@ def test_ios(self): """Test running an iOS simulator binary""" self.run_with(arch=self.getArchitecture(), os='ios', env='simulator', - platform='iphonesimulator') + expected_load_command='LC_BUILD_VERSION') @skipUnlessDarwin @skipIfDarwinEmbedded @@ -35,13 +48,101 @@ def test_tvos(self): """Test running an tvOS simulator binary""" self.run_with(arch=self.getArchitecture(), os='tvos', env='simulator', - platform='appletvsimulator') + expected_load_command='LC_BUILD_VERSION') @skipUnlessDarwin @skipIfDarwinEmbedded @apple_simulator_test('watch') - def test_watchos(self): + @skipIfDarwin # rdar://problem/64552748 + @skipIf(archs=['arm64','arm64e']) + def test_watchos_i386(self): """Test running a 32-bit watchOS simulator binary""" self.run_with(arch='i386', os='watchos', env='simulator', - platform='watchsimulator') + expected_load_command='LC_BUILD_VERSION') + + @skipUnlessDarwin + @skipIfDarwinEmbedded + @apple_simulator_test('watch') + @skipIfDarwin # rdar://problem/64552748 + @skipIf(archs=['i386','x86_64']) + def test_watchos_armv7k(self): + """Test running a 32-bit watchOS simulator binary""" + self.run_with(arch='armv7k', + os='watchos', env='simulator', + expected_load_command='LC_BUILD_VERSION') + + + # + # Back-deployment tests. + # + # Older Mach-O versions used less expressive load commands, such + # as LC_VERSION_MIN_IPHONEOS that wouldn't distinguish between ios + # and ios-simulator. When targeting a simulator on Apple Silicon + # macOS, however, these legacy load commands are never generated. + # + + @skipUnlessDarwin + @skipIfDarwinEmbedded + @apple_simulator_test('iphone') + @skipIf(archs=['arm64','arm64e']) + def test_lc_version_min_iphoneos(self): + """Test running a back-deploying iOS simulator binary + with a legacy iOS load command""" + self.run_with(arch=self.getArchitecture(), + os='ios11.0', env='simulator', + expected_load_command='LC_VERSION_MIN_IPHONEOS') + + @skipUnlessDarwin + @skipIfDarwinEmbedded + @apple_simulator_test('iphone') + @skipIf(archs=['i386','x86_64']) + def test_ios_backdeploy_apple_silicon(self): + """Test running a back-deploying iOS simulator binary""" + self.run_with(arch=self.getArchitecture(), + os='ios11.0', env='simulator', + expected_load_command='LC_BUILD_VERSION') + + @skipUnlessDarwin + @skipIfDarwinEmbedded + @apple_simulator_test('appletv') + @skipIf(archs=['arm64','arm64e']) + def test_lc_version_min_tvos(self): + """Test running a back-deploying tvOS simulator binary + with a legacy tvOS load command""" + self.run_with(arch=self.getArchitecture(), + os='tvos11.0', env='simulator', + expected_load_command='LC_VERSION_MIN_TVOS') + + @skipUnlessDarwin + @skipIfDarwinEmbedded + @apple_simulator_test('appletv') + @skipIf(archs=['i386','x86_64']) + def test_tvos_backdeploy_apple_silicon(self): + """Test running a back-deploying tvOS simulator binary""" + self.run_with(arch=self.getArchitecture(), + os='tvos11.0', env='simulator', + expected_load_command='LC_BUILD_VERSION') + + @skipUnlessDarwin + @skipIfDarwinEmbedded + @apple_simulator_test('watch') + @skipIf(archs=['arm64','arm64e']) + @skipIfDarwin # rdar://problem/64552748 + def test_lc_version_min_watchos(self): + """Test running a back-deploying watchOS simulator binary + with a legacy watchOS load command""" + self.run_with(arch='i386', + os='watchos4.0', env='simulator', + expected_load_command='LC_VERSION_MIN_WATCHOS') + + @skipUnlessDarwin + @skipIfDarwinEmbedded + @apple_simulator_test('watch') + @skipIf(archs=['arm64','arm64e']) + @skipIfDarwin # rdar://problem/64552748 + def test_watchos_backdeploy_apple_silicon(self): + """Test running a back-deploying watchOS simulator binary""" + self.run_with(arch='armv7k', + os='watchos4.0', env='simulator', + expected_load_command='LC_BUILD_VERSION') diff --git a/lldb/test/Shell/Register/arm-fp-read.test b/lldb/test/Shell/Register/arm-fp-read.test index 538d6af54dcf2b..116fa7aa0df5ee 100644 --- a/lldb/test/Shell/Register/arm-fp-read.test +++ b/lldb/test/Shell/Register/arm-fp-read.test @@ -1,4 +1,4 @@ -# REQUIRES: native && target-arm +# REQUIRES: native && target-arm && !system-darwin # RUN: %clangxx_host -fomit-frame-pointer %p/Inputs/arm-fp-read.cpp -o %t # RUN: %lldb -b -s %s %t | FileCheck %s process launch diff --git a/lldb/test/Shell/Register/arm-gp-read.test b/lldb/test/Shell/Register/arm-gp-read.test index bcb289b880a752..9f8461842e9bad 100644 --- a/lldb/test/Shell/Register/arm-gp-read.test +++ b/lldb/test/Shell/Register/arm-gp-read.test @@ -1,4 +1,4 @@ -# REQUIRES: native && target-arm +# REQUIRES: native && target-arm && !system-darwin # RUN: %clangxx_host -fomit-frame-pointer %p/Inputs/arm-gp-read.cpp -o %t # RUN: %lldb -b -s %s %t | FileCheck %s process launch diff --git a/lldb/tools/debugserver/source/DNB.cpp b/lldb/tools/debugserver/source/DNB.cpp index b87ef5768a96e9..af13a8f8208ba8 100644 --- a/lldb/tools/debugserver/source/DNB.cpp +++ b/lldb/tools/debugserver/source/DNB.cpp @@ -1392,10 +1392,14 @@ const char *DNBGetDeploymentInfo(nub_process_t pid, uint32_t& minor_version, uint32_t& patch_version) { MachProcessSP procSP; - if (GetProcessSP(pid, procSP)) - return procSP->GetDeploymentInfo(lc, load_command_address, - major_version, minor_version, - patch_version); + if (GetProcessSP(pid, procSP)) { + // FIXME: This doesn't correct for older ios simulator and macCatalyst. + auto info = procSP->GetDeploymentInfo(lc, load_command_address); + major_version = info.major_version; + minor_version = info.minor_version; + patch_version = info.patch_version; + return procSP->GetPlatformString(info.platform); + } return nullptr; } diff --git a/lldb/tools/debugserver/source/MacOSX/MachProcess.h b/lldb/tools/debugserver/source/MacOSX/MachProcess.h index e62051fbe01116..c749dd8426c5d0 100644 --- a/lldb/tools/debugserver/source/MacOSX/MachProcess.h +++ b/lldb/tools/debugserver/source/MacOSX/MachProcess.h @@ -230,10 +230,22 @@ class MachProcess { uint64_t plo_pthread_tsd_base_address_offset, uint64_t plo_pthread_tsd_base_offset, uint64_t plo_pthread_tsd_entry_size); - const char * - GetDeploymentInfo(const struct load_command&, uint64_t load_command_address, - uint32_t& major_version, uint32_t& minor_version, - uint32_t& patch_version); + + struct DeploymentInfo { + DeploymentInfo() = default; + operator bool() { return platform > 0; } + /// The Mach-O platform type; + unsigned char platform = 0; + /// Pre-LC_BUILD_VERSION files don't disambiguate between ios and ios + /// simulator. + bool maybe_simulator = false; + uint32_t major_version = 0; + uint32_t minor_version = 0; + uint32_t patch_version = 0; + }; + DeploymentInfo GetDeploymentInfo(const struct load_command &, + uint64_t load_command_address); + static const char *GetPlatformString(unsigned char platform); bool GetMachOInformationFromMemory(uint32_t platform, nub_addr_t mach_o_header_addr, int wordsize, diff --git a/lldb/tools/debugserver/source/MacOSX/MachProcess.mm b/lldb/tools/debugserver/source/MacOSX/MachProcess.mm index 74d20be42e3155..af9ae752f72be0 100644 --- a/lldb/tools/debugserver/source/MacOSX/MachProcess.mm +++ b/lldb/tools/debugserver/source/MacOSX/MachProcess.mm @@ -601,88 +601,78 @@ static bool FBSAddEventDataToOptions(NSMutableDictionary *options, plo_pthread_tsd_entry_size); } -/// Determine whether this is running on macOS. -/// Since debugserver runs on the same machine as the process, we can -/// just look at the compilation target. -static bool IsMacOSHost() { -#if TARGET_OS_OSX == 1 - return true; -#else - return false; -#endif -} - -const char *MachProcess::GetDeploymentInfo(const struct load_command& lc, - uint64_t load_command_address, - uint32_t& major_version, - uint32_t& minor_version, - uint32_t& patch_version) { +MachProcess::DeploymentInfo +MachProcess::GetDeploymentInfo(const struct load_command &lc, + uint64_t load_command_address) { + DeploymentInfo info; uint32_t cmd = lc.cmd & ~LC_REQ_DYLD; - bool lc_cmd_known = - cmd == LC_VERSION_MIN_IPHONEOS || cmd == LC_VERSION_MIN_MACOSX || - cmd == LC_VERSION_MIN_TVOS || cmd == LC_VERSION_MIN_WATCHOS; - - if (lc_cmd_known) { + // Handle the older LC_VERSION load commands, which don't + // distinguish between simulator and real hardware. + auto handle_version_min = [&](char platform) { struct version_min_command vers_cmd; if (ReadMemory(load_command_address, sizeof(struct version_min_command), - &vers_cmd) != sizeof(struct version_min_command)) { - return nullptr; - } - major_version = vers_cmd.sdk >> 16; - minor_version = (vers_cmd.sdk >> 8) & 0xffu; - patch_version = vers_cmd.sdk & 0xffu; - - // Handle the older LC_VERSION load commands, which don't - // distinguish between simulator and real hardware. - switch (cmd) { - case LC_VERSION_MIN_IPHONEOS: - return IsMacOSHost() ? "iossimulator": "ios"; - case LC_VERSION_MIN_MACOSX: - return "macosx"; - case LC_VERSION_MIN_TVOS: - return IsMacOSHost() ? "tvossimulator": "tvos"; - case LC_VERSION_MIN_WATCHOS: - return IsMacOSHost() ? "watchossimulator" : "watchos"; - default: - return nullptr; - } - } -#if defined (LC_BUILD_VERSION) - if (cmd == LC_BUILD_VERSION) { + &vers_cmd) != sizeof(struct version_min_command)) + return; + info.platform = platform; + info.major_version = vers_cmd.sdk >> 16; + info.minor_version = (vers_cmd.sdk >> 8) & 0xffu; + info.patch_version = vers_cmd.sdk & 0xffu; + info.maybe_simulator = true; + }; + switch (cmd) { + case LC_VERSION_MIN_IPHONEOS: + handle_version_min(PLATFORM_IOS); + break; + case LC_VERSION_MIN_MACOSX: + handle_version_min(PLATFORM_MACOS); + break; + case LC_VERSION_MIN_TVOS: + handle_version_min(PLATFORM_TVOS); + break; + case LC_VERSION_MIN_WATCHOS: + handle_version_min(PLATFORM_WATCHOS); + break; +#if defined(LC_BUILD_VERSION) + case LC_BUILD_VERSION: { struct build_version_command build_vers; if (ReadMemory(load_command_address, sizeof(struct build_version_command), - &build_vers) != sizeof(struct build_version_command)) { - return nullptr; - } - major_version = build_vers.sdk >> 16;; - minor_version = (build_vers.sdk >> 8) & 0xffu; - patch_version = build_vers.sdk & 0xffu; - - switch (build_vers.platform) { - case PLATFORM_MACOS: - return "macosx"; - case PLATFORM_MACCATALYST: - return "maccatalyst"; - case PLATFORM_IOS: - return "ios"; - case PLATFORM_IOSSIMULATOR: - return "iossimulator"; - case PLATFORM_TVOS: - return "tvos"; - case PLATFORM_TVOSSIMULATOR: - return "tvossimulator"; - case PLATFORM_WATCHOS: - return "watchos"; - case PLATFORM_WATCHOSSIMULATOR: - return "watchossimulator"; - case PLATFORM_BRIDGEOS: - return "bridgeos"; - case PLATFORM_DRIVERKIT: - return "driverkit"; - } + &build_vers) != sizeof(struct build_version_command)) + break; + info.platform = build_vers.platform; + info.major_version = build_vers.sdk >> 16; + info.minor_version = (build_vers.sdk >> 8) & 0xffu; + info.patch_version = build_vers.sdk & 0xffu; + break; } #endif - return nullptr; + } + return info; +} + +const char *MachProcess::GetPlatformString(unsigned char platform) { + switch (platform) { + case PLATFORM_MACOS: + return "macosx"; + case PLATFORM_MACCATALYST: + return "maccatalyst"; + case PLATFORM_IOS: + return "ios"; + case PLATFORM_IOSSIMULATOR: + return "iossimulator"; + case PLATFORM_TVOS: + return "tvos"; + case PLATFORM_TVOSSIMULATOR: + return "tvossimulator"; + case PLATFORM_WATCHOS: + return "watchos"; + case PLATFORM_WATCHOSSIMULATOR: + return "watchossimulator"; + case PLATFORM_BRIDGEOS: + return "bridgeos"; + case PLATFORM_DRIVERKIT: + return "driverkit"; + } + return ""; } // Given an address, read the mach-o header and load commands out of memory to @@ -787,10 +777,36 @@ static bool IsMacOSHost() { sizeof(struct uuid_command)) uuid_copy(inf.uuid, uuidcmd.uuid); } - - uint32_t major_version, minor_version, patch_version; - if (const char *lc_platform = GetDeploymentInfo( - lc, load_cmds_p, major_version, minor_version, patch_version)) { + if (DeploymentInfo deployment_info = GetDeploymentInfo(lc, load_cmds_p)) { + // Simulator support. If the platform is ambiguous, use the dyld info. + if (deployment_info.maybe_simulator) { + // If dyld doesn't return a platform, use a heuristic. +#if (defined(__x86_64__) || defined(__i386__)) + // If we are running on Intel macOS, it is safe to assume + // this is really a back-deploying simulator binary. + if (deployment_info.maybe_simulator) { + switch (deployment_info.platform) { + case PLATFORM_IOS: + deployment_info.platform = PLATFORM_IOSSIMULATOR; + break; + case PLATFORM_TVOS: + deployment_info.platform = PLATFORM_TVOSSIMULATOR; + break; + case PLATFORM_WATCHOS: + deployment_info.platform = PLATFORM_WATCHOSSIMULATOR; + break; + } +#else + // On an Apple Silicon macOS host, there is no + // ambiguity. The only binaries that use legacy load + // commands are back-deploying native iOS binaries. All + // simulator binaries use the newer, unambiguous + // LC_BUILD_VERSION load commands. + deployment_info.maybe_simulator = false; +#endif + } + } + const char *lc_platform = GetPlatformString(deployment_info.platform); // macCatalyst support. // // This handles two special cases: @@ -824,12 +840,15 @@ static bool IsMacOSHost() { } else { inf.min_version_os_name = lc_platform; inf.min_version_os_version = ""; - inf.min_version_os_version += std::to_string(major_version); + inf.min_version_os_version += + std::to_string(deployment_info.major_version); inf.min_version_os_version += "."; - inf.min_version_os_version += std::to_string(minor_version); - if (patch_version != 0) { + inf.min_version_os_version += + std::to_string(deployment_info.minor_version); + if (deployment_info.patch_version != 0) { inf.min_version_os_version += "."; - inf.min_version_os_version += std::to_string(patch_version); + inf.min_version_os_version += + std::to_string(deployment_info.patch_version); } } } diff --git a/llvm/docs/Phabricator.rst b/llvm/docs/Phabricator.rst index 22fb22238cbc73..2493d4eea17d87 100644 --- a/llvm/docs/Phabricator.rst +++ b/llvm/docs/Phabricator.rst @@ -82,8 +82,7 @@ To upload a new patch: * Add reviewers (see below for advice). (If you set the Repository field correctly, llvm-commits or cfe-commits will be subscribed automatically; otherwise, you will have to manually subscribe them.) -* In the Repository field, enter the name of the project (LLVM, Clang, - etc.) to which the review should be sent. +* In the Repository field, enter "rG LLVM Github Monorepo". * Click *Save*. To submit an updated patch: diff --git a/llvm/include/llvm/DebugInfo/PDB/Native/GSIStreamBuilder.h b/llvm/include/llvm/DebugInfo/PDB/Native/GSIStreamBuilder.h index f52c2f6ed3dc59..378d4cdd23e602 100644 --- a/llvm/include/llvm/DebugInfo/PDB/Native/GSIStreamBuilder.h +++ b/llvm/include/llvm/DebugInfo/PDB/Native/GSIStreamBuilder.h @@ -9,6 +9,7 @@ #ifndef LLVM_DEBUGINFO_PDB_RAW_GSISTREAMBUILDER_H #define LLVM_DEBUGINFO_PDB_RAW_GSISTREAMBUILDER_H +#include "llvm/ADT/DenseSet.h" #include "llvm/DebugInfo/CodeView/SymbolRecord.h" #include "llvm/DebugInfo/PDB/Native/GlobalsStream.h" #include "llvm/DebugInfo/PDB/Native/RawConstants.h" @@ -38,6 +39,7 @@ struct MSFLayout; namespace pdb { struct GSIHashStreamBuilder; struct BulkPublic; +struct SymbolDenseMapInfo; class GSIStreamBuilder { @@ -57,14 +59,22 @@ class GSIStreamBuilder { uint32_t getRecordStreamIndex() const { return RecordStreamIndex; } // Add public symbols in bulk. - void addPublicSymbols(std::vector &&Publics); + void addPublicSymbols(std::vector &&PublicsIn); void addGlobalSymbol(const codeview::ProcRefSym &Sym); void addGlobalSymbol(const codeview::DataSym &Sym); void addGlobalSymbol(const codeview::ConstantSym &Sym); + + // Add a pre-serialized global symbol record. The caller must ensure that the + // symbol data remains alive until the global stream is committed to disk. void addGlobalSymbol(const codeview::CVSymbol &Sym); private: + void finalizePublicBuckets(); + void finalizeGlobalBuckets(uint32_t RecordZeroOffset); + + template void serializeAndAddGlobal(const T &Symbol); + uint32_t calculatePublicsHashStreamSize() const; uint32_t calculateGlobalsHashStreamSize() const; Error commitSymbolRecordStream(WritableBinaryStreamRef Stream); @@ -77,13 +87,25 @@ class GSIStreamBuilder { msf::MSFBuilder &Msf; std::unique_ptr PSH; std::unique_ptr GSH; - std::vector PubAddrMap; + + // List of all of the public records. These are stored unserialized so that we + // can defer copying the names until we are ready to commit the PDB. + std::vector Publics; + + // List of all of the global records. + std::vector Globals; + + // Hash table for deduplicating global typedef and constant records. Only used + // for globals. + llvm::DenseSet GlobalsSeen; }; /// This struct is equivalent to codeview::PublicSym32, but it has been /// optimized for size to speed up bulk serialization and sorting operations /// during PDB writing. struct BulkPublic { + BulkPublic() : Flags(0), BucketIdx(0) {} + const char *Name = nullptr; uint32_t NameLen = 0; @@ -93,16 +115,25 @@ struct BulkPublic { // Section offset of the symbol in the image. uint32_t Offset = 0; - union { - // Section index of the section containing the symbol. - uint16_t Segment; + // Section index of the section containing the symbol. + uint16_t Segment = 0; + + // PublicSymFlags. + uint16_t Flags : 4; - // GSI hash table bucket index. - uint16_t BucketIdx; - } U{0}; + // GSI hash table bucket index. The maximum value is IPHR_HASH. + uint16_t BucketIdx : 12; + static_assert(IPHR_HASH <= 1 << 12, "bitfield too small"); - // PublicSymFlags or hash bucket index - uint16_t Flags = 0; + void setFlags(codeview::PublicSymFlags F) { + Flags = uint32_t(F); + assert(Flags == uint32_t(F) && "truncated"); + } + + void setBucketIdx(uint16_t B) { + assert(B < IPHR_HASH); + BucketIdx = B; + } StringRef getName() const { return StringRef(Name, NameLen); } }; diff --git a/llvm/include/llvm/Frontend/Directive/DirectiveBase.td b/llvm/include/llvm/Frontend/Directive/DirectiveBase.td index ef14b19cabd84f..6e7d8a3fe960a7 100644 --- a/llvm/include/llvm/Frontend/Directive/DirectiveBase.td +++ b/llvm/include/llvm/Frontend/Directive/DirectiveBase.td @@ -11,7 +11,7 @@ //===----------------------------------------------------------------------===// -// General information about the directive language +// General information about the directive language. class DirectiveLanguage { // Name of the directive language such as omp or acc. string name = ?; @@ -37,20 +37,28 @@ class DirectiveLanguage { // write something like Enum_X if we have a `using namespace cppNamespace`. bit makeEnumAvailableInNamespace = 0; - // Generate include and macro to enable LLVM BitmaskEnum + // Generate include and macro to enable LLVM BitmaskEnum. bit enableBitmaskEnumInNamespace = 0; } -// Information about a specific clause +// Information about a specific clause. class Clause { - // Name of the clause + // Name of the clause. string name = c; - // Optional class holding value of the clause in clang AST + // Define an alternative name return in getClauseName function. + string alternativeName = ""; + + // Optional class holding value of the clause in clang AST. string clangClass = ?; - // Is clause implicit? + // Is clause implicit? If clause is set as implicit, the default kind will + // be return in getClauseKind instead of their own kind. bit isImplicit = 0; + + // Set directive used by default when unknown. Function returning the kind + // of enumeration will use this clause as the default. + bit isDefault = 0; } // Information about a specific directive @@ -58,6 +66,10 @@ class Directive { // Name of the directive. Can be composite directive sepearted by whitespace. string name = d; + // Define an alternative name return in getDirectiveName + // function. + string alternativeName = ""; + // List of allowed clauses for the directive. list allowedClauses = ?; @@ -66,4 +78,7 @@ class Directive { // List of clauses that are required. list requiredClauses = ?; + + // Set directive used by default when unknown. + bit isDefault = 0; } diff --git a/llvm/include/llvm/Frontend/OpenMP/CMakeLists.txt b/llvm/include/llvm/Frontend/OpenMP/CMakeLists.txt index 9bdc4b8c551316..e93fa38becfce0 100644 --- a/llvm/include/llvm/Frontend/OpenMP/CMakeLists.txt +++ b/llvm/include/llvm/Frontend/OpenMP/CMakeLists.txt @@ -1,3 +1,4 @@ set(LLVM_TARGET_DEFINITIONS OMP.td) -tablegen(LLVM OMP.h.inc --gen-directive-decls) +tablegen(LLVM OMP.h.inc --gen-directive-decl) +tablegen(LLVM OMP.cpp.inc --gen-directive-impl) add_public_tablegen_target(omp_gen) diff --git a/llvm/include/llvm/Frontend/OpenMP/OMP.td b/llvm/include/llvm/Frontend/OpenMP/OMP.td index 107ebac201545f..8813b2d434ef1c 100644 --- a/llvm/include/llvm/Frontend/OpenMP/OMP.td +++ b/llvm/include/llvm/Frontend/OpenMP/OMP.td @@ -182,11 +182,12 @@ def OMPC_Flush : Clause<"flush"> { let isImplicit = 1; } def OMPC_ThreadPrivate : Clause<"threadprivate"> { - // threadprivate or thread local + let alternativeName = "threadprivate or thread local"; let isImplicit = 1; } def OMPC_Unknown : Clause<"unknown"> { let isImplicit = 1; + let isDefault = 1; } //===----------------------------------------------------------------------===// @@ -493,4 +494,6 @@ def OMP_Scan : Directive<"scan"> { } def OMP_BeginDeclareVariant : Directive<"begin declare variant"> {} def OMP_EndDeclareVariant : Directive<"end declare variant"> {} -def OMP_Unknown : Directive<"unknown"> {} +def OMP_Unknown : Directive<"unknown"> { + let isDefault = 1; +} diff --git a/llvm/include/llvm/Frontend/OpenMP/OMPConstants.h b/llvm/include/llvm/Frontend/OpenMP/OMPConstants.h index 7435483207781c..e0427138ecfae8 100644 --- a/llvm/include/llvm/Frontend/OpenMP/OMPConstants.h +++ b/llvm/include/llvm/Frontend/OpenMP/OMPConstants.h @@ -15,6 +15,7 @@ #define LLVM_OPENMP_CONSTANTS_H #include "llvm/ADT/BitmaskEnum.h" + #include "llvm/Frontend/OpenMP/OMP.h.inc" namespace llvm { @@ -88,18 +89,6 @@ enum class IdentFlag { #define OMP_IDENT_FLAG(Enum, ...) constexpr auto Enum = omp::IdentFlag::Enum; #include "llvm/Frontend/OpenMP/OMPKinds.def" -/// Parse \p Str and return the directive it matches or OMPD_unknown if none. -Directive getOpenMPDirectiveKind(StringRef Str); - -/// Return a textual representation of the directive \p D. -StringRef getOpenMPDirectiveName(Directive D); - -/// Parse \p Str and return the clause it matches or OMPC_unknown if none. -Clause getOpenMPClauseKind(StringRef Str); - -/// Return a textual representation of the clause \p C. -StringRef getOpenMPClauseName(Clause C); - /// Return true if \p C is a valid clause for \p D in version \p Version. bool isAllowedClauseForDirective(Directive D, Clause C, unsigned Version); diff --git a/llvm/include/llvm/IR/Constant.h b/llvm/include/llvm/IR/Constant.h index 174e7364c52402..9a1d2b80c48e44 100644 --- a/llvm/include/llvm/IR/Constant.h +++ b/llvm/include/llvm/IR/Constant.h @@ -43,6 +43,8 @@ class Constant : public User { Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps) : User(ty, vty, Ops, NumOps) {} + ~Constant() = default; + public: void operator=(const Constant &) = delete; Constant(const Constant &) = delete; diff --git a/llvm/include/llvm/IR/Constants.h b/llvm/include/llvm/IR/Constants.h index c2c2cac649f14c..486c718cc6105d 100644 --- a/llvm/include/llvm/IR/Constants.h +++ b/llvm/include/llvm/IR/Constants.h @@ -899,6 +899,8 @@ class ConstantExpr : public Constant { setValueSubclassData(Opcode); } + ~ConstantExpr() = default; + public: // Static methods to construct a ConstantExpr of different kinds. Note that // these methods may return a object that is not an instance of the diff --git a/llvm/include/llvm/Support/X86TargetParser.def b/llvm/include/llvm/Support/X86TargetParser.def index 58c6e4320a0ec6..c3a144e2dda33c 100644 --- a/llvm/include/llvm/Support/X86TargetParser.def +++ b/llvm/include/llvm/Support/X86TargetParser.def @@ -125,56 +125,97 @@ X86_CPU_SUBTYPE ("geode", AMDPENTIUM_GEODE) // This macro is used for cpu types present in compiler-rt/libgcc. #ifndef X86_FEATURE_COMPAT -#define X86_FEATURE_COMPAT(ENUM, STR) X86_FEATURE(ENUM) +#define X86_FEATURE_COMPAT(ENUM, STR) X86_FEATURE(ENUM, STR) #endif #ifndef X86_FEATURE -#define X86_FEATURE(ENUM) +#define X86_FEATURE(ENUM, STR) #endif -X86_FEATURE_COMPAT(FEATURE_CMOV, "cmov") -X86_FEATURE_COMPAT(FEATURE_MMX, "mmx") -X86_FEATURE_COMPAT(FEATURE_POPCNT, "popcnt") -X86_FEATURE_COMPAT(FEATURE_SSE, "sse") -X86_FEATURE_COMPAT(FEATURE_SSE2, "sse2") -X86_FEATURE_COMPAT(FEATURE_SSE3, "sse3") -X86_FEATURE_COMPAT(FEATURE_SSSE3, "ssse3") -X86_FEATURE_COMPAT(FEATURE_SSE4_1, "sse4.1") -X86_FEATURE_COMPAT(FEATURE_SSE4_2, "sse4.2") -X86_FEATURE_COMPAT(FEATURE_AVX, "avx") -X86_FEATURE_COMPAT(FEATURE_AVX2, "avx2") -X86_FEATURE_COMPAT(FEATURE_SSE4_A, "sse4a") -X86_FEATURE_COMPAT(FEATURE_FMA4, "fma4") -X86_FEATURE_COMPAT(FEATURE_XOP, "xop") -X86_FEATURE_COMPAT(FEATURE_FMA, "fma") -X86_FEATURE_COMPAT(FEATURE_AVX512F, "avx512f") -X86_FEATURE_COMPAT(FEATURE_BMI, "bmi") -X86_FEATURE_COMPAT(FEATURE_BMI2, "bmi2") -X86_FEATURE_COMPAT(FEATURE_AES, "aes") -X86_FEATURE_COMPAT(FEATURE_PCLMUL, "pclmul") -X86_FEATURE_COMPAT(FEATURE_AVX512VL, "avx512vl") -X86_FEATURE_COMPAT(FEATURE_AVX512BW, "avx512bw") -X86_FEATURE_COMPAT(FEATURE_AVX512DQ, "avx512dq") -X86_FEATURE_COMPAT(FEATURE_AVX512CD, "avx512cd") -X86_FEATURE_COMPAT(FEATURE_AVX512ER, "avx512er") -X86_FEATURE_COMPAT(FEATURE_AVX512PF, "avx512pf") -X86_FEATURE_COMPAT(FEATURE_AVX512VBMI, "avx512vbmi") -X86_FEATURE_COMPAT(FEATURE_AVX512IFMA, "avx512ifma") -X86_FEATURE_COMPAT(FEATURE_AVX5124VNNIW, "avx5124vnniw") -X86_FEATURE_COMPAT(FEATURE_AVX5124FMAPS, "avx5124fmaps") -X86_FEATURE_COMPAT(FEATURE_AVX512VPOPCNTDQ, "avx512vpopcntdq") -X86_FEATURE_COMPAT(FEATURE_AVX512VBMI2, "avx512vbmi2") -X86_FEATURE_COMPAT(FEATURE_GFNI, "gfni") -X86_FEATURE_COMPAT(FEATURE_VPCLMULQDQ, "vpclmulqdq") -X86_FEATURE_COMPAT(FEATURE_AVX512VNNI, "avx512vnni") -X86_FEATURE_COMPAT(FEATURE_AVX512BITALG, "avx512bitalg") -X86_FEATURE_COMPAT(FEATURE_AVX512BF16, "avx512bf16") -X86_FEATURE_COMPAT(FEATURE_AVX512VP2INTERSECT, "avx512vp2intersect") +X86_FEATURE_COMPAT(CMOV, "cmov") +X86_FEATURE_COMPAT(MMX, "mmx") +X86_FEATURE_COMPAT(POPCNT, "popcnt") +X86_FEATURE_COMPAT(SSE, "sse") +X86_FEATURE_COMPAT(SSE2, "sse2") +X86_FEATURE_COMPAT(SSE3, "sse3") +X86_FEATURE_COMPAT(SSSE3, "ssse3") +X86_FEATURE_COMPAT(SSE4_1, "sse4.1") +X86_FEATURE_COMPAT(SSE4_2, "sse4.2") +X86_FEATURE_COMPAT(AVX, "avx") +X86_FEATURE_COMPAT(AVX2, "avx2") +X86_FEATURE_COMPAT(SSE4_A, "sse4a") +X86_FEATURE_COMPAT(FMA4, "fma4") +X86_FEATURE_COMPAT(XOP, "xop") +X86_FEATURE_COMPAT(FMA, "fma") +X86_FEATURE_COMPAT(AVX512F, "avx512f") +X86_FEATURE_COMPAT(BMI, "bmi") +X86_FEATURE_COMPAT(BMI2, "bmi2") +X86_FEATURE_COMPAT(AES, "aes") +X86_FEATURE_COMPAT(PCLMUL, "pclmul") +X86_FEATURE_COMPAT(AVX512VL, "avx512vl") +X86_FEATURE_COMPAT(AVX512BW, "avx512bw") +X86_FEATURE_COMPAT(AVX512DQ, "avx512dq") +X86_FEATURE_COMPAT(AVX512CD, "avx512cd") +X86_FEATURE_COMPAT(AVX512ER, "avx512er") +X86_FEATURE_COMPAT(AVX512PF, "avx512pf") +X86_FEATURE_COMPAT(AVX512VBMI, "avx512vbmi") +X86_FEATURE_COMPAT(AVX512IFMA, "avx512ifma") +X86_FEATURE_COMPAT(AVX5124VNNIW, "avx5124vnniw") +X86_FEATURE_COMPAT(AVX5124FMAPS, "avx5124fmaps") +X86_FEATURE_COMPAT(AVX512VPOPCNTDQ, "avx512vpopcntdq") +X86_FEATURE_COMPAT(AVX512VBMI2, "avx512vbmi2") +X86_FEATURE_COMPAT(GFNI, "gfni") +X86_FEATURE_COMPAT(VPCLMULQDQ, "vpclmulqdq") +X86_FEATURE_COMPAT(AVX512VNNI, "avx512vnni") +X86_FEATURE_COMPAT(AVX512BITALG, "avx512bitalg") +X86_FEATURE_COMPAT(AVX512BF16, "avx512bf16") +X86_FEATURE_COMPAT(AVX512VP2INTERSECT, "avx512vp2intersect") // Features below here are not in libgcc/compiler-rt. -X86_FEATURE (FEATURE_MOVBE) -X86_FEATURE (FEATURE_ADX) -X86_FEATURE (FEATURE_EM64T) -X86_FEATURE (FEATURE_CLFLUSHOPT) -X86_FEATURE (FEATURE_SHA) +X86_FEATURE (3DNOW, "3dnow") +X86_FEATURE (3DNOWA, "3dnowa") +X86_FEATURE (ADX, "adx") +X86_FEATURE (CLDEMOTE, "cldemote") +X86_FEATURE (CLFLUSHOPT, "clflushopt") +X86_FEATURE (CLWB, "clwb") +X86_FEATURE (CLZERO, "clzero") +X86_FEATURE (CMPXCHG16B, "cx16") +X86_FEATURE (CMPXCHG8B, "cx8") +X86_FEATURE (EM64T, nullptr) +X86_FEATURE (ENQCMD, "enqcmd") +X86_FEATURE (F16C, "f16c") +X86_FEATURE (FSGSBASE, "fsgsbase") +X86_FEATURE (FXSR, "fxsr") +X86_FEATURE (INVPCID, "invpcid") +X86_FEATURE (LWP, "lwp") +X86_FEATURE (LZCNT, "lzcnt") +X86_FEATURE (MOVBE, "movbe") +X86_FEATURE (MOVDIR64B, "movdir64b") +X86_FEATURE (MOVDIRI, "movdiri") +X86_FEATURE (MWAITX, "mwaitx") +X86_FEATURE (PCONFIG, "pconfig") +X86_FEATURE (PKU, "pku") +X86_FEATURE (PREFETCHWT1, "prefetchwt1") +X86_FEATURE (PRFCHW, "prfchw") +X86_FEATURE (PTWRITE, "ptwrite") +X86_FEATURE (RDPID, "rdpid") +X86_FEATURE (RDRND, "rdrnd") +X86_FEATURE (RDSEED, "rdseed") +X86_FEATURE (RTM, "rtm") +X86_FEATURE (SAHF, "sahf") +X86_FEATURE (SERIALIZE, "serialize") +X86_FEATURE (SGX, "sgx") +X86_FEATURE (SHA, "sha") +X86_FEATURE (SHSTK, "shstk") +X86_FEATURE (SSE4A, "sse4a") +X86_FEATURE (TBM, "tbm") +X86_FEATURE (TSXLDTRK, "tsxldtrk") +X86_FEATURE (VAES, "vaes") +X86_FEATURE (WAITPKG, "waitpkg") +X86_FEATURE (WBNOINVD, "wbnoinvd") +X86_FEATURE (X87, "x87") +X86_FEATURE (XSAVE, "xsave") +X86_FEATURE (XSAVEC, "xsavec") +X86_FEATURE (XSAVEOPT, "xsaveopt") +X86_FEATURE (XSAVES, "xsaves") #undef X86_FEATURE_COMPAT #undef X86_FEATURE diff --git a/llvm/include/llvm/Support/X86TargetParser.h b/llvm/include/llvm/Support/X86TargetParser.h index 99ae400cc656b9..5897e79eb287ee 100644 --- a/llvm/include/llvm/Support/X86TargetParser.h +++ b/llvm/include/llvm/Support/X86TargetParser.h @@ -53,8 +53,7 @@ enum ProcessorSubtypes : unsigned { // This should be kept in sync with libcc/compiler-rt as it should be used // by clang as a proxy for what's in libgcc/compiler-rt. enum ProcessorFeatures { -#define X86_FEATURE(ENUM) \ - ENUM, +#define X86_FEATURE(ENUM, STRING) FEATURE_##ENUM, #include "llvm/Support/X86TargetParser.def" CPU_FEATURE_MAX }; @@ -132,8 +131,12 @@ CPUKind parseArchX86(StringRef CPU, bool Only64Bit = false); void fillValidCPUArchList(SmallVectorImpl &Values, bool ArchIs32Bit); +/// Get the key feature prioritizing target multiversioning. ProcessorFeatures getKeyFeature(CPUKind Kind); +/// Fill in the features that \p CPU supports into \p Features. +void getFeaturesForCPU(StringRef CPU, SmallVectorImpl &Features); + } // namespace X86 } // namespace llvm diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp index 813c1b3a03be02..4471302c05d742 100644 --- a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp +++ b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp @@ -2335,6 +2335,7 @@ Error BitcodeReader::parseConstants() { uint64_t Op0Idx; uint64_t Op1Idx; uint64_t Op2Idx; + unsigned CstNo; }; std::vector DelayedShuffles; while (true) { @@ -2348,9 +2349,6 @@ Error BitcodeReader::parseConstants() { case BitstreamEntry::Error: return error("Malformed block"); case BitstreamEntry::EndBlock: - if (NextCstNo != ValueList.size()) - return error("Invalid constant reference"); - // Once all the constants have been read, go through and resolve forward // references. // @@ -2363,6 +2361,7 @@ Error BitcodeReader::parseConstants() { uint64_t Op0Idx = DelayedShuffle.Op0Idx; uint64_t Op1Idx = DelayedShuffle.Op1Idx; uint64_t Op2Idx = DelayedShuffle.Op2Idx; + uint64_t CstNo = DelayedShuffle.CstNo; Constant *Op0 = ValueList.getConstantFwdRef(Op0Idx, OpTy); Constant *Op1 = ValueList.getConstantFwdRef(Op1Idx, OpTy); Type *ShufTy = @@ -2373,9 +2372,12 @@ Error BitcodeReader::parseConstants() { SmallVector Mask; ShuffleVectorInst::getShuffleMask(Op2, Mask); Value *V = ConstantExpr::getShuffleVector(Op0, Op1, Mask); - ValueList.assignValue(V, NextCstNo, DelayedShuffle.CurFullTy); - ++NextCstNo; + ValueList.assignValue(V, CstNo, DelayedShuffle.CurFullTy); } + + if (NextCstNo != ValueList.size()) + return error("Invalid constant reference"); + ValueList.resolveConstantForwardRefs(); return Error::success(); case BitstreamEntry::Record: @@ -2735,7 +2737,8 @@ Error BitcodeReader::parseConstants() { if (Record.size() < 3 || !OpTy) return error("Invalid record"); DelayedShuffles.push_back( - {OpTy, OpTy, CurFullTy, Record[0], Record[1], Record[2]}); + {OpTy, OpTy, CurFullTy, Record[0], Record[1], Record[2], NextCstNo}); + ++NextCstNo; continue; } case bitc::CST_CODE_CE_SHUFVEC_EX: { // [opty, opval, opval, opval] @@ -2745,7 +2748,8 @@ Error BitcodeReader::parseConstants() { if (Record.size() < 4 || !RTy || !OpTy) return error("Invalid record"); DelayedShuffles.push_back( - {OpTy, RTy, CurFullTy, Record[1], Record[2], Record[3]}); + {OpTy, RTy, CurFullTy, Record[1], Record[2], Record[3], NextCstNo}); + ++NextCstNo; continue; } case bitc::CST_CODE_CE_CMP: { // CE_CMP: [opty, opval, opval, pred] diff --git a/llvm/lib/Bitcode/Reader/ValueList.cpp b/llvm/lib/Bitcode/Reader/ValueList.cpp index 431995fd40ac71..63a206eeb022cf 100644 --- a/llvm/lib/Bitcode/Reader/ValueList.cpp +++ b/llvm/lib/Bitcode/Reader/ValueList.cpp @@ -220,6 +220,6 @@ void BitcodeReaderValueList::resolveConstantForwardRefs() { // Update all ValueHandles, they should be the only users at this point. Placeholder->replaceAllUsesWith(RealVal); - Placeholder->deleteValue(); + delete cast(Placeholder); } } diff --git a/llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp b/llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp index 998ba1518b4f9b..ce248f34762db8 100644 --- a/llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp +++ b/llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp @@ -13,8 +13,6 @@ //===----------------------------------------------------------------------===// #include "llvm/DebugInfo/PDB/Native/GSIStreamBuilder.h" - -#include "llvm/ADT/DenseSet.h" #include "llvm/DebugInfo/CodeView/RecordName.h" #include "llvm/DebugInfo/CodeView/SymbolDeserializer.h" #include "llvm/DebugInfo/CodeView/SymbolRecord.h" @@ -36,58 +34,53 @@ using namespace llvm::msf; using namespace llvm::pdb; using namespace llvm::codeview; +// Helper class for building the public and global PDB hash table buckets. struct llvm::pdb::GSIHashStreamBuilder { - struct SymbolDenseMapInfo { - static inline CVSymbol getEmptyKey() { - static CVSymbol Empty; - return Empty; - } - static inline CVSymbol getTombstoneKey() { - static CVSymbol Tombstone( - DenseMapInfo>::getTombstoneKey()); - return Tombstone; - } - static unsigned getHashValue(const CVSymbol &Val) { - return xxHash64(Val.RecordData); - } - static bool isEqual(const CVSymbol &LHS, const CVSymbol &RHS) { - return LHS.RecordData == RHS.RecordData; - } - }; + // Sum of the size of all public or global records. + uint32_t RecordByteSize = 0; - std::vector Records; - llvm::DenseSet SymbolHashes; std::vector HashRecords; + + // The hash bitmap has `ceil((IPHR_HASH + 1) / 32)` words in it. The + // reference implementation builds a hash table with IPHR_HASH buckets in it. + // The last bucket is used to link together free hash table cells in a linked + // list, but it is always empty in the compressed, on-disk format. However, + // the bitmap must have a bit for it. std::array HashBitmap; + std::vector HashBuckets; uint32_t calculateSerializedLength() const; - uint32_t calculateRecordByteSize() const; Error commit(BinaryStreamWriter &Writer); - void finalizeBuckets(uint32_t RecordZeroOffset); + void finalizePublicBuckets(); + void finalizeGlobalBuckets(uint32_t RecordZeroOffset); - // Finalize public symbol buckets. + // Assign public and global symbol records into hash table buckets. + // Modifies the list of records to store the bucket index, but does not + // change the order. void finalizeBuckets(uint32_t RecordZeroOffset, - std::vector &&Publics); - - template void addSymbol(const T &Symbol, MSFBuilder &Msf) { - T Copy(Symbol); - addSymbol(SymbolSerializer::writeOneSymbol(Copy, Msf.getAllocator(), - CodeViewContainer::Pdb)); - } - void addSymbol(const CVSymbol &Symbol); + MutableArrayRef Globals); }; -void GSIHashStreamBuilder::addSymbol(const codeview::CVSymbol &Symbol) { - // Ignore duplicate typedefs and constants. - if (Symbol.kind() == S_UDT || Symbol.kind() == S_CONSTANT) { - auto Iter = SymbolHashes.insert(Symbol); - if (!Iter.second) - return; +// DenseMapInfo implementation for deduplicating symbol records. +struct llvm::pdb::SymbolDenseMapInfo { + static inline CVSymbol getEmptyKey() { + static CVSymbol Empty; + return Empty; } - Records.push_back(Symbol); -} + static inline CVSymbol getTombstoneKey() { + static CVSymbol Tombstone( + DenseMapInfo>::getTombstoneKey()); + return Tombstone; + } + static unsigned getHashValue(const CVSymbol &Val) { + return xxHash64(Val.RecordData); + } + static bool isEqual(const CVSymbol &LHS, const CVSymbol &RHS) { + return LHS.RecordData == RHS.RecordData; + } +}; namespace { LLVM_PACKED_START @@ -118,7 +111,7 @@ static CVSymbol serializePublic(uint8_t *Mem, const BulkPublic &Pub) { FixedMem->Prefix.RecordLen = static_cast(Size - 2); FixedMem->Pub.Flags = Pub.Flags; FixedMem->Pub.Offset = Pub.Offset; - FixedMem->Pub.Segment = Pub.U.Segment; + FixedMem->Pub.Segment = Pub.Segment; char *NameMem = reinterpret_cast(FixedMem + 1); memcpy(NameMem, Pub.Name, NameLen); // Zero the null terminator and remaining bytes. @@ -134,13 +127,6 @@ uint32_t GSIHashStreamBuilder::calculateSerializedLength() const { return Size; } -uint32_t GSIHashStreamBuilder::calculateRecordByteSize() const { - uint32_t Size = 0; - for (const auto &Sym : Records) - Size += Sym.length(); - return Size; -} - Error GSIHashStreamBuilder::commit(BinaryStreamWriter &Writer) { GSIHashHeader Header; Header.VerSignature = GSIHashHeader::HdrSignature; @@ -180,82 +166,117 @@ static int gsiRecordCmp(StringRef S1, StringRef S2) { return S1.compare_lower(S2.data()); } -void GSIHashStreamBuilder::finalizeBuckets(uint32_t RecordZeroOffset) { - // Build up a list of globals to be bucketed. This repurposes the BulkPublic - // struct with different meanings for the fields to avoid reallocating a new - // vector during public symbol table hash construction. - std::vector Globals; - Globals.resize(Records.size()); +void GSIStreamBuilder::finalizePublicBuckets() { + PSH->finalizeBuckets(0, Publics); +} + +void GSIStreamBuilder::finalizeGlobalBuckets(uint32_t RecordZeroOffset) { + // Build up a list of globals to be bucketed. Use the BulkPublic data + // structure for this purpose, even though these are global records, not + // public records. Most of the same fields are required: + // - Name + // - NameLen + // - SymOffset + // - BucketIdx + // The dead fields are Offset, Segment, and Flags. + std::vector Records; + Records.resize(Globals.size()); uint32_t SymOffset = RecordZeroOffset; - for (size_t I = 0, E = Records.size(); I < E; ++I) { - StringRef Name = getSymbolName(Records[I]); - Globals[I].Name = Name.data(); - Globals[I].NameLen = Name.size(); - Globals[I].SymOffset = SymOffset; - SymOffset += Records[I].length(); + for (size_t I = 0, E = Globals.size(); I < E; ++I) { + StringRef Name = getSymbolName(Globals[I]); + Records[I].Name = Name.data(); + Records[I].NameLen = Name.size(); + Records[I].SymOffset = SymOffset; + SymOffset += Globals[I].length(); } - finalizeBuckets(RecordZeroOffset, std::move(Globals)); + GSH->finalizeBuckets(RecordZeroOffset, Records); } -void GSIHashStreamBuilder::finalizeBuckets(uint32_t RecordZeroOffset, - std::vector &&Globals) { - // Hash every name in parallel. The Segment field is no longer needed, so - // store the BucketIdx in a union. - parallelForEachN(0, Globals.size(), [&](size_t I) { - Globals[I].U.BucketIdx = hashStringV1(Globals[I].Name) % IPHR_HASH; +void GSIHashStreamBuilder::finalizeBuckets( + uint32_t RecordZeroOffset, MutableArrayRef Records) { + // Hash every name in parallel. + parallelForEachN(0, Records.size(), [&](size_t I) { + Records[I].setBucketIdx(hashStringV1(Records[I].Name) % IPHR_HASH); }); - // Parallel sort by bucket index, then name within the buckets. Within the - // buckets, sort each bucket by memcmp of the symbol's name. It's important - // that we use the same sorting algorithm as is used by the reference - // implementation to ensure that the search for a record within a bucket can - // properly early-out when it detects the record won't be found. The - // algorithm used here corredsponds to the function + // Count up the size of each bucket. Then, use an exclusive prefix sum to + // calculate the bucket start offsets. This is C++17 std::exclusive_scan, but + // we can't use it yet. + uint32_t BucketStarts[IPHR_HASH] = {0}; + for (const BulkPublic &P : Records) + ++BucketStarts[P.BucketIdx]; + uint32_t Sum = 0; + for (uint32_t &B : BucketStarts) { + uint32_t Size = B; + B = Sum; + Sum += Size; + } + + // Place globals into the hash table in bucket order. When placing a global, + // update the bucket start. Every hash table slot should be filled. Always use + // a refcount of one for now. + HashRecords.resize(Records.size()); + uint32_t BucketCursors[IPHR_HASH]; + memcpy(BucketCursors, BucketStarts, sizeof(BucketCursors)); + for (int I = 0, E = Records.size(); I < E; ++I) { + uint32_t HashIdx = BucketCursors[Records[I].BucketIdx]++; + HashRecords[HashIdx].Off = I; + HashRecords[HashIdx].CRef = 1; + } + + // Within the buckets, sort each bucket by memcmp of the symbol's name. It's + // important that we use the same sorting algorithm as is used by the + // reference implementation to ensure that the search for a record within a + // bucket can properly early-out when it detects the record won't be found. + // The algorithm used here corresponds to the function // caseInsensitiveComparePchPchCchCch in the reference implementation. - auto BucketCmp = [](const BulkPublic &L, const BulkPublic &R) { - if (L.U.BucketIdx != R.U.BucketIdx) - return L.U.BucketIdx < R.U.BucketIdx; - int Cmp = gsiRecordCmp(L.getName(), R.getName()); - if (Cmp != 0) - return Cmp < 0; - // This comparison is necessary to make the sorting stable in the presence - // of two static globals with the same name. The easiest way to observe - // this is with S_LDATA32 records. - return L.SymOffset < R.SymOffset; - }; - parallelSort(Globals, BucketCmp); - - // Zero out the bucket index bitmap. - for (ulittle32_t &Word : HashBitmap) - Word = 0; - - // Compute the three tables: the hash records in bucket and chain order, the - // bucket presence bitmap, and the bucket chain start offsets. - HashRecords.reserve(Globals.size()); - uint32_t LastBucketIdx = ~0U; - for (const BulkPublic &Global : Globals) { - // If this is a new bucket, add it to the bitmap and the start offset map. - uint32_t BucketIdx = Global.U.BucketIdx; - if (LastBucketIdx != BucketIdx) { - HashBitmap[BucketIdx / 32] |= 1U << (BucketIdx % 32); + parallelForEachN(0, IPHR_HASH, [&](size_t I) { + auto B = &HashRecords[BucketStarts[I]]; + auto E = &HashRecords[BucketCursors[I]]; + auto BucketCmp = [Records](const PSHashRecord &LHash, + const PSHashRecord &RHash) { + const BulkPublic &L = Records[uint32_t(LHash.Off)]; + const BulkPublic &R = Records[uint32_t(RHash.Off)]; + assert(L.BucketIdx == R.BucketIdx); + int Cmp = gsiRecordCmp(L.getName(), R.getName()); + if (Cmp != 0) + return Cmp < 0; + // This comparison is necessary to make the sorting stable in the presence + // of two static globals with the same name. The easiest way to observe + // this is with S_LDATA32 records. + return L.SymOffset < R.SymOffset; + }; + llvm::sort(B, E, BucketCmp); + + // After we are done sorting, replace the global indices with the stream + // offsets of each global. Add one when writing symbol offsets to disk. + // See GSI1::fixSymRecs. + for (PSHashRecord &HRec : make_range(B, E)) + HRec.Off = Records[uint32_t(HRec.Off)].SymOffset + 1; + }); + + // For each non-empty bucket, push the bucket start offset into HashBuckets + // and set a bit in the hash bitmap. + for (uint32_t I = 0; I < HashBitmap.size(); ++I) { + uint32_t Word = 0; + for (uint32_t J = 0; J < 32; ++J) { + // Skip empty buckets. + uint32_t BucketIdx = I * 32 + J; + if (BucketIdx >= IPHR_HASH || + BucketStarts[BucketIdx] == BucketCursors[BucketIdx]) + continue; + Word |= (1U << J); // Calculate what the offset of the first hash record in the chain would // be if it were inflated to contain 32-bit pointers. On a 32-bit system, // each record would be 12 bytes. See HROffsetCalc in gsi.h. const int SizeOfHROffsetCalc = 12; ulittle32_t ChainStartOff = - ulittle32_t(HashRecords.size() * SizeOfHROffsetCalc); + ulittle32_t(BucketStarts[BucketIdx] * SizeOfHROffsetCalc); HashBuckets.push_back(ChainStartOff); - LastBucketIdx = BucketIdx; } - - // Create the hash record. Add one when writing symbol offsets to disk. - // See GSI1::fixSymRecs. Always use a refcount of 1 for now. - PSHashRecord HRec; - HRec.Off = Global.SymOffset + 1; - HRec.CRef = 1; - HashRecords.push_back(HRec); + HashBitmap[I] = Word; } } @@ -269,7 +290,7 @@ uint32_t GSIStreamBuilder::calculatePublicsHashStreamSize() const { uint32_t Size = 0; Size += sizeof(PublicsStreamHeader); Size += PSH->calculateSerializedLength(); - Size += PubAddrMap.size() * sizeof(uint32_t); // AddrMap + Size += Publics.size() * sizeof(uint32_t); // AddrMap // FIXME: Add thunk map and section offsets for incremental linking. return Size; @@ -281,9 +302,8 @@ uint32_t GSIStreamBuilder::calculateGlobalsHashStreamSize() const { Error GSIStreamBuilder::finalizeMsfLayout() { // First we write public symbol records, then we write global symbol records. - uint32_t PublicsSize = PSH->calculateRecordByteSize(); - uint32_t GlobalsSize = GSH->calculateRecordByteSize(); - GSH->finalizeBuckets(PublicsSize); + finalizePublicBuckets(); + finalizeGlobalBuckets(PSH->RecordByteSize); Expected Idx = Msf.addStream(calculateGlobalsHashStreamSize()); if (!Idx) @@ -295,7 +315,7 @@ Error GSIStreamBuilder::finalizeMsfLayout() { return Idx.takeError(); PublicsStreamIndex = *Idx; - uint32_t RecordBytes = PublicsSize + GlobalsSize; + uint32_t RecordBytes = PSH->RecordByteSize + GSH->RecordByteSize; Idx = Msf.addStream(RecordBytes); if (!Idx) @@ -304,72 +324,68 @@ Error GSIStreamBuilder::finalizeMsfLayout() { return Error::success(); } -void GSIStreamBuilder::addPublicSymbols(std::vector &&Publics) { +void GSIStreamBuilder::addPublicSymbols(std::vector &&PublicsIn) { + assert(Publics.empty() && PSH->RecordByteSize == 0 && + "publics can only be added once"); + Publics = std::move(PublicsIn); + // Sort the symbols by name. PDBs contain lots of symbols, so use parallelism. parallelSort(Publics, [](const BulkPublic &L, const BulkPublic &R) { return L.getName() < R.getName(); }); - // Assign offsets and allocate one contiguous block of memory for all public - // symbols. + // Assign offsets and calculate the length of the public symbol records. uint32_t SymOffset = 0; for (BulkPublic &Pub : Publics) { Pub.SymOffset = SymOffset; SymOffset += sizeOfPublic(Pub); } - uint8_t *Mem = - reinterpret_cast(Msf.getAllocator().Allocate(SymOffset, 4)); - - // Instead of storing individual CVSymbol records, store them as one giant - // buffer. - // FIXME: This is kind of a hack. This makes Records.size() wrong, and we have - // to account for that elsewhere. - PSH->Records.push_back(CVSymbol(makeArrayRef(Mem, SymOffset))); - - // Serialize them in parallel. - parallelForEachN(0, Publics.size(), [&](size_t I) { - const BulkPublic &Pub = Publics[I]; - serializePublic(Mem + Pub.SymOffset, Pub); - }); - - // Re-sort the publics by address so we can build the address map. We no - // longer need the original ordering. - auto AddrCmp = [](const BulkPublic &L, const BulkPublic &R) { - if (L.U.Segment != R.U.Segment) - return L.U.Segment < R.U.Segment; - if (L.Offset != R.Offset) - return L.Offset < R.Offset; - // parallelSort is unstable, so we have to do name comparison to ensure - // that two names for the same location come out in a determinstic order. - return L.getName() < R.getName(); - }; - parallelSort(Publics, AddrCmp); - - // Fill in the symbol offsets in the appropriate order. - PubAddrMap.reserve(Publics.size()); - for (const BulkPublic &Pub : Publics) - PubAddrMap.push_back(ulittle32_t(Pub.SymOffset)); - // Finalize public symbol buckets immediately after they have been added. - // They should all be warm in the cache at this point, so go ahead and do it - // now. - PSH->finalizeBuckets(0, std::move(Publics)); + // Remember the length of the public stream records. + PSH->RecordByteSize = SymOffset; } void GSIStreamBuilder::addGlobalSymbol(const ProcRefSym &Sym) { - GSH->addSymbol(Sym, Msf); + serializeAndAddGlobal(Sym); } void GSIStreamBuilder::addGlobalSymbol(const DataSym &Sym) { - GSH->addSymbol(Sym, Msf); + serializeAndAddGlobal(Sym); } void GSIStreamBuilder::addGlobalSymbol(const ConstantSym &Sym) { - GSH->addSymbol(Sym, Msf); + serializeAndAddGlobal(Sym); } -void GSIStreamBuilder::addGlobalSymbol(const codeview::CVSymbol &Sym) { - GSH->addSymbol(Sym); +template +void GSIStreamBuilder::serializeAndAddGlobal(const T &Symbol) { + T Copy(Symbol); + addGlobalSymbol(SymbolSerializer::writeOneSymbol(Copy, Msf.getAllocator(), + CodeViewContainer::Pdb)); +} + +void GSIStreamBuilder::addGlobalSymbol(const codeview::CVSymbol &Symbol) { + // Ignore duplicate typedefs and constants. + if (Symbol.kind() == S_UDT || Symbol.kind() == S_CONSTANT) { + auto Iter = GlobalsSeen.insert(Symbol); + if (!Iter.second) + return; + } + GSH->RecordByteSize += Symbol.length(); + Globals.push_back(Symbol); +} + +// Serialize each public and write it. +static Error writePublics(BinaryStreamWriter &Writer, + ArrayRef Publics) { + std::vector Storage; + for (const BulkPublic &Pub : Publics) { + Storage.resize(sizeOfPublic(Pub)); + serializePublic(Storage.data(), Pub); + if (Error E = Writer.writeBytes(Storage)) + return E; + } + return Error::success(); } static Error writeRecords(BinaryStreamWriter &Writer, @@ -387,14 +403,42 @@ Error GSIStreamBuilder::commitSymbolRecordStream( // Write public symbol records first, followed by global symbol records. This // must match the order that we assume in finalizeMsfLayout when computing // PSHZero and GSHZero. - if (auto EC = writeRecords(Writer, PSH->Records)) + if (auto EC = writePublics(Writer, Publics)) return EC; - if (auto EC = writeRecords(Writer, GSH->Records)) + if (auto EC = writeRecords(Writer, Globals)) return EC; return Error::success(); } +static std::vector +computeAddrMap(ArrayRef Publics) { + // Build a parallel vector of indices into the Publics vector, and sort it by + // address. + std::vector PubAddrMap; + PubAddrMap.reserve(Publics.size()); + for (int I = 0, E = Publics.size(); I < E; ++I) + PubAddrMap.push_back(ulittle32_t(I)); + + auto AddrCmp = [Publics](const ulittle32_t &LIdx, const ulittle32_t &RIdx) { + const BulkPublic &L = Publics[LIdx]; + const BulkPublic &R = Publics[RIdx]; + if (L.Segment != R.Segment) + return L.Segment < R.Segment; + if (L.Offset != R.Offset) + return L.Offset < R.Offset; + // parallelSort is unstable, so we have to do name comparison to ensure + // that two names for the same location come out in a deterministic order. + return L.getName() < R.getName(); + }; + parallelSort(PubAddrMap, AddrCmp); + + // Rewrite the public symbol indices into symbol offsets. + for (ulittle32_t &Entry : PubAddrMap) + Entry = Publics[Entry].SymOffset; + return PubAddrMap; +} + Error GSIStreamBuilder::commitPublicsHashStream( WritableBinaryStreamRef Stream) { BinaryStreamWriter Writer(Stream); @@ -402,7 +446,7 @@ Error GSIStreamBuilder::commitPublicsHashStream( // FIXME: Fill these in. They are for incremental linking. Header.SymHash = PSH->calculateSerializedLength(); - Header.AddrMap = PubAddrMap.size() * 4; + Header.AddrMap = Publics.size() * 4; Header.NumThunks = 0; Header.SizeOfThunk = 0; Header.ISectThunkTable = 0; @@ -415,6 +459,8 @@ Error GSIStreamBuilder::commitPublicsHashStream( if (auto EC = PSH->commit(Writer)) return EC; + std::vector PubAddrMap = computeAddrMap(Publics); + assert(PubAddrMap.size() == Publics.size()); if (auto EC = Writer.writeArray(makeArrayRef(PubAddrMap))) return EC; diff --git a/llvm/lib/ExecutionEngine/ExecutionEngine.cpp b/llvm/lib/ExecutionEngine/ExecutionEngine.cpp index 6b384f1d0ebaf9..d8bd671c66619f 100644 --- a/llvm/lib/ExecutionEngine/ExecutionEngine.cpp +++ b/llvm/lib/ExecutionEngine/ExecutionEngine.cpp @@ -9,6 +9,8 @@ // This file defines the common interface used by the various execution engine // subclasses. // +// FIXME: This file needs to be updated to support scalable vectors +// //===----------------------------------------------------------------------===// #include "llvm/ExecutionEngine/ExecutionEngine.h" @@ -624,10 +626,12 @@ GenericValue ExecutionEngine::getConstantValue(const Constant *C) { } } break; - case Type::FixedVectorTyID: case Type::ScalableVectorTyID: + report_fatal_error( + "Scalable vector support not yet implemented in ExecutionEngine"); + case Type::FixedVectorTyID: // if the whole vector is 'undef' just reserve memory for the value. - auto *VTy = cast(C->getType()); + auto *VTy = cast(C->getType()); Type *ElemTy = VTy->getElementType(); unsigned int elemNum = VTy->getNumElements(); Result.AggregateVal.resize(elemNum); @@ -915,8 +919,10 @@ GenericValue ExecutionEngine::getConstantValue(const Constant *C) { else llvm_unreachable("Unknown constant pointer type!"); break; - case Type::FixedVectorTyID: - case Type::ScalableVectorTyID: { + case Type::ScalableVectorTyID: + report_fatal_error( + "Scalable vector support not yet implemented in ExecutionEngine"); + case Type::FixedVectorTyID: { unsigned elemNum; Type* ElemTy; const ConstantDataVector *CDV = dyn_cast(C); @@ -927,9 +933,9 @@ GenericValue ExecutionEngine::getConstantValue(const Constant *C) { elemNum = CDV->getNumElements(); ElemTy = CDV->getElementType(); } else if (CV || CAZ) { - auto* VTy = cast(C->getType()); - elemNum = VTy->getNumElements(); - ElemTy = VTy->getElementType(); + auto *VTy = cast(C->getType()); + elemNum = VTy->getNumElements(); + ElemTy = VTy->getElementType(); } else { llvm_unreachable("Unknown constant vector type!"); } @@ -1098,9 +1104,11 @@ void ExecutionEngine::LoadValueFromMemory(GenericValue &Result, Result.IntVal = APInt(80, y); break; } - case Type::FixedVectorTyID: - case Type::ScalableVectorTyID: { - auto *VT = cast(Ty); + case Type::ScalableVectorTyID: + report_fatal_error( + "Scalable vector support not yet implemented in ExecutionEngine"); + case Type::FixedVectorTyID: { + auto *VT = cast(Ty); Type *ElemT = VT->getElementType(); const unsigned numElems = VT->getNumElements(); if (ElemT->isFloatTy()) { diff --git a/llvm/lib/Frontend/OpenMP/OMPConstants.cpp b/llvm/lib/Frontend/OpenMP/OMPConstants.cpp index cd7b46c38e5ceb..a628501e1f91f8 100644 --- a/llvm/lib/Frontend/OpenMP/OMPConstants.cpp +++ b/llvm/lib/Frontend/OpenMP/OMPConstants.cpp @@ -19,40 +19,7 @@ using namespace llvm; using namespace omp; using namespace types; -Directive llvm::omp::getOpenMPDirectiveKind(StringRef Str) { - return llvm::StringSwitch(Str) -#define OMP_DIRECTIVE(Enum, Str) .Case(Str, Enum) -#include "llvm/Frontend/OpenMP/OMPKinds.def" - .Default(OMPD_unknown); -} - -StringRef llvm::omp::getOpenMPDirectiveName(Directive Kind) { - switch (Kind) { -#define OMP_DIRECTIVE(Enum, Str) \ - case Enum: \ - return Str; -#include "llvm/Frontend/OpenMP/OMPKinds.def" - } - llvm_unreachable("Invalid OpenMP directive kind"); -} - -Clause llvm::omp::getOpenMPClauseKind(StringRef Str) { - return llvm::StringSwitch(Str) -#define OMP_CLAUSE(Enum, Str, Implicit) \ - .Case(Str, Implicit ? OMPC_unknown : Enum) -#include "llvm/Frontend/OpenMP/OMPKinds.def" - .Default(OMPC_unknown); -} - -StringRef llvm::omp::getOpenMPClauseName(Clause C) { - switch (C) { -#define OMP_CLAUSE(Enum, Str, ...) \ - case Enum: \ - return Str; -#include "llvm/Frontend/OpenMP/OMPKinds.def" - } - llvm_unreachable("Invalid OpenMP clause kind"); -} +#include "llvm/Frontend/OpenMP/OMP.cpp.inc" bool llvm::omp::isAllowedClauseForDirective(Directive D, Clause C, unsigned Version) { diff --git a/llvm/lib/IR/Constants.cpp b/llvm/lib/IR/Constants.cpp index 1afd73d95f5669..d8e044ee4bdce1 100644 --- a/llvm/lib/IR/Constants.cpp +++ b/llvm/lib/IR/Constants.cpp @@ -463,7 +463,74 @@ void Constant::destroyConstant() { } // Value has no outstanding references it is safe to delete it now... - delete this; + deleteConstant(this); +} + +void llvm::deleteConstant(Constant *C) { + switch (C->getValueID()) { + case Constant::ConstantIntVal: + delete static_cast(C); + break; + case Constant::ConstantFPVal: + delete static_cast(C); + break; + case Constant::ConstantAggregateZeroVal: + delete static_cast(C); + break; + case Constant::ConstantArrayVal: + delete static_cast(C); + break; + case Constant::ConstantStructVal: + delete static_cast(C); + break; + case Constant::ConstantVectorVal: + delete static_cast(C); + break; + case Constant::ConstantPointerNullVal: + delete static_cast(C); + break; + case Constant::ConstantDataArrayVal: + delete static_cast(C); + break; + case Constant::ConstantDataVectorVal: + delete static_cast(C); + break; + case Constant::ConstantTokenNoneVal: + delete static_cast(C); + break; + case Constant::BlockAddressVal: + delete static_cast(C); + break; + case Constant::UndefValueVal: + delete static_cast(C); + break; + case Constant::ConstantExprVal: + if (isa(C)) + delete static_cast(C); + else if (isa(C)) + delete static_cast(C); + else if (isa(C)) + delete static_cast(C); + else if (isa(C)) + delete static_cast(C); + else if (isa(C)) + delete static_cast(C); + else if (isa(C)) + delete static_cast(C); + else if (isa(C)) + delete static_cast(C); + else if (isa(C)) + delete static_cast(C); + else if (isa(C)) + delete static_cast(C); + else if (isa(C)) + delete static_cast(C); + else + llvm_unreachable("Unexpected constant expr"); + break; + default: + llvm_unreachable("Unexpected constant"); + } } static bool canTrapImpl(const Constant *C, diff --git a/llvm/lib/IR/ConstantsContext.h b/llvm/lib/IR/ConstantsContext.h index 4cd2621f625df0..fadbc2169816f1 100644 --- a/llvm/lib/IR/ConstantsContext.h +++ b/llvm/lib/IR/ConstantsContext.h @@ -43,7 +43,7 @@ namespace llvm { /// UnaryConstantExpr - This class is private to Constants.cpp, and is used /// behind the scenes to implement unary constant exprs. -class UnaryConstantExpr : public ConstantExpr { +class UnaryConstantExpr final : public ConstantExpr { public: UnaryConstantExpr(unsigned Opcode, Constant *C, Type *Ty) : ConstantExpr(Ty, Opcode, &Op<0>(), 1) { @@ -60,7 +60,7 @@ class UnaryConstantExpr : public ConstantExpr { /// BinaryConstantExpr - This class is private to Constants.cpp, and is used /// behind the scenes to implement binary constant exprs. -class BinaryConstantExpr : public ConstantExpr { +class BinaryConstantExpr final : public ConstantExpr { public: BinaryConstantExpr(unsigned Opcode, Constant *C1, Constant *C2, unsigned Flags) @@ -81,7 +81,7 @@ class BinaryConstantExpr : public ConstantExpr { /// SelectConstantExpr - This class is private to Constants.cpp, and is used /// behind the scenes to implement select constant exprs. -class SelectConstantExpr : public ConstantExpr { +class SelectConstantExpr final : public ConstantExpr { public: SelectConstantExpr(Constant *C1, Constant *C2, Constant *C3) : ConstantExpr(C2->getType(), Instruction::Select, &Op<0>(), 3) { @@ -102,7 +102,7 @@ class SelectConstantExpr : public ConstantExpr { /// ExtractElementConstantExpr - This class is private to /// Constants.cpp, and is used behind the scenes to implement /// extractelement constant exprs. -class ExtractElementConstantExpr : public ConstantExpr { +class ExtractElementConstantExpr final : public ConstantExpr { public: ExtractElementConstantExpr(Constant *C1, Constant *C2) : ConstantExpr(cast(C1->getType())->getElementType(), @@ -123,7 +123,7 @@ class ExtractElementConstantExpr : public ConstantExpr { /// InsertElementConstantExpr - This class is private to /// Constants.cpp, and is used behind the scenes to implement /// insertelement constant exprs. -class InsertElementConstantExpr : public ConstantExpr { +class InsertElementConstantExpr final : public ConstantExpr { public: InsertElementConstantExpr(Constant *C1, Constant *C2, Constant *C3) : ConstantExpr(C1->getType(), Instruction::InsertElement, @@ -145,7 +145,7 @@ class InsertElementConstantExpr : public ConstantExpr { /// ShuffleVectorConstantExpr - This class is private to /// Constants.cpp, and is used behind the scenes to implement /// shufflevector constant exprs. -class ShuffleVectorConstantExpr : public ConstantExpr { +class ShuffleVectorConstantExpr final : public ConstantExpr { public: ShuffleVectorConstantExpr(Constant *C1, Constant *C2, ArrayRef Mask) : ConstantExpr(VectorType::get( @@ -173,7 +173,7 @@ class ShuffleVectorConstantExpr : public ConstantExpr { /// ExtractValueConstantExpr - This class is private to /// Constants.cpp, and is used behind the scenes to implement /// extractvalue constant exprs. -class ExtractValueConstantExpr : public ConstantExpr { +class ExtractValueConstantExpr final : public ConstantExpr { public: ExtractValueConstantExpr(Constant *Agg, ArrayRef IdxList, Type *DestTy) @@ -204,7 +204,7 @@ class ExtractValueConstantExpr : public ConstantExpr { /// InsertValueConstantExpr - This class is private to /// Constants.cpp, and is used behind the scenes to implement /// insertvalue constant exprs. -class InsertValueConstantExpr : public ConstantExpr { +class InsertValueConstantExpr final : public ConstantExpr { public: InsertValueConstantExpr(Constant *Agg, Constant *Val, ArrayRef IdxList, Type *DestTy) @@ -235,7 +235,7 @@ class InsertValueConstantExpr : public ConstantExpr { /// GetElementPtrConstantExpr - This class is private to Constants.cpp, and is /// used behind the scenes to implement getelementpr constant exprs. -class GetElementPtrConstantExpr : public ConstantExpr { +class GetElementPtrConstantExpr final : public ConstantExpr { Type *SrcElementTy; Type *ResElementTy; @@ -269,7 +269,7 @@ class GetElementPtrConstantExpr : public ConstantExpr { // CompareConstantExpr - This class is private to Constants.cpp, and is used // behind the scenes to implement ICmp and FCmp constant expressions. This is // needed in order to store the predicate value for these instructions. -class CompareConstantExpr : public ConstantExpr { +class CompareConstantExpr final : public ConstantExpr { public: unsigned short predicate; CompareConstantExpr(Type *ty, Instruction::OtherOps opc, @@ -597,6 +597,10 @@ struct ConstantExprKeyType { } }; +// Free memory for a given constant. Assumes the constant has already been +// removed from all relevant maps. +void deleteConstant(Constant *C); + template class ConstantUniqueMap { public: using ValType = typename ConstantInfo::ValType; @@ -660,7 +664,7 @@ template class ConstantUniqueMap { void freeConstants() { for (auto &I : Map) - delete I; // Asserts that use_empty(). + deleteConstant(I); } private: @@ -733,6 +737,11 @@ template class ConstantUniqueMap { } }; +template <> inline void ConstantUniqueMap::freeConstants() { + for (auto &I : Map) + delete I; +} + } // end namespace llvm #endif // LLVM_LIB_IR_CONSTANTSCONTEXT_H diff --git a/llvm/lib/IR/Type.cpp b/llvm/lib/IR/Type.cpp index bb077c1fd0199f..d869a6e07ccad2 100644 --- a/llvm/lib/IR/Type.cpp +++ b/llvm/lib/IR/Type.cpp @@ -548,6 +548,8 @@ bool StructType::indexValid(const Value *V) const { // vector case all of the indices must be equal. if (!V->getType()->isIntOrIntVectorTy(32)) return false; + if (isa(V->getType())) + return false; const Constant *C = dyn_cast(V); if (C && V->getType()->isVectorTy()) C = C->getSplatValue(); diff --git a/llvm/lib/IR/Value.cpp b/llvm/lib/IR/Value.cpp index cfb2bcd778dc45..efb8d53e8964bb 100644 --- a/llvm/lib/IR/Value.cpp +++ b/llvm/lib/IR/Value.cpp @@ -111,6 +111,10 @@ void Value::deleteValue() { static_cast(this)->DeleteValue( \ static_cast(this)); \ break; +#define HANDLE_CONSTANT(Name) \ + case Value::Name##Val: \ + llvm_unreachable("constants should be destroyed with destroyConstant"); \ + break; #define HANDLE_INSTRUCTION(Name) /* nothing */ #include "llvm/IR/Value.def" diff --git a/llvm/lib/MC/MCStreamer.cpp b/llvm/lib/MC/MCStreamer.cpp index 0b650ef936bffb..0893835caf26cc 100644 --- a/llvm/lib/MC/MCStreamer.cpp +++ b/llvm/lib/MC/MCStreamer.cpp @@ -1128,6 +1128,79 @@ MCSymbol *MCStreamer::endSection(MCSection *Section) { return Sym; } +static VersionTuple +targetVersionOrMinimumSupportedOSVersion(const Triple &Target, + VersionTuple TargetVersion) { + VersionTuple Min = Target.getMinimumSupportedOSVersion(); + return !Min.empty() && Min > TargetVersion ? Min : TargetVersion; +} + +static MCVersionMinType +getMachoVersionMinLoadCommandType(const Triple &Target) { + assert(Target.isOSDarwin() && "expected a darwin OS"); + switch (Target.getOS()) { + case Triple::MacOSX: + case Triple::Darwin: + return MCVM_OSXVersionMin; + case Triple::IOS: + assert(!Target.isMacCatalystEnvironment() && + "mac Catalyst should use LC_BUILD_VERSION"); + return MCVM_IOSVersionMin; + case Triple::TvOS: + return MCVM_TvOSVersionMin; + case Triple::WatchOS: + return MCVM_WatchOSVersionMin; + default: + break; + } + llvm_unreachable("unexpected OS type"); +} + +static VersionTuple getMachoBuildVersionSupportedOS(const Triple &Target) { + assert(Target.isOSDarwin() && "expected a darwin OS"); + switch (Target.getOS()) { + case Triple::MacOSX: + case Triple::Darwin: + return VersionTuple(10, 14); + case Triple::IOS: + // Mac Catalyst always uses the build version load command. + if (Target.isMacCatalystEnvironment()) + return VersionTuple(); + LLVM_FALLTHROUGH; + case Triple::TvOS: + return VersionTuple(12); + case Triple::WatchOS: + return VersionTuple(5); + default: + break; + } + llvm_unreachable("unexpected OS type"); +} + +static MachO::PlatformType +getMachoBuildVersionPlatformType(const Triple &Target) { + assert(Target.isOSDarwin() && "expected a darwin OS"); + switch (Target.getOS()) { + case Triple::MacOSX: + case Triple::Darwin: + return MachO::PLATFORM_MACOS; + case Triple::IOS: + if (Target.isMacCatalystEnvironment()) + return MachO::PLATFORM_MACCATALYST; + return Target.isSimulatorEnvironment() ? MachO::PLATFORM_IOSSIMULATOR + : MachO::PLATFORM_IOS; + case Triple::TvOS: + return Target.isSimulatorEnvironment() ? MachO::PLATFORM_TVOSSIMULATOR + : MachO::PLATFORM_TVOS; + case Triple::WatchOS: + return Target.isSimulatorEnvironment() ? MachO::PLATFORM_WATCHOSSIMULATOR + : MachO::PLATFORM_WATCHOS; + default: + break; + } + llvm_unreachable("unexpected OS type"); +} + void MCStreamer::emitVersionForTarget(const Triple &Target, const VersionTuple &SDKVersion) { if (!Target.isOSBinFormatMachO() || !Target.isOSDarwin()) @@ -1136,33 +1209,37 @@ void MCStreamer::emitVersionForTarget(const Triple &Target, if (Target.getOSMajorVersion() == 0) return; - unsigned Major; - unsigned Minor; - unsigned Update; - if (Target.isMacCatalystEnvironment()) { - // Mac Catalyst always uses the build version load command. + unsigned Major = 0; + unsigned Minor = 0; + unsigned Update = 0; + switch (Target.getOS()) { + case Triple::MacOSX: + case Triple::Darwin: + Target.getMacOSXVersion(Major, Minor, Update); + break; + case Triple::IOS: + case Triple::TvOS: Target.getiOSVersion(Major, Minor, Update); - assert(Major && "A non-zero major version is expected"); - emitBuildVersion(MachO::PLATFORM_MACCATALYST, Major, Minor, Update, - SDKVersion); - return; - } - - MCVersionMinType VersionType; - if (Target.isWatchOS()) { - VersionType = MCVM_WatchOSVersionMin; + break; + case Triple::WatchOS: Target.getWatchOSVersion(Major, Minor, Update); - } else if (Target.isTvOS()) { - VersionType = MCVM_TvOSVersionMin; - Target.getiOSVersion(Major, Minor, Update); - } else if (Target.isMacOSX()) { - VersionType = MCVM_OSXVersionMin; - if (!Target.getMacOSXVersion(Major, Minor, Update)) - Major = 0; - } else { - VersionType = MCVM_IOSVersionMin; - Target.getiOSVersion(Major, Minor, Update); + break; + default: + llvm_unreachable("unexpected OS type"); } - if (Major != 0) - emitVersionMin(VersionType, Major, Minor, Update, SDKVersion); + assert(Major != 0 && "A non-zero major version is expected"); + auto LinkedTargetVersion = targetVersionOrMinimumSupportedOSVersion( + Target, VersionTuple(Major, Minor, Update)); + auto BuildVersionOSVersion = getMachoBuildVersionSupportedOS(Target); + if (BuildVersionOSVersion.empty() || + LinkedTargetVersion >= BuildVersionOSVersion) + return emitBuildVersion(getMachoBuildVersionPlatformType(Target), + LinkedTargetVersion.getMajor(), + *LinkedTargetVersion.getMinor(), + *LinkedTargetVersion.getSubminor(), SDKVersion); + + emitVersionMin(getMachoVersionMinLoadCommandType(Target), + LinkedTargetVersion.getMajor(), + *LinkedTargetVersion.getMinor(), + *LinkedTargetVersion.getSubminor(), SDKVersion); } diff --git a/llvm/lib/Support/Triple.cpp b/llvm/lib/Support/Triple.cpp index b712fad2f438d5..fec1985ccacae3 100644 --- a/llvm/lib/Support/Triple.cpp +++ b/llvm/lib/Support/Triple.cpp @@ -1627,11 +1627,29 @@ bool Triple::isMacOSXVersionLT(unsigned Major, unsigned Minor, VersionTuple Triple::getMinimumSupportedOSVersion() const { if (getVendor() != Triple::Apple || getArch() != Triple::aarch64) return VersionTuple(); - /// ARM64 slice is supported starting from macOS 11.0+. - if (getOS() == Triple::MacOSX) + switch (getOS()) { + case Triple::MacOSX: + // ARM64 slice is supported starting from macOS 11.0+. return VersionTuple(11, 0, 0); - if (getOS() == Triple::IOS && isMacCatalystEnvironment()) - return VersionTuple(14, 0, 0); + case Triple::IOS: + // ARM64 slice is supported starting from Mac Catalyst 14 (macOS 11). + // ARM64 simulators are supported for iOS 14+. + if (isMacCatalystEnvironment() || isSimulatorEnvironment()) + return VersionTuple(14, 0, 0); + break; + case Triple::TvOS: + // ARM64 simulators are supported for tvOS 14+. + if (isSimulatorEnvironment()) + return VersionTuple(14, 0, 0); + break; + case Triple::WatchOS: + // ARM64 simulators are supported for watchOS 7+. + if (isSimulatorEnvironment()) + return VersionTuple(7, 0, 0); + break; + default: + break; + } return VersionTuple(); } diff --git a/llvm/lib/Support/X86TargetParser.cpp b/llvm/lib/Support/X86TargetParser.cpp index cc3c1778daa40d..2d70ec49c94bde 100644 --- a/llvm/lib/Support/X86TargetParser.cpp +++ b/llvm/lib/Support/X86TargetParser.cpp @@ -19,134 +19,339 @@ using namespace llvm::X86; namespace { +/// Container class for CPU features. +/// This is a constexpr reimplementation of a subset of std::bitset. It would be +/// nice to use std::bitset directly, but it doesn't support constant +/// initialization. +class FeatureBitset { + static constexpr unsigned NUM_FEATURE_WORDS = + (X86::CPU_FEATURE_MAX + 31) / 32; + + // This cannot be a std::array, operator[] is not constexpr until C++17. + uint32_t Bits[NUM_FEATURE_WORDS] = {}; + +public: + constexpr FeatureBitset() = default; + constexpr FeatureBitset(std::initializer_list Init) { + for (auto I : Init) + set(I); + } + + constexpr FeatureBitset &set(unsigned I) { + uint32_t NewBits = Bits[I / 32] | (uint32_t(1) << (I % 32)); + Bits[I / 32] = NewBits; + return *this; + } + + constexpr bool operator[](unsigned I) const { + uint32_t Mask = uint32_t(1) << (I % 32); + return (Bits[I / 32] & Mask) != 0; + } + + constexpr FeatureBitset operator&(const FeatureBitset &RHS) const { + FeatureBitset Result; + for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I) + Result.Bits[I] = Bits[I] & RHS.Bits[I]; + return Result; + } + + constexpr FeatureBitset operator|(const FeatureBitset &RHS) const { + FeatureBitset Result; + for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I) + Result.Bits[I] = Bits[I] | RHS.Bits[I]; + return Result; + } + + constexpr FeatureBitset operator~() const { + FeatureBitset Result; + for (unsigned I = 0, E = array_lengthof(Bits); I != E; ++I) + Result.Bits[I] = ~Bits[I]; + return Result; + } +}; + struct ProcInfo { StringLiteral Name; X86::CPUKind Kind; unsigned KeyFeature; - bool Is64Bit; + FeatureBitset Features; }; } // end anonymous namespace -#define PROC_64_BIT true -#define PROC_32_BIT false +#define X86_FEATURE(ENUM, STRING) \ + static constexpr FeatureBitset Feature##ENUM = {X86::FEATURE_##ENUM}; +#include "llvm/Support/X86TargetParser.def" + +// Pentium with MMX. +static constexpr FeatureBitset FeaturesPentiumMMX = + FeatureX87 | FeatureCMPXCHG8B | FeatureMMX; + +// Pentium 2 and 3. +static constexpr FeatureBitset FeaturesPentium2 = + FeatureX87 | FeatureCMPXCHG8B | FeatureMMX | FeatureFXSR; +static constexpr FeatureBitset FeaturesPentium3 = FeaturesPentium2 | FeatureSSE; + +// Pentium 4 CPUs +static constexpr FeatureBitset FeaturesPentium4 = + FeaturesPentium3 | FeatureSSE2; +static constexpr FeatureBitset FeaturesPrescott = + FeaturesPentium4 | FeatureSSE3; +static constexpr FeatureBitset FeaturesNocona = + FeaturesPrescott | FeatureEM64T | FeatureCMPXCHG16B; + +// Basic 64-bit capable CPU. +static constexpr FeatureBitset FeaturesX86_64 = FeaturesPentium4 | FeatureEM64T; + +// Intel Core CPUs +static constexpr FeatureBitset FeaturesCore2 = + FeaturesNocona | FeatureSAHF | FeatureSSSE3; +static constexpr FeatureBitset FeaturesPenryn = FeaturesCore2 | FeatureSSE4_1; +static constexpr FeatureBitset FeaturesNehalem = + FeaturesPenryn | FeaturePOPCNT | FeatureSSE4_2; +static constexpr FeatureBitset FeaturesWestmere = + FeaturesNehalem | FeaturePCLMUL; +static constexpr FeatureBitset FeaturesSandyBridge = + FeaturesWestmere | FeatureAVX | FeatureXSAVE | FeatureXSAVEOPT; +static constexpr FeatureBitset FeaturesIvyBridge = + FeaturesSandyBridge | FeatureF16C | FeatureFSGSBASE | FeatureRDRND; +static constexpr FeatureBitset FeaturesHaswell = + FeaturesIvyBridge | FeatureAVX2 | FeatureBMI | FeatureBMI2 | FeatureFMA | + FeatureINVPCID | FeatureLZCNT | FeatureMOVBE; +static constexpr FeatureBitset FeaturesBroadwell = + FeaturesHaswell | FeatureADX | FeaturePRFCHW | FeatureRDSEED; + +// Intel Knights Landing and Knights Mill +// Knights Landing has feature parity with Broadwell. +static constexpr FeatureBitset FeaturesKNL = + FeaturesBroadwell | FeatureAES | FeatureAVX512F | FeatureAVX512CD | + FeatureAVX512ER | FeatureAVX512PF | FeaturePREFETCHWT1; +static constexpr FeatureBitset FeaturesKNM = + FeaturesKNL | FeatureAVX512VPOPCNTDQ; + +// Intel Skylake processors. +static constexpr FeatureBitset FeaturesSkylakeClient = + FeaturesBroadwell | FeatureAES | FeatureCLFLUSHOPT | FeatureXSAVEC | + FeatureXSAVES | FeatureSGX; +// SkylakeServer inherits all SkylakeClient features except SGX. +// FIXME: That doesn't match gcc. +static constexpr FeatureBitset FeaturesSkylakeServer = + (FeaturesSkylakeClient & ~FeatureSGX) | FeatureAVX512F | FeatureAVX512CD | + FeatureAVX512DQ | FeatureAVX512BW | FeatureAVX512VL | FeatureCLWB | + FeaturePKU; +static constexpr FeatureBitset FeaturesCascadeLake = + FeaturesSkylakeServer | FeatureAVX512VNNI; +static constexpr FeatureBitset FeaturesCooperLake = + FeaturesCascadeLake | FeatureAVX512BF16; + +// Intel 10nm processors. +static constexpr FeatureBitset FeaturesCannonlake = + FeaturesSkylakeClient | FeatureAVX512F | FeatureAVX512CD | FeatureAVX512DQ | + FeatureAVX512BW | FeatureAVX512VL | FeatureAVX512IFMA | FeatureAVX512VBMI | + FeaturePKU | FeatureSHA; +static constexpr FeatureBitset FeaturesICLClient = + FeaturesCannonlake | FeatureAVX512BITALG | FeatureAVX512VBMI2 | + FeatureAVX512VNNI | FeatureAVX512VPOPCNTDQ | FeatureCLWB | FeatureGFNI | + FeatureRDPID | FeatureVAES | FeatureVPCLMULQDQ; +static constexpr FeatureBitset FeaturesICLServer = + FeaturesICLClient | FeaturePCONFIG | FeatureWBNOINVD; +static constexpr FeatureBitset FeaturesTigerlake = + FeaturesICLClient | FeatureAVX512VP2INTERSECT | FeatureMOVDIR64B | + FeatureMOVDIRI | FeatureSHSTK; + +// Intel Atom processors. +// Bonnell has feature parity with Core2 and adds MOVBE. +static constexpr FeatureBitset FeaturesBonnell = FeaturesCore2 | FeatureMOVBE; +// Silvermont has parity with Westmere and Bonnell plus PRFCHW and RDRND. +static constexpr FeatureBitset FeaturesSilvermont = + FeaturesBonnell | FeaturesWestmere | FeaturePRFCHW | FeatureRDRND; +static constexpr FeatureBitset FeaturesGoldmont = + FeaturesSilvermont | FeatureAES | FeatureCLFLUSHOPT | FeatureFSGSBASE | + FeatureRDSEED | FeatureSHA | FeatureXSAVE | FeatureXSAVEC | + FeatureXSAVEOPT | FeatureXSAVES; +static constexpr FeatureBitset FeaturesGoldmontPlus = + FeaturesGoldmont | FeaturePTWRITE | FeatureRDPID | FeatureSGX; +static constexpr FeatureBitset FeaturesTremont = + FeaturesGoldmontPlus | FeatureCLWB | FeatureGFNI; + +// Geode Processor. +static constexpr FeatureBitset FeaturesGeode = + FeatureX87 | FeatureCMPXCHG8B | FeatureMMX | Feature3DNOW | Feature3DNOWA; + +// K6 processor. +static constexpr FeatureBitset FeaturesK6 = + FeatureX87 | FeatureCMPXCHG8B | FeatureMMX; + +// K7 and K8 architecture processors. +static constexpr FeatureBitset FeaturesAthlon = + FeatureX87 | FeatureCMPXCHG8B | FeatureMMX | Feature3DNOW | Feature3DNOWA; +static constexpr FeatureBitset FeaturesAthlonXP = + FeaturesAthlon | FeatureFXSR | FeatureSSE; +static constexpr FeatureBitset FeaturesK8 = + FeaturesAthlonXP | FeatureSSE2 | FeatureEM64T; +static constexpr FeatureBitset FeaturesK8SSE3 = FeaturesK8 | FeatureSSE3; +static constexpr FeatureBitset FeaturesAMDFAM10 = + FeaturesK8SSE3 | FeatureCMPXCHG16B | FeatureLZCNT | FeaturePOPCNT | + FeaturePRFCHW | FeatureSAHF | FeatureSSE4A; + +// Bobcat architecture processors. +static constexpr FeatureBitset FeaturesBTVER1 = + FeatureX87 | FeatureCMPXCHG8B | FeatureCMPXCHG16B | FeatureEM64T | + FeatureFXSR | FeatureLZCNT | FeatureMMX | FeaturePOPCNT | FeaturePRFCHW | + FeatureSSE | FeatureSSE2 | FeatureSSE3 | FeatureSSSE3 | FeatureSSE4A | + FeatureSAHF; +static constexpr FeatureBitset FeaturesBTVER2 = + FeaturesBTVER1 | FeatureAES | FeatureAVX | FeatureBMI | FeatureF16C | + FeatureMOVBE | FeaturePCLMUL | FeatureXSAVE | FeatureXSAVEOPT; + +// AMD Bulldozer architecture processors. +static constexpr FeatureBitset FeaturesBDVER1 = + FeatureX87 | FeatureAES | FeatureAVX | FeatureCMPXCHG8B | + FeatureCMPXCHG16B | FeatureEM64T | FeatureFMA4 | FeatureFXSR | + FeatureLZCNT | FeatureLWP | FeatureLZCNT | FeatureMMX | FeaturePCLMUL | + FeaturePOPCNT | FeaturePRFCHW | FeatureSAHF | FeatureSSE | FeatureSSE2 | + FeatureSSE3 | FeatureSSSE3 | FeatureSSE4_1 | FeatureSSE4_2 | FeatureSSE4A | + FeatureXOP | FeatureXSAVE; +static constexpr FeatureBitset FeaturesBDVER2 = + FeaturesBDVER1 | FeatureBMI | FeatureFMA | FeatureF16C | FeatureTBM; +static constexpr FeatureBitset FeaturesBDVER3 = + FeaturesBDVER2 | FeatureFSGSBASE | FeatureXSAVEOPT; +static constexpr FeatureBitset FeaturesBDVER4 = + FeaturesBDVER3 | FeatureAVX2 | FeatureBMI2 | FeatureMOVBE | FeatureMWAITX | + FeatureRDRND; + +// AMD Zen architecture processors. +static constexpr FeatureBitset FeaturesZNVER1 = + FeatureX87 | FeatureADX | FeatureAES | FeatureAVX | FeatureAVX2 | + FeatureBMI | FeatureBMI2 | FeatureCLFLUSHOPT | FeatureCLZERO | + FeatureCMPXCHG8B | FeatureCMPXCHG16B | FeatureEM64T | FeatureF16C | + FeatureFMA | FeatureFSGSBASE | FeatureFXSR | FeatureLZCNT | FeatureLWP | + FeatureLZCNT | FeatureMOVBE | FeatureMMX | FeatureMWAITX | FeaturePCLMUL | + FeaturePOPCNT | FeaturePRFCHW | FeatureRDRND | FeatureRDSEED | FeatureSAHF | + FeatureSHA | FeatureSSE | FeatureSSE2 | FeatureSSE3 | FeatureSSSE3 | + FeatureSSE4_1 | FeatureSSE4_2 | FeatureSSE4A | FeatureXSAVE | + FeatureXSAVEC | FeatureXSAVEOPT | FeatureXSAVES; +static constexpr FeatureBitset FeaturesZNVER2 = + FeaturesZNVER1 | FeatureCLWB | FeatureRDPID | FeatureWBNOINVD; static constexpr ProcInfo Processors[] = { + // Empty processor. Include X87 and CMPXCHG8 for backwards compatibility. + { {""}, CK_None, ~0U, FeatureX87 | FeatureCMPXCHG8B }, // i386-generation processors. - { {"i386"}, CK_i386, ~0U, PROC_32_BIT }, + { {"i386"}, CK_i386, ~0U, FeatureX87 }, // i486-generation processors. - { {"i486"}, CK_i486, ~0U, PROC_32_BIT }, - { {"winchip-c6"}, CK_WinChipC6, ~0U, PROC_32_BIT }, - { {"winchip2"}, CK_WinChip2, ~0U, PROC_32_BIT }, - { {"c3"}, CK_C3, ~0U, PROC_32_BIT }, + { {"i486"}, CK_i486, ~0U, FeatureX87 }, + { {"winchip-c6"}, CK_WinChipC6, ~0U, FeaturesPentiumMMX }, + { {"winchip2"}, CK_WinChip2, ~0U, FeaturesPentiumMMX | Feature3DNOW }, + { {"c3"}, CK_C3, ~0U, FeaturesPentiumMMX | Feature3DNOW }, // i586-generation processors, P5 microarchitecture based. - { {"i586"}, CK_i586, ~0U, PROC_32_BIT }, - { {"pentium"}, CK_Pentium, ~0U, PROC_32_BIT }, - { {"pentium-mmx"}, CK_PentiumMMX, ~0U, PROC_32_BIT }, - { {"pentiumpro"}, CK_PentiumPro, ~0U, PROC_32_BIT }, + { {"i586"}, CK_i586, ~0U, FeatureX87 | FeatureCMPXCHG8B }, + { {"pentium"}, CK_Pentium, ~0U, FeatureX87 | FeatureCMPXCHG8B }, + { {"pentium-mmx"}, CK_PentiumMMX, ~0U, FeaturesPentiumMMX }, // i686-generation processors, P6 / Pentium M microarchitecture based. - { {"i686"}, CK_i686, ~0U, PROC_32_BIT }, - { {"pentium2"}, CK_Pentium2, ~0U, PROC_32_BIT }, - { {"pentium3"}, CK_Pentium3, ~0U, PROC_32_BIT }, - { {"pentium3m"}, CK_Pentium3, ~0U, PROC_32_BIT }, - { {"pentium-m"}, CK_PentiumM, ~0U, PROC_32_BIT }, - { {"c3-2"}, CK_C3_2, ~0U, PROC_32_BIT }, - { {"yonah"}, CK_Yonah, ~0U, PROC_32_BIT }, + { {"pentiumpro"}, CK_PentiumPro, ~0U, FeatureX87 | FeatureCMPXCHG8B }, + { {"i686"}, CK_i686, ~0U, FeatureX87 | FeatureCMPXCHG8B }, + { {"pentium2"}, CK_Pentium2, ~0U, FeaturesPentium2 }, + { {"pentium3"}, CK_Pentium3, ~0U, FeaturesPentium3 }, + { {"pentium3m"}, CK_Pentium3, ~0U, FeaturesPentium3 }, + { {"pentium-m"}, CK_PentiumM, ~0U, FeaturesPentium4 }, + { {"c3-2"}, CK_C3_2, ~0U, FeaturesPentium3 }, + { {"yonah"}, CK_Yonah, ~0U, FeaturesPrescott }, // Netburst microarchitecture based processors. - { {"pentium4"}, CK_Pentium4, ~0U, PROC_32_BIT }, - { {"pentium4m"}, CK_Pentium4, ~0U, PROC_32_BIT }, - { {"prescott"}, CK_Prescott, ~0U, PROC_32_BIT }, - { {"nocona"}, CK_Nocona, ~0U, PROC_64_BIT }, + { {"pentium4"}, CK_Pentium4, ~0U, FeaturesPentium4 }, + { {"pentium4m"}, CK_Pentium4, ~0U, FeaturesPentium4 }, + { {"prescott"}, CK_Prescott, ~0U, FeaturesPrescott }, + { {"nocona"}, CK_Nocona, ~0U, FeaturesNocona }, // Core microarchitecture based processors. - { {"core2"}, CK_Core2, ~0U, PROC_64_BIT }, - { {"penryn"}, CK_Penryn, ~0U, PROC_64_BIT }, + { {"core2"}, CK_Core2, ~0U, FeaturesCore2 }, + { {"penryn"}, CK_Penryn, ~0U, FeaturesPenryn }, // Atom processors - { {"bonnell"}, CK_Bonnell, FEATURE_SSSE3, PROC_64_BIT }, - { {"atom"}, CK_Bonnell, FEATURE_SSSE3, PROC_64_BIT }, - { {"silvermont"}, CK_Silvermont, FEATURE_SSE4_2, PROC_64_BIT }, - { {"slm"}, CK_Silvermont, FEATURE_SSE4_2, PROC_64_BIT }, - { {"goldmont"}, CK_Goldmont, FEATURE_SSE4_2, PROC_64_BIT }, - { {"goldmont-plus"}, CK_GoldmontPlus, FEATURE_SSE4_2, PROC_64_BIT }, - { {"tremont"}, CK_Tremont, FEATURE_SSE4_2, PROC_64_BIT }, + { {"bonnell"}, CK_Bonnell, FEATURE_SSSE3, FeaturesBonnell }, + { {"atom"}, CK_Bonnell, FEATURE_SSSE3, FeaturesBonnell }, + { {"silvermont"}, CK_Silvermont, FEATURE_SSE4_2, FeaturesSilvermont }, + { {"slm"}, CK_Silvermont, FEATURE_SSE4_2, FeaturesSilvermont }, + { {"goldmont"}, CK_Goldmont, FEATURE_SSE4_2, FeaturesGoldmont }, + { {"goldmont-plus"}, CK_GoldmontPlus, FEATURE_SSE4_2, FeaturesGoldmontPlus }, + { {"tremont"}, CK_Tremont, FEATURE_SSE4_2, FeaturesTremont }, // Nehalem microarchitecture based processors. - { {"nehalem"}, CK_Nehalem, FEATURE_SSE4_2, PROC_64_BIT }, - { {"corei7"}, CK_Nehalem, FEATURE_SSE4_2, PROC_64_BIT }, + { {"nehalem"}, CK_Nehalem, FEATURE_SSE4_2, FeaturesNehalem }, + { {"corei7"}, CK_Nehalem, FEATURE_SSE4_2, FeaturesNehalem }, // Westmere microarchitecture based processors. - { {"westmere"}, CK_Westmere, FEATURE_PCLMUL, PROC_64_BIT }, + { {"westmere"}, CK_Westmere, FEATURE_PCLMUL, FeaturesWestmere }, // Sandy Bridge microarchitecture based processors. - { {"sandybridge"}, CK_SandyBridge, FEATURE_AVX, PROC_64_BIT }, - { {"corei7-avx"}, CK_SandyBridge, FEATURE_AVX, PROC_64_BIT }, + { {"sandybridge"}, CK_SandyBridge, FEATURE_AVX, FeaturesSandyBridge }, + { {"corei7-avx"}, CK_SandyBridge, FEATURE_AVX, FeaturesSandyBridge }, // Ivy Bridge microarchitecture based processors. - { {"ivybridge"}, CK_IvyBridge, FEATURE_AVX, PROC_64_BIT }, - { {"core-avx-i"}, CK_IvyBridge, FEATURE_AVX, PROC_64_BIT }, + { {"ivybridge"}, CK_IvyBridge, FEATURE_AVX, FeaturesIvyBridge }, + { {"core-avx-i"}, CK_IvyBridge, FEATURE_AVX, FeaturesIvyBridge }, // Haswell microarchitecture based processors. - { {"haswell"}, CK_Haswell, FEATURE_AVX2, PROC_64_BIT }, - { {"core-avx2"}, CK_Haswell, FEATURE_AVX2, PROC_64_BIT }, + { {"haswell"}, CK_Haswell, FEATURE_AVX2, FeaturesHaswell }, + { {"core-avx2"}, CK_Haswell, FEATURE_AVX2, FeaturesHaswell }, // Broadwell microarchitecture based processors. - { {"broadwell"}, CK_Broadwell, FEATURE_AVX2, PROC_64_BIT }, + { {"broadwell"}, CK_Broadwell, FEATURE_AVX2, FeaturesBroadwell }, // Skylake client microarchitecture based processors. - { {"skylake"}, CK_SkylakeClient, FEATURE_AVX2, PROC_64_BIT }, + { {"skylake"}, CK_SkylakeClient, FEATURE_AVX2, FeaturesSkylakeClient }, // Skylake server microarchitecture based processors. - { {"skylake-avx512"}, CK_SkylakeServer, FEATURE_AVX512F, PROC_64_BIT }, - { {"skx"}, CK_SkylakeServer, FEATURE_AVX512F, PROC_64_BIT }, + { {"skylake-avx512"}, CK_SkylakeServer, FEATURE_AVX512F, FeaturesSkylakeServer }, + { {"skx"}, CK_SkylakeServer, FEATURE_AVX512F, FeaturesSkylakeServer }, // Cascadelake Server microarchitecture based processors. - { {"cascadelake"}, CK_Cascadelake, FEATURE_AVX512VNNI, PROC_64_BIT }, + { {"cascadelake"}, CK_Cascadelake, FEATURE_AVX512VNNI, FeaturesCascadeLake }, // Cooperlake Server microarchitecture based processors. - { {"cooperlake"}, CK_Cooperlake, FEATURE_AVX512BF16, PROC_64_BIT }, + { {"cooperlake"}, CK_Cooperlake, FEATURE_AVX512BF16, FeaturesCooperLake }, // Cannonlake client microarchitecture based processors. - { {"cannonlake"}, CK_Cannonlake, FEATURE_AVX512VBMI, PROC_64_BIT }, + { {"cannonlake"}, CK_Cannonlake, FEATURE_AVX512VBMI, FeaturesCannonlake }, // Icelake client microarchitecture based processors. - { {"icelake-client"}, CK_IcelakeClient, FEATURE_AVX512VBMI2, PROC_64_BIT }, + { {"icelake-client"}, CK_IcelakeClient, FEATURE_AVX512VBMI2, FeaturesICLClient }, // Icelake server microarchitecture based processors. - { {"icelake-server"}, CK_IcelakeServer, FEATURE_AVX512VBMI2, PROC_64_BIT }, + { {"icelake-server"}, CK_IcelakeServer, FEATURE_AVX512VBMI2, FeaturesICLServer }, // Tigerlake microarchitecture based processors. - { {"tigerlake"}, CK_Tigerlake, FEATURE_AVX512VP2INTERSECT, PROC_64_BIT }, + { {"tigerlake"}, CK_Tigerlake, FEATURE_AVX512VP2INTERSECT, FeaturesTigerlake }, // Knights Landing processor. - { {"knl"}, CK_KNL, FEATURE_AVX512F, PROC_64_BIT }, + { {"knl"}, CK_KNL, FEATURE_AVX512F, FeaturesKNL }, // Knights Mill processor. - { {"knm"}, CK_KNM, FEATURE_AVX5124FMAPS, PROC_64_BIT }, + { {"knm"}, CK_KNM, FEATURE_AVX5124FMAPS, FeaturesKNM }, // Lakemont microarchitecture based processors. - { {"lakemont"}, CK_Lakemont, ~0U, PROC_32_BIT }, + { {"lakemont"}, CK_Lakemont, ~0U, FeatureCMPXCHG8B }, // K6 architecture processors. - { {"k6"}, CK_K6, ~0U, PROC_32_BIT }, - { {"k6-2"}, CK_K6_2, ~0U, PROC_32_BIT }, - { {"k6-3"}, CK_K6_3, ~0U, PROC_32_BIT }, + { {"k6"}, CK_K6, ~0U, FeaturesK6 }, + { {"k6-2"}, CK_K6_2, ~0U, FeaturesK6 | Feature3DNOW }, + { {"k6-3"}, CK_K6_3, ~0U, FeaturesK6 | Feature3DNOW }, // K7 architecture processors. - { {"athlon"}, CK_Athlon, ~0U, PROC_32_BIT }, - { {"athlon-tbird"}, CK_Athlon, ~0U, PROC_32_BIT }, - { {"athlon-xp"}, CK_AthlonXP, ~0U, PROC_32_BIT }, - { {"athlon-mp"}, CK_AthlonXP, ~0U, PROC_32_BIT }, - { {"athlon-4"}, CK_AthlonXP, ~0U, PROC_32_BIT }, + { {"athlon"}, CK_Athlon, ~0U, FeaturesAthlon }, + { {"athlon-tbird"}, CK_Athlon, ~0U, FeaturesAthlon }, + { {"athlon-xp"}, CK_AthlonXP, ~0U, FeaturesAthlonXP }, + { {"athlon-mp"}, CK_AthlonXP, ~0U, FeaturesAthlonXP }, + { {"athlon-4"}, CK_AthlonXP, ~0U, FeaturesAthlonXP }, // K8 architecture processors. - { {"k8"}, CK_K8, ~0U, PROC_64_BIT }, - { {"athlon64"}, CK_K8, ~0U, PROC_64_BIT }, - { {"athlon-fx"}, CK_K8, ~0U, PROC_64_BIT }, - { {"opteron"}, CK_K8, ~0U, PROC_64_BIT }, - { {"k8-sse3"}, CK_K8SSE3, ~0U, PROC_64_BIT }, - { {"athlon64-sse3"}, CK_K8SSE3, ~0U, PROC_64_BIT }, - { {"opteron-sse3"}, CK_K8SSE3, ~0U, PROC_64_BIT }, - { {"amdfam10"}, CK_AMDFAM10, FEATURE_SSE4_A, PROC_64_BIT }, - { {"barcelona"}, CK_AMDFAM10, FEATURE_SSE4_A, PROC_64_BIT }, + { {"k8"}, CK_K8, ~0U, FeaturesK8 }, + { {"athlon64"}, CK_K8, ~0U, FeaturesK8 }, + { {"athlon-fx"}, CK_K8, ~0U, FeaturesK8 }, + { {"opteron"}, CK_K8, ~0U, FeaturesK8 }, + { {"k8-sse3"}, CK_K8SSE3, ~0U, FeaturesK8SSE3 }, + { {"athlon64-sse3"}, CK_K8SSE3, ~0U, FeaturesK8SSE3 }, + { {"opteron-sse3"}, CK_K8SSE3, ~0U, FeaturesK8SSE3 }, + { {"amdfam10"}, CK_AMDFAM10, FEATURE_SSE4_A, FeaturesAMDFAM10 }, + { {"barcelona"}, CK_AMDFAM10, FEATURE_SSE4_A, FeaturesAMDFAM10 }, // Bobcat architecture processors. - { {"btver1"}, CK_BTVER1, FEATURE_SSE4_A, PROC_64_BIT }, - { {"btver2"}, CK_BTVER2, FEATURE_BMI, PROC_64_BIT }, + { {"btver1"}, CK_BTVER1, FEATURE_SSE4_A, FeaturesBTVER1 }, + { {"btver2"}, CK_BTVER2, FEATURE_BMI, FeaturesBTVER2 }, // Bulldozer architecture processors. - { {"bdver1"}, CK_BDVER1, FEATURE_XOP, PROC_64_BIT }, - { {"bdver2"}, CK_BDVER2, FEATURE_FMA, PROC_64_BIT }, - { {"bdver3"}, CK_BDVER3, FEATURE_FMA, PROC_64_BIT }, - { {"bdver4"}, CK_BDVER4, FEATURE_AVX2, PROC_64_BIT }, + { {"bdver1"}, CK_BDVER1, FEATURE_XOP, FeaturesBDVER1 }, + { {"bdver2"}, CK_BDVER2, FEATURE_FMA, FeaturesBDVER2 }, + { {"bdver3"}, CK_BDVER3, FEATURE_FMA, FeaturesBDVER3 }, + { {"bdver4"}, CK_BDVER4, FEATURE_AVX2, FeaturesBDVER4 }, // Zen architecture processors. - { {"znver1"}, CK_ZNVER1, FEATURE_AVX2, PROC_64_BIT }, - { {"znver2"}, CK_ZNVER2, FEATURE_AVX2, PROC_64_BIT }, + { {"znver1"}, CK_ZNVER1, FEATURE_AVX2, FeaturesZNVER1 }, + { {"znver2"}, CK_ZNVER2, FEATURE_AVX2, FeaturesZNVER2 }, // Generic 64-bit processor. - { {"x86-64"}, CK_x86_64, ~0U, PROC_64_BIT }, + { {"x86-64"}, CK_x86_64, ~0U, FeaturesX86_64 }, // Geode processors. - { {"geode"}, CK_Geode, ~0U, PROC_32_BIT }, + { {"geode"}, CK_Geode, ~0U, FeaturesGeode }, }; X86::CPUKind llvm::X86::parseArchX86(StringRef CPU, bool Only64Bit) { for (const auto &P : Processors) - if (P.Name == CPU && (P.Is64Bit || !Only64Bit)) + if (P.Name == CPU && (P.Features[FEATURE_EM64T] || !Only64Bit)) return P.Kind; return CK_None; @@ -155,7 +360,7 @@ X86::CPUKind llvm::X86::parseArchX86(StringRef CPU, bool Only64Bit) { void llvm::X86::fillValidCPUArchList(SmallVectorImpl &Values, bool Only64Bit) { for (const auto &P : Processors) - if (P.Is64Bit || !Only64Bit) + if (!P.Name.empty() && (P.Features[FEATURE_EM64T] || !Only64Bit)) Values.emplace_back(P.Name); } @@ -171,3 +376,20 @@ ProcessorFeatures llvm::X86::getKeyFeature(X86::CPUKind Kind) { llvm_unreachable("Unable to find CPU kind!"); } + +static const char *FeatureStrings[X86::CPU_FEATURE_MAX] = { +#define X86_FEATURE(ENUM, STR) STR, +#include "llvm/Support/X86TargetParser.def" +}; + +void llvm::X86::getFeaturesForCPU(StringRef CPU, + SmallVectorImpl &Features) { + auto I = llvm::find_if(Processors, + [&](const ProcInfo &P) { return P.Name == CPU; }); + assert(I != std::end(Processors) && "Processor not found!"); + + // Add the string version of all set bits. + for (unsigned i = 0; i != CPU_FEATURE_MAX; ++i) + if (FeatureStrings[i] && I->Features[i]) + Features.push_back(FeatureStrings[i]); +} diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 2a632afd34312d..0656a8e84ed9d4 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -9486,8 +9486,8 @@ static bool areExtractShuffleVectors(Value *Op1, Value *Op2) { }; auto extractHalf = [](Value *FullV, Value *HalfV) { - auto *FullVT = cast(FullV->getType()); - auto *HalfVT = cast(HalfV->getType()); + auto *FullVT = cast(FullV->getType()); + auto *HalfVT = cast(HalfV->getType()); return FullVT->getNumElements() == 2 * HalfVT->getNumElements(); }; @@ -9507,7 +9507,7 @@ static bool areExtractShuffleVectors(Value *Op1, Value *Op2) { // elements. int M1Start = -1; int M2Start = -1; - int NumElements = cast(Op1->getType())->getNumElements() * 2; + int NumElements = cast(Op1->getType())->getNumElements() * 2; if (!ShuffleVectorInst::isExtractSubvectorMask(M1, NumElements, M1Start) || !ShuffleVectorInst::isExtractSubvectorMask(M2, NumElements, M2Start) || M1Start != M2Start || (M1Start != 0 && M2Start != (NumElements / 2))) @@ -9639,7 +9639,7 @@ bool AArch64TargetLowering::isLegalInterleavedAccessType( unsigned ElSize = DL.getTypeSizeInBits(VecTy->getElementType()); // Ensure the number of vector elements is greater than 1. - if (VecTy->getNumElements() < 2) + if (cast(VecTy)->getNumElements() < 2) return false; // Ensure the element type is legal. @@ -9673,22 +9673,24 @@ bool AArch64TargetLowering::lowerInterleavedLoad( const DataLayout &DL = LI->getModule()->getDataLayout(); - VectorType *VecTy = Shuffles[0]->getType(); + VectorType *VTy = Shuffles[0]->getType(); // Skip if we do not have NEON and skip illegal vector types. We can // "legalize" wide vector types into multiple interleaved accesses as long as // the vector types are divisible by 128. - if (!Subtarget->hasNEON() || !isLegalInterleavedAccessType(VecTy, DL)) + if (!Subtarget->hasNEON() || !isLegalInterleavedAccessType(VTy, DL)) return false; - unsigned NumLoads = getNumInterleavedAccesses(VecTy, DL); + unsigned NumLoads = getNumInterleavedAccesses(VTy, DL); + + auto *FVTy = cast(VTy); // A pointer vector can not be the return type of the ldN intrinsics. Need to // load integer vectors first and then convert to pointer vectors. - Type *EltTy = VecTy->getElementType(); + Type *EltTy = FVTy->getElementType(); if (EltTy->isPointerTy()) - VecTy = - FixedVectorType::get(DL.getIntPtrType(EltTy), VecTy->getNumElements()); + FVTy = + FixedVectorType::get(DL.getIntPtrType(EltTy), FVTy->getNumElements()); IRBuilder<> Builder(LI); @@ -9698,19 +9700,19 @@ bool AArch64TargetLowering::lowerInterleavedLoad( if (NumLoads > 1) { // If we're going to generate more than one load, reset the sub-vector type // to something legal. - VecTy = FixedVectorType::get(VecTy->getElementType(), - VecTy->getNumElements() / NumLoads); + FVTy = FixedVectorType::get(FVTy->getElementType(), + FVTy->getNumElements() / NumLoads); // We will compute the pointer operand of each load from the original base // address using GEPs. Cast the base address to a pointer to the scalar // element type. BaseAddr = Builder.CreateBitCast( BaseAddr, - VecTy->getElementType()->getPointerTo(LI->getPointerAddressSpace())); + FVTy->getElementType()->getPointerTo(LI->getPointerAddressSpace())); } - Type *PtrTy = VecTy->getPointerTo(LI->getPointerAddressSpace()); - Type *Tys[2] = {VecTy, PtrTy}; + Type *PtrTy = FVTy->getPointerTo(LI->getPointerAddressSpace()); + Type *Tys[2] = {FVTy, PtrTy}; static const Intrinsic::ID LoadInts[3] = {Intrinsic::aarch64_neon_ld2, Intrinsic::aarch64_neon_ld3, Intrinsic::aarch64_neon_ld4}; @@ -9727,8 +9729,8 @@ bool AArch64TargetLowering::lowerInterleavedLoad( // If we're generating more than one load, compute the base address of // subsequent loads as an offset from the previous. if (LoadCount > 0) - BaseAddr = Builder.CreateConstGEP1_32(VecTy->getElementType(), BaseAddr, - VecTy->getNumElements() * Factor); + BaseAddr = Builder.CreateConstGEP1_32(FVTy->getElementType(), BaseAddr, + FVTy->getNumElements() * Factor); CallInst *LdN = Builder.CreateCall( LdNFunc, Builder.CreateBitCast(BaseAddr, PtrTy), "ldN"); @@ -9744,7 +9746,7 @@ bool AArch64TargetLowering::lowerInterleavedLoad( if (EltTy->isPointerTy()) SubVec = Builder.CreateIntToPtr( SubVec, FixedVectorType::get(SVI->getType()->getElementType(), - VecTy->getNumElements())); + FVTy->getNumElements())); SubVecs[SVI].push_back(SubVec); } } @@ -9795,7 +9797,7 @@ bool AArch64TargetLowering::lowerInterleavedStore(StoreInst *SI, assert(Factor >= 2 && Factor <= getMaxSupportedInterleaveFactor() && "Invalid interleave factor"); - VectorType *VecTy = SVI->getType(); + auto *VecTy = cast(SVI->getType()); assert(VecTy->getNumElements() % Factor == 0 && "Invalid interleaved store"); unsigned LaneLen = VecTy->getNumElements() / Factor; @@ -9820,7 +9822,8 @@ bool AArch64TargetLowering::lowerInterleavedStore(StoreInst *SI, // vectors to integer vectors. if (EltTy->isPointerTy()) { Type *IntTy = DL.getIntPtrType(EltTy); - unsigned NumOpElts = cast(Op0->getType())->getNumElements(); + unsigned NumOpElts = + cast(Op0->getType())->getNumElements(); // Convert to the corresponding integer vector. auto *IntVecTy = FixedVectorType::get(IntTy, NumOpElts); diff --git a/llvm/lib/Target/AArch64/AArch64StackTagging.cpp b/llvm/lib/Target/AArch64/AArch64StackTagging.cpp index 81f669a7cb22d3..61f27cbc3b29d7 100644 --- a/llvm/lib/Target/AArch64/AArch64StackTagging.cpp +++ b/llvm/lib/Target/AArch64/AArch64StackTagging.cpp @@ -265,8 +265,9 @@ class InitializerBuilder { Type *EltTy = VecTy->getElementType(); if (EltTy->isPointerTy()) { uint32_t EltSize = DL->getTypeSizeInBits(EltTy); - auto *NewTy = FixedVectorType::get(IntegerType::get(Ctx, EltSize), - VecTy->getNumElements()); + auto *NewTy = FixedVectorType::get( + IntegerType::get(Ctx, EltSize), + cast(VecTy)->getNumElements()); V = IRB.CreatePointerCast(V, NewTy); } } diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp index 41aca3049e8c41..e637284e226e10 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp @@ -212,7 +212,7 @@ bool AArch64TTIImpl::isWideningInstruction(Type *DstTy, unsigned Opcode, // elements in type Ty determine the vector width. auto toVectorTy = [&](Type *ArgTy) { return FixedVectorType::get(ArgTy->getScalarType(), - cast(DstTy)->getNumElements()); + cast(DstTy)->getNumElements()); }; // Exit early if DstTy is not a vector type whose elements are at least @@ -469,6 +469,14 @@ int AArch64TTIImpl::getExtractWithExtendCost(unsigned Opcode, Type *Dst, return Cost + getCastInstrCost(Opcode, Dst, Src, CostKind); } +unsigned AArch64TTIImpl::getCFInstrCost(unsigned Opcode, + TTI::TargetCostKind CostKind) { + if (CostKind != TTI::TCK_RecipThroughput) + return Opcode == Instruction::PHI ? 0 : 1; + // Branches are assumed to be predicted. + return CostKind == TTI::TCK_RecipThroughput ? 0 : 1; +} + int AArch64TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { assert(Val->isVectorTy() && "This must be a vector type"); @@ -724,8 +732,8 @@ int AArch64TTIImpl::getMemoryOpCost(unsigned Opcode, Type *Ty, // have to promote the elements to v.2. ProfitableNumElements = 8; - if (cast(Ty)->getNumElements() < ProfitableNumElements) { - unsigned NumVecElts = cast(Ty)->getNumElements(); + if (cast(Ty)->getNumElements() < ProfitableNumElements) { + unsigned NumVecElts = cast(Ty)->getNumElements(); unsigned NumVectorizableInstsToAmortize = NumVecElts * 2; // We generate 2 instructions per vector element. return NumVectorizableInstsToAmortize * NumVecElts * 2; @@ -740,7 +748,7 @@ int AArch64TTIImpl::getInterleavedMemoryOpCost( Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond, bool UseMaskForGaps) { assert(Factor >= 2 && "Invalid interleave factor"); - auto *VecVTy = cast(VecTy); + auto *VecVTy = cast(VecTy); if (!UseMaskForCond && !UseMaskForGaps && Factor <= TLI->getMaxSupportedInterleaveFactor()) { @@ -767,7 +775,8 @@ int AArch64TTIImpl::getCostOfKeepingLiveOverCall(ArrayRef Tys) { for (auto *I : Tys) { if (!I->isVectorTy()) continue; - if (I->getScalarSizeInBits() * cast(I)->getNumElements() == 128) + if (I->getScalarSizeInBits() * cast(I)->getNumElements() == + 128) Cost += getMemoryOpCost(Instruction::Store, I, Align(128), 0, CostKind) + getMemoryOpCost(Instruction::Load, I, Align(128), 0, CostKind); } @@ -970,9 +979,10 @@ bool AArch64TTIImpl::useReductionIntrinsic(unsigned Opcode, Type *Ty, case Instruction::Mul: return false; case Instruction::Add: - return ScalarBits * VTy->getNumElements() >= 128; + return ScalarBits * cast(VTy)->getNumElements() >= 128; case Instruction::ICmp: - return (ScalarBits < 64) && (ScalarBits * VTy->getNumElements() >= 128); + return (ScalarBits < 64) && + (ScalarBits * cast(VTy)->getNumElements() >= 128); case Instruction::FCmp: return Flags.NoNaN; default: diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h index ecd9d819449257..27afb2e5a7d6c2 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h @@ -120,6 +120,8 @@ class AArch64TTIImpl : public BasicTTIImplBase { int getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index); + unsigned getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind); + int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); int getArithmeticInstrCost( @@ -189,7 +191,8 @@ class AArch64TTIImpl : public BasicTTIImplBase { // the element type fits into a register and the number of elements is a // power of 2 > 1. if (auto *DataTypeVTy = dyn_cast(DataType)) { - unsigned NumElements = DataTypeVTy->getNumElements(); + unsigned NumElements = + cast(DataTypeVTy)->getNumElements(); unsigned EltSize = DataTypeVTy->getElementType()->getScalarSizeInBits(); return NumElements > 1 && isPowerOf2_64(NumElements) && EltSize >= 8 && EltSize <= 128 && isPowerOf2_64(EltSize); diff --git a/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp b/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp index 768d54fc9c24eb..ddd28d095e5138 100644 --- a/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp +++ b/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp @@ -72,7 +72,7 @@ void Mips16DAGToDAGISel::initGlobalBaseReg(MachineFunction &MF) { MachineRegisterInfo &RegInfo = MF.getRegInfo(); const TargetInstrInfo &TII = *Subtarget->getInstrInfo(); DebugLoc DL; - Register V0, V1, V2, GlobalBaseReg = MipsFI->getGlobalBaseReg(); + Register V0, V1, V2, GlobalBaseReg = MipsFI->getGlobalBaseReg(MF); const TargetRegisterClass *RC = &Mips::CPU16RegsRegClass; V0 = RegInfo.createVirtualRegister(RC); diff --git a/llvm/lib/Target/Mips/Mips16ISelLowering.cpp b/llvm/lib/Target/Mips/Mips16ISelLowering.cpp index 5425df77d9b8fb..a3b86bdc2ca012 100644 --- a/llvm/lib/Target/Mips/Mips16ISelLowering.cpp +++ b/llvm/lib/Target/Mips/Mips16ISelLowering.cpp @@ -492,7 +492,7 @@ getOpndList(SmallVectorImpl &Ops, ExternalSymbolSDNode *S = cast(JumpTarget); JumpTarget = getAddrGlobal(S, CLI.DL, JumpTarget.getValueType(), DAG, MipsII::MO_GOT, Chain, - FuncInfo->callPtrInfo(S->getSymbol())); + FuncInfo->callPtrInfo(MF, S->getSymbol())); } else RegsToPass.push_front(std::make_pair((unsigned)Mips::T9, Callee)); } diff --git a/llvm/lib/Target/Mips/MipsCallLowering.cpp b/llvm/lib/Target/Mips/MipsCallLowering.cpp index d7f02683abf2cc..cffd99affac109 100644 --- a/llvm/lib/Target/Mips/MipsCallLowering.cpp +++ b/llvm/lib/Target/Mips/MipsCallLowering.cpp @@ -593,7 +593,7 @@ bool MipsCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, if (IsCalleeGlobalPIC) { MIRBuilder.buildCopy( Register(Mips::GP), - MF.getInfo()->getGlobalBaseRegForGlobalISel()); + MF.getInfo()->getGlobalBaseRegForGlobalISel(MF)); MIB.addDef(Mips::GP, RegState::Implicit); } MIRBuilder.insertInstr(MIB); diff --git a/llvm/lib/Target/Mips/MipsFastISel.cpp b/llvm/lib/Target/Mips/MipsFastISel.cpp index 1b6a75e7c383e6..8a847eaf661841 100644 --- a/llvm/lib/Target/Mips/MipsFastISel.cpp +++ b/llvm/lib/Target/Mips/MipsFastISel.cpp @@ -420,7 +420,7 @@ unsigned MipsFastISel::materializeGV(const GlobalValue *GV, MVT VT) { if (IsThreadLocal) return 0; emitInst(Mips::LW, DestReg) - .addReg(MFI->getGlobalBaseReg()) + .addReg(MFI->getGlobalBaseReg(*MF)) .addGlobalAddress(GV, 0, MipsII::MO_GOT); if ((GV->hasInternalLinkage() || (GV->hasLocalLinkage() && !isa(GV)))) { @@ -437,7 +437,7 @@ unsigned MipsFastISel::materializeExternalCallSym(MCSymbol *Sym) { const TargetRegisterClass *RC = &Mips::GPR32RegClass; unsigned DestReg = createResultReg(RC); emitInst(Mips::LW, DestReg) - .addReg(MFI->getGlobalBaseReg()) + .addReg(MFI->getGlobalBaseReg(*MF)) .addSym(Sym, MipsII::MO_GOT); return DestReg; } diff --git a/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp b/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp index 37df04e3cbb51e..d88696525e9e51 100644 --- a/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp +++ b/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp @@ -65,7 +65,7 @@ bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) { /// getGlobalBaseReg - Output the instructions required to put the /// GOT address into a register. SDNode *MipsDAGToDAGISel::getGlobalBaseReg() { - Register GlobalBaseReg = MF->getInfo()->getGlobalBaseReg(); + Register GlobalBaseReg = MF->getInfo()->getGlobalBaseReg(*MF); return CurDAG->getRegister(GlobalBaseReg, getTargetLowering()->getPointerTy( CurDAG->getDataLayout())) .getNode(); diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 419e31acee32ec..2da35020006e2e 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -142,8 +142,9 @@ unsigned MipsTargetLowering::getVectorTypeBreakdownForCallingConv( } SDValue MipsTargetLowering::getGlobalReg(SelectionDAG &DAG, EVT Ty) const { - MipsFunctionInfo *FI = DAG.getMachineFunction().getInfo(); - return DAG.getRegister(FI->getGlobalBaseReg(), Ty); + MachineFunction &MF = DAG.getMachineFunction(); + MipsFunctionInfo *FI = MF.getInfo(); + return DAG.getRegister(FI->getGlobalBaseReg(MF), Ty); } SDValue MipsTargetLowering::getTargetNode(GlobalAddressSDNode *N, EVT Ty, @@ -3420,11 +3421,11 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, else if (Subtarget.useXGOT()) { Callee = getAddrGlobalLargeGOT(G, DL, Ty, DAG, MipsII::MO_CALL_HI16, MipsII::MO_CALL_LO16, Chain, - FuncInfo->callPtrInfo(Val)); + FuncInfo->callPtrInfo(MF, Val)); IsCallReloc = true; } else { Callee = getAddrGlobal(G, DL, Ty, DAG, MipsII::MO_GOT_CALL, Chain, - FuncInfo->callPtrInfo(Val)); + FuncInfo->callPtrInfo(MF, Val)); IsCallReloc = true; } } else @@ -3442,11 +3443,11 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, else if (Subtarget.useXGOT()) { Callee = getAddrGlobalLargeGOT(S, DL, Ty, DAG, MipsII::MO_CALL_HI16, MipsII::MO_CALL_LO16, Chain, - FuncInfo->callPtrInfo(Sym)); + FuncInfo->callPtrInfo(MF, Sym)); IsCallReloc = true; } else { // PIC Callee = getAddrGlobal(S, DL, Ty, DAG, MipsII::MO_GOT_CALL, Chain, - FuncInfo->callPtrInfo(Sym)); + FuncInfo->callPtrInfo(MF, Sym)); IsCallReloc = true; } diff --git a/llvm/lib/Target/Mips/MipsInstructionSelector.cpp b/llvm/lib/Target/Mips/MipsInstructionSelector.cpp index 3f63f40b901769..256fb74c1d6c97 100644 --- a/llvm/lib/Target/Mips/MipsInstructionSelector.cpp +++ b/llvm/lib/Target/Mips/MipsInstructionSelector.cpp @@ -404,7 +404,7 @@ bool MipsInstructionSelector::select(MachineInstr &I) { .addDef(Dest) .addUse(DestTmp) .addUse(MF.getInfo() - ->getGlobalBaseRegForGlobalISel()); + ->getGlobalBaseRegForGlobalISel(MF)); if (!constrainSelectedInstRegOperands(*ADDu, TII, TRI, RBI)) return false; } @@ -669,7 +669,7 @@ bool MipsInstructionSelector::select(MachineInstr &I) { MachineInstr *LWGOT = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW)) .addDef(I.getOperand(0).getReg()) .addReg(MF.getInfo() - ->getGlobalBaseRegForGlobalISel()) + ->getGlobalBaseRegForGlobalISel(MF)) .addGlobalAddress(GVal); // Global Values that don't have local linkage are handled differently // when they are part of call sequence. MipsCallLowering::lowerCall @@ -725,7 +725,7 @@ bool MipsInstructionSelector::select(MachineInstr &I) { MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW)) .addDef(I.getOperand(0).getReg()) .addReg(MF.getInfo() - ->getGlobalBaseRegForGlobalISel()) + ->getGlobalBaseRegForGlobalISel(MF)) .addJumpTableIndex(I.getOperand(1).getIndex(), MipsII::MO_GOT) .addMemOperand(MF.getMachineMemOperand( MachinePointerInfo::getGOT(MF), MachineMemOperand::MOLoad, 4, diff --git a/llvm/lib/Target/Mips/MipsMachineFunction.cpp b/llvm/lib/Target/Mips/MipsMachineFunction.cpp index 7e5c37b07976c2..e4b00b55bb5118 100644 --- a/llvm/lib/Target/Mips/MipsMachineFunction.cpp +++ b/llvm/lib/Target/Mips/MipsMachineFunction.cpp @@ -44,22 +44,22 @@ static const TargetRegisterClass &getGlobalBaseRegClass(MachineFunction &MF) { return Mips::GPR32RegClass; } -Register MipsFunctionInfo::getGlobalBaseReg() { +Register MipsFunctionInfo::getGlobalBaseReg(MachineFunction &MF) { if (!GlobalBaseReg) GlobalBaseReg = MF.getRegInfo().createVirtualRegister(&getGlobalBaseRegClass(MF)); return GlobalBaseReg; } -Register MipsFunctionInfo::getGlobalBaseRegForGlobalISel() { +Register MipsFunctionInfo::getGlobalBaseRegForGlobalISel(MachineFunction &MF) { if (!GlobalBaseReg) { - getGlobalBaseReg(); - initGlobalBaseReg(); + getGlobalBaseReg(MF); + initGlobalBaseReg(MF); } return GlobalBaseReg; } -void MipsFunctionInfo::initGlobalBaseReg() { +void MipsFunctionInfo::initGlobalBaseReg(MachineFunction &MF) { if (!GlobalBaseReg) return; @@ -146,7 +146,7 @@ void MipsFunctionInfo::initGlobalBaseReg() { .addReg(Mips::V0).addReg(Mips::T9); } -void MipsFunctionInfo::createEhDataRegsFI() { +void MipsFunctionInfo::createEhDataRegsFI(MachineFunction &MF) { const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); for (int I = 0; I < 4; ++I) { const TargetRegisterClass &RC = @@ -159,7 +159,7 @@ void MipsFunctionInfo::createEhDataRegsFI() { } } -void MipsFunctionInfo::createISRRegFI() { +void MipsFunctionInfo::createISRRegFI(MachineFunction &MF) { // ISRs require spill slots for Status & ErrorPC Coprocessor 0 registers. // The current implementation only supports Mips32r2+ not Mips64rX. Status // is always 32 bits, ErrorPC is 32 or 64 bits dependent on architecture, @@ -180,15 +180,18 @@ bool MipsFunctionInfo::isEhDataRegFI(int FI) const { bool MipsFunctionInfo::isISRRegFI(int FI) const { return IsISR && (FI == ISRDataRegFI[0] || FI == ISRDataRegFI[1]); } -MachinePointerInfo MipsFunctionInfo::callPtrInfo(const char *ES) { +MachinePointerInfo MipsFunctionInfo::callPtrInfo(MachineFunction &MF, + const char *ES) { return MachinePointerInfo(MF.getPSVManager().getExternalSymbolCallEntry(ES)); } -MachinePointerInfo MipsFunctionInfo::callPtrInfo(const GlobalValue *GV) { +MachinePointerInfo MipsFunctionInfo::callPtrInfo(MachineFunction &MF, + const GlobalValue *GV) { return MachinePointerInfo(MF.getPSVManager().getGlobalValueCallEntry(GV)); } -int MipsFunctionInfo::getMoveF64ViaSpillFI(const TargetRegisterClass *RC) { +int MipsFunctionInfo::getMoveF64ViaSpillFI(MachineFunction &MF, + const TargetRegisterClass *RC) { const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); if (MoveF64ViaSpillFI == -1) { MoveF64ViaSpillFI = MF.getFrameInfo().CreateStackObject( diff --git a/llvm/lib/Target/Mips/MipsMachineFunction.h b/llvm/lib/Target/Mips/MipsMachineFunction.h index abb5dde3cf4761..786d210e2aaa78 100644 --- a/llvm/lib/Target/Mips/MipsMachineFunction.h +++ b/llvm/lib/Target/Mips/MipsMachineFunction.h @@ -24,7 +24,7 @@ namespace llvm { /// Mips target-specific information for each MachineFunction. class MipsFunctionInfo : public MachineFunctionInfo { public: - MipsFunctionInfo(MachineFunction &MF) : MF(MF) {} + MipsFunctionInfo(MachineFunction &MF) {} ~MipsFunctionInfo() override; @@ -32,12 +32,12 @@ class MipsFunctionInfo : public MachineFunctionInfo { void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; } bool globalBaseRegSet() const; - Register getGlobalBaseReg(); - Register getGlobalBaseRegForGlobalISel(); + Register getGlobalBaseReg(MachineFunction &MF); + Register getGlobalBaseRegForGlobalISel(MachineFunction &MF); // Insert instructions to initialize the global base register in the // first MBB of the function. - void initGlobalBaseReg(); + void initGlobalBaseReg(MachineFunction &MF); int getVarArgsFrameIndex() const { return VarArgsFrameIndex; } void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; } @@ -53,30 +53,30 @@ class MipsFunctionInfo : public MachineFunctionInfo { bool callsEhReturn() const { return CallsEhReturn; } void setCallsEhReturn() { CallsEhReturn = true; } - void createEhDataRegsFI(); + void createEhDataRegsFI(MachineFunction &MF); int getEhDataRegFI(unsigned Reg) const { return EhDataRegFI[Reg]; } bool isEhDataRegFI(int FI) const; /// Create a MachinePointerInfo that has an ExternalSymbolPseudoSourceValue /// object representing a GOT entry for an external function. - MachinePointerInfo callPtrInfo(const char *ES); + MachinePointerInfo callPtrInfo(MachineFunction &MF, const char *ES); // Functions with the "interrupt" attribute require special prologues, // epilogues and additional spill slots. bool isISR() const { return IsISR; } void setISR() { IsISR = true; } - void createISRRegFI(); + void createISRRegFI(MachineFunction &MF); int getISRRegFI(Register Reg) const { return ISRDataRegFI[Reg]; } bool isISRRegFI(int FI) const; /// Create a MachinePointerInfo that has a GlobalValuePseudoSourceValue object /// representing a GOT entry for a global function. - MachinePointerInfo callPtrInfo(const GlobalValue *GV); + MachinePointerInfo callPtrInfo(MachineFunction &MF, const GlobalValue *GV); void setSaveS2() { SaveS2 = true; } bool hasSaveS2() const { return SaveS2; } - int getMoveF64ViaSpillFI(const TargetRegisterClass *RC); + int getMoveF64ViaSpillFI(MachineFunction &MF, const TargetRegisterClass *RC); std::map StubsNeeded; @@ -84,8 +84,6 @@ class MipsFunctionInfo : public MachineFunctionInfo { private: virtual void anchor(); - MachineFunction& MF; - /// SRetReturnReg - Some subtargets require that sret lowering includes /// returning the value of the returned struct in a register. This field /// holds the virtual register into which the sret argument is passed. diff --git a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp index f145aefc041922..35df8b28cc1e61 100644 --- a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp +++ b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp @@ -320,7 +320,7 @@ bool ExpandPseudo::expandBuildPairF64(MachineBasicBlock &MBB, // We re-use the same spill slot each time so that the stack frame doesn't // grow too much in functions with a large number of moves. - int FI = MF.getInfo()->getMoveF64ViaSpillFI(RC2); + int FI = MF.getInfo()->getMoveF64ViaSpillFI(MF, RC2); if (!Subtarget.isLittle()) std::swap(LoReg, HiReg); TII.storeRegToStack(MBB, I, LoReg, I->getOperand(1).isKill(), FI, RC, @@ -386,7 +386,7 @@ bool ExpandPseudo::expandExtractElementF64(MachineBasicBlock &MBB, // We re-use the same spill slot each time so that the stack frame doesn't // grow too much in functions with a large number of moves. - int FI = MF.getInfo()->getMoveF64ViaSpillFI(RC); + int FI = MF.getInfo()->getMoveF64ViaSpillFI(MF, RC); TII.storeRegToStack(MBB, I, SrcReg, Op1.isKill(), FI, RC, &RegInfo, 0); TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, Offset); return true; @@ -878,11 +878,11 @@ void MipsSEFrameLowering::determineCalleeSaves(MachineFunction &MF, // Create spill slots for eh data registers if function calls eh_return. if (MipsFI->callsEhReturn()) - MipsFI->createEhDataRegsFI(); + MipsFI->createEhDataRegsFI(MF); // Create spill slots for Coprocessor 0 registers if function is an ISR. if (MipsFI->isISR()) - MipsFI->createISRRegFI(); + MipsFI->createISRRegFI(MF); // Expand pseudo instructions which load, store or copy accumulators. // Add an emergency spill slot if a pseudo was expanded. diff --git a/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp b/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp index 3ddba25fcef619..7be5fc33a0aff4 100644 --- a/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp +++ b/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp @@ -153,7 +153,7 @@ void MipsSEDAGToDAGISel::emitMCountABI(MachineInstr &MI, MachineBasicBlock &MBB, } void MipsSEDAGToDAGISel::processFunctionAfterISel(MachineFunction &MF) { - MF.getInfo()->initGlobalBaseReg(); + MF.getInfo()->initGlobalBaseReg(MF); MachineRegisterInfo *MRI = &MF.getRegInfo(); diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp index 7aa4165e90c03f..b6c3086169e9e2 100644 --- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -631,7 +631,7 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) { return; } else { MCSymbol *PICOffset = - MF->getInfo()->getPICOffsetSymbol(); + MF->getInfo()->getPICOffsetSymbol(*MF); TmpInst.setOpcode(PPC::LWZ); const MCExpr *Exp = MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext); @@ -1341,7 +1341,7 @@ void PPCLinuxAsmPrinter::emitFunctionEntryLabel() { if (!Subtarget->isPPC64()) { const PPCFunctionInfo *PPCFI = MF->getInfo(); if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) { - MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(); + MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol(*MF); MCSymbol *PICBase = MF->getPICBaseSymbol(); OutStreamer->emitLabel(RelocSymbol); @@ -1369,14 +1369,14 @@ void PPCLinuxAsmPrinter::emitFunctionEntryLabel() { const PPCFunctionInfo *PPCFI = MF->getInfo(); MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC.")); - MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(); + MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol(*MF); const MCExpr *TOCDeltaExpr = MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext), MCSymbolRefExpr::create(GlobalEPSymbol, OutContext), OutContext); - OutStreamer->emitLabel(PPCFI->getTOCOffsetSymbol()); + OutStreamer->emitLabel(PPCFI->getTOCOffsetSymbol(*MF)); OutStreamer->emitValue(TOCDeltaExpr, 8); } return AsmPrinter::emitFunctionEntryLabel(); @@ -1483,7 +1483,7 @@ void PPCLinuxAsmPrinter::emitFunctionBodyStart() { // Note: The logic here must be synchronized with the code in the // branch-selection pass which sets the offset of the first block in the // function. This matters because it affects the alignment. - MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(); + MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol(*MF); OutStreamer->emitLabel(GlobalEntryLabel); const MCSymbolRefExpr *GlobalEntryLabelExp = MCSymbolRefExpr::create(GlobalEntryLabel, OutContext); @@ -1506,7 +1506,7 @@ void PPCLinuxAsmPrinter::emitFunctionBodyStart() { .addReg(PPC::X2) .addExpr(TOCDeltaLo)); } else { - MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(); + MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol(*MF); const MCExpr *TOCOffsetDeltaExpr = MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext), GlobalEntryLabelExp, OutContext); @@ -1521,7 +1521,7 @@ void PPCLinuxAsmPrinter::emitFunctionBodyStart() { .addReg(PPC::X12)); } - MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(); + MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol(*MF); OutStreamer->emitLabel(LocalEntryLabel); const MCSymbolRefExpr *LocalEntryLabelExp = MCSymbolRefExpr::create(LocalEntryLabel, OutContext); diff --git a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td index ae227742bd1a5d..68e357b7d86d5d 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td +++ b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td @@ -225,6 +225,137 @@ class VXForm_RD5_N3_VB5 xo, dag OOL, dag IOL, string asmstr, let Inst{21-31} = xo; } +// VN-Form: [PO VRT VRA VRB PS SD XO] +// SD is "Shift Direction" +class VNForm_VTAB5_SD3 xo, bits<2> ps, dag OOL, dag IOL, string asmstr, + InstrItinClass itin, list pattern> + : I<4, OOL, IOL, asmstr, itin> { + bits<5> VRT; + bits<5> VRA; + bits<5> VRB; + bits<3> SD; + + let Pattern = pattern; + + let Inst{6-10} = VRT; + let Inst{11-15} = VRA; + let Inst{16-20} = VRB; + let Inst{21-22} = ps; + let Inst{23-25} = SD; + let Inst{26-31} = xo; +} + +// 8RR:D-Form: [ 1 1 0 // // imm0 +// PO T XO TX imm1 ]. +class 8RR_DForm_IMM32_XT6 opcode, bits<4> xo, dag OOL, dag IOL, + string asmstr, InstrItinClass itin, + list pattern> + : PI<1, opcode, OOL, IOL, asmstr, itin> { + bits<6> XT; + bits<32> IMM32; + + let Pattern = pattern; + + // The prefix. + let Inst{6-7} = 1; + let Inst{8-11} = 0; + let Inst{12-13} = 0; // reserved + let Inst{14-15} = 0; // reserved + let Inst{16-31} = IMM32{31-16}; + + // The instruction. + let Inst{38-42} = XT{4-0}; + let Inst{43-46} = xo; + let Inst{47} = XT{5}; + let Inst{48-63} = IMM32{15-0}; +} + +// 8RR:D-Form: [ 1 1 0 // // imm0 +// PO T XO IX TX imm1 ]. +class 8RR_DForm_IMM32_XT6_IX opcode, bits<3> xo, dag OOL, dag IOL, + string asmstr, InstrItinClass itin, + list pattern> + : PI<1, opcode, OOL, IOL, asmstr, itin> { + bits<6> XT; + bit IX; + bits<32> IMM32; + + let Pattern = pattern; + + // The prefix. + let Inst{6-7} = 1; + let Inst{8-11} = 0; + let Inst{12-13} = 0; // reserved + let Inst{14-15} = 0; // reserved + let Inst{16-31} = IMM32{31-16}; + + // The instruction. + let Inst{38-42} = XT{4-0}; + let Inst{43-45} = xo; + let Inst{46} = IX; + let Inst{47} = XT{5}; + let Inst{48-63} = IMM32{15-0}; +} + +class 8RR_XX4Form_XTABC6 opcode, bits<2> xo, dag OOL, dag IOL, + string asmstr, InstrItinClass itin, list pattern> + : PI<1, opcode, OOL, IOL, asmstr, itin> { + bits<6> XT; + bits<6> XA; + bits<6> XB; + bits<6> XC; + + let Pattern = pattern; + + // The prefix. + let Inst{6-7} = 1; + let Inst{8-11} = 0; + let Inst{12-13} = 0; + let Inst{14-31} = 0; + + // The instruction. + let Inst{38-42} = XT{4-0}; + let Inst{43-47} = XA{4-0}; + let Inst{48-52} = XB{4-0}; + let Inst{53-57} = XC{4-0}; + let Inst{58-59} = xo; + let Inst{60} = XC{5}; + let Inst{61} = XA{5}; + let Inst{62} = XB{5}; + let Inst{63} = XT{5}; +} + +class 8RR_XX4Form_IMM3_XTABC6 opcode, bits<2> xo, dag OOL, dag IOL, + string asmstr, InstrItinClass itin, + list pattern> + : PI<1, opcode, OOL, IOL, asmstr, itin> { + bits<6> XT; + bits<6> XA; + bits<6> XB; + bits<6> XC; + bits<3> IMM; + + let Pattern = pattern; + + // The prefix. + let Inst{6-7} = 1; + let Inst{8-11} = 0; + let Inst{12-13} = 0; + let Inst{14-28} = 0; + let Inst{29-31} = IMM; + + // The instruction. + let Inst{38-42} = XT{4-0}; + let Inst{43-47} = XA{4-0}; + let Inst{48-52} = XB{4-0}; + let Inst{53-57} = XC{4-0}; + let Inst{58-59} = xo; + let Inst{60} = XC{5}; + let Inst{61} = XA{5}; + let Inst{62} = XB{5}; + let Inst{63} = XT{5}; +} + multiclass MLS_DForm_R_SI34_RTA5_MEM_p opcode, dag OOL, dag IOL, dag PCRel_IOL, string asmstr, InstrItinClass itin> { @@ -565,7 +696,52 @@ let Predicates = [PCRelativeMemops], AddedComplexity = 500 in { def : Pat<(PPCmatpcreladdr pcreladdr:$addr), (PADDI8pc 0, $addr)>; } +let Predicates = [PrefixInstrs] in { + def XXSPLTIW : 8RR_DForm_IMM32_XT6<32, 3, (outs vsrc:$XT), + (ins i32imm:$IMM32), + "xxspltiw $XT, $IMM32", IIC_VecGeneral, + []>; + def XXSPLTIDP : 8RR_DForm_IMM32_XT6<32, 2, (outs vsrc:$XT), + (ins i32imm:$IMM32), + "xxspltidp $XT, $IMM32", IIC_VecGeneral, + []>; + def XXSPLTI32DX : + 8RR_DForm_IMM32_XT6_IX<32, 0, (outs vsrc:$XT), + (ins vsrc:$XTi, i1imm:$IX, i32imm:$IMM32), + "xxsplti32dx $XT, $IX, $IMM32", IIC_VecGeneral, []>, + RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">; + def XXPERMX : + 8RR_XX4Form_IMM3_XTABC6<34, 0, (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, + vsrc:$XC, u3imm:$UIM), + "xxpermx $XT, $XA, $XB, $XC, $UIM", + IIC_VecPerm, []>; + def XXBLENDVB : + 8RR_XX4Form_XTABC6<33, 0, (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, + vsrc:$XC), "xxblendvb $XT, $XA, $XB, $XC", + IIC_VecGeneral, []>; + def XXBLENDVH : + 8RR_XX4Form_XTABC6<33, 1, (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, + vsrc:$XC), "xxblendvh $XT, $XA, $XB, $XC", + IIC_VecGeneral, []>; + def XXBLENDVW : + 8RR_XX4Form_XTABC6<33, 2, (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, + vsrc:$XC), "xxblendvw $XT, $XA, $XB, $XC", + IIC_VecGeneral, []>; + def XXBLENDVD : + 8RR_XX4Form_XTABC6<33, 3, (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB, + vsrc:$XC), "xxblendvd $XT, $XA, $XB, $XC", + IIC_VecGeneral, []>; +} + let Predicates = [IsISA3_1] in { + def VSLDBI : VNForm_VTAB5_SD3<22, 0, (outs vrrc:$VRT), + (ins vrrc:$VRA, vrrc:$VRB, u3imm:$SH), + "vsldbi $VRT, $VRA, $VRB, $SH", + IIC_VecGeneral, []>; + def VSRDBI : VNForm_VTAB5_SD3<22, 1, (outs vrrc:$VRT), + (ins vrrc:$VRA, vrrc:$VRB, u3imm:$SH), + "vsrdbi $VRT, $VRA, $VRB, $SH", + IIC_VecGeneral, []>; def VPDEPD : VXForm_1<1485, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB), "vpdepd $vD, $vA, $vB", IIC_VecGeneral, [(set v2i64:$vD, diff --git a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp index 1a9b50cb945fc8..daf88589bb52bf 100644 --- a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp @@ -19,31 +19,31 @@ static cl::opt PPCDisableNonVolatileCR( cl::init(false), cl::Hidden); void PPCFunctionInfo::anchor() {} -PPCFunctionInfo::PPCFunctionInfo(MachineFunction &MF) - : DisableNonVolatileCR(PPCDisableNonVolatileCR), MF(MF) {} +PPCFunctionInfo::PPCFunctionInfo(const MachineFunction &MF) + : DisableNonVolatileCR(PPCDisableNonVolatileCR) {} -MCSymbol *PPCFunctionInfo::getPICOffsetSymbol() const { +MCSymbol *PPCFunctionInfo::getPICOffsetSymbol(MachineFunction &MF) const { const DataLayout &DL = MF.getDataLayout(); return MF.getContext().getOrCreateSymbol(Twine(DL.getPrivateGlobalPrefix()) + Twine(MF.getFunctionNumber()) + "$poff"); } -MCSymbol *PPCFunctionInfo::getGlobalEPSymbol() const { +MCSymbol *PPCFunctionInfo::getGlobalEPSymbol(MachineFunction &MF) const { const DataLayout &DL = MF.getDataLayout(); return MF.getContext().getOrCreateSymbol(Twine(DL.getPrivateGlobalPrefix()) + "func_gep" + Twine(MF.getFunctionNumber())); } -MCSymbol *PPCFunctionInfo::getLocalEPSymbol() const { +MCSymbol *PPCFunctionInfo::getLocalEPSymbol(MachineFunction &MF) const { const DataLayout &DL = MF.getDataLayout(); return MF.getContext().getOrCreateSymbol(Twine(DL.getPrivateGlobalPrefix()) + "func_lep" + Twine(MF.getFunctionNumber())); } -MCSymbol *PPCFunctionInfo::getTOCOffsetSymbol() const { +MCSymbol *PPCFunctionInfo::getTOCOffsetSymbol(MachineFunction &MF) const { const DataLayout &DL = MF.getDataLayout(); return MF.getContext().getOrCreateSymbol(Twine(DL.getPrivateGlobalPrefix()) + "func_toc" + diff --git a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h index 3bbac5316efa99..29ca53e273d753 100644 --- a/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h +++ b/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h @@ -118,9 +118,6 @@ class PPCFunctionInfo : public MachineFunctionInfo { /// 64-bit SVR4 ABI. SmallVector MustSaveCRs; - /// Hold onto our MachineFunction context. - MachineFunction &MF; - /// Whether this uses the PIC Base register or not. bool UsesPICBase = false; @@ -129,7 +126,7 @@ class PPCFunctionInfo : public MachineFunctionInfo { std::vector> LiveInAttrs; public: - explicit PPCFunctionInfo(MachineFunction &MF); + explicit PPCFunctionInfo(const MachineFunction &MF); int getFramePointerSaveIndex() const { return FramePointerSaveIndex; } void setFramePointerSaveIndex(int Idx) { FramePointerSaveIndex = Idx; } @@ -225,11 +222,11 @@ class PPCFunctionInfo : public MachineFunctionInfo { void setUsesPICBase(bool uses) { UsesPICBase = uses; } bool usesPICBase() const { return UsesPICBase; } - MCSymbol *getPICOffsetSymbol() const; + MCSymbol *getPICOffsetSymbol(MachineFunction &MF) const; - MCSymbol *getGlobalEPSymbol() const; - MCSymbol *getLocalEPSymbol() const; - MCSymbol *getTOCOffsetSymbol() const; + MCSymbol *getGlobalEPSymbol(MachineFunction &MF) const; + MCSymbol *getLocalEPSymbol(MachineFunction &MF) const; + MCSymbol *getTOCOffsetSymbol(MachineFunction &MF) const; }; } // end namespace llvm diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp index 8c9f2c893e9bf9..7111549b8d4d07 100644 --- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp @@ -31,7 +31,7 @@ static int getLibCallID(const MachineFunction &MF, const std::vector &CSI) { const auto *RVFI = MF.getInfo(); - if (CSI.empty() || !RVFI->useSaveRestoreLibCalls()) + if (CSI.empty() || !RVFI->useSaveRestoreLibCalls(MF)) return -1; Register MaxReg = RISCV::NoRegister; @@ -731,9 +731,10 @@ bool RISCVFrameLowering::restoreCalleeSavedRegisters( bool RISCVFrameLowering::canUseAsPrologue(const MachineBasicBlock &MBB) const { MachineBasicBlock *TmpMBB = const_cast(&MBB); - const auto *RVFI = MBB.getParent()->getInfo(); + const MachineFunction *MF = MBB.getParent(); + const auto *RVFI = MF->getInfo(); - if (!RVFI->useSaveRestoreLibCalls()) + if (!RVFI->useSaveRestoreLibCalls(*MF)) return true; // Inserting a call to a __riscv_save libcall requires the use of the register @@ -746,10 +747,11 @@ bool RISCVFrameLowering::canUseAsPrologue(const MachineBasicBlock &MBB) const { } bool RISCVFrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const { + const MachineFunction *MF = MBB.getParent(); MachineBasicBlock *TmpMBB = const_cast(&MBB); - const auto *RVFI = MBB.getParent()->getInfo(); + const auto *RVFI = MF->getInfo(); - if (!RVFI->useSaveRestoreLibCalls()) + if (!RVFI->useSaveRestoreLibCalls(*MF)) return true; // Using the __riscv_restore libcalls to restore CSRs requires a tail call. diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 44ebd3ee8b6674..13c0d3523964d8 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -1234,7 +1234,7 @@ static MachineBasicBlock *emitSplitF64Pseudo(MachineInstr &MI, Register HiReg = MI.getOperand(1).getReg(); Register SrcReg = MI.getOperand(2).getReg(); const TargetRegisterClass *SrcRC = &RISCV::FPR64RegClass; - int FI = MF.getInfo()->getMoveF64FrameIndex(); + int FI = MF.getInfo()->getMoveF64FrameIndex(MF); TII.storeRegToStackSlot(*BB, MI, SrcReg, MI.getOperand(2).isKill(), FI, SrcRC, RI); @@ -1266,7 +1266,7 @@ static MachineBasicBlock *emitBuildPairF64Pseudo(MachineInstr &MI, Register LoReg = MI.getOperand(1).getReg(); Register HiReg = MI.getOperand(2).getReg(); const TargetRegisterClass *DstRC = &RISCV::FPR64RegClass; - int FI = MF.getInfo()->getMoveF64FrameIndex(); + int FI = MF.getInfo()->getMoveF64FrameIndex(MF); MachineMemOperand *MMO = MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(MF, FI), diff --git a/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h b/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h index 593dabc9589065..1b11c1747ba0ef 100644 --- a/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h +++ b/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h @@ -23,7 +23,6 @@ namespace llvm { /// and contains private RISCV-specific information for each MachineFunction. class RISCVMachineFunctionInfo : public MachineFunctionInfo { private: - MachineFunction &MF; /// FrameIndex for start of varargs area int VarArgsFrameIndex = 0; /// Size of the save area used for varargs @@ -35,7 +34,7 @@ class RISCVMachineFunctionInfo : public MachineFunctionInfo { unsigned LibCallStackSize = 0; public: - RISCVMachineFunctionInfo(MachineFunction &MF) : MF(MF) {} + RISCVMachineFunctionInfo(const MachineFunction &MF) {} int getVarArgsFrameIndex() const { return VarArgsFrameIndex; } void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; } @@ -43,7 +42,7 @@ class RISCVMachineFunctionInfo : public MachineFunctionInfo { unsigned getVarArgsSaveSize() const { return VarArgsSaveSize; } void setVarArgsSaveSize(int Size) { VarArgsSaveSize = Size; } - int getMoveF64FrameIndex() { + int getMoveF64FrameIndex(MachineFunction &MF) { if (MoveF64FrameIndex == -1) MoveF64FrameIndex = MF.getFrameInfo().CreateStackObject(8, 8, false); return MoveF64FrameIndex; @@ -52,7 +51,7 @@ class RISCVMachineFunctionInfo : public MachineFunctionInfo { unsigned getLibCallStackSize() const { return LibCallStackSize; } void setLibCallStackSize(unsigned Size) { LibCallStackSize = Size; } - bool useSaveRestoreLibCalls() const { + bool useSaveRestoreLibCalls(const MachineFunction &MF) const { // We cannot use fixed locations for the callee saved spill slots if the // function uses a varargs save area. return MF.getSubtarget().enableSaveRestore() && diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp index c3a995dee07f3b..cb7d55eb0f0c32 100644 --- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp @@ -128,7 +128,7 @@ bool RISCVRegisterInfo::hasReservedSpillSlot(const MachineFunction &MF, Register Reg, int &FrameIdx) const { const auto *RVFI = MF.getInfo(); - if (!RVFI->useSaveRestoreLibCalls()) + if (!RVFI->useSaveRestoreLibCalls(MF)) return false; auto FII = FixedCSRFIMap.find(Reg); diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp index c9743c5170749f..f6b52843c5c649 100644 --- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp +++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp @@ -59,7 +59,7 @@ static bool CC_Sparc_Assign_Split_64(unsigned &ValNo, MVT &ValVT, SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 }; // Try to get first reg. - if (unsigned Reg = State.AllocateReg(RegList)) { + if (Register Reg = State.AllocateReg(RegList)) { State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); } else { // Assign whole thing in stack. @@ -69,7 +69,7 @@ static bool CC_Sparc_Assign_Split_64(unsigned &ValNo, MVT &ValVT, } // Try to get second reg. - if (unsigned Reg = State.AllocateReg(RegList)) + if (Register Reg = State.AllocateReg(RegList)) State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); else State.addLoc(CCValAssign::getCustomMem( @@ -86,13 +86,13 @@ static bool CC_Sparc_Assign_Ret_Split_64(unsigned &ValNo, MVT &ValVT, }; // Try to get first reg. - if (unsigned Reg = State.AllocateReg(RegList)) + if (Register Reg = State.AllocateReg(RegList)) State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); else return false; // Try to get second reg. - if (unsigned Reg = State.AllocateReg(RegList)) + if (Register Reg = State.AllocateReg(RegList)) State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); else return false; @@ -264,7 +264,7 @@ SparcTargetLowering::LowerReturn_32(SDValue Chain, CallingConv::ID CallConv, // If the function returns a struct, copy the SRetReturnReg to I0 if (MF.getFunction().hasStructRetAttr()) { SparcMachineFunctionInfo *SFI = MF.getInfo(); - unsigned Reg = SFI->getSRetReturnReg(); + Register Reg = SFI->getSRetReturnReg(); if (!Reg) llvm_unreachable("sret virtual register not created in the entry block"); auto PtrVT = getPointerTy(DAG.getDataLayout()); @@ -429,7 +429,7 @@ SDValue SparcTargetLowering::LowerFormalArguments_32( SDValue FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32); LoVal = DAG.getLoad(MVT::i32, dl, Chain, FIPtr, MachinePointerInfo()); } else { - unsigned loReg = MF.addLiveIn(NextVA.getLocReg(), + Register loReg = MF.addLiveIn(NextVA.getLocReg(), &SP::IntRegsRegClass); LoVal = DAG.getCopyFromReg(Chain, dl, loReg, MVT::i32); } @@ -520,7 +520,7 @@ SDValue SparcTargetLowering::LowerFormalArguments_32( if (MF.getFunction().hasStructRetAttr()) { // Copy the SRet Argument to SRetReturnReg. SparcMachineFunctionInfo *SFI = MF.getInfo(); - unsigned Reg = SFI->getSRetReturnReg(); + Register Reg = SFI->getSRetReturnReg(); if (!Reg) { Reg = MF.getRegInfo().createVirtualRegister(&SP::IntRegsRegClass); SFI->setSRetReturnReg(Reg); @@ -595,7 +595,7 @@ SDValue SparcTargetLowering::LowerFormalArguments_64( // All integer register arguments are promoted by the caller to i64. // Create a virtual register for the promoted live-in value. - unsigned VReg = MF.addLiveIn(VA.getLocReg(), + Register VReg = MF.addLiveIn(VA.getLocReg(), getRegClassFor(VA.getLocVT())); SDValue Arg = DAG.getCopyFromReg(Chain, DL, VReg, VA.getLocVT()); @@ -666,7 +666,7 @@ SDValue SparcTargetLowering::LowerFormalArguments_64( // of how many arguments were actually passed. SmallVector OutChains; for (; ArgOffset < 6*8; ArgOffset += 8) { - unsigned VReg = MF.addLiveIn(SP::I0 + ArgOffset/8, &SP::I64RegsRegClass); + Register VReg = MF.addLiveIn(SP::I0 + ArgOffset/8, &SP::I64RegsRegClass); SDValue VArg = DAG.getCopyFromReg(Chain, DL, VReg, MVT::i64); int FI = MF.getFrameInfo().CreateFixedObject(8, ArgOffset + ArgArea, true); auto PtrVT = getPointerTy(MF.getDataLayout()); @@ -929,7 +929,7 @@ SparcTargetLowering::LowerCall_32(TargetLowering::CallLoweringInfo &CLI, // stuck together. SDValue InFlag; for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { - unsigned Reg = toCallerWindow(RegsToPass[i].first); + Register Reg = toCallerWindow(RegsToPass[i].first); Chain = DAG.getCopyToReg(Chain, dl, Reg, RegsToPass[i].second, InFlag); InFlag = Chain.getValue(1); } @@ -1016,7 +1016,7 @@ SparcTargetLowering::LowerCall_32(TargetLowering::CallLoweringInfo &CLI, // this table could be generated automatically from RegInfo. Register SparcTargetLowering::getRegisterByName(const char* RegName, LLT VT, const MachineFunction &MF) const { - Register Reg = StringSwitch(RegName) + Register Reg = StringSwitch(RegName) .Case("i0", SP::I0).Case("i1", SP::I1).Case("i2", SP::I2).Case("i3", SP::I3) .Case("i4", SP::I4).Case("i5", SP::I5).Case("i6", SP::I6).Case("i7", SP::I7) .Case("o0", SP::O0).Case("o1", SP::O1).Case("o2", SP::O2).Case("o3", SP::O3) @@ -1058,7 +1058,7 @@ static void fixupVariableFloatArgs(SmallVectorImpl &ArgLocs, CCValAssign NewVA; // Determine the offset into the argument array. - unsigned firstReg = (ValTy == MVT::f64) ? SP::D0 : SP::Q0; + Register firstReg = (ValTy == MVT::f64) ? SP::D0 : SP::Q0; unsigned argSize = (ValTy == MVT::f64) ? 8 : 16; unsigned Offset = argSize * (VA.getLocReg() - firstReg); assert(Offset < 16*8 && "Offset out of range, bad register enum?"); @@ -1125,7 +1125,7 @@ SparcTargetLowering::LowerCall_64(TargetLowering::CallLoweringInfo &CLI, // Collect the set of registers to pass to the function and their values. // This will be emitted as a sequence of CopyToReg nodes glued to the call // instruction. - SmallVector, 8> RegsToPass; + SmallVector, 8> RegsToPass; // Collect chains from all the memory opeations that copy arguments to the // stack. They must follow the stack pointer adjustment above and precede the diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp index b31830de517f11..dc3a41c6309861 100644 --- a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp @@ -468,11 +468,10 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, llvm_unreachable("Can't load this register from stack slot"); } -unsigned SparcInstrInfo::getGlobalBaseReg(MachineFunction *MF) const -{ +Register SparcInstrInfo::getGlobalBaseReg(MachineFunction *MF) const { SparcMachineFunctionInfo *SparcFI = MF->getInfo(); - unsigned GlobalBaseReg = SparcFI->getGlobalBaseReg(); - if (GlobalBaseReg != 0) + Register GlobalBaseReg = SparcFI->getGlobalBaseReg(); + if (GlobalBaseReg) return GlobalBaseReg; // Insert the set of GlobalBaseReg into the first MBB of the function diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.h b/llvm/lib/Target/Sparc/SparcInstrInfo.h index 5347c7150dd5e4..b25de8e5a69098 100644 --- a/llvm/lib/Target/Sparc/SparcInstrInfo.h +++ b/llvm/lib/Target/Sparc/SparcInstrInfo.h @@ -96,7 +96,7 @@ class SparcInstrInfo : public SparcGenInstrInfo { const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override; - unsigned getGlobalBaseReg(MachineFunction *MF) const; + Register getGlobalBaseReg(MachineFunction *MF) const; // Lower pseudo instructions after register allocation. bool expandPostRAPseudo(MachineInstr &MI) const override; diff --git a/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.h b/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.h index fe570587869331..d557c8ea22e207 100644 --- a/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.h +++ b/llvm/lib/Target/Sparc/SparcMachineFunctionInfo.h @@ -19,14 +19,14 @@ namespace llvm { class SparcMachineFunctionInfo : public MachineFunctionInfo { virtual void anchor(); private: - unsigned GlobalBaseReg; + Register GlobalBaseReg; /// VarArgsFrameOffset - Frame offset to start of varargs area. int VarArgsFrameOffset; /// SRetReturnReg - Holds the virtual register into which the sret /// argument is passed. - unsigned SRetReturnReg; + Register SRetReturnReg; /// IsLeafProc - True if the function is a leaf procedure. bool IsLeafProc; @@ -38,14 +38,14 @@ namespace llvm { : GlobalBaseReg(0), VarArgsFrameOffset(0), SRetReturnReg(0), IsLeafProc(false) {} - unsigned getGlobalBaseReg() const { return GlobalBaseReg; } - void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; } + Register getGlobalBaseReg() const { return GlobalBaseReg; } + void setGlobalBaseReg(Register Reg) { GlobalBaseReg = Reg; } int getVarArgsFrameOffset() const { return VarArgsFrameOffset; } void setVarArgsFrameOffset(int Offset) { VarArgsFrameOffset = Offset; } - unsigned getSRetReturnReg() const { return SRetReturnReg; } - void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; } + Register getSRetReturnReg() const { return SRetReturnReg; } + void setSRetReturnReg(Register Reg) { SRetReturnReg = Reg; } void setLeafProc(bool rhs) { IsLeafProc = rhs; } bool isLeafProc() const { return IsLeafProc; } diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp index cbd64c71767a75..410547390c9103 100644 --- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -4001,159 +4001,50 @@ bool X86DAGToDAGISel::shrinkAndImmediate(SDNode *And) { static unsigned getVPTESTMOpc(MVT TestVT, bool IsTestN, bool FoldedLoad, bool FoldedBCast, bool Masked) { - if (Masked) { - if (FoldedLoad) { - switch (TestVT.SimpleTy) { - default: llvm_unreachable("Unexpected VT!"); - case MVT::v16i8: - return IsTestN ? X86::VPTESTNMBZ128rmk : X86::VPTESTMBZ128rmk; - case MVT::v8i16: - return IsTestN ? X86::VPTESTNMWZ128rmk : X86::VPTESTMWZ128rmk; - case MVT::v4i32: - return IsTestN ? X86::VPTESTNMDZ128rmk : X86::VPTESTMDZ128rmk; - case MVT::v2i64: - return IsTestN ? X86::VPTESTNMQZ128rmk : X86::VPTESTMQZ128rmk; - case MVT::v32i8: - return IsTestN ? X86::VPTESTNMBZ256rmk : X86::VPTESTMBZ256rmk; - case MVT::v16i16: - return IsTestN ? X86::VPTESTNMWZ256rmk : X86::VPTESTMWZ256rmk; - case MVT::v8i32: - return IsTestN ? X86::VPTESTNMDZ256rmk : X86::VPTESTMDZ256rmk; - case MVT::v4i64: - return IsTestN ? X86::VPTESTNMQZ256rmk : X86::VPTESTMQZ256rmk; - case MVT::v64i8: - return IsTestN ? X86::VPTESTNMBZrmk : X86::VPTESTMBZrmk; - case MVT::v32i16: - return IsTestN ? X86::VPTESTNMWZrmk : X86::VPTESTMWZrmk; - case MVT::v16i32: - return IsTestN ? X86::VPTESTNMDZrmk : X86::VPTESTMDZrmk; - case MVT::v8i64: - return IsTestN ? X86::VPTESTNMQZrmk : X86::VPTESTMQZrmk; - } - } - - if (FoldedBCast) { - switch (TestVT.SimpleTy) { - default: llvm_unreachable("Unexpected VT!"); - case MVT::v4i32: - return IsTestN ? X86::VPTESTNMDZ128rmbk : X86::VPTESTMDZ128rmbk; - case MVT::v2i64: - return IsTestN ? X86::VPTESTNMQZ128rmbk : X86::VPTESTMQZ128rmbk; - case MVT::v8i32: - return IsTestN ? X86::VPTESTNMDZ256rmbk : X86::VPTESTMDZ256rmbk; - case MVT::v4i64: - return IsTestN ? X86::VPTESTNMQZ256rmbk : X86::VPTESTMQZ256rmbk; - case MVT::v16i32: - return IsTestN ? X86::VPTESTNMDZrmbk : X86::VPTESTMDZrmbk; - case MVT::v8i64: - return IsTestN ? X86::VPTESTNMQZrmbk : X86::VPTESTMQZrmbk; - } - } - - switch (TestVT.SimpleTy) { - default: llvm_unreachable("Unexpected VT!"); - case MVT::v16i8: - return IsTestN ? X86::VPTESTNMBZ128rrk : X86::VPTESTMBZ128rrk; - case MVT::v8i16: - return IsTestN ? X86::VPTESTNMWZ128rrk : X86::VPTESTMWZ128rrk; - case MVT::v4i32: - return IsTestN ? X86::VPTESTNMDZ128rrk : X86::VPTESTMDZ128rrk; - case MVT::v2i64: - return IsTestN ? X86::VPTESTNMQZ128rrk : X86::VPTESTMQZ128rrk; - case MVT::v32i8: - return IsTestN ? X86::VPTESTNMBZ256rrk : X86::VPTESTMBZ256rrk; - case MVT::v16i16: - return IsTestN ? X86::VPTESTNMWZ256rrk : X86::VPTESTMWZ256rrk; - case MVT::v8i32: - return IsTestN ? X86::VPTESTNMDZ256rrk : X86::VPTESTMDZ256rrk; - case MVT::v4i64: - return IsTestN ? X86::VPTESTNMQZ256rrk : X86::VPTESTMQZ256rrk; - case MVT::v64i8: - return IsTestN ? X86::VPTESTNMBZrrk : X86::VPTESTMBZrrk; - case MVT::v32i16: - return IsTestN ? X86::VPTESTNMWZrrk : X86::VPTESTMWZrrk; - case MVT::v16i32: - return IsTestN ? X86::VPTESTNMDZrrk : X86::VPTESTMDZrrk; - case MVT::v8i64: - return IsTestN ? X86::VPTESTNMQZrrk : X86::VPTESTMQZrrk; - } - } +#define VPTESTM_CASE(VT, SUFFIX) \ +case MVT::VT: \ + if (Masked) \ + return IsTestN ? X86::VPTESTNM##SUFFIX##k: X86::VPTESTM##SUFFIX##k; \ + return IsTestN ? X86::VPTESTNM##SUFFIX : X86::VPTESTM##SUFFIX; + + +#define VPTESTM_BROADCAST_CASES(SUFFIX) \ +default: llvm_unreachable("Unexpected VT!"); \ +VPTESTM_CASE(v4i32, DZ128##SUFFIX) \ +VPTESTM_CASE(v2i64, QZ128##SUFFIX) \ +VPTESTM_CASE(v8i32, DZ256##SUFFIX) \ +VPTESTM_CASE(v4i64, QZ256##SUFFIX) \ +VPTESTM_CASE(v16i32, DZ##SUFFIX) \ +VPTESTM_CASE(v8i64, QZ##SUFFIX) + +#define VPTESTM_FULL_CASES(SUFFIX) \ +VPTESTM_BROADCAST_CASES(SUFFIX) \ +VPTESTM_CASE(v16i8, BZ128##SUFFIX) \ +VPTESTM_CASE(v8i16, WZ128##SUFFIX) \ +VPTESTM_CASE(v32i8, BZ256##SUFFIX) \ +VPTESTM_CASE(v16i16, WZ256##SUFFIX) \ +VPTESTM_CASE(v64i8, BZ##SUFFIX) \ +VPTESTM_CASE(v32i16, WZ##SUFFIX) if (FoldedLoad) { switch (TestVT.SimpleTy) { - default: llvm_unreachable("Unexpected VT!"); - case MVT::v16i8: - return IsTestN ? X86::VPTESTNMBZ128rm : X86::VPTESTMBZ128rm; - case MVT::v8i16: - return IsTestN ? X86::VPTESTNMWZ128rm : X86::VPTESTMWZ128rm; - case MVT::v4i32: - return IsTestN ? X86::VPTESTNMDZ128rm : X86::VPTESTMDZ128rm; - case MVT::v2i64: - return IsTestN ? X86::VPTESTNMQZ128rm : X86::VPTESTMQZ128rm; - case MVT::v32i8: - return IsTestN ? X86::VPTESTNMBZ256rm : X86::VPTESTMBZ256rm; - case MVT::v16i16: - return IsTestN ? X86::VPTESTNMWZ256rm : X86::VPTESTMWZ256rm; - case MVT::v8i32: - return IsTestN ? X86::VPTESTNMDZ256rm : X86::VPTESTMDZ256rm; - case MVT::v4i64: - return IsTestN ? X86::VPTESTNMQZ256rm : X86::VPTESTMQZ256rm; - case MVT::v64i8: - return IsTestN ? X86::VPTESTNMBZrm : X86::VPTESTMBZrm; - case MVT::v32i16: - return IsTestN ? X86::VPTESTNMWZrm : X86::VPTESTMWZrm; - case MVT::v16i32: - return IsTestN ? X86::VPTESTNMDZrm : X86::VPTESTMDZrm; - case MVT::v8i64: - return IsTestN ? X86::VPTESTNMQZrm : X86::VPTESTMQZrm; + VPTESTM_FULL_CASES(rm) } } if (FoldedBCast) { switch (TestVT.SimpleTy) { - default: llvm_unreachable("Unexpected VT!"); - case MVT::v4i32: - return IsTestN ? X86::VPTESTNMDZ128rmb : X86::VPTESTMDZ128rmb; - case MVT::v2i64: - return IsTestN ? X86::VPTESTNMQZ128rmb : X86::VPTESTMQZ128rmb; - case MVT::v8i32: - return IsTestN ? X86::VPTESTNMDZ256rmb : X86::VPTESTMDZ256rmb; - case MVT::v4i64: - return IsTestN ? X86::VPTESTNMQZ256rmb : X86::VPTESTMQZ256rmb; - case MVT::v16i32: - return IsTestN ? X86::VPTESTNMDZrmb : X86::VPTESTMDZrmb; - case MVT::v8i64: - return IsTestN ? X86::VPTESTNMQZrmb : X86::VPTESTMQZrmb; + VPTESTM_BROADCAST_CASES(rmb) } } switch (TestVT.SimpleTy) { - default: llvm_unreachable("Unexpected VT!"); - case MVT::v16i8: - return IsTestN ? X86::VPTESTNMBZ128rr : X86::VPTESTMBZ128rr; - case MVT::v8i16: - return IsTestN ? X86::VPTESTNMWZ128rr : X86::VPTESTMWZ128rr; - case MVT::v4i32: - return IsTestN ? X86::VPTESTNMDZ128rr : X86::VPTESTMDZ128rr; - case MVT::v2i64: - return IsTestN ? X86::VPTESTNMQZ128rr : X86::VPTESTMQZ128rr; - case MVT::v32i8: - return IsTestN ? X86::VPTESTNMBZ256rr : X86::VPTESTMBZ256rr; - case MVT::v16i16: - return IsTestN ? X86::VPTESTNMWZ256rr : X86::VPTESTMWZ256rr; - case MVT::v8i32: - return IsTestN ? X86::VPTESTNMDZ256rr : X86::VPTESTMDZ256rr; - case MVT::v4i64: - return IsTestN ? X86::VPTESTNMQZ256rr : X86::VPTESTMQZ256rr; - case MVT::v64i8: - return IsTestN ? X86::VPTESTNMBZrr : X86::VPTESTMBZrr; - case MVT::v32i16: - return IsTestN ? X86::VPTESTNMWZrr : X86::VPTESTMWZrr; - case MVT::v16i32: - return IsTestN ? X86::VPTESTNMDZrr : X86::VPTESTMDZrr; - case MVT::v8i64: - return IsTestN ? X86::VPTESTNMQZrr : X86::VPTESTMQZrr; + VPTESTM_FULL_CASES(rr) } + +#undef VPTESTM_FULL_CASES +#undef VPTESTM_BROADCAST_CASES +#undef VPTESTM_CASE } // Try to create VPTESTM instruction. If InMask is not null, it will be used diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp index 5c576bf7f07913..ad06020dadf1f1 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp @@ -2379,6 +2379,14 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) { return FAdd; } + // fma x, y, 0 -> fmul x, y + // This is always valid for -0.0, but requires nsz for +0.0 as + // -0.0 + 0.0 = 0.0, which would not be the same as the fmul on its own. + if (match(II->getArgOperand(2), m_NegZeroFP()) || + (match(II->getArgOperand(2), m_PosZeroFP()) && + II->getFastMathFlags().noSignedZeros())) + return BinaryOperator::CreateFMulFMF(Src0, Src1, II); + break; } case Intrinsic::copysign: { diff --git a/llvm/test/Analysis/CostModel/AArch64/aggregates.ll b/llvm/test/Analysis/CostModel/AArch64/aggregates.ll index 6ce57f966ed1a7..35d232b3b69abe 100644 --- a/llvm/test/Analysis/CostModel/AArch64/aggregates.ll +++ b/llvm/test/Analysis/CostModel/AArch64/aggregates.ll @@ -4,63 +4,119 @@ ; RUN: opt < %s -mtriple=aarch64-unknown-linux-gnu -cost-model -cost-kind=code-size -analyze | FileCheck %s --check-prefixes=ALL,CODESIZE define i32 @extract_first_i32({i32, i32} %agg) { -; ALL-LABEL: 'extract_first_i32' -; ALL-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i32 } %agg, 0 -; ALL-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 %r +; THROUGHPUT-LABEL: 'extract_first_i32' +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i32 } %agg, 0 +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 %r +; +; LATENCY-LABEL: 'extract_first_i32' +; LATENCY-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i32 } %agg, 0 +; LATENCY-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 %r +; +; CODESIZE-LABEL: 'extract_first_i32' +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i32 } %agg, 0 +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 %r ; %r = extractvalue {i32, i32} %agg, 0 ret i32 %r } define i32 @extract_second_i32({i32, i32} %agg) { -; ALL-LABEL: 'extract_second_i32' -; ALL-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i32 } %agg, 1 -; ALL-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 %r +; THROUGHPUT-LABEL: 'extract_second_i32' +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i32 } %agg, 1 +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 %r +; +; LATENCY-LABEL: 'extract_second_i32' +; LATENCY-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i32 } %agg, 1 +; LATENCY-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 %r +; +; CODESIZE-LABEL: 'extract_second_i32' +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i32 } %agg, 1 +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 %r ; %r = extractvalue {i32, i32} %agg, 1 ret i32 %r } define i32 @extract_i32({i32, i1} %agg) { -; ALL-LABEL: 'extract_i32' -; ALL-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i1 } %agg, 0 -; ALL-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 %r +; THROUGHPUT-LABEL: 'extract_i32' +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i1 } %agg, 0 +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 %r +; +; LATENCY-LABEL: 'extract_i32' +; LATENCY-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i1 } %agg, 0 +; LATENCY-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 %r +; +; CODESIZE-LABEL: 'extract_i32' +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i1 } %agg, 0 +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 %r ; %r = extractvalue {i32, i1} %agg, 0 ret i32 %r } define i1 @extract_i1({i32, i1} %agg) { -; ALL-LABEL: 'extract_i1' -; ALL-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i1 } %agg, 1 -; ALL-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i1 %r +; THROUGHPUT-LABEL: 'extract_i1' +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i1 } %agg, 1 +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i1 %r +; +; LATENCY-LABEL: 'extract_i1' +; LATENCY-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i1 } %agg, 1 +; LATENCY-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i1 %r +; +; CODESIZE-LABEL: 'extract_i1' +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, i1 } %agg, 1 +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i1 %r ; %r = extractvalue {i32, i1} %agg, 1 ret i1 %r } define float @extract_float({i32, float} %agg) { -; ALL-LABEL: 'extract_float' -; ALL-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, float } %agg, 1 -; ALL-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret float %r +; THROUGHPUT-LABEL: 'extract_float' +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, float } %agg, 1 +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret float %r +; +; LATENCY-LABEL: 'extract_float' +; LATENCY-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, float } %agg, 1 +; LATENCY-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret float %r +; +; CODESIZE-LABEL: 'extract_float' +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, float } %agg, 1 +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret float %r ; %r = extractvalue {i32, float} %agg, 1 ret float %r } define [42 x i42] @extract_array({i32, [42 x i42]} %agg) { -; ALL-LABEL: 'extract_array' -; ALL-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, [42 x i42] } %agg, 1 -; ALL-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret [42 x i42] %r +; THROUGHPUT-LABEL: 'extract_array' +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, [42 x i42] } %agg, 1 +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret [42 x i42] %r +; +; LATENCY-LABEL: 'extract_array' +; LATENCY-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, [42 x i42] } %agg, 1 +; LATENCY-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret [42 x i42] %r +; +; CODESIZE-LABEL: 'extract_array' +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, [42 x i42] } %agg, 1 +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret [42 x i42] %r ; %r = extractvalue {i32, [42 x i42]} %agg, 1 ret [42 x i42] %r } define <42 x i42> @extract_vector({i32, <42 x i42>} %agg) { -; ALL-LABEL: 'extract_vector' -; ALL-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, <42 x i42> } %agg, 1 -; ALL-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <42 x i42> %r +; THROUGHPUT-LABEL: 'extract_vector' +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, <42 x i42> } %agg, 1 +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <42 x i42> %r +; +; LATENCY-LABEL: 'extract_vector' +; LATENCY-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, <42 x i42> } %agg, 1 +; LATENCY-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <42 x i42> %r +; +; CODESIZE-LABEL: 'extract_vector' +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, <42 x i42> } %agg, 1 +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret <42 x i42> %r ; %r = extractvalue {i32, <42 x i42>} %agg, 1 ret <42 x i42> %r @@ -69,9 +125,17 @@ define <42 x i42> @extract_vector({i32, <42 x i42>} %agg) { %T1 = type { i32, float, <4 x i1> } define %T1 @extract_struct({i32, %T1} %agg) { -; ALL-LABEL: 'extract_struct' -; ALL-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, %T1 } %agg, 1 -; ALL-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret %T1 %r +; THROUGHPUT-LABEL: 'extract_struct' +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, %T1 } %agg, 1 +; THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret %T1 %r +; +; LATENCY-LABEL: 'extract_struct' +; LATENCY-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, %T1 } %agg, 1 +; LATENCY-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret %T1 %r +; +; CODESIZE-LABEL: 'extract_struct' +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r = extractvalue { i32, %T1 } %agg, 1 +; CODESIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret %T1 %r ; %r = extractvalue {i32, %T1} %agg, 1 ret %T1 %r diff --git a/llvm/test/Analysis/CostModel/AArch64/cast.ll b/llvm/test/Analysis/CostModel/AArch64/cast.ll index 24e514b870962c..2255f84f9ff4c8 100644 --- a/llvm/test/Analysis/CostModel/AArch64/cast.ll +++ b/llvm/test/Analysis/CostModel/AArch64/cast.ll @@ -267,7 +267,7 @@ define i32 @casts_no_users() { ; CHECK-NEXT: Cost Model: Found an estimated cost of 38 for instruction: %r247 = sitofp <16 x i16> undef to <16 x double> ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %r248 = uitofp <16 x i64> undef to <16 x double> ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %r249 = sitofp <16 x i64> undef to <16 x double> -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef ; %r0 = sext i1 undef to i8 %r1 = zext i1 undef to i8 @@ -609,7 +609,7 @@ define i32 @casts_with_users(i8 %a, i16 %b, i32 %c, i64 %d, i1 %e) { ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store i16 %r23, i16* undef ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store i32 %r24, i32* undef ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store i64 %r25, i64* undef -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 %r12 +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 %r12 ; %r0 = sext i8 %a to i16 %r1 = sext i8 %a to i32 @@ -683,7 +683,7 @@ define i32 @bitcasts() { ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = bitcast double undef to i64 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = bitcast half undef to i16 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = bitcast i16 undef to half -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef ; %a = bitcast i32 undef to i32 %b = bitcast float undef to float @@ -731,7 +731,7 @@ define i32 @load_extends() { ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v9 = zext <2 x i16> %loadv2i16 to <2 x i64> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v10 = sext <2 x i32> %loadv2i32 to <2 x i64> ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v11 = zext <2 x i32> %loadv2i32 to <2 x i64> -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef ; %loadi8 = load i8, i8* undef %loadi16 = load i16, i16* undef @@ -786,7 +786,7 @@ define i32 @store_truncs() { ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store i16 %r4, i16* undef ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %r5 = trunc i16 undef to i8 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store i8 %r5, i8* undef -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef ; %r0 = trunc i64 undef to i8 store i8 %r0, i8* undef diff --git a/llvm/test/Analysis/CostModel/AArch64/cmp.ll b/llvm/test/Analysis/CostModel/AArch64/cmp.ll index 7e8fc30141d688..c8512bb2664ceb 100644 --- a/llvm/test/Analysis/CostModel/AArch64/cmp.ll +++ b/llvm/test/Analysis/CostModel/AArch64/cmp.ll @@ -17,7 +17,7 @@ define i32 @cmps() { ; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 29 for instruction: %a10 = fcmp olt <8 x half> undef, undef ; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %a11 = fcmp oge <4 x float> undef, undef ; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %a12 = fcmp oge <2 x double> undef, undef -; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef +; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef ; ; CHECK-SIZE-LABEL: 'cmps' ; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %a0 = icmp slt i8 undef, undef diff --git a/llvm/test/Analysis/CostModel/AArch64/select.ll b/llvm/test/Analysis/CostModel/AArch64/select.ll index 6ec4cff5cf84b6..25af9af1c6e938 100644 --- a/llvm/test/Analysis/CostModel/AArch64/select.ll +++ b/llvm/test/Analysis/CostModel/AArch64/select.ll @@ -18,7 +18,7 @@ define void @select() { ; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %v16a = select <4 x i1> undef, <4 x i64> undef, <4 x i64> undef ; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %v16b = select <8 x i1> undef, <8 x i64> undef, <8 x i64> undef ; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %v16c = select <16 x i1> undef, <16 x i64> undef, <16 x i64> undef -; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; CHECK-THROUGHPUT-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void ; ; CHECK-SIZE-LABEL: 'select' ; CHECK-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v1 = select i1 undef, i8 undef, i8 undef diff --git a/llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll b/llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll index 61f28cbea5af50..355ed520575fb0 100644 --- a/llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll +++ b/llvm/test/Analysis/CostModel/AArch64/shuffle-broadcast.ll @@ -14,7 +14,7 @@ define void @broadcast() { ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v15 = shufflevector <4 x i32> undef, <4 x i32> undef, <4 x i32> zeroinitializer ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v16 = shufflevector <2 x float> undef, <2 x float> undef, <2 x i32> zeroinitializer ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v17 = shufflevector <4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void ; %v7 = shufflevector <2 x i8> undef, <2 x i8>undef, <2 x i32> zeroinitializer %v8 = shufflevector <4 x i8> undef, <4 x i8>undef, <4 x i32> zeroinitializer diff --git a/llvm/test/Analysis/CostModel/AArch64/store.ll b/llvm/test/Analysis/CostModel/AArch64/store.ll index 8e23268bada7fc..63741756fa0fd3 100644 --- a/llvm/test/Analysis/CostModel/AArch64/store.ll +++ b/llvm/test/Analysis/CostModel/AArch64/store.ll @@ -27,7 +27,7 @@ define void @getMemoryOpCost() { ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store <4 x i8> undef, <4 x i8>* undef, align 4 ; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %1 = load <2 x i8>, <2 x i8>* undef, align 2 ; CHECK-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %2 = load <4 x i8>, <4 x i8>* undef, align 4 -; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void ; ; SIZE-LABEL: 'getMemoryOpCost' ; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store <4 x i64> undef, <4 x i64>* undef, align 4 @@ -69,7 +69,7 @@ define void @getMemoryOpCost() { ; SLOW_MISALIGNED_128_STORE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store <4 x i8> undef, <4 x i8>* undef, align 4 ; SLOW_MISALIGNED_128_STORE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %1 = load <2 x i8>, <2 x i8>* undef, align 2 ; SLOW_MISALIGNED_128_STORE-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %2 = load <4 x i8>, <4 x i8>* undef, align 4 -; SLOW_MISALIGNED_128_STORE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void +; SLOW_MISALIGNED_128_STORE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void ; store <4 x i64> undef, <4 x i64> * undef store <8 x i32> undef, <8 x i32> * undef diff --git a/llvm/test/Assembler/getelementptr_vscale_struct.ll b/llvm/test/Assembler/getelementptr_vscale_struct.ll new file mode 100644 index 00000000000000..c6b592c0bf8bcf --- /dev/null +++ b/llvm/test/Assembler/getelementptr_vscale_struct.ll @@ -0,0 +1,10 @@ +; RUN: not llvm-as < %s >/dev/null 2> %t +; RUN: FileCheck %s < %t +; Test that a scalable vector struct index is rejected. + +; CHECK: invalid getelementptr indices + +define @test7( %a) { + %w = getelementptr {i32, i32}, %a, zeroinitializer, zeroinitializer + ret %w +} diff --git a/llvm/test/Bitcode/vscale-shuffle.ll b/llvm/test/Bitcode/vscale-shuffle.ll new file mode 100644 index 00000000000000..3f36209c7aaf50 --- /dev/null +++ b/llvm/test/Bitcode/vscale-shuffle.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llvm-dis -disable-output +; RUN: verify-uselistorder < %s + +define void @f() { + %l = call @l( shufflevector ( insertelement ( undef, i1 true, i32 0), undef, zeroinitializer)) + %i = add undef, shufflevector ( insertelement ( undef, i64 1, i32 0), undef, zeroinitializer) + unreachable +} + +declare @l() diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt index 7be7ea9ac5b4a9..915114dfa3f913 100644 --- a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt +++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt @@ -186,3 +186,47 @@ # CHECK: vclrrb 1, 4, 3 0x10 0x24 0x19 0xcd + +# Boundary conditions of 8RR_DForm_IMM32_XT6's immediates +# CHECK: xxspltiw 63, 4294901760 +0x05 0x00 0xff 0xff 0x83 0xe7 0x00 0x00 + +# CHECK: xxspltiw 63, 65535 +0x05 0x00 0x00 0x00 0x83 0xe7 0xff 0xff + +# CHECK: xxspltiw 63, 4294967295 +0x05 0x00 0xff 0xff 0x83 0xe7 0xff 0xff + +# CHECK: xxspltidp 63, 4294967295 +0x05 0x00 0xff 0xff 0x83 0xe5 0xff 0xff + +# Boundary conditions of 8RR_DForm_IMM32_XT6_IX's immediates +# CHECK: xxsplti32dx 63, 1, 4294901760 +0x05 0x00 0xff 0xff 0x83 0xe3 0x00 0x00 + +# CHECK: xxsplti32dx 63, 1, 65535 +0x05 0x00 0x00 0x00 0x83 0xe3 0xff 0xff + +# CHECK: xxsplti32dx 63, 1, 4294967295 +0x05 0x00 0xff 0xff 0x83 0xe3 0xff 0xff + +# CHECK: xxpermx 6, 63, 21, 34, 2 +0x05 0x00 0x00 0x02 0x88 0xdf 0xa8 0x8c + +# CHECK: xxblendvb 6, 63, 21, 34 +0x05 0x00 0x00 0x00 0x84 0xdf 0xa8 0x8c + +# CHECK: xxblendvh 6, 63, 21, 34 +0x05 0x00 0x00 0x00 0x84 0xdf 0xa8 0x9c + +# CHECK: xxblendvw 6, 63, 21, 34 +0x05 0x00 0x00 0x00 0x84 0xdf 0xa8 0xac + +# CHECK: xxblendvd 6, 63, 21, 34 +0x05 0x00 0x00 0x00 0x84 0xdf 0xa8 0xbc + +# CHECK: vsldbi 2, 3, 4, 5 +0x10 0x43 0x21 0x56 + +# CHECK: vsrdbi 2, 3, 4, 5 +0x10 0x43 0x23 0x56 diff --git a/llvm/test/MC/MachO/AArch64/arm-darwin-version-min-load-command.s b/llvm/test/MC/MachO/AArch64/arm-darwin-version-min-load-command.s new file mode 100644 index 00000000000000..0af61fbf4d7cad --- /dev/null +++ b/llvm/test/MC/MachO/AArch64/arm-darwin-version-min-load-command.s @@ -0,0 +1,73 @@ +// RUN: llvm-mc -triple arm64-apple-macos10.10.2 %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-MACOS-ARM64 +// RUN: llvm-mc -triple arm64-apple-macos11 %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-MACOS-ARM64 +// RUN: llvm-mc -triple arm64-apple-macos11.1 %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-MACOS-ARM64_1 +// RUN: llvm-mc -triple arm64-apple-ios13.0-macabi %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-MACCATALYST-ARM64 +// RUN: llvm-mc -triple arm64-apple-ios14.1-macabi %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-MACCATALYST-ARM64_1 + +// RUN: llvm-mc -triple arm64-apple-ios10-simulator %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-IOSSIM2 +// RUN: llvm-mc -triple arm64-apple-ios13-simulator %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-IOSSIM2 +// RUN: llvm-mc -triple arm64-apple-ios14-simulator %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-IOSSIM2 +// RUN: llvm-mc -triple arm64-apple-ios14.1-simulator %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-IOSSIM3 +// RUN: llvm-mc -triple arm64-apple-tvos10-simulator %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-TVOSSIM2 +// RUN: llvm-mc -triple arm64-apple-watchos3-simulator %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-WATCHOSSIM2 + +// CHECK-BUILD-IOSSIM2: cmd LC_BUILD_VERSION +// CHECK-BUILD-IOSSIM2-NEXT: cmdsize 24 +// CHECK-BUILD-IOSSIM2-NEXT: platform iossim +// CHECK-BUILD-IOSSIM2-NEXT: sdk n/a +// CHECK-BUILD-IOSSIM2-NEXT: minos 14.0 +// CHECK-BUILD-IOSSIM2-NEXT: ntools 0 +// CHECK-BUILD-IOSSIM2-NOT: LC_VERSION_MIN + +// CHECK-BUILD-IOSSIM3: cmd LC_BUILD_VERSION +// CHECK-BUILD-IOSSIM3-NEXT: cmdsize 24 +// CHECK-BUILD-IOSSIM3-NEXT: platform iossim +// CHECK-BUILD-IOSSIM3-NEXT: sdk n/a +// CHECK-BUILD-IOSSIM3-NEXT: minos 14.1 +// CHECK-BUILD-IOSSIM3-NEXT: ntools 0 +// CHECK-BUILD-IOSSIM3-NOT: LC_VERSION_MIN + +// CHECK-BUILD-TVOSSIM2: cmd LC_BUILD_VERSION +// CHECK-BUILD-TVOSSIM2-NEXT: cmdsize 24 +// CHECK-BUILD-TVOSSIM2-NEXT: platform tvossim +// CHECK-BUILD-TVOSSIM2-NEXT: sdk n/a +// CHECK-BUILD-TVOSSIM2-NEXT: minos 14.0 +// CHECK-BUILD-TVOSSIM2-NEXT: ntools 0 +// CHECK-BUILD-TVOSSIM2-NOT: LC_VERSION_MIN + +// CHECK-BUILD-WATCHOSSIM2: cmd LC_BUILD_VERSION +// CHECK-BUILD-WATCHOSSIM2-NEXT: cmdsize 24 +// CHECK-BUILD-WATCHOSSIM2-NEXT: platform watchossim +// CHECK-BUILD-WATCHOSSIM2-NEXT: sdk n/a +// CHECK-BUILD-WATCHOSSIM2-NEXT: minos 7.0 +// CHECK-BUILD-WATCHOSSIM2-NEXT: ntools 0 +// CHECK-BUILD-WATCHOSSIM2-NOT: LC_VERSION_MIN + +// CHECK-BUILD-MACOS-ARM64: cmd LC_BUILD_VERSION +// CHECK-BUILD-MACOS-ARM64-NEXT: cmdsize 24 +// CHECK-BUILD-MACOS-ARM64-NEXT: platform macos +// CHECK-BUILD-MACOS-ARM64-NEXT: sdk n/a +// CHECK-BUILD-MACOS-ARM64-NEXT: minos 11.0 +// CHECK-BUILD-MACOS-ARM64-NEXT: ntools 0 +// CHECK-BUILD-MACOS-ARM64-NOT: LC_VERSION_MIN + +// CHECK-BUILD-MACOS-ARM64_1: cmd LC_BUILD_VERSION +// CHECK-BUILD-MACOS-ARM64_1-NEXT: cmdsize 24 +// CHECK-BUILD-MACOS-ARM64_1-NEXT: platform macos +// CHECK-BUILD-MACOS-ARM64_1-NEXT: sdk n/a +// CHECK-BUILD-MACOS-ARM64_1-NEXT: minos 11.1 +// CHECK-BUILD-MACOS-ARM64_1-NEXT: ntools 0 + +// CHECK-MACCATALYST-ARM64: cmd LC_BUILD_VERSION +// CHECK-MACCATALYST-ARM64-NEXT: cmdsize 24 +// CHECK-MACCATALYST-ARM64-NEXT: platform macCatalyst +// CHECK-MACCATALYST-ARM64-NEXT: sdk n/a +// CHECK-MACCATALYST-ARM64-NEXT: minos 14.0 +// CHECK-MACCATALYST-ARM64-NEXT: ntools 0 + +// CHECK-MACCATALYST-ARM64_1: cmd LC_BUILD_VERSION +// CHECK-MACCATALYST-ARM64_1-NEXT: cmdsize 24 +// CHECK-MACCATALYST-ARM64_1-NEXT: platform macCatalyst +// CHECK-MACCATALYST-ARM64_1-NEXT: sdk n/a +// CHECK-MACCATALYST-ARM64_1-NEXT: minos 14.1 +// CHECK-MACCATALYST-ARM64_1-NEXT: ntools 0 diff --git a/llvm/test/MC/MachO/darwin-sdk-version.ll b/llvm/test/MC/MachO/darwin-sdk-version.ll index bb3db563370201..df67b69001ccc7 100644 --- a/llvm/test/MC/MachO/darwin-sdk-version.ll +++ b/llvm/test/MC/MachO/darwin-sdk-version.ll @@ -1,7 +1,7 @@ ; RUN: llc %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s ; RUN: llc %s -filetype=asm -o - | FileCheck --check-prefix=ASM %s -target triple = "x86_64-apple-macos10.14"; +target triple = "x86_64-apple-macos10.13"; !llvm.module.flags = !{!0}; !0 = !{i32 2, !"SDK Version", [3 x i32] [ i32 10, i32 14, i32 2 ] }; @@ -12,7 +12,7 @@ entry: ; CHECK: cmd LC_VERSION_MIN_MACOSX ; CHECK-NEXT: cmdsize 16 -; CHECK-NEXT: version 10.14 +; CHECK-NEXT: version 10.13 ; CHECK-NEXT: sdk 10.14.2 -; ASM: .macosx_version_min 10, 14 sdk_version 10, 14, 2 +; ASM: .macosx_version_min 10, 13 sdk_version 10, 14, 2 diff --git a/llvm/test/MC/MachO/darwin-version-min-load-command.s b/llvm/test/MC/MachO/darwin-version-min-load-command.s index ad43bd7235668d..6e1b4c20a67007 100644 --- a/llvm/test/MC/MachO/darwin-version-min-load-command.s +++ b/llvm/test/MC/MachO/darwin-version-min-load-command.s @@ -3,6 +3,14 @@ // RUN: llvm-mc -triple x86_64-apple-darwin %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-DARWIN // RUN: llvm-mc -triple x86_64-apple-ios13.0-macabi %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-MACCATALYST +// RUN: llvm-mc -triple x86_64-apple-macos10.14 %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-MACOS +// RUN: llvm-mc -triple x86_64-apple-ios12 %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-IOS +// RUN: llvm-mc -triple x86_64-apple-tvos12 %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-TVOS +// RUN: llvm-mc -triple x86_64-apple-watchos5 %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-WATCHOS +// RUN: llvm-mc -triple x86_64-apple-ios12-simulator %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-IOSSIM +// RUN: llvm-mc -triple x86_64-apple-tvos12-simulator %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-TVOSSIM +// RUN: llvm-mc -triple x86_64-apple-watchos5-simulator %s -filetype=obj -o - | llvm-objdump --macho --private-headers - | FileCheck %s --check-prefix=CHECK-BUILD-WATCHOSSIM + // Test version-min load command should be inferred from triple and should always be generated on Darwin // CHECK: Load command // CHECK: cmd LC_VERSION_MIN_MACOSX @@ -41,3 +49,60 @@ // CHECK-MACCATALYST-NEXT: sdk n/a // CHECK-MACCATALYST-NEXT: minos 13.0 // CHECK-MACCATALYST-NEXT: ntools 0 + +// CHECK-BUILD-MACOS: cmd LC_BUILD_VERSION +// CHECK-BUILD-MACOS-NEXT: cmdsize 24 +// CHECK-BUILD-MACOS-NEXT: platform macos +// CHECK-BUILD-MACOS-NEXT: sdk n/a +// CHECK-BUILD-MACOS-NEXT: minos 10.14 +// CHECK-BUILD-MACOS-NEXT: ntools 0 +// CHECK-BUILD-MACOS-NOT: LC_VERSION_MIN + +// CHECK-BUILD-IOS: cmd LC_BUILD_VERSION +// CHECK-BUILD-IOS-NEXT: cmdsize 24 +// CHECK-BUILD-IOS-NEXT: platform ios +// CHECK-BUILD-IOS-NEXT: sdk n/a +// CHECK-BUILD-IOS-NEXT: minos 12.0 +// CHECK-BUILD-IOS-NEXT: ntools 0 +// CHECK-BUILD-IOS-NOT: LC_VERSION_MIN + +// CHECK-BUILD-TVOS: cmd LC_BUILD_VERSION +// CHECK-BUILD-TVOS-NEXT: cmdsize 24 +// CHECK-BUILD-TVOS-NEXT: platform tvos +// CHECK-BUILD-TVOS-NEXT: sdk n/a +// CHECK-BUILD-TVOS-NEXT: minos 12.0 +// CHECK-BUILD-TVOS-NEXT: ntools 0 +// CHECK-BUILD-TVOS-NOT: LC_VERSION_MIN + +// CHECK-BUILD-WATCHOS: cmd LC_BUILD_VERSION +// CHECK-BUILD-WATCHOS-NEXT: cmdsize 24 +// CHECK-BUILD-WATCHOS-NEXT: platform watchos +// CHECK-BUILD-WATCHOS-NEXT: sdk n/a +// CHECK-BUILD-WATCHOS-NEXT: minos 5.0 +// CHECK-BUILD-WATCHOS-NEXT: ntools 0 +// CHECK-BUILD-WATCHOS-NOT: LC_VERSION_MIN + +// CHECK-BUILD-IOSSIM: cmd LC_BUILD_VERSION +// CHECK-BUILD-IOSSIM-NEXT: cmdsize 24 +// CHECK-BUILD-IOSSIM-NEXT: platform iossim +// CHECK-BUILD-IOSSIM-NEXT: sdk n/a +// CHECK-BUILD-IOSSIM-NEXT: minos 12.0 +// CHECK-BUILD-IOSSIM-NEXT: ntools 0 +// CHECK-BUILD-IOSSIM-NOT: LC_VERSION_MIN + +// CHECK-BUILD-TVOSSIM: cmd LC_BUILD_VERSION +// CHECK-BUILD-TVOSSIM-NEXT: cmdsize 24 +// CHECK-BUILD-TVOSSIM-NEXT: platform tvossim +// CHECK-BUILD-TVOSSIM-NEXT: sdk n/a +// CHECK-BUILD-TVOSSIM-NEXT: minos 12.0 +// CHECK-BUILD-TVOSSIM-NEXT: ntools 0 +// CHECK-BUILD-TVOSSIM-NOT: LC_VERSION_MIN + +// CHECK-BUILD-WATCHOSSIM: cmd LC_BUILD_VERSION +// CHECK-BUILD-WATCHOSSIM-NEXT: cmdsize 24 +// CHECK-BUILD-WATCHOSSIM-NEXT: platform watchossim +// CHECK-BUILD-WATCHOSSIM-NEXT: sdk n/a +// CHECK-BUILD-WATCHOSSIM-NEXT: minos 5.0 +// CHECK-BUILD-WATCHOSSIM-NEXT: ntools 0 +// CHECK-BUILD-WATCHOSSIM-NOT: LC_VERSION_MIN + diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s b/llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s index 13fa0f47137781..6d17147c3d6e51 100644 --- a/llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s +++ b/llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s @@ -279,3 +279,81 @@ # CHECK-BE: vclrrb 1, 4, 3 # encoding: [0x10,0x24,0x19,0xcd] # CHECK-LE: vclrrb 1, 4, 3 # encoding: [0xcd,0x19,0x24,0x10] vclrrb 1, 4, 3 +# Boundary conditions of 8RR_DForm_IMM32_XT6's immediates +# CHECK-BE: xxspltiw 63, 4294901760 # encoding: [0x05,0x00,0xff,0xff, +# CHECK-BE-SAME: 0x83,0xe7,0x00,0x00] +# CHECK-LE: xxspltiw 63, 4294901760 # encoding: [0xff,0xff,0x00,0x05, +# CHECK-LE-SAME: 0x00,0x00,0xe7,0x83] + xxspltiw 63, 4294901760 +# CHECK-BE: xxspltiw 63, 65535 # encoding: [0x05,0x00,0x00,0x00, +# CHECK-BE-SAME: 0x83,0xe7,0xff,0xff] +# CHECK-LE: xxspltiw 63, 65535 # encoding: [0x00,0x00,0x00,0x05, +# CHECK-LE-SAME: 0xff,0xff,0xe7,0x83] + xxspltiw 63, 65535 +# CHECK-BE: xxspltiw 63, 4294967295 # encoding: [0x05,0x00,0xff,0xff, +# CHECK-BE-SAME: 0x83,0xe7,0xff,0xff] +# CHECK-LE: xxspltiw 63, 4294967295 # encoding: [0xff,0xff,0x00,0x05, +# CHECK-LE-SAME: 0xff,0xff,0xe7,0x83] + xxspltiw 63, 4294967295 +# CHECK-BE: xxspltiw 63, -1 # encoding: [0x05,0x00,0xff,0xff, +# CHECK-BE-SAME: 0x83,0xe7,0xff,0xff] +# CHECK-LE: xxspltiw 63, -1 # encoding: [0xff,0xff,0x00,0x05, +# CHECK-LE-SAME: 0xff,0xff,0xe7,0x83] + xxspltiw 63, -1 +# CHECK-BE: xxspltidp 63, 4294967295 # encoding: [0x05,0x00,0xff,0xff, +# CHECK-BE-SAME: 0x83,0xe5,0xff,0xff] +# CHECK-LE: xxspltidp 63, 4294967295 # encoding: [0xff,0xff,0x00,0x05, +# CHECK-LE-SAME: 0xff,0xff,0xe5,0x83] + xxspltidp 63, 4294967295 +# Boundary conditions of 8RR_DForm_IMM32_XT6_IX's immediates +# CHECK-BE: xxsplti32dx 63, 1, 4294901760 # encoding: [0x05,0x00,0xff,0xff, +# CHECK-BE-SAME: 0x83,0xe3,0x00,0x00] +# CHECK-LE: xxsplti32dx 63, 1, 4294901760 # encoding: [0xff,0xff,0x00,0x05, +# CHECK-LE-SAME: 0x00,0x00,0xe3,0x83] + xxsplti32dx 63, 1, 4294901760 +# CHECK-BE: xxsplti32dx 63, 1, 65535 # encoding: [0x05,0x00,0x00,0x00, +# CHECK-BE-SAME: 0x83,0xe3,0xff,0xff] +# CHECK-LE: xxsplti32dx 63, 1, 65535 # encoding: [0x00,0x00,0x00,0x05, +# CHECK-LE-SAME: 0xff,0xff,0xe3,0x83] + xxsplti32dx 63, 1, 65535 +# CHECK-BE: xxsplti32dx 63, 1, 4294967295 # encoding: [0x05,0x00,0xff,0xff, +# CHECK-BE-SAME: 0x83,0xe3,0xff,0xff] +# CHECK-LE: xxsplti32dx 63, 1, 4294967295 # encoding: [0xff,0xff,0x00,0x05, +# CHECK-LE-SAME: 0xff,0xff,0xe3,0x83] + xxsplti32dx 63, 1, 4294967295 +# CHECK-BE: xxsplti32dx 63, 1, -1 # encoding: [0x05,0x00,0xff,0xff, +# CHECK-BE-SAME: 0x83,0xe3,0xff,0xff] +# CHECK-LE: xxsplti32dx 63, 1, -1 # encoding: [0xff,0xff,0x00,0x05, +# CHECK-LE-SAME: 0xff,0xff,0xe3,0x83] + xxsplti32dx 63, 1, -1 +# CHECK-BE: xxpermx 6, 63, 21, 34, 2 # encoding: [0x05,0x00,0x00,0x02, +# CHECK-BE-SAME: 0x88,0xdf,0xa8,0x8c] +# CHECK-LE: xxpermx 6, 63, 21, 34, 2 # encoding: [0x02,0x00,0x00,0x05, +# CHECK-LE-SAME: 0x8c,0xa8,0xdf,0x88] + xxpermx 6, 63, 21, 34, 2 +# CHECK-BE: xxblendvb 6, 63, 21, 34 # encoding: [0x05,0x00,0x00,0x00, +# CHECK-BE-SAME: 0x84,0xdf,0xa8,0x8c] +# CHECK-LE: xxblendvb 6, 63, 21, 34 # encoding: [0x00,0x00,0x00,0x05, +# CHECK-LE-SAME: 0x8c,0xa8,0xdf,0x84] + xxblendvb 6, 63, 21, 34 +# CHECK-BE: xxblendvh 6, 63, 21, 34 # encoding: [0x05,0x00,0x00,0x00, +# CHECK-BE-SAME: 0x84,0xdf,0xa8,0x9c] +# CHECK-LE: xxblendvh 6, 63, 21, 34 # encoding: [0x00,0x00,0x00,0x05, +# CHECK-LE-SAME: 0x9c,0xa8,0xdf,0x84] + xxblendvh 6, 63, 21, 34 +# CHECK-BE: xxblendvw 6, 63, 21, 34 # encoding: [0x05,0x00,0x00,0x00, +# CHECK-BE-SAME: 0x84,0xdf,0xa8,0xac] +# CHECK-LE: xxblendvw 6, 63, 21, 34 # encoding: [0x00,0x00,0x00,0x05, +# CHECK-LE-SAME: 0xac,0xa8,0xdf,0x84] + xxblendvw 6, 63, 21, 34 +# CHECK-BE: xxblendvd 6, 63, 21, 34 # encoding: [0x05,0x00,0x00,0x00, +# CHECK-BE-SAME: 0x84,0xdf,0xa8,0xbc] +# CHECK-LE: xxblendvd 6, 63, 21, 34 # encoding: [0x00,0x00,0x00,0x05, +# CHECK-LE-SAME: 0xbc,0xa8,0xdf,0x84] + xxblendvd 6, 63, 21, 34 +# CHECK-BE: vsldbi 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x56] +# CHECK-LE: vsldbi 2, 3, 4, 5 # encoding: [0x56,0x21,0x43,0x10] + vsldbi 2, 3, 4, 5 +# CHECK-BE: vsrdbi 2, 3, 4, 5 # encoding: [0x10,0x43,0x23,0x56] +# CHECK-LE: vsrdbi 2, 3, 4, 5 # encoding: [0x56,0x23,0x43,0x10] + vsrdbi 2, 3, 4, 5 diff --git a/llvm/test/TableGen/directive1.td b/llvm/test/TableGen/directive1.td index f32c202fb5829c..19fe218c4fa113 100644 --- a/llvm/test/TableGen/directive1.td +++ b/llvm/test/TableGen/directive1.td @@ -1,9 +1,10 @@ -// RUN: llvm-tblgen -gen-directive-decls -I %p/../../include %s | FileCheck %s +// RUN: llvm-tblgen -gen-directive-decl -I %p/../../include %s | FileCheck -match-full-lines %s +// RUN: llvm-tblgen -gen-directive-impl -I %p/../../include %s | FileCheck -match-full-lines %s -check-prefix=IMPL include "llvm/Frontend/Directive/DirectiveBase.td" def TestDirectiveLanguage : DirectiveLanguage { - let name = "tdl"; + let name = "Tdl"; let cppNamespace = "tdl"; let directivePrefix = "TDLD_"; @@ -13,30 +14,85 @@ def TestDirectiveLanguage : DirectiveLanguage { } def TDLC_ClauseA : Clause<"clausea"> {} -def TDLC_ClauseB : Clause<"clauseb"> {} +def TDLC_ClauseB : Clause<"clauseb"> { + let isDefault = 1; +} def TDL_DirA : Directive<"dira"> { let allowedClauses = [TDLC_ClauseA, TDLC_ClauseB]; + let isDefault = 1; } -// CHECK: #ifndef LLVM_tdl_INC -// CHECK-NEXT: #define LLVM_tdl_INC -// CHECK-NEXT: #include "llvm/ADT/BitmaskEnum.h" -// CHECK-NEXT: namespace llvm { -// CHECK-NEXT: namespace tdl { -// CHECK-NEXT: LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE(); -// CHECK-NEXT: enum class Directive { -// CHECK-NEXT: TDLD_dira, -// CHECK-NEXT: } -// CHECK-NEXT: static constexpr std::size_t Directive_enumSize = 1; -// CHECK-NEXT: enum class Clause { -// CHECK-NEXT: TDLC_clausea, -// CHECK-NEXT: TDLC_clauseb, -// CHECK-NEXT: } -// CHECK-NEXT: static constexpr std::size_t Clause_enumSize = 2; -// CHECK-NEXT: constexpr auto TDLD_dira = tdl::Directive::TDLD_dira; -// CHECK-NEXT: constexpr auto TDLC_clausea = tdl::Clause::TDLC_clausea; -// CHECK-NEXT: constexpr auto TDLC_clauseb = tdl::Clause::TDLC_clauseb; -// CHECK-NEXT: } -// CHECK-NEXT: } -// CHECK-NEXT: #endif +// CHECK: #ifndef LLVM_Tdl_INC +// CHECK-NEXT: #define LLVM_Tdl_INC +// CHECK-EMPTY: +// CHECK-NEXT: #include "llvm/ADT/BitmaskEnum.h" +// CHECK-EMPTY: +// CHECK-NEXT: namespace llvm { +// CHECK-NEXT: class StringRef; +// CHECK-NEXT: namespace tdl { +// CHECK-EMPTY: +// CHECK-NEXT: LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE(); +// CHECK-EMPTY: +// CHECK-NEXT: enum class Directive { +// CHECK-NEXT: TDLD_dira, +// CHECK-NEXT: }; +// CHECK-EMPTY: +// CHECK-NEXT: static constexpr std::size_t Directive_enumSize = 1; +// CHECK-EMPTY: +// CHECK-NEXT: constexpr auto TDLD_dira = llvm::tdl::Directive::TDLD_dira; +// CHECK-EMPTY: +// CHECK-NEXT: enum class Clause { +// CHECK-NEXT: TDLC_clausea, +// CHECK-NEXT: TDLC_clauseb, +// CHECK-NEXT: }; +// CHECK-EMPTY: +// CHECK-NEXT: static constexpr std::size_t Clause_enumSize = 2; +// CHECK-EMPTY: +// CHECK-NEXT: constexpr auto TDLC_clausea = llvm::tdl::Clause::TDLC_clausea; +// CHECK-NEXT: constexpr auto TDLC_clauseb = llvm::tdl::Clause::TDLC_clauseb; +// CHECK-EMPTY: +// CHECK-NEXT: // Enumeration helper functions +// CHECK-NEXT: Directive getTdlDirectiveKind(llvm::StringRef Str); +// CHECK-EMPTY: +// CHECK-NEXT: llvm::StringRef getTdlDirectiveName(Directive D); +// CHECK-EMPTY: +// CHECK-NEXT: Clause getTdlClauseKind(llvm::StringRef Str); +// CHECK-EMPTY: +// CHECK-NEXT: llvm::StringRef getTdlClauseName(Clause C); +// CHECK-EMPTY: +// CHECK-NEXT: } // namespace tdl +// CHECK-NEXT: } // namespace llvm +// CHECK-NEXT: #endif // LLVM_Tdl_INC + + +// IMPL: Directive llvm::tdl::getTdlDirectiveKind(llvm::StringRef Str) { +// IMPL-NEXT: return llvm::StringSwitch(Str) +// IMPL-NEXT: .Case("dira",TDLD_dira) +// IMPL-NEXT: .Default(TDLD_dira); +// IMPL-NEXT: } +// IMPL-EMPTY: +// IMPL-NEXT: llvm::StringRef llvm::tdl::getTdlDirectiveName(Directive Kind) { +// IMPL-NEXT: switch (Kind) { +// IMPL-NEXT: case TDLD_dira: +// IMPL-NEXT: return "dira"; +// IMPL-NEXT: } +// IMPL-NEXT: llvm_unreachable("Invalid Tdl Directive kind"); +// IMPL-NEXT: } +// IMPL-EMPTY: +// IMPL-NEXT: Clause llvm::tdl::getTdlClauseKind(llvm::StringRef Str) { +// IMPL-NEXT: return llvm::StringSwitch(Str) +// IMPL-NEXT: .Case("clausea",TDLC_clausea) +// IMPL-NEXT: .Case("clauseb",TDLC_clauseb) +// IMPL-NEXT: .Default(TDLC_clauseb); +// IMPL-NEXT: } +// IMPL-EMPTY: +// IMPL-NEXT: llvm::StringRef llvm::tdl::getTdlClauseName(Clause Kind) { +// IMPL-NEXT: switch (Kind) { +// IMPL-NEXT: case TDLC_clausea: +// IMPL-NEXT: return "clausea"; +// IMPL-NEXT: case TDLC_clauseb: +// IMPL-NEXT: return "clauseb"; +// IMPL-NEXT: } +// IMPL-NEXT: llvm_unreachable("Invalid Tdl Clause kind"); +// IMPL-NEXT: } diff --git a/llvm/test/TableGen/directive2.td b/llvm/test/TableGen/directive2.td index 99823da1a59c69..545dd251fdaf34 100644 --- a/llvm/test/TableGen/directive2.td +++ b/llvm/test/TableGen/directive2.td @@ -1,35 +1,89 @@ -// RUN: llvm-tblgen -gen-directive-decls -I %p/../../include %s | FileCheck %s +// RUN: llvm-tblgen -gen-directive-decl -I %p/../../include %s | FileCheck -match-full-lines %s +// RUN: llvm-tblgen -gen-directive-impl -I %p/../../include %s | FileCheck -match-full-lines %s -check-prefix=IMPL include "llvm/Frontend/Directive/DirectiveBase.td" def TestDirectiveLanguage : DirectiveLanguage { - let name = "tdl"; + let name = "Tdl"; let cppNamespace = "tdl"; let directivePrefix = "TDLD_"; let clausePrefix = "TDLC_"; } -def TDLC_ClauseA : Clause<"clausea"> {} -def TDLC_ClauseB : Clause<"clauseb"> {} +def TDLC_ClauseA : Clause<"clausea"> { + let isImplicit = 1; +} +def TDLC_ClauseB : Clause<"clauseb"> { + let isDefault = 1; +} def TDL_DirA : Directive<"dira"> { let allowedClauses = [TDLC_ClauseA, TDLC_ClauseB]; + let isDefault = 1; } -// CHECK: #ifndef LLVM_tdl_INC -// CHECK-NEXT: #define LLVM_tdl_INC -// CHECK-NEXT: namespace llvm { -// CHECK-NEXT: namespace tdl { -// CHECK-NEXT: enum class Directive { -// CHECK-NEXT: TDLD_dira, -// CHECK-NEXT: } -// CHECK-NEXT: static constexpr std::size_t Directive_enumSize = 1; -// CHECK-NEXT: enum class Clause { -// CHECK-NEXT: TDLC_clausea, -// CHECK-NEXT: TDLC_clauseb, -// CHECK-NEXT: } -// CHECK-NEXT: static constexpr std::size_t Clause_enumSize = 2; -// CHECK-NEXT: } -// CHECK-NEXT: } -// CHECK-NEXT: #endif +// CHECK: #ifndef LLVM_Tdl_INC +// CHECK-NEXT: #define LLVM_Tdl_INC +// CHECK-EMPTY: +// CHECK-NEXT: namespace llvm { +// CHECK-NEXT: class StringRef; +// CHECK-NEXT: namespace tdl { +// CHECK-EMPTY: +// CHECK-NEXT: enum class Directive { +// CHECK-NEXT: TDLD_dira, +// CHECK-NEXT: }; +// CHECK-EMPTY: +// CHECK-NEXT: static constexpr std::size_t Directive_enumSize = 1; +// CHECK-EMPTY: +// CHECK-NEXT: enum class Clause { +// CHECK-NEXT: TDLC_clausea, +// CHECK-NEXT: TDLC_clauseb, +// CHECK-NEXT: }; +// CHECK-EMPTY: +// CHECK-NEXT: static constexpr std::size_t Clause_enumSize = 2; +// CHECK-EMPTY: +// CHECK-NEXT: // Enumeration helper functions +// CHECK-NEXT: Directive getTdlDirectiveKind(llvm::StringRef Str); +// CHECK-EMPTY: +// CHECK-NEXT: llvm::StringRef getTdlDirectiveName(Directive D); +// CHECK-EMPTY: +// CHECK-NEXT: Clause getTdlClauseKind(llvm::StringRef Str); +// CHECK-EMPTY: +// CHECK-NEXT: llvm::StringRef getTdlClauseName(Clause C); +// CHECK-EMPTY: +// CHECK-NEXT: } // namespace tdl +// CHECK-NEXT: } // namespace llvm +// CHECK-NEXT: #endif // LLVM_Tdl_INC + + +// IMPL: Directive llvm::tdl::getTdlDirectiveKind(llvm::StringRef Str) { +// IMPL-NEXT: return llvm::StringSwitch(Str) +// IMPL-NEXT: .Case("dira",TDLD_dira) +// IMPL-NEXT: .Default(TDLD_dira); +// IMPL-NEXT: } +// IMPL-EMPTY: +// IMPL-NEXT: llvm::StringRef llvm::tdl::getTdlDirectiveName(Directive Kind) { +// IMPL-NEXT: switch (Kind) { +// IMPL-NEXT: case TDLD_dira: +// IMPL-NEXT: return "dira"; +// IMPL-NEXT: } +// IMPL-NEXT: llvm_unreachable("Invalid Tdl Directive kind"); +// IMPL-NEXT: } +// IMPL-EMPTY: +// IMPL-NEXT: Clause llvm::tdl::getTdlClauseKind(llvm::StringRef Str) { +// IMPL-NEXT: return llvm::StringSwitch(Str) +// IMPL-NEXT: .Case("clausea",TDLC_clauseb) +// IMPL-NEXT: .Case("clauseb",TDLC_clauseb) +// IMPL-NEXT: .Default(TDLC_clauseb); +// IMPL-NEXT: } +// IMPL-EMPTY: +// IMPL-NEXT: llvm::StringRef llvm::tdl::getTdlClauseName(Clause Kind) { +// IMPL-NEXT: switch (Kind) { +// IMPL-NEXT: case TDLC_clausea: +// IMPL-NEXT: return "clausea"; +// IMPL-NEXT: case TDLC_clauseb: +// IMPL-NEXT: return "clauseb"; +// IMPL-NEXT: } +// IMPL-NEXT: llvm_unreachable("Invalid Tdl Clause kind"); +// IMPL-NEXT: } \ No newline at end of file diff --git a/llvm/test/Transforms/InstCombine/fma.ll b/llvm/test/Transforms/InstCombine/fma.ll index a619d77a010e03..6d9f8ea694c69e 100644 --- a/llvm/test/Transforms/InstCombine/fma.ll +++ b/llvm/test/Transforms/InstCombine/fma.ll @@ -372,7 +372,7 @@ define float @fma_x_y_0(float %x, float %y) { define float @fma_x_y_0_nsz(float %x, float %y) { ; CHECK-LABEL: @fma_x_y_0_nsz( -; CHECK-NEXT: [[FMA:%.*]] = call nsz float @llvm.fma.f32(float [[X:%.*]], float [[Y:%.*]], float 0.000000e+00) +; CHECK-NEXT: [[FMA:%.*]] = fmul nsz float [[X:%.*]], [[Y:%.*]] ; CHECK-NEXT: ret float [[FMA]] ; %fma = call nsz float @llvm.fma.f32(float %x, float %y, float 0.0) @@ -390,7 +390,7 @@ define <8 x half> @fma_x_y_0_v(<8 x half> %x, <8 x half> %y) { define <8 x half> @fma_x_y_0_nsz_v(<8 x half> %x, <8 x half> %y) { ; CHECK-LABEL: @fma_x_y_0_nsz_v( -; CHECK-NEXT: [[FMA:%.*]] = call nsz <8 x half> @llvm.fma.v8f16(<8 x half> [[X:%.*]], <8 x half> [[Y:%.*]], <8 x half> zeroinitializer) +; CHECK-NEXT: [[FMA:%.*]] = fmul nsz <8 x half> [[X:%.*]], [[Y:%.*]] ; CHECK-NEXT: ret <8 x half> [[FMA]] ; %fma = call nsz <8 x half> @llvm.fma.v8f16(<8 x half> %x, <8 x half> %y, <8 x half> zeroinitializer) @@ -408,7 +408,7 @@ define float @fmuladd_x_y_0(float %x, float %y) { define float @fmuladd_x_y_0_nsz(float %x, float %y) { ; CHECK-LABEL: @fmuladd_x_y_0_nsz( -; CHECK-NEXT: [[FMA:%.*]] = call nsz float @llvm.fmuladd.f32(float [[X:%.*]], float [[Y:%.*]], float 0.000000e+00) +; CHECK-NEXT: [[FMA:%.*]] = fmul nsz float [[X:%.*]], [[Y:%.*]] ; CHECK-NEXT: ret float [[FMA]] ; %fma = call nsz float @llvm.fmuladd.f32(float %x, float %y, float 0.0) @@ -417,7 +417,7 @@ define float @fmuladd_x_y_0_nsz(float %x, float %y) { define float @fma_x_y_m0(float %x, float %y) { ; CHECK-LABEL: @fma_x_y_m0( -; CHECK-NEXT: [[FMA:%.*]] = call float @llvm.fma.f32(float [[X:%.*]], float [[Y:%.*]], float -0.000000e+00) +; CHECK-NEXT: [[FMA:%.*]] = fmul float [[X:%.*]], [[Y:%.*]] ; CHECK-NEXT: ret float [[FMA]] ; %fma = call float @llvm.fma.f32(float %x, float %y, float -0.0) @@ -426,7 +426,7 @@ define float @fma_x_y_m0(float %x, float %y) { define <8 x half> @fma_x_y_m0_v(<8 x half> %x, <8 x half> %y) { ; CHECK-LABEL: @fma_x_y_m0_v( -; CHECK-NEXT: [[FMA:%.*]] = call <8 x half> @llvm.fma.v8f16(<8 x half> [[X:%.*]], <8 x half> [[Y:%.*]], <8 x half> ) +; CHECK-NEXT: [[FMA:%.*]] = fmul <8 x half> [[X:%.*]], [[Y:%.*]] ; CHECK-NEXT: ret <8 x half> [[FMA]] ; %fma = call <8 x half> @llvm.fma.v8f16(<8 x half> %x, <8 x half> %y, <8 x half> ) @@ -435,7 +435,7 @@ define <8 x half> @fma_x_y_m0_v(<8 x half> %x, <8 x half> %y) { define float @fmuladd_x_y_m0(float %x, float %y) { ; CHECK-LABEL: @fmuladd_x_y_m0( -; CHECK-NEXT: [[FMA:%.*]] = call float @llvm.fmuladd.f32(float [[X:%.*]], float [[Y:%.*]], float -0.000000e+00) +; CHECK-NEXT: [[FMA:%.*]] = fmul float [[X:%.*]], [[Y:%.*]] ; CHECK-NEXT: ret float [[FMA]] ; %fma = call float @llvm.fmuladd.f32(float %x, float %y, float -0.0) diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll b/llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll index 3a7bbbf795aab1..eb12803a3447ce 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/aarch64-predication.ll @@ -7,12 +7,12 @@ target triple = "aarch64--linux-gnu" ; This test checks that we correctly compute the scalarized operands for a ; user-specified vectorization factor when interleaving is disabled. We use the -; "optsize" attribute to disable all interleaving calculations. A cost of 5 +; "optsize" attribute to disable all interleaving calculations. A cost of 4 ; for %tmp4 indicates that we would scalarize it's operand (%tmp3), giving ; %tmp4 a lower scalarization overhead. ; ; COST-LABEL: predicated_udiv_scalarized_operand -; COST: LV: Found an estimated cost of 5 for VF 2 For instruction: %tmp4 = udiv i64 %tmp2, %tmp3 +; COST: LV: Found an estimated cost of 4 for VF 2 For instruction: %tmp4 = udiv i64 %tmp2, %tmp3 ; ; CHECK-LABEL: @predicated_udiv_scalarized_operand( ; CHECK: vector.body: diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll b/llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll index 877d8a844305bc..80d2e282176adb 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll @@ -8,7 +8,7 @@ ; Check scalar cost for extractvalue. The constant and loop invariant operands are free, ; leaving cost 3 for scalarizing the result + 2 for executing the op with VF 2. -; CM: LV: Scalar loop costs: 9. +; CM: LV: Scalar loop costs: 7. ; CM: LV: Found an estimated cost of 5 for VF 2 For instruction: %a = extractvalue { i64, i64 } %sv, 0 ; CM-NEXT: LV: Found an estimated cost of 5 for VF 2 For instruction: %b = extractvalue { i64, i64 } %sv, 1 @@ -57,7 +57,7 @@ exit: ; Similar to the test case above, but checks getVectorCallCost as well. declare float @pow(float, float) readnone nounwind -; CM: LV: Scalar loop costs: 18. +; CM: LV: Scalar loop costs: 16. ; CM: LV: Found an estimated cost of 5 for VF 2 For instruction: %a = extractvalue { float, float } %sv, 0 ; CM-NEXT: LV: Found an estimated cost of 5 for VF 2 For instruction: %b = extractvalue { float, float } %sv, 1 diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/predication_costs.ll b/llvm/test/Transforms/LoopVectorize/AArch64/predication_costs.ll index 57a3dfdbc848fe..b0ebb4edf2ad8d 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/predication_costs.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/predication_costs.ll @@ -19,7 +19,7 @@ target triple = "aarch64--linux-gnu" ; (udiv(2) + extractelement(6) + insertelement(3)) / 2 = 5 ; ; CHECK: Scalarizing and predicating: %tmp4 = udiv i32 %tmp2, %tmp3 -; CHECK: Found an estimated cost of 6 for VF 2 For instruction: %tmp4 = udiv i32 %tmp2, %tmp3 +; CHECK: Found an estimated cost of 5 for VF 2 For instruction: %tmp4 = udiv i32 %tmp2, %tmp3 ; define i32 @predicated_udiv(i32* %a, i32* %b, i1 %c, i64 %n) { entry: @@ -101,7 +101,7 @@ for.end: ; CHECK: Scalarizing: %tmp3 = add nsw i32 %tmp2, %x ; CHECK: Scalarizing and predicating: %tmp4 = udiv i32 %tmp2, %tmp3 ; CHECK: Found an estimated cost of 2 for VF 2 For instruction: %tmp3 = add nsw i32 %tmp2, %x -; CHECK: Found an estimated cost of 5 for VF 2 For instruction: %tmp4 = udiv i32 %tmp2, %tmp3 +; CHECK: Found an estimated cost of 4 for VF 2 For instruction: %tmp4 = udiv i32 %tmp2, %tmp3 ; define i32 @predicated_udiv_scalarized_operand(i32* %a, i1 %c, i32 %x, i64 %n) { entry: @@ -198,8 +198,8 @@ for.end: ; CHECK: Scalarizing: %tmp5 = sub i32 %tmp4, %x ; CHECK: Scalarizing and predicating: store i32 %tmp5, i32* %tmp0, align 4 ; CHECK: Found an estimated cost of 1 for VF 2 For instruction: %tmp2 = add i32 %tmp1, %x -; CHECK: Found an estimated cost of 6 for VF 2 For instruction: %tmp3 = sdiv i32 %tmp1, %tmp2 -; CHECK: Found an estimated cost of 6 for VF 2 For instruction: %tmp4 = udiv i32 %tmp3, %tmp2 +; CHECK: Found an estimated cost of 5 for VF 2 For instruction: %tmp3 = sdiv i32 %tmp1, %tmp2 +; CHECK: Found an estimated cost of 5 for VF 2 For instruction: %tmp4 = udiv i32 %tmp3, %tmp2 ; CHECK: Found an estimated cost of 2 for VF 2 For instruction: %tmp5 = sub i32 %tmp4, %x ; CHECK: Found an estimated cost of 2 for VF 2 For instruction: store i32 %tmp5, i32* %tmp0, align 4 ; diff --git a/llvm/test/Transforms/PhaseOrdering/rotate.ll b/llvm/test/Transforms/PhaseOrdering/rotate.ll index e10a46cb8300e0..4661de3688e60c 100644 --- a/llvm/test/Transforms/PhaseOrdering/rotate.ll +++ b/llvm/test/Transforms/PhaseOrdering/rotate.ll @@ -5,20 +5,12 @@ ; This should become a single funnel shift through a combination ; of aggressive-instcombine, simplifycfg, and instcombine. ; https://bugs.llvm.org/show_bug.cgi?id=34924 -; These are equivalent, but the value name with the new-pm shows a bug - -; this code should not have been converted to a speculative select with -; an intermediate transform. define i32 @rotl(i32 %a, i32 %b) { -; OLDPM-LABEL: @rotl( -; OLDPM-NEXT: entry: -; OLDPM-NEXT: [[TMP0:%.*]] = tail call i32 @llvm.fshl.i32(i32 [[A:%.*]], i32 [[A]], i32 [[B:%.*]]) -; OLDPM-NEXT: ret i32 [[TMP0]] -; -; NEWPM-LABEL: @rotl( -; NEWPM-NEXT: entry: -; NEWPM-NEXT: [[SPEC_SELECT:%.*]] = tail call i32 @llvm.fshl.i32(i32 [[A:%.*]], i32 [[A]], i32 [[B:%.*]]) -; NEWPM-NEXT: ret i32 [[SPEC_SELECT]] +; ANY-LABEL: @rotl( +; ANY-NEXT: entry: +; ANY-NEXT: [[COND:%.*]] = tail call i32 @llvm.fshl.i32(i32 [[A:%.*]], i32 [[A]], i32 [[B:%.*]]) +; ANY-NEXT: ret i32 [[COND]] ; entry: %cmp = icmp eq i32 %b, 0 @@ -35,4 +27,3 @@ end: %cond = phi i32 [ %or, %rotbb ], [ %a, %entry ] ret i32 %cond } - diff --git a/llvm/test/tools/llvm-objcopy/MachO/install-name-tool-change.test b/llvm/test/tools/llvm-objcopy/MachO/install-name-tool-change.test new file mode 100644 index 00000000000000..12e1dff9262749 --- /dev/null +++ b/llvm/test/tools/llvm-objcopy/MachO/install-name-tool-change.test @@ -0,0 +1,107 @@ +## This test checks updating a dependent shared library install name in a MachO binary. + +# RUN: yaml2obj %s -o %t + +## Specifying -change once: +# RUN: cp %t %t.copy +# RUN: llvm-install-name-tool -change /usr/dylib/LOAD /usr/long/long/dylib/LOAD %t.copy +# RUN: llvm-objdump -p %t.copy | FileCheck %s --check-prefix=CHANGE --implicit-check-not=/usr + +# CHANGE: /usr/long/long/dylib/LOAD +# CHANGE: /usr/dylib/WEAK + +## Specifying -change multiple times: +# RUN: cp %t %t.copy +# RUN: llvm-install-name-tool -change /usr/dylib/WEAK /usr/sh/WEAK \ +# RUN: -change /usr/dylib/LOAD /usr/sh/LOAD %t.copy +# RUN: llvm-objdump -p %t.copy | FileCheck %s --check-prefix=CHANGE-MULTIPLE --implicit-check-not=/usr + +# CHANGE-MULTIPLE: /usr/sh/LOAD +# CHANGE-MULTIPLE: /usr/sh/WEAK + +## Changing same dependent library name multiple times: +# RUN: cp %t %t.copy +# RUN: llvm-install-name-tool -change /usr/dylib/LOAD /usr/LOAD \ +# RUN: -change /usr/dylib/LOAD /usr/XXXX %t.copy +# RUN: llvm-objdump -p %t.copy | FileCheck %s --check-prefix=CHANGE-REPEAT --implicit-check-not=/usr + +# CHANGE-REPEAT: /usr/LOAD +# CHANGE-REPEAT: /usr/dylib/WEAK + +## Specifying dependent library names in a chain: +# RUN: cp %t %t.copy +# RUN: llvm-install-name-tool -change /usr/dylib/LOAD /usr/XX/LOAD \ +# RUN: -change /usr/XX/LOAD /usr/YY/LOAD %t.copy +# RUN: llvm-objdump -p %t.copy | FileCheck %s --check-prefix=CHANGE-CHAIN --implicit-check-not=/usr + +# CHANGE-CHAIN: /usr/XX/LOAD +# CHANGE-CHAIN: /usr/dylib/WEAK + +## Changing multiple dependent library names where one exists and the other doesn't: +# RUN: cp %t %t.copy +# RUN: llvm-install-name-tool -change /usr/dylib/LOAD /usr/JOJO/LOAD \ +# RUN: -change /usr/BIZARRE /usr/KOKO/LOAD %t.copy +# RUN: llvm-objdump -p %t.copy | FileCheck %s --check-prefix=CHANGE-SWITCH --implicit-check-not=/usr + +# CHANGE-SWITCH: /usr/JOJO/LOAD +# CHANGE-SWITCH: /usr/dylib/WEAK + +## Changing to a common dependent library name: +# RUN: cp %t %t.copy +# RUN: llvm-install-name-tool -change /usr/dylib/LOAD /usr/COMMON \ +# RUN: -change /usr/dylib/WEAK /usr/COMMON %t.copy +# RUN: llvm-objdump -p %t.copy | FileCheck %s --check-prefix=CHANGE-COMMON --implicit-check-not=/usr + +# CHANGE-COMMON: /usr/COMMON +# CHANGE-COMMON: /usr/COMMON + +## Change all common dependent library names at once: +# RUN: llvm-install-name-tool -change /usr/COMMON /usr/ONCE %t.copy +# RUN: llvm-objdump -p %t.copy | FileCheck %s --check-prefix=CHANGE-ONCE --implicit-check-not=/usr + +# CHANGE-ONCE: /usr/ONCE +# CHANGE-ONCE: /usr/ONCE + +## Check that -change option has no effect if the binary doesn't contain old install name: +# RUN: cp %t %t1 +# RUN: llvm-install-name-tool -change /usr/JOJO/LOAD /usr/XX/LOAD \ +# RUN: -change /usr/KOKO/WEAK /usr/YY/WEAK %t +# RUN: cmp %t %t1 + +## Missing a -change argument: +# RUN: not llvm-install-name-tool %t -change /usr/ONCE 2>&1 | \ +# RUN: FileCheck %s --check-prefix=MISSING + +## Missing both -change arguments: +# RUN: not llvm-install-name-tool %t -change 2>&1 | \ +# RUN: FileCheck %s --check-prefix=MISSING + +# MISSING: missing argument to -change option + +--- !mach-o +FileHeader: + magic: 0xFEEDFACF + cputype: 0x01000007 + cpusubtype: 0x00000003 + filetype: 0x00000001 + ncmds: 2 + sizeofcmds: 80 + flags: 0x00002000 + reserved: 0x00000000 +LoadCommands: + - cmd: LC_LOAD_DYLIB + cmdsize: 40 + dylib: + name: 24 + timestamp: 2 + current_version: 82115073 + compatibility_version: 65536 + PayloadString: '/usr/dylib/LOAD' + - cmd: LC_LOAD_WEAK_DYLIB + cmdsize: 40 + dylib: + name: 24 + timestamp: 2 + current_version: 82115073 + compatibility_version: 65536 + PayloadString: '/usr/dylib/WEAK' diff --git a/llvm/test/tools/llvm-objcopy/MachO/install-name-tool-id.test b/llvm/test/tools/llvm-objcopy/MachO/install-name-tool-id.test new file mode 100644 index 00000000000000..e36f402502d6d1 --- /dev/null +++ b/llvm/test/tools/llvm-objcopy/MachO/install-name-tool-id.test @@ -0,0 +1,67 @@ +## This test checks updating a dynamic shared library ID in a MachO binary. + +# RUN: yaml2obj %s --docnum=1 -o %t + +## Specifying -id once: +# RUN: llvm-install-name-tool -id /usr/lib/A_long_long_test %t +# RUN: llvm-objdump -p %t | FileCheck %s --check-prefix=ID --implicit-check-not=/usr + +# ID: /usr/lib/A_long_long_test + +## Specifying -id more than once: +# RUN: llvm-install-name-tool -id /usr/lib/B_long -id /usr/lib/K_long -id /usr/A_short %t +# RUN: llvm-objdump -p %t | FileCheck %s --check-prefix=ID-MULTIPLE --implicit-check-not=/usr + +# ID-MULTIPLE: /usr/A_short + +## Specifying -id with empty string: +# RUN: not llvm-install-name-tool -id '' %t 2>&1 | \ +# RUN: FileCheck %s --check-prefix=EMPTY + +# EMPTY: cannot specify an empty id + +## Missing id argument: +# RUN: not llvm-install-name-tool %t -id 2>&1 | \ +# RUN: FileCheck %s --check-prefix=MISSING + +# MISSING: missing argument to -id option + +## Shared dylib binary +--- !mach-o +FileHeader: + magic: 0xFEEDFACF + cputype: 0x01000007 + cpusubtype: 0x00000003 + filetype: 0x00000006 + ncmds: 1 + sizeofcmds: 56 + flags: 0x00002000 + reserved: 0x00000000 +LoadCommands: + - cmd: LC_ID_DYLIB + cmdsize: 56 + dylib: + name: 24 + timestamp: 2 + current_version: 82115073 + compatibility_version: 65536 + PayloadString: '/usr/lib/A' + +# RUN: yaml2obj %s --docnum=2 -o %t + +## Check that -id option has no effect if binary is not a shared dylib: +# RUN: cp %t %t1 +# RUN: llvm-install-name-tool -id /usr/lib/J %t +# RUN: cmp %t %t1 + +## Executable binary +--- !mach-o +FileHeader: + magic: 0xFEEDFACF + cputype: 0x01000007 + cpusubtype: 0x00000003 + filetype: 0x00000001 + ncmds: 0 + sizeofcmds: 0 + flags: 0x00002000 + reserved: 0x00000000 diff --git a/llvm/tools/llvm-objcopy/CopyConfig.cpp b/llvm/tools/llvm-objcopy/CopyConfig.cpp index b483116a80ac80..f93406f371d0a1 100644 --- a/llvm/tools/llvm-objcopy/CopyConfig.cpp +++ b/llvm/tools/llvm-objcopy/CopyConfig.cpp @@ -904,6 +904,14 @@ parseInstallNameToolOptions(ArrayRef ArgsArr) { Config.RPathsToUpdate.emplace_back(Old, New); } + if (auto *Arg = InputArgs.getLastArg(INSTALL_NAME_TOOL_id)) + Config.SharedLibId = Arg->getValue(); + + for (auto *Arg : InputArgs.filtered(INSTALL_NAME_TOOL_change)) { + Config.InstallNamesToUpdate.emplace_back(Arg->getValue(0), + Arg->getValue(1)); + } + SmallVector Positional; for (auto Arg : InputArgs.filtered(INSTALL_NAME_TOOL_UNKNOWN)) return createStringError(errc::invalid_argument, "unknown argument '%s'", diff --git a/llvm/tools/llvm-objcopy/CopyConfig.h b/llvm/tools/llvm-objcopy/CopyConfig.h index a492e4618a621f..ce119dee5bff74 100644 --- a/llvm/tools/llvm-objcopy/CopyConfig.h +++ b/llvm/tools/llvm-objcopy/CopyConfig.h @@ -179,8 +179,12 @@ struct CopyConfig { std::vector SymbolsToAdd; std::vector RPathToAdd; std::vector> RPathsToUpdate; + std::vector> InstallNamesToUpdate; DenseSet RPathsToRemove; + // install-name-tool's id option + Optional SharedLibId; + // Section matchers NameMatcher KeepSection; NameMatcher OnlySection; diff --git a/llvm/tools/llvm-objcopy/InstallNameToolOpts.td b/llvm/tools/llvm-objcopy/InstallNameToolOpts.td index cbdb878102e148..04ffe62c42fca7 100644 --- a/llvm/tools/llvm-objcopy/InstallNameToolOpts.td +++ b/llvm/tools/llvm-objcopy/InstallNameToolOpts.td @@ -24,5 +24,11 @@ def delete_rpath: Option<["-", "--"], "delete_rpath", KIND_SEPARATE>, def rpath: MultiArg<["-", "--"], "rpath", 2>, HelpText<"Change rpath path name">; +def id : Option<["-","--"], "id", KIND_SEPARATE>, + HelpText<"Change dynamic shared library id">; + +def change: MultiArg<["-", "--"], "change", 2>, + HelpText<"Change dependent shared library install name">; + def version : Flag<["--"], "version">, HelpText<"Print the version and exit.">; diff --git a/llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp b/llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp index 1792881e5516cb..3844b6f62de623 100644 --- a/llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp +++ b/llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp @@ -273,6 +273,34 @@ static Error handleArgs(const CopyConfig &Config, Object &Obj) { for (std::unique_ptr
&Sec : LC.Sections) Sec->Relocations.clear(); + for (LoadCommand &LC : Obj.LoadCommands) { + switch (LC.MachOLoadCommand.load_command_data.cmd) { + case MachO::LC_ID_DYLIB: + if (Config.SharedLibId) { + StringRef Id = Config.SharedLibId.getValue(); + if (Id.empty()) + return createStringError(errc::invalid_argument, + "cannot specify an empty id"); + updateLoadCommandPayloadString(LC, Id); + } + break; + + // TODO: Add LC_REEXPORT_DYLIB, LC_LAZY_LOAD_DYLIB, and LC_LOAD_UPWARD_DYLIB + // here once llvm-objcopy supports them. + case MachO::LC_LOAD_DYLIB: + case MachO::LC_LOAD_WEAK_DYLIB: + StringRef Old, New; + StringRef CurrentInstallName = getPayloadString(LC); + for (const auto &InstallNamePair : Config.InstallNamesToUpdate) { + std::tie(Old, New) = InstallNamePair; + if (CurrentInstallName == Old) { + updateLoadCommandPayloadString(LC, New); + break; + } + } + } + } + for (const auto &Flag : Config.AddSection) { std::pair SecPair = Flag.split("="); StringRef SecName = SecPair.first; diff --git a/llvm/utils/TableGen/DirectiveEmitter.cpp b/llvm/utils/TableGen/DirectiveEmitter.cpp index 5555494ccf49b7..93fceb7a73ecb8 100644 --- a/llvm/utils/TableGen/DirectiveEmitter.cpp +++ b/llvm/utils/TableGen/DirectiveEmitter.cpp @@ -18,8 +18,48 @@ #include "llvm/TableGen/Record.h" #include "llvm/TableGen/TableGenBackend.h" +using namespace llvm; + namespace llvm { -void EmitDirectivesEnums(RecordKeeper &Records, raw_ostream &OS) { + +// Generate enum class +void GenerateEnumClass(const std::vector &Records, raw_ostream &OS, + StringRef Enum, StringRef Prefix, StringRef CppNamespace, + bool MakeEnumAvailableInNamespace) { + OS << "\n"; + OS << "enum class " << Enum << " {\n"; + for (const auto &R : Records) { + const auto Name = R->getValueAsString("name"); + std::string N = Name.str(); + std::replace(N.begin(), N.end(), ' ', '_'); + OS << " " << Prefix << N << ",\n"; + } + OS << "};\n"; + OS << "\n"; + OS << "static constexpr std::size_t " << Enum + << "_enumSize = " << Records.size() << ";\n"; + + // Make the enum values available in the defined namespace. This allows us to + // write something like Enum_X if we have a `using namespace `. + // At the same time we do not loose the strong type guarantees of the enum + // class, that is we cannot pass an unsigned as Directive without an explicit + // cast. + if (MakeEnumAvailableInNamespace) { + OS << "\n"; + for (const auto &R : Records) { + const auto Name = R->getValueAsString("name"); + std::string N = Name.str(); + std::replace(N.begin(), N.end(), ' ', '_'); + OS << "constexpr auto " << Prefix << N << " = " + << "llvm::" << CppNamespace << "::" << Enum << "::" << Prefix << N + << ";\n"; + } + } +} + +// Generate the declaration section for the enumeration in the directive +// language +void EmitDirectivesDecl(RecordKeeper &Records, raw_ostream &OS) { const auto &DirectiveLanguages = Records.getAllDerivedDefinitions("DirectiveLanguage"); @@ -30,7 +70,7 @@ void EmitDirectivesEnums(RecordKeeper &Records, raw_ostream &OS) { } const auto &DirectiveLanguage = DirectiveLanguages[0]; - StringRef languageName = DirectiveLanguage->getValueAsString("name"); + StringRef LanguageName = DirectiveLanguage->getValueAsString("name"); StringRef DirectivePrefix = DirectiveLanguage->getValueAsString("directivePrefix"); StringRef ClausePrefix = DirectiveLanguage->getValueAsString("clausePrefix"); @@ -40,13 +80,15 @@ void EmitDirectivesEnums(RecordKeeper &Records, raw_ostream &OS) { bool EnableBitmaskEnumInNamespace = DirectiveLanguage->getValueAsBit("enableBitmaskEnumInNamespace"); - OS << "#ifndef LLVM_" << languageName << "_INC\n"; - OS << "#define LLVM_" << languageName << "_INC\n"; + OS << "#ifndef LLVM_" << LanguageName << "_INC\n"; + OS << "#define LLVM_" << LanguageName << "_INC\n"; if (EnableBitmaskEnumInNamespace) - OS << "#include \"llvm/ADT/BitmaskEnum.h\"\n"; + OS << "\n#include \"llvm/ADT/BitmaskEnum.h\"\n"; + OS << "\n"; OS << "namespace llvm {\n"; + OS << "class StringRef;\n"; // Open namespaces defined in the directive language llvm::SmallVector Namespaces; @@ -55,61 +97,142 @@ void EmitDirectivesEnums(RecordKeeper &Records, raw_ostream &OS) { OS << "namespace " << Ns << " {\n"; if (EnableBitmaskEnumInNamespace) - OS << "LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE();\n"; + OS << "\nLLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE();\n"; // Emit Directive enumeration - OS << "enum class Directive {\n"; const auto &Directives = Records.getAllDerivedDefinitions("Directive"); - for (const auto &D : Directives) { - const auto Name = D->getValueAsString("name"); + GenerateEnumClass(Directives, OS, "Directive", DirectivePrefix, CppNamespace, + MakeEnumAvailableInNamespace); + + // Emit Clause enumeration + const auto &Clauses = Records.getAllDerivedDefinitions("Clause"); + GenerateEnumClass(Clauses, OS, "Clause", ClausePrefix, CppNamespace, + MakeEnumAvailableInNamespace); + + // Generic function signatures + OS << "\n"; + OS << "// Enumeration helper functions\n"; + OS << "Directive get" << LanguageName + << "DirectiveKind(llvm::StringRef Str);\n"; + OS << "\n"; + OS << "llvm::StringRef get" << LanguageName + << "DirectiveName(Directive D);\n"; + OS << "\n"; + OS << "Clause get" << LanguageName << "ClauseKind(llvm::StringRef Str);\n"; + OS << "\n"; + OS << "llvm::StringRef get" << LanguageName << "ClauseName(Clause C);\n"; + OS << "\n"; + + // Closing namespaces + for (auto Ns : llvm::reverse(Namespaces)) + OS << "} // namespace " << Ns << "\n"; + + OS << "} // namespace llvm\n"; + + OS << "#endif // LLVM_" << LanguageName << "_INC\n"; +} + +// Generate function implementation for getName(StringRef Str) +void GenerateGetName(const std::vector &Records, raw_ostream &OS, + StringRef Enum, StringRef Prefix, StringRef LanguageName, + StringRef Namespace) { + OS << "\n"; + OS << "llvm::StringRef llvm::" << Namespace << "::get" << LanguageName << Enum + << "Name(" << Enum << " Kind) {\n"; + OS << " switch (Kind) {\n"; + for (const auto &R : Records) { + const auto Name = R->getValueAsString("name"); + const auto AlternativeName = R->getValueAsString("alternativeName"); std::string N = Name.str(); std::replace(N.begin(), N.end(), ' ', '_'); - OS << DirectivePrefix << N << ",\n"; + OS << " case " << Prefix << N << ":\n"; + OS << " return \""; + if (AlternativeName.empty()) + OS << Name; + else + OS << AlternativeName; + OS << "\";\n"; } - OS << "};\n"; + OS << " }\n"; // switch + OS << " llvm_unreachable(\"Invalid " << LanguageName << " " << Enum + << " kind\");\n"; + OS << "}\n"; +} - OS << "static constexpr std::size_t Directive_enumSize = " - << Directives.size() << ";\n"; +// Generate function implementation for getKind(StringRef Str) +void GenerateGetKind(const std::vector &Records, raw_ostream &OS, + StringRef Enum, StringRef Prefix, StringRef LanguageName, + StringRef Namespace, bool ImplicitAsUnknown) { - // Emit Clause enumeration - OS << "enum class Clause {\n"; - const auto &Clauses = Records.getAllDerivedDefinitions("Clause"); - for (const auto &C : Clauses) { - const auto Name = C->getValueAsString("name"); - OS << ClausePrefix << Name << ",\n"; + auto DefaultIt = std::find_if(Records.begin(), Records.end(), [](Record *R) { + return R->getValueAsBit("isDefault") == true; + }); + + if (DefaultIt == Records.end()) { + PrintError("A least one " + Enum + " must be defined as default."); + return; } - OS << "};\n"; - OS << "static constexpr std::size_t Clause_enumSize = " << Clauses.size() - << ";\n"; + const auto DefaultName = (*DefaultIt)->getValueAsString("name"); + std::string DefaultEnum = DefaultName.str(); + std::replace(DefaultEnum.begin(), DefaultEnum.end(), ' ', '_'); - // Make the enum values available in the defined namespace. This allows us to - // write something like Enum_X if we have a `using namespace `. - // At the same time we do not loose the strong type guarantees of the enum - // class, that is we cannot pass an unsigned as Directive without an explicit - // cast. - if (MakeEnumAvailableInNamespace) { - for (const auto &D : Directives) { - const auto Name = D->getValueAsString("name"); - std::string N = Name.str(); - std::replace(N.begin(), N.end(), ' ', '_'); - OS << "constexpr auto " << DirectivePrefix << N << " = " << CppNamespace - << "::Directive::" << DirectivePrefix << N << ";\n"; - } + OS << "\n"; + OS << Enum << " llvm::" << Namespace << "::get" << LanguageName << Enum + << "Kind(llvm::StringRef Str) {\n"; + OS << " return llvm::StringSwitch<" << Enum << ">(Str)\n"; - for (const auto &C : Clauses) { - const auto Name = C->getValueAsString("name"); - OS << "constexpr auto " << ClausePrefix << Name << " = " << CppNamespace - << "::Clause::" << ClausePrefix << Name << ";\n"; + for (const auto &R : Records) { + const auto Name = R->getValueAsString("name"); + std::string N = Name.str(); + std::replace(N.begin(), N.end(), ' ', '_'); + if (ImplicitAsUnknown && R->getValueAsBit("isImplicit")) { + OS << " .Case(\"" << Name << "\"," << Prefix << DefaultEnum << ")\n"; + } else { + OS << " .Case(\"" << Name << "\"," << Prefix << N << ")\n"; } } + OS << " .Default(" << Prefix << DefaultEnum << ");\n"; + OS << "}\n"; +} - // Closing namespaces - for (auto Ns : llvm::reverse(Namespaces)) - OS << "} // namespace " << Ns << "\n"; +// Generate the implemenation section for the enumeration in the directive +// language +void EmitDirectivesImpl(RecordKeeper &Records, raw_ostream &OS) { - OS << "} // namespace llvm\n"; + const auto &DirectiveLanguages = + Records.getAllDerivedDefinitions("DirectiveLanguage"); - OS << "#endif"; + if (DirectiveLanguages.size() != 1) { + PrintError("A single definition of DirectiveLanguage is needed."); + return; + } + + const auto &DirectiveLanguage = DirectiveLanguages[0]; + StringRef DirectivePrefix = + DirectiveLanguage->getValueAsString("directivePrefix"); + StringRef LanguageName = DirectiveLanguage->getValueAsString("name"); + StringRef ClausePrefix = DirectiveLanguage->getValueAsString("clausePrefix"); + StringRef CppNamespace = DirectiveLanguage->getValueAsString("cppNamespace"); + + const auto &Directives = Records.getAllDerivedDefinitions("Directive"); + const auto &Clauses = Records.getAllDerivedDefinitions("Clause"); + + // getDirectiveKind(StringRef Str) + GenerateGetKind(Directives, OS, "Directive", DirectivePrefix, LanguageName, + CppNamespace, /*ImplicitAsUnknown=*/false); + + // getDirectiveName(Directive Kind) + GenerateGetName(Directives, OS, "Directive", DirectivePrefix, LanguageName, + CppNamespace); + + // getClauseKind(StringRef Str) + GenerateGetKind(Clauses, OS, "Clause", ClausePrefix, LanguageName, + CppNamespace, /*ImplicitAsUnknown=*/true); + + // getClauseName(Clause Kind) + GenerateGetName(Clauses, OS, "Clause", ClausePrefix, LanguageName, + CppNamespace); } + } // namespace llvm diff --git a/llvm/utils/TableGen/TableGen.cpp b/llvm/utils/TableGen/TableGen.cpp index 8bb85dff92ef92..7438749a1243ec 100644 --- a/llvm/utils/TableGen/TableGen.cpp +++ b/llvm/utils/TableGen/TableGen.cpp @@ -54,7 +54,8 @@ enum ActionType { GenRegisterBank, GenExegesis, GenAutomata, - GenDirectivesEnums, + GenDirectivesEnumDecl, + GenDirectivesEnumImpl, }; namespace llvm { @@ -130,8 +131,10 @@ cl::opt Action( clEnumValN(GenExegesis, "gen-exegesis", "Generate llvm-exegesis tables"), clEnumValN(GenAutomata, "gen-automata", "Generate generic automata"), - clEnumValN(GenDirectivesEnums, "gen-directive-decls", - "Generate directive related declaration code"))); + clEnumValN(GenDirectivesEnumDecl, "gen-directive-decl", + "Generate directive related declaration code"), + clEnumValN(GenDirectivesEnumImpl, "gen-directive-impl", + "Generate directive related implementation code"))); cl::OptionCategory PrintEnumsCat("Options for -print-enums"); cl::opt Class("class", cl::desc("Print Enum list for this class"), @@ -256,8 +259,11 @@ bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) { case GenAutomata: EmitAutomata(Records, OS); break; - case GenDirectivesEnums: - EmitDirectivesEnums(Records, OS); + case GenDirectivesEnumDecl: + EmitDirectivesDecl(Records, OS); + break; + case GenDirectivesEnumImpl: + EmitDirectivesImpl(Records, OS); break; } diff --git a/llvm/utils/TableGen/TableGenBackends.h b/llvm/utils/TableGen/TableGenBackends.h index 3e65ad03b4a4c2..9e6171abcabfca 100644 --- a/llvm/utils/TableGen/TableGenBackends.h +++ b/llvm/utils/TableGen/TableGenBackends.h @@ -90,7 +90,8 @@ void EmitX86FoldTables(RecordKeeper &RK, raw_ostream &OS); void EmitRegisterBank(RecordKeeper &RK, raw_ostream &OS); void EmitExegesis(RecordKeeper &RK, raw_ostream &OS); void EmitAutomata(RecordKeeper &RK, raw_ostream &OS); -void EmitDirectivesEnums(RecordKeeper &RK, raw_ostream &OS); +void EmitDirectivesDecl(RecordKeeper &RK, raw_ostream &OS); +void EmitDirectivesImpl(RecordKeeper &RK, raw_ostream &OS); } // End llvm namespace diff --git a/mlir/docs/ConversionToLLVMDialect.md b/mlir/docs/ConversionToLLVMDialect.md index e65df4444b80a1..27b732015f9fd6 100644 --- a/mlir/docs/ConversionToLLVMDialect.md +++ b/mlir/docs/ConversionToLLVMDialect.md @@ -378,7 +378,7 @@ to function-length lifetime, creation of multiple unranked memref descriptors, e.g., in a loop, may lead to stack overflows.) If an unranked descriptor has to be returned from a function, the ranked descriptor it points to is copied into dynamically allocated memory, and the pointer in the unranked descriptor is -updated accodingly. The allocation happens immediately before returning. It is +updated accordingly. The allocation happens immediately before returning. It is the responsibility of the caller to free the dynamically allocated memory. The default conversion of `std.call` and `std.call_indirect` copies the ranked descriptor to newly allocated memory on the caller's stack. Thus, the convention diff --git a/mlir/lib/Conversion/GPUCommon/CMakeLists.txt b/mlir/lib/Conversion/GPUCommon/CMakeLists.txt index 2b85c237731b2f..a4abae8037f655 100644 --- a/mlir/lib/Conversion/GPUCommon/CMakeLists.txt +++ b/mlir/lib/Conversion/GPUCommon/CMakeLists.txt @@ -14,7 +14,7 @@ if (MLIR_ROCM_CONVERSIONS_ENABLED) ) endif() -add_mlir_conversion_library(MLIRGPUtoGPURuntimeTransforms +add_mlir_conversion_library(MLIRGPUToGPURuntimeTransforms ConvertLaunchFuncToRuntimeCalls.cpp ConvertKernelFuncToBlob.cpp diff --git a/mlir/lib/Conversion/GPUToNVVM/CMakeLists.txt b/mlir/lib/Conversion/GPUToNVVM/CMakeLists.txt index fe8502f0061c3f..a0e8d6d21dd00e 100644 --- a/mlir/lib/Conversion/GPUToNVVM/CMakeLists.txt +++ b/mlir/lib/Conversion/GPUToNVVM/CMakeLists.txt @@ -2,7 +2,7 @@ set(LLVM_TARGET_DEFINITIONS GPUToNVVM.td) mlir_tablegen(GPUToNVVM.cpp.inc -gen-rewriters) add_public_tablegen_target(MLIRGPUToNVVMIncGen) -add_mlir_conversion_library(MLIRGPUtoNVVMTransforms +add_mlir_conversion_library(MLIRGPUToNVVMTransforms LowerGpuOpsToNVVMOps.cpp DEPENDS diff --git a/mlir/lib/Conversion/GPUToROCDL/CMakeLists.txt b/mlir/lib/Conversion/GPUToROCDL/CMakeLists.txt index 3e7294d54ac2c7..0871b27aaddaa4 100644 --- a/mlir/lib/Conversion/GPUToROCDL/CMakeLists.txt +++ b/mlir/lib/Conversion/GPUToROCDL/CMakeLists.txt @@ -2,7 +2,7 @@ set(LLVM_TARGET_DEFINITIONS GPUToROCDL.td) mlir_tablegen(GPUToROCDL.cpp.inc -gen-rewriters) add_public_tablegen_target(MLIRGPUToROCDLIncGen) -add_mlir_conversion_library(MLIRGPUtoROCDLTransforms +add_mlir_conversion_library(MLIRGPUToROCDLTransforms LowerGpuOpsToROCDLOps.cpp DEPENDS diff --git a/mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp b/mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp index b6900d13094c2e..ee98bc9166f8bc 100644 --- a/mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp +++ b/mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp @@ -1955,11 +1955,9 @@ static LogicalResult copyUnrankedDescriptors(OpBuilder &builder, Location loc, // Find operands of unranked memref type and store them. SmallVector unrankedMemrefs; - for (unsigned i = 0, e = operands.size(); i < e; ++i) { - if (!origTypes[i].isa()) - continue; - unrankedMemrefs.emplace_back(operands[i]); - } + for (unsigned i = 0, e = operands.size(); i < e; ++i) + if (origTypes[i].isa()) + unrankedMemrefs.emplace_back(operands[i]); if (unrankedMemrefs.empty()) return success(); diff --git a/mlir/test/lib/Transforms/CMakeLists.txt b/mlir/test/lib/Transforms/CMakeLists.txt index db864999a440fe..cdfd4e8a815b06 100644 --- a/mlir/test/lib/Transforms/CMakeLists.txt +++ b/mlir/test/lib/Transforms/CMakeLists.txt @@ -39,7 +39,7 @@ add_mlir_library(MLIRTestTransforms MLIRAnalysis MLIREDSC MLIRGPU - MLIRGPUtoGPURuntimeTransforms + MLIRGPUToGPURuntimeTransforms MLIRLinalgOps MLIRLinalgTransforms MLIRNVVMIR