From e2fc85c69b3f7aad89b5b59eca537bec96a24682 Mon Sep 17 00:00:00 2001 From: Jan Svoboda Date: Mon, 14 Dec 2020 09:49:55 +0100 Subject: [PATCH 01/10] [clang][cli] Better defaults for MarshallingInfoString Depends on D84018 Reviewed By: Bigcheese Original patch by Daniel Grumberg. Differential Revision: https://reviews.llvm.org/D84185 --- clang/include/clang/Driver/Options.td | 5 +++-- clang/lib/Frontend/CompilerInvocation.cpp | 11 +++++++++-- llvm/include/llvm/Option/OptParser.td | 8 +++++--- 3 files changed, 17 insertions(+), 7 deletions(-) diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td index 36e816e5345c03..4af1c0447dc048 100644 --- a/clang/include/clang/Driver/Options.td +++ b/clang/include/clang/Driver/Options.td @@ -3933,7 +3933,7 @@ def target_feature : Separate<["-"], "target-feature">, def triple : Separate<["-"], "triple">, HelpText<"Specify target triple (e.g. i686-apple-darwin9)">, MarshallingInfoString<"TargetOpts->Triple", "llvm::Triple::normalize(llvm::sys::getDefaultTargetTriple())">, - AlwaysEmit, Normalizer<"normalizeTriple">, DenormalizeString; + AlwaysEmit, Normalizer<"normalizeTriple">; def target_abi : Separate<["-"], "target-abi">, HelpText<"Target a particular ABI type">; def target_sdk_version_EQ : Joined<["-"], "target-sdk-version=">, @@ -3998,7 +3998,8 @@ def analyzer_viz_egraph_graphviz : Flag<["-"], "analyzer-viz-egraph-graphviz">, HelpText<"Display exploded graph using GraphViz">, MarshallingInfoFlag<"AnalyzerOpts->visualizeExplodedGraphWithGraphViz">; def analyzer_dump_egraph : Separate<["-"], "analyzer-dump-egraph">, - HelpText<"Dump exploded graph to the specified file">; + HelpText<"Dump exploded graph to the specified file">, + MarshallingInfoString<"AnalyzerOpts->DumpExplodedGraphTo">; def analyzer_dump_egraph_EQ : Joined<["-"], "analyzer-dump-egraph=">, Alias; def analyzer_inline_max_stack_depth : Separate<["-"], "analyzer-inline-max-stack-depth">, diff --git a/clang/lib/Frontend/CompilerInvocation.cpp b/clang/lib/Frontend/CompilerInvocation.cpp index 836f34c64e28f8..3add57ce60f41a 100644 --- a/clang/lib/Frontend/CompilerInvocation.cpp +++ b/clang/lib/Frontend/CompilerInvocation.cpp @@ -272,6 +272,15 @@ static void denormalizeSimpleEnumJoined(SmallVectorImpl &Args, "the tablegen option description"); } +static Optional normalizeString(OptSpecifier Opt, int TableIndex, + const ArgList &Args, + DiagnosticsEngine &Diags) { + auto *Arg = Args.getLastArg(Opt); + if (!Arg) + return None; + return std::string(Arg->getValue()); +} + static void denormalizeString(SmallVectorImpl &Args, const char *Spelling, CompilerInvocation::StringAllocator SA, @@ -498,8 +507,6 @@ static bool ParseAnalyzerArgs(AnalyzerOptions &Opts, ArgList &Args, .Case("false", false) .Default(false); - Opts.DumpExplodedGraphTo = - std::string(Args.getLastArgValue(OPT_analyzer_dump_egraph)); Opts.AnalyzeSpecificFunction = std::string(Args.getLastArgValue(OPT_analyze_function)); Opts.maxBlockVisitOnPath = diff --git a/llvm/include/llvm/Option/OptParser.td b/llvm/include/llvm/Option/OptParser.td index 5dfe7bc7acc385..9e0ff145092069 100644 --- a/llvm/include/llvm/Option/OptParser.td +++ b/llvm/include/llvm/Option/OptParser.td @@ -155,8 +155,11 @@ class MarshallingInfo { code DefaultValue = defaultvalue; } -class MarshallingInfoString - : MarshallingInfo {} +class MarshallingInfoString + : MarshallingInfo { + code Normalizer = "normalizeString"; + code Denormalizer = "denormalizeString"; +} class MarshallingInfoFlag : MarshallingInfo { @@ -189,7 +192,6 @@ class Normalizer { code Normalizer = normalizer; } class Denormalizer { code Denormalizer = denormalizer; } class NormalizedValuesScope { code NormalizedValuesScope = scope; } class NormalizedValues definitions> { list NormalizedValues = definitions; } -class DenormalizeString { code Denormalizer = "denormalizeString"; } class AutoNormalizeEnum { code Normalizer = "normalizeSimpleEnum"; code Denormalizer = "denormalizeSimpleEnum"; From 98a4289810ba49cea6f9a9be6d902e72f0c0d0e7 Mon Sep 17 00:00:00 2001 From: Georgii Rymar Date: Thu, 10 Dec 2020 16:12:26 +0300 Subject: [PATCH 02/10] [llvm-readobj] - For SHT_REL relocations, don't display an addend. This is https://bugs.llvm.org/show_bug.cgi?id=44257. In LLVM style we always print `0` as addend when dumping SHT_REL relocations. It is confusing, this patch stops printing it as the first comment on the bug page suggests. Differential revision: https://reviews.llvm.org/D93033 --- lld/test/ELF/arm-abs32-dyn.s | 2 +- lld/test/ELF/arm-copy.s | 2 - lld/test/ELF/arm-gnu-ifunc-plt.s | 12 +- lld/test/ELF/arm-got-relative.s | 2 +- lld/test/ELF/arm-plt-reloc.s | 24 +- lld/test/ELF/arm-target1.s | 2 +- lld/test/ELF/arm-thumb-plt-reloc.s | 6 +- lld/test/ELF/arm-tls-ldm32.s | 2 +- lld/test/ELF/dynamic-got.s | 2 +- lld/test/ELF/gnu-ifunc-plt-i386.s | 10 +- lld/test/ELF/i386-got-value.s | 2 +- lld/test/ELF/i386-plt.s | 8 +- lld/test/ELF/i386-relative.s | 2 +- lld/test/ELF/i386-tls-dynamic.s | 14 +- lld/test/ELF/i386-tls-gdiele.s | 4 +- lld/test/ELF/i386-tls-ie-local.s | 4 +- lld/test/ELF/i386-tls-ie-shared.s | 24 +- lld/test/ELF/i386-tls-le.s | 8 +- lld/test/ELF/i386-tls-opt-iele-nopic.s | 4 +- lld/test/ELF/i386-zrel-zrela.s | 10 +- lld/test/ELF/mips-26.s | 2 +- lld/test/ELF/mips-eh_frame-pic.s | 8 +- lld/test/ELF/mips-lo16-not-relative.s | 2 +- lld/test/ELF/mips-mgot.s | 28 +- lld/test/ELF/mips-plt-copy.s | 8 +- lld/test/ELF/mips-tls-64.s | 20 +- lld/test/ELF/mips-tls.s | 20 +- lld/test/ELF/mips64-eh-abs-reloc.s | 2 +- lld/test/ELF/pack-dyn-relocs-arm2.s | 68 ++--- lld/test/ELF/pack-dyn-relocs-relr-loop.s | 6 +- lld/test/ELF/pack-dyn-relocs.s | 258 +++++++++--------- lld/test/ELF/rel-addend-with-rela-input.s | 2 +- lld/test/ELF/relocatable-section-symbol.s | 4 +- lld/test/ELF/relocation-copy-i686.s | 3 - lld/test/ELF/relocation-none-arm.s | 2 +- lld/test/ELF/relocation-none-i386.s | 2 +- lld/test/ELF/x86-64-zrel-zrela.s | 8 +- .../test/CodeGen/AMDGPU/amdgpu-reloc-const.ll | 2 +- llvm/test/CodeGen/AMDGPU/lds-relocs.ll | 4 +- .../no-initializer-constant-addrspace.ll | 2 +- .../AMDGPU/r600-constant-array-fixup.ll | 2 +- llvm/test/CodeGen/AMDGPU/scratch-simple.ll | 4 +- llvm/test/MC/AMDGPU/elf-lds.s | 4 +- llvm/test/MC/AMDGPU/reloc.s | 20 +- llvm/test/MC/ARM/arm-elf-relocations.s | 12 +- llvm/test/MC/ARM/arm-elf-symver.s | 10 +- llvm/test/MC/ARM/arm-thumb-tail-call.ll | 4 +- llvm/test/MC/ARM/directive-tlsdescseq.s | 8 +- llvm/test/MC/ARM/eh-compact-pr0.s | 8 +- llvm/test/MC/ARM/eh-compact-pr1.s | 6 +- llvm/test/MC/ARM/eh-directive-cantunwind.s | 2 +- llvm/test/MC/ARM/eh-directive-handlerdata.s | 12 +- llvm/test/MC/ARM/eh-directive-personality.s | 12 +- .../MC/ARM/eh-directive-personalityindex.s | 32 +-- .../ARM/eh-directive-section-multiple-func.s | 12 +- llvm/test/MC/ARM/eh-directive-section.s | 12 +- .../eh-directive-text-section-multiple-func.s | 6 +- llvm/test/MC/ARM/eh-directive-text-section.s | 4 +- llvm/test/MC/ARM/elf-reloc-condcall.s | 10 +- llvm/test/MC/ARM/elf-thumbfunc-reloc.s | 4 +- llvm/test/MC/ARM/elf-thumbfunc-reloc2.s | 6 +- llvm/test/MC/ARM/mixed-arm-thumb-bl-fixup.ll | 14 +- llvm/test/MC/ARM/reloc-directive.s | 12 +- llvm/test/MC/ARM/target-expressions.s | 16 +- llvm/test/MC/ARM/thumb-far-jump.s | 4 +- llvm/test/MC/ARM/thumb-movwt-reloc.s | 4 +- llvm/test/MC/ARM/thumb1-branch-reloc.s | 2 +- llvm/test/MC/ARM/thumb2-beq-fixup.s | 6 +- llvm/test/MC/ELF/discriminator.s | 2 +- llvm/test/MC/ELF/gen-dwarf.s | 8 +- llvm/test/MC/ELF/relocation-386.s | 68 ++--- llvm/test/MC/Mips/micromips-func-addr.s | 4 +- llvm/test/MC/Mips/micromips32r6/relocations.s | 18 +- llvm/test/MC/Mips/mips-data-directives.s | 6 +- llvm/test/MC/Mips/mips-pdr.s | 4 +- llvm/test/MC/Mips/mips32r6/relocations.s | 26 +- .../MC/Mips/reloc-directive-label-offset.s | 28 +- llvm/test/MC/Mips/reloc-directive.s | 68 ++--- llvm/test/MC/X86/reloc-directive-elf-32.s | 12 +- .../Object/Lanai/yaml2obj-elf-lanai-rel.yaml | 14 +- .../test/Object/X86/yaml2obj-elf-x86-rel.yaml | 2 +- llvm/test/Object/dyn-rel-relocation.test | 6 - llvm/test/Object/yaml2obj-elf-rel-noref.yaml | 2 +- llvm/test/Object/yaml2obj-elf-rel.yaml | 6 +- .../llvm-objcopy/ELF/basic-relocations.test | 4 +- .../llvm-objcopy/ELF/localize-hidden.test | 2 +- .../ELF/no-symbol-relocation.test | 4 +- .../ELF/relocations-no-symtab.test | 2 +- .../ELF/broken-dynamic-reloc.test | 4 +- .../tools/llvm-readobj/ELF/dynamic-reloc.test | 10 +- .../tools/llvm-readobj/ELF/reloc-addends.test | 10 +- .../llvm-readobj/ELF/relocation-errors.test | 10 +- .../tools/llvm-readobj/ELF/relocations.test | 37 +-- .../tools/llvm-readobj/ELF/relr-relocs.test | 78 +++--- .../ELF/relocation-implicit-symbol-index.yaml | 4 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 10 +- 96 files changed, 637 insertions(+), 655 deletions(-) diff --git a/lld/test/ELF/arm-abs32-dyn.s b/lld/test/ELF/arm-abs32-dyn.s index 5d4aae71d003b5..9055aaf46a42f1 100644 --- a/lld/test/ELF/arm-abs32-dyn.s +++ b/lld/test/ELF/arm-abs32-dyn.s @@ -26,7 +26,7 @@ bar: // CHECK: Dynamic Relocations { // CHECK-NEXT: 0x30204 R_ARM_RELATIVE // CHECK-NEXT: 0x30208 R_ARM_RELATIVE -// CHECK-NEXT: 0x30200 R_ARM_ABS32 foo 0x0 +// CHECK-NEXT: 0x30200 R_ARM_ABS32 foo // CHECK-NEXT: } // CHECK: Symbols [ diff --git a/lld/test/ELF/arm-copy.s b/lld/test/ELF/arm-copy.s index 7cbc1cfde23919..d6de3045b0c8c6 100644 --- a/lld/test/ELF/arm-copy.s +++ b/lld/test/ELF/arm-copy.s @@ -38,13 +38,11 @@ _start: // CHECK-NEXT: Offset: 0x40220 // CHECK-NEXT: Type: R_ARM_COPY // CHECK-NEXT: Symbol: y -// CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x40224 // CHECK-NEXT: Type: R_ARM_COPY // CHECK-NEXT: Symbol: z -// CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: } diff --git a/lld/test/ELF/arm-gnu-ifunc-plt.s b/lld/test/ELF/arm-gnu-ifunc-plt.s index 0a415c936755f8..ca986f6c54e02d 100644 --- a/lld/test/ELF/arm-gnu-ifunc-plt.s +++ b/lld/test/ELF/arm-gnu-ifunc-plt.s @@ -10,14 +10,14 @@ // Check that the IRELATIVE relocations are last in the .got // CHECK: Relocations [ // CHECK-NEXT: Section (5) .rel.dyn { -// CHECK-NEXT: 0x302E0 R_ARM_GLOB_DAT bar2 0x0 -// CHECK-NEXT: 0x302E4 R_ARM_GLOB_DAT zed2 0x0 -// CHECK-NEXT: 0x302E8 R_ARM_IRELATIVE - 0x0 -// CHECK-NEXT: 0x302EC R_ARM_IRELATIVE - 0x0 +// CHECK-NEXT: 0x302E0 R_ARM_GLOB_DAT bar2 +// CHECK-NEXT: 0x302E4 R_ARM_GLOB_DAT zed2 +// CHECK-NEXT: 0x302E8 R_ARM_IRELATIVE - +// CHECK-NEXT: 0x302EC R_ARM_IRELATIVE - // CHECK-NEXT: } // CHECK-NEXT: Section (6) .rel.plt { -// CHECK-NEXT: 0x402FC R_ARM_JUMP_SLOT bar2 0x0 -// CHECK-NEXT: 0x40300 R_ARM_JUMP_SLOT zed2 0x0 +// CHECK-NEXT: 0x402FC R_ARM_JUMP_SLOT bar2 +// CHECK-NEXT: 0x40300 R_ARM_JUMP_SLOT zed2 // CHECK-NEXT: } // CHECK-NEXT: ] diff --git a/lld/test/ELF/arm-got-relative.s b/lld/test/ELF/arm-got-relative.s index 2ae32349877b66..66996a615bacb4 100644 --- a/lld/test/ELF/arm-got-relative.s +++ b/lld/test/ELF/arm-got-relative.s @@ -28,7 +28,7 @@ function: bx lr // CHECK: Dynamic Relocations { -// CHECK-NEXT: 0x2020C R_ARM_GLOB_DAT function 0x0 +// CHECK-NEXT: 0x2020C R_ARM_GLOB_DAT function // CHECK: Name: _GLOBAL_OFFSET_TABLE_ // CHECK-NEXT: Value: 0x2020C diff --git a/lld/test/ELF/arm-plt-reloc.s b/lld/test/ELF/arm-plt-reloc.s index 3adee648dad54a..17d2be5d2fb558 100644 --- a/lld/test/ELF/arm-plt-reloc.s +++ b/lld/test/ELF/arm-plt-reloc.s @@ -101,9 +101,9 @@ _start: // DSOREL-NEXT: EntrySize: // DSOREL: Relocations [ // DSOREL-NEXT: Section {{.*}} .rel.plt { -// DSOREL-NEXT: 0x302E4 R_ARM_JUMP_SLOT func1 0x0 -// DSOREL-NEXT: 0x302E8 R_ARM_JUMP_SLOT func2 0x0 -// DSOREL-NEXT: 0x302EC R_ARM_JUMP_SLOT func3 0x0 +// DSOREL-NEXT: 0x302E4 R_ARM_JUMP_SLOT func1 +// DSOREL-NEXT: 0x302E8 R_ARM_JUMP_SLOT func2 +// DSOREL-NEXT: 0x302EC R_ARM_JUMP_SLOT func3 // Test a large separation between the .plt and .got.plt // The .got.plt and .plt displacement is large but still within the range @@ -170,9 +170,9 @@ _start: // DSORELHIGH-NEXT: Address: 0x1100000 // DSORELHIGH: Relocations [ // DSORELHIGH-NEXT: Section {{.*}} .rel.plt { -// DSORELHIGH-NEXT: 0x110000C R_ARM_JUMP_SLOT func1 0x0 -// DSORELHIGH-NEXT: 0x1100010 R_ARM_JUMP_SLOT func2 0x0 -// DSORELHIGH-NEXT: 0x1100014 R_ARM_JUMP_SLOT func3 0x0 +// DSORELHIGH-NEXT: 0x110000C R_ARM_JUMP_SLOT func1 +// DSORELHIGH-NEXT: 0x1100010 R_ARM_JUMP_SLOT func2 +// DSORELHIGH-NEXT: 0x1100014 R_ARM_JUMP_SLOT func3 // Test a very large separation between the .plt and .got.plt so we must use // large plt entries that do not have any range restriction. @@ -238,9 +238,9 @@ _start: // DSORELLONG-NEXT: Address: 0x11111100 // DSORELLONG: Relocations [ // DSORELLONG-NEXT: Section {{.*}} .rel.plt { -// DSORELLONG-NEXT: 0x1111110C R_ARM_JUMP_SLOT func1 0x0 -// DSORELLONG-NEXT: 0x11111110 R_ARM_JUMP_SLOT func2 0x0 -// DSORELLONG-NEXT: 0x11111114 R_ARM_JUMP_SLOT func3 0x0 +// DSORELLONG-NEXT: 0x1111110C R_ARM_JUMP_SLOT func1 +// DSORELLONG-NEXT: 0x11111110 R_ARM_JUMP_SLOT func2 +// DSORELLONG-NEXT: 0x11111114 R_ARM_JUMP_SLOT func3 // Test a separation between the .plt and .got.plt that is part in range of // short table entries and part needing long entries. We use the long entries @@ -306,6 +306,6 @@ _start: // DSORELMIX-NEXT: ] // DSORELMIX-NEXT: Address: 0x8002020 // DSORELMIX: Section {{.*}} .rel.plt { -// DSORELMIX-NEXT: 0x800202C R_ARM_JUMP_SLOT func1 0x0 -// DSORELMIX-NEXT: 0x8002030 R_ARM_JUMP_SLOT func2 0x0 -// DSORELMIX-NEXT: 0x8002034 R_ARM_JUMP_SLOT func3 0x0 +// DSORELMIX-NEXT: 0x800202C R_ARM_JUMP_SLOT func1 +// DSORELMIX-NEXT: 0x8002030 R_ARM_JUMP_SLOT func2 +// DSORELMIX-NEXT: 0x8002034 R_ARM_JUMP_SLOT func3 diff --git a/lld/test/ELF/arm-target1.s b/lld/test/ELF/arm-target1.s index 6d715111949880..a95adc11d956c5 100644 --- a/lld/test/ELF/arm-target1.s +++ b/lld/test/ELF/arm-target1.s @@ -15,7 +15,7 @@ // RELOC: Relocations [ // RELOC: .rel.text { -// RELOC: 0x0 R_ARM_TARGET1 patatino 0x0 +// RELOC: 0x0 R_ARM_TARGET1 patatino // RELOC: } // RELOC: ] diff --git a/lld/test/ELF/arm-thumb-plt-reloc.s b/lld/test/ELF/arm-thumb-plt-reloc.s index 5d57a67156c70c..aa561771f14ba5 100644 --- a/lld/test/ELF/arm-thumb-plt-reloc.s +++ b/lld/test/ELF/arm-thumb-plt-reloc.s @@ -109,6 +109,6 @@ _start: // DSOREL-NEXT: EntrySize: // DSOREL: Relocations [ // DSOREL-NEXT: Section (5) .rel.plt { -// DSOREL-NEXT: 0x302E4 R_ARM_JUMP_SLOT func1 0x0 -// DSOREL-NEXT: 0x302E8 R_ARM_JUMP_SLOT func2 0x0 -// DSOREL-NEXT: 0x302EC R_ARM_JUMP_SLOT func3 0x0 +// DSOREL-NEXT: 0x302E4 R_ARM_JUMP_SLOT func1 +// DSOREL-NEXT: 0x302E8 R_ARM_JUMP_SLOT func2 +// DSOREL-NEXT: 0x302EC R_ARM_JUMP_SLOT func3 diff --git a/lld/test/ELF/arm-tls-ldm32.s b/lld/test/ELF/arm-tls-ldm32.s index b93291431722a7..d29288c06a90d3 100644 --- a/lld/test/ELF/arm-tls-ldm32.s +++ b/lld/test/ELF/arm-tls-ldm32.s @@ -55,7 +55,7 @@ x: // SEC: Size: 4 // SEC: Dynamic Relocations { -// SEC-NEXT: 0x20224 R_ARM_TLS_DTPMOD32 - 0x0 +// SEC-NEXT: 0x20224 R_ARM_TLS_DTPMOD32 - // CHECK: Disassembly of section .text: // CHECK-EMPTY: diff --git a/lld/test/ELF/dynamic-got.s b/lld/test/ELF/dynamic-got.s index 2f68ea703eab96..caf5fda06a257a 100644 --- a/lld/test/ELF/dynamic-got.s +++ b/lld/test/ELF/dynamic-got.s @@ -44,7 +44,7 @@ // CHECK: Relocations [ // CHECK-NEXT: Section ({{.*}}) .rel.dyn { -// CHECK-NEXT: 0x21C4 R_386_RELATIVE - 0x0 +// CHECK-NEXT: 0x21C4 R_386_RELATIVE - // CHECK-NEXT: } // CHECK-NEXT: ] diff --git a/lld/test/ELF/gnu-ifunc-plt-i386.s b/lld/test/ELF/gnu-ifunc-plt-i386.s index 86fc35e9ffb238..e2d4e2744bbfe3 100644 --- a/lld/test/ELF/gnu-ifunc-plt-i386.s +++ b/lld/test/ELF/gnu-ifunc-plt-i386.s @@ -16,13 +16,13 @@ /// other regular relocations (e.g. GLOB_DAT). // CHECK: Relocations [ // CHECK-NEXT: Section (4) .rel.dyn { -// CHECK-NEXT: 0x4022C8 R_386_GLOB_DAT bar3 0x0 -// CHECK-NEXT: 0x4032E0 R_386_IRELATIVE - 0x0 -// CHECK-NEXT: 0x4032E4 R_386_IRELATIVE - 0x0 +// CHECK-NEXT: 0x4022C8 R_386_GLOB_DAT bar3 +// CHECK-NEXT: 0x4032E0 R_386_IRELATIVE - +// CHECK-NEXT: 0x4032E4 R_386_IRELATIVE - // CHECK-NEXT: } // CHECK-NEXT: Section (5) .rel.plt { -// CHECK-NEXT: 0x4032D8 R_386_JUMP_SLOT bar2 0x0 -// CHECK-NEXT: 0x4032DC R_386_JUMP_SLOT zed2 0x0 +// CHECK-NEXT: 0x4032D8 R_386_JUMP_SLOT bar2 +// CHECK-NEXT: 0x4032DC R_386_JUMP_SLOT zed2 // CHECK-NEXT: } // Check that IRELATIVE .got.plt entries point to ifunc resolver and not diff --git a/lld/test/ELF/i386-got-value.s b/lld/test/ELF/i386-got-value.s index 2d7bd6804d6a42..a631169376ce53 100644 --- a/lld/test/ELF/i386-got-value.s +++ b/lld/test/ELF/i386-got-value.s @@ -24,7 +24,7 @@ # CHECK-NEXT: 0000: 00000000 # CHECK-NEXT: ) -# CHECK: R_386_GLOB_DAT bar 0x0 +# CHECK: R_386_GLOB_DAT bar movl bar@GOT(%eax), %eax diff --git a/lld/test/ELF/i386-plt.s b/lld/test/ELF/i386-plt.s index bad417851f539c..f6f28172ba331f 100644 --- a/lld/test/ELF/i386-plt.s +++ b/lld/test/ELF/i386-plt.s @@ -43,8 +43,8 @@ // &.got.plt[4] = 0x403278 + 16 = 0x403288 // CHECK: Relocations [ // CHECK-NEXT: Section ({{.*}}) .rel.plt { -// CHECK-NEXT: 0x403284 R_386_JUMP_SLOT bar 0x0 -// CHECK-NEXT: 0x403288 R_386_JUMP_SLOT zed 0x0 +// CHECK-NEXT: 0x403284 R_386_JUMP_SLOT bar +// CHECK-NEXT: 0x403288 R_386_JUMP_SLOT zed // CHECK-NEXT: } // CHECK-NEXT: ] @@ -113,8 +113,8 @@ // 0x3000 + got.plt.reserved(12) + 4 = 0x3010 // CHECKSHARED: Relocations [ // CHECKSHARED-NEXT: Section ({{.*}}) .rel.plt { -// CHECKSHARED-NEXT: 0x329C R_386_JUMP_SLOT bar 0x0 -// CHECKSHARED-NEXT: 0x32A0 R_386_JUMP_SLOT zed 0x0 +// CHECKSHARED-NEXT: 0x329C R_386_JUMP_SLOT bar +// CHECKSHARED-NEXT: 0x32A0 R_386_JUMP_SLOT zed // CHECKSHARED-NEXT: } // CHECKSHARED-NEXT: ] diff --git a/lld/test/ELF/i386-relative.s b/lld/test/ELF/i386-relative.s index d814b5b6786a34..7b04a18907a2a2 100644 --- a/lld/test/ELF/i386-relative.s +++ b/lld/test/ELF/i386-relative.s @@ -5,7 +5,7 @@ // CHECK: Relocations [ // CHECK-NEXT: Section ({{.*}}) .rel.dyn { -// CHECK-NEXT: R_386_RELATIVE - 0x0 +// CHECK-NEXT: R_386_RELATIVE - // CHECK-NEXT: } // CHECK-NEXT: ] diff --git a/lld/test/ELF/i386-tls-dynamic.s b/lld/test/ELF/i386-tls-dynamic.s index 34dc99dea43146..07e894795cc013 100644 --- a/lld/test/ELF/i386-tls-dynamic.s +++ b/lld/test/ELF/i386-tls-dynamic.s @@ -66,13 +66,13 @@ addl tls1@gotntpoff(%ebx),%eax # CHECK: Relocations [ # CHECK: Section ({{.+}}) .rel.dyn { -# CHECK-NEXT: 0x2368 R_386_TLS_DTPMOD32 - 0x0 -# CHECK-NEXT: 0x2358 R_386_TLS_DTPMOD32 tls0 0x0 -# CHECK-NEXT: 0x235C R_386_TLS_DTPOFF32 tls0 0x0 -# CHECK-NEXT: 0x2370 R_386_TLS_TPOFF tls0 0x0 -# CHECK-NEXT: 0x2360 R_386_TLS_DTPMOD32 tls1 0x0 -# CHECK-NEXT: 0x2364 R_386_TLS_DTPOFF32 tls1 0x0 -# CHECK-NEXT: 0x2374 R_386_TLS_TPOFF tls1 0x0 +# CHECK-NEXT: 0x2368 R_386_TLS_DTPMOD32 - +# CHECK-NEXT: 0x2358 R_386_TLS_DTPMOD32 tls0 +# CHECK-NEXT: 0x235C R_386_TLS_DTPOFF32 tls0 +# CHECK-NEXT: 0x2370 R_386_TLS_TPOFF tls0 +# CHECK-NEXT: 0x2360 R_386_TLS_DTPMOD32 tls1 +# CHECK-NEXT: 0x2364 R_386_TLS_DTPOFF32 tls1 +# CHECK-NEXT: 0x2374 R_386_TLS_TPOFF tls1 # CHECK-NEXT: } # DIS: Disassembly of section .text: diff --git a/lld/test/ELF/i386-tls-gdiele.s b/lld/test/ELF/i386-tls-gdiele.s index 315850acf3928e..0e4a92d34f865d 100644 --- a/lld/test/ELF/i386-tls-gdiele.s +++ b/lld/test/ELF/i386-tls-gdiele.s @@ -8,8 +8,8 @@ // NORELOC: Relocations [ // NORELOC-NEXT: Section ({{.*}}) .rel.dyn { -// NORELOC-NEXT: 0x402258 R_386_TLS_TPOFF tlsshared0 0x0 -// NORELOC-NEXT: 0x40225C R_386_TLS_TPOFF tlsshared1 0x0 +// NORELOC-NEXT: 0x402258 R_386_TLS_TPOFF tlsshared0 +// NORELOC-NEXT: 0x40225C R_386_TLS_TPOFF tlsshared1 // NORELOC-NEXT: } // NORELOC-NEXT: ] diff --git a/lld/test/ELF/i386-tls-ie-local.s b/lld/test/ELF/i386-tls-ie-local.s index dd7de7b431e52f..2beebd0a4d523f 100644 --- a/lld/test/ELF/i386-tls-ie-local.s +++ b/lld/test/ELF/i386-tls-ie-local.s @@ -22,8 +22,8 @@ # CHECK-NEXT: 0000: 00000000 04000000 # CHECK-NEXT: ) -# CHECK: R_386_TLS_TPOFF - 0x0 -# CHECK-NEXT: R_386_TLS_TPOFF - 0x0 +# CHECK: R_386_TLS_TPOFF - +# CHECK-NEXT: R_386_TLS_TPOFF - movl bar1@GOTNTPOFF(%eax), %ecx movl bar2@GOTNTPOFF(%eax), %eax diff --git a/lld/test/ELF/i386-tls-ie-shared.s b/lld/test/ELF/i386-tls-ie-shared.s index f38267e0b35df1..a2a249fb33e5a9 100644 --- a/lld/test/ELF/i386-tls-ie-shared.s +++ b/lld/test/ELF/i386-tls-ie-shared.s @@ -24,18 +24,18 @@ // GOTRELSHARED: 0x6FFFFFFA RELCOUNT 8 // GOTRELSHARED: Relocations [ // GOTRELSHARED-NEXT: Section ({{.*}}) .rel.dyn { -// GOTRELSHARED-NEXT: 0x22DA R_386_RELATIVE - 0x0 -// GOTRELSHARED-NEXT: 0x22E2 R_386_RELATIVE - 0x0 -// GOTRELSHARED-NEXT: 0x22EB R_386_RELATIVE - 0x0 -// GOTRELSHARED-NEXT: 0x22F4 R_386_RELATIVE - 0x0 -// GOTRELSHARED-NEXT: 0x22FC R_386_RELATIVE - 0x0 -// GOTRELSHARED-NEXT: 0x2305 R_386_RELATIVE - 0x0 -// GOTRELSHARED-NEXT: 0x230E R_386_RELATIVE - 0x0 -// GOTRELSHARED-NEXT: 0x2317 R_386_RELATIVE - 0x0 -// GOTRELSHARED-NEXT: 0x3390 R_386_TLS_TPOFF tlsshared0 0x0 -// GOTRELSHARED-NEXT: 0x3394 R_386_TLS_TPOFF tlsshared1 0x0 -// GOTRELSHARED-NEXT: 0x3388 R_386_TLS_TPOFF tlslocal0 0x0 -// GOTRELSHARED-NEXT: 0x338C R_386_TLS_TPOFF tlslocal1 0x0 +// GOTRELSHARED-NEXT: 0x22DA R_386_RELATIVE - +// GOTRELSHARED-NEXT: 0x22E2 R_386_RELATIVE - +// GOTRELSHARED-NEXT: 0x22EB R_386_RELATIVE - +// GOTRELSHARED-NEXT: 0x22F4 R_386_RELATIVE - +// GOTRELSHARED-NEXT: 0x22FC R_386_RELATIVE - +// GOTRELSHARED-NEXT: 0x2305 R_386_RELATIVE - +// GOTRELSHARED-NEXT: 0x230E R_386_RELATIVE - +// GOTRELSHARED-NEXT: 0x2317 R_386_RELATIVE - +// GOTRELSHARED-NEXT: 0x3390 R_386_TLS_TPOFF tlsshared0 +// GOTRELSHARED-NEXT: 0x3394 R_386_TLS_TPOFF tlsshared1 +// GOTRELSHARED-NEXT: 0x3388 R_386_TLS_TPOFF tlslocal0 +// GOTRELSHARED-NEXT: 0x338C R_386_TLS_TPOFF tlslocal1 // GOTRELSHARED-NEXT: } // GOTRELSHARED-NEXT: ] diff --git a/lld/test/ELF/i386-tls-le.s b/lld/test/ELF/i386-tls-le.s index be82edb3965c53..b94ffbb67f07ee 100644 --- a/lld/test/ELF/i386-tls-le.s +++ b/lld/test/ELF/i386-tls-le.s @@ -63,9 +63,9 @@ _start: # RELOCSHARED: Relocations [ # RELOCSHARED-NEXT: Section (5) .rel.dyn { -# RELOCSHARED-NEXT: 0x2219 R_386_TLS_TPOFF32 var 0x0 -# RELOCSHARED-NEXT: 0x223D R_386_TLS_TPOFF var 0x0 -# RELOCSHARED-NEXT: 0x2227 R_386_TLS_TPOFF32 var1 0x0 -# RELOCSHARED-NEXT: 0x224A R_386_TLS_TPOFF var1 0x0 +# RELOCSHARED-NEXT: 0x2219 R_386_TLS_TPOFF32 var +# RELOCSHARED-NEXT: 0x223D R_386_TLS_TPOFF var +# RELOCSHARED-NEXT: 0x2227 R_386_TLS_TPOFF32 var1 +# RELOCSHARED-NEXT: 0x224A R_386_TLS_TPOFF var1 # RELOCSHARED-NEXT: } # RELOCSHARED-NEXT: ] diff --git a/lld/test/ELF/i386-tls-opt-iele-nopic.s b/lld/test/ELF/i386-tls-opt-iele-nopic.s index f3ff13fcd0576f..641552d1b9e411 100644 --- a/lld/test/ELF/i386-tls-opt-iele-nopic.s +++ b/lld/test/ELF/i386-tls-opt-iele-nopic.s @@ -24,8 +24,8 @@ // GOTREL-NEXT: } // GOTREL: Relocations [ // GOTREL-NEXT: Section ({{.*}}) .rel.dyn { -// GOTREL-NEXT: 0x402258 R_386_TLS_TPOFF tlsshared0 0x0 -// GOTREL-NEXT: 0x40225C R_386_TLS_TPOFF tlsshared1 0x0 +// GOTREL-NEXT: 0x402258 R_386_TLS_TPOFF tlsshared0 +// GOTREL-NEXT: 0x40225C R_386_TLS_TPOFF tlsshared1 // GOTREL-NEXT: } // GOTREL-NEXT: ] diff --git a/lld/test/ELF/i386-zrel-zrela.s b/lld/test/ELF/i386-zrel-zrela.s index 61b9e4122f0f50..27ff3bcab9a539 100644 --- a/lld/test/ELF/i386-zrel-zrela.s +++ b/lld/test/ELF/i386-zrel-zrela.s @@ -17,13 +17,13 @@ # REL-NEXT: PLTGOT {{.*}} # REL-NEXT: PLTREL REL{{$}} # REL: .rel.dyn { -# REL-NEXT: R_386_RELATIVE - 0x0 -# REL-NEXT: R_386_GLOB_DAT func 0x0 -# REL-NEXT: R_386_TLS_TPOFF tls 0x0 -# REL-NEXT: R_386_32 _start 0x0 +# REL-NEXT: R_386_RELATIVE - +# REL-NEXT: R_386_GLOB_DAT func +# REL-NEXT: R_386_TLS_TPOFF tls +# REL-NEXT: R_386_32 _start # REL-NEXT: } # REL-NEXT: .rel.plt { -# REL-NEXT: R_386_JUMP_SLOT func 0x0 +# REL-NEXT: R_386_JUMP_SLOT func # REL-NEXT: } # REL: Hex dump of section '.data': diff --git a/lld/test/ELF/mips-26.s b/lld/test/ELF/mips-26.s index 1cfa8ba02bed07..da82eed1509218 100644 --- a/lld/test/ELF/mips-26.s +++ b/lld/test/ELF/mips-26.s @@ -62,7 +62,7 @@ # REL: Relocations [ # REL-NEXT: Section (7) .rel.plt { -# REL-NEXT: 0x[[PLTSLOT:[0-9A-F]+]] R_MIPS_JUMP_SLOT foo0 0x0 +# REL-NEXT: 0x[[PLTSLOT:[0-9A-F]+]] R_MIPS_JUMP_SLOT foo0 # REL-NEXT: } # REL-NEXT: ] diff --git a/lld/test/ELF/mips-eh_frame-pic.s b/lld/test/ELF/mips-eh_frame-pic.s index f5acf165e9af91..4ec84a88695477 100644 --- a/lld/test/ELF/mips-eh_frame-pic.s +++ b/lld/test/ELF/mips-eh_frame-pic.s @@ -34,10 +34,10 @@ # RUN: llvm-dwarfdump --eh-frame %t-pic32.so | FileCheck %s --check-prefix=PIC-EH-FRAME # RELOCS: .rel{{a?}}.eh_frame { -# ABS32-RELOCS-NEXT: 0x1C R_MIPS_32 .text 0x0 -# ABS64-RELOCS-NEXT: 0x1C R_MIPS_64/R_MIPS_NONE/R_MIPS_NONE .text 0x0 -# PIC64-RELOCS-NEXT: 0x1C R_MIPS_PC32/R_MIPS_NONE/R_MIPS_NONE - 0x0 -# PIC32-RELOCS-NEXT: 0x1C R_MIPS_PC32 - 0x0 +# ABS32-RELOCS-NEXT: 0x1C R_MIPS_32 .text +# ABS64-RELOCS-NEXT: 0x1C R_MIPS_64/R_MIPS_NONE/R_MIPS_NONE .text +# PIC64-RELOCS-NEXT: 0x1C R_MIPS_PC32/R_MIPS_NONE/R_MIPS_NONE - +# PIC32-RELOCS-NEXT: 0x1C R_MIPS_PC32 - # RELOCS-NEXT: } # ABS64-EH-FRAME: Augmentation data: 0C diff --git a/lld/test/ELF/mips-lo16-not-relative.s b/lld/test/ELF/mips-lo16-not-relative.s index 2af1eead884746..591a988c4b91bc 100644 --- a/lld/test/ELF/mips-lo16-not-relative.s +++ b/lld/test/ELF/mips-lo16-not-relative.s @@ -12,7 +12,7 @@ # CHECK: Relocations [ # CHECK-NEXT: Section (7) .rel.dyn { -# CHECK-NEXT: 0x{{[0-9A-F]+}} R_MIPS_COPY data0 0x0 +# CHECK-NEXT: 0x{{[0-9A-F]+}} R_MIPS_COPY data0 # CHECK-NEXT: } # CHECK-NEXT: ] diff --git a/lld/test/ELF/mips-mgot.s b/lld/test/ELF/mips-mgot.s index 610704f06631fc..55741e4107a579 100644 --- a/lld/test/ELF/mips-mgot.s +++ b/lld/test/ELF/mips-mgot.s @@ -30,20 +30,20 @@ # GOT: Relocations [ # GOT-NEXT: Section (7) .rel.dyn { -# GOT-NEXT: 0x70018 R_MIPS_REL32 - 0x0 -# GOT-NEXT: 0x7001C R_MIPS_REL32 - 0x0 -# GOT-NEXT: 0x70020 R_MIPS_REL32 - 0x0 -# GOT-NEXT: 0x70024 R_MIPS_REL32 - 0x0 -# GOT-NEXT: 0x70028 R_MIPS_REL32 - 0x0 -# GOT-NEXT: 0x7002C R_MIPS_REL32 - 0x0 -# GOT-NEXT: 0x70030 R_MIPS_REL32 foo0 0x0 -# GOT-NEXT: 0x70034 R_MIPS_REL32 foo2 0x0 -# GOT-NEXT: 0x70044 R_MIPS_TLS_DTPMOD32 - 0x0 -# GOT-NEXT: 0x70010 R_MIPS_TLS_TPREL32 tls0 0x0 -# GOT-NEXT: 0x70038 R_MIPS_TLS_TPREL32 tls0 0x0 -# GOT-NEXT: 0x7003C R_MIPS_TLS_DTPMOD32 tls0 0x0 -# GOT-NEXT: 0x70040 R_MIPS_TLS_DTPREL32 tls0 0x0 -# GOT-NEXT: 0x70014 R_MIPS_TLS_TPREL32 tls1 0x0 +# GOT-NEXT: 0x70018 R_MIPS_REL32 - +# GOT-NEXT: 0x7001C R_MIPS_REL32 - +# GOT-NEXT: 0x70020 R_MIPS_REL32 - +# GOT-NEXT: 0x70024 R_MIPS_REL32 - +# GOT-NEXT: 0x70028 R_MIPS_REL32 - +# GOT-NEXT: 0x7002C R_MIPS_REL32 - +# GOT-NEXT: 0x70030 R_MIPS_REL32 foo0 +# GOT-NEXT: 0x70034 R_MIPS_REL32 foo2 +# GOT-NEXT: 0x70044 R_MIPS_TLS_DTPMOD32 - +# GOT-NEXT: 0x70010 R_MIPS_TLS_TPREL32 tls0 +# GOT-NEXT: 0x70038 R_MIPS_TLS_TPREL32 tls0 +# GOT-NEXT: 0x7003C R_MIPS_TLS_DTPMOD32 tls0 +# GOT-NEXT: 0x70040 R_MIPS_TLS_DTPREL32 tls0 +# GOT-NEXT: 0x70014 R_MIPS_TLS_TPREL32 tls1 # GOT-NEXT: } # GOT-NEXT: ] diff --git a/lld/test/ELF/mips-plt-copy.s b/lld/test/ELF/mips-plt-copy.s index acdd71987ca026..b7eaf6fbaadf9e 100644 --- a/lld/test/ELF/mips-plt-copy.s +++ b/lld/test/ELF/mips-plt-copy.s @@ -11,12 +11,12 @@ # CHECK: Relocations [ # CHECK-NEXT: Section ({{.*}}) .rel.dyn { -# CHECK-DAG: 0x{{[0-9A-F]+}} R_MIPS_COPY data0 0x0 -# CHECK-DAG: 0x{{[0-9A-F]+}} R_MIPS_COPY data1 0x0 +# CHECK-DAG: 0x{{[0-9A-F]+}} R_MIPS_COPY data0 +# CHECK-DAG: 0x{{[0-9A-F]+}} R_MIPS_COPY data1 # CHECK-NEXT: } # CHECK-NEXT: Section ({{.*}}) .rel.plt { -# CHECK-DAG: 0x{{[0-9A-F]+}} R_MIPS_JUMP_SLOT foo0 0x0 -# CHECK-DAG: 0x{{[0-9A-F]+}} R_MIPS_JUMP_SLOT foo1 0x0 +# CHECK-DAG: 0x{{[0-9A-F]+}} R_MIPS_JUMP_SLOT foo0 +# CHECK-DAG: 0x{{[0-9A-F]+}} R_MIPS_JUMP_SLOT foo1 # CHECK-NEXT: } # CHECK-NEXT: ] diff --git a/lld/test/ELF/mips-tls-64.s b/lld/test/ELF/mips-tls-64.s index 02722bda49f7a1..f5ea5bdd861fd2 100644 --- a/lld/test/ELF/mips-tls-64.s +++ b/lld/test/ELF/mips-tls-64.s @@ -41,9 +41,9 @@ # CHECK: Relocations [ # CHECK-NEXT: Section (7) .rel.dyn { -# CHECK-NEXT: 0x30010 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 -# CHECK-NEXT: 0x30020 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 -# CHECK-NEXT: 0x30028 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 +# CHECK-NEXT: 0x30010 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE foo +# CHECK-NEXT: 0x30020 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE foo +# CHECK-NEXT: 0x30028 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE foo # CHECK-NEXT: } # CHECK-NEXT: ] # CHECK: Primary GOT { @@ -73,13 +73,13 @@ # SO: Relocations [ # SO-NEXT: Section (7) .rel.dyn { -# SO-NEXT: 0x30030 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE - 0x0 -# SO-NEXT: 0x30018 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE bar 0x0 -# SO-NEXT: 0x30040 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE bar 0x0 -# SO-NEXT: 0x30048 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE bar 0x0 -# SO-NEXT: 0x30010 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 -# SO-NEXT: 0x30020 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 -# SO-NEXT: 0x30028 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 +# SO-NEXT: 0x30030 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE - +# SO-NEXT: 0x30018 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE bar +# SO-NEXT: 0x30040 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE bar +# SO-NEXT: 0x30048 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE bar +# SO-NEXT: 0x30010 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE foo +# SO-NEXT: 0x30020 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE foo +# SO-NEXT: 0x30028 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE foo # SO-NEXT: } # SO-NEXT: ] # SO: Primary GOT { diff --git a/lld/test/ELF/mips-tls.s b/lld/test/ELF/mips-tls.s index fd89230c768d78..703488feb6a021 100644 --- a/lld/test/ELF/mips-tls.s +++ b/lld/test/ELF/mips-tls.s @@ -39,9 +39,9 @@ # CHECK: Relocations [ # CHECK-NEXT: Section (7) .rel.dyn { -# CHECK-NEXT: 0x30008 R_MIPS_TLS_TPREL32 foo 0x0 -# CHECK-NEXT: 0x30010 R_MIPS_TLS_DTPMOD32 foo 0x0 -# CHECK-NEXT: 0x30014 R_MIPS_TLS_DTPREL32 foo 0x0 +# CHECK-NEXT: 0x30008 R_MIPS_TLS_TPREL32 foo +# CHECK-NEXT: 0x30010 R_MIPS_TLS_DTPMOD32 foo +# CHECK-NEXT: 0x30014 R_MIPS_TLS_DTPREL32 foo # CHECK-NEXT: } # CHECK-NEXT: ] # CHECK: Primary GOT { @@ -69,13 +69,13 @@ # SO: Relocations [ # SO-NEXT: Section (7) .rel.dyn { -# SO-NEXT: 0x30018 R_MIPS_TLS_DTPMOD32 - 0x0 -# SO-NEXT: 0x3000C R_MIPS_TLS_TPREL32 bar 0x0 -# SO-NEXT: 0x30020 R_MIPS_TLS_DTPMOD32 bar 0x0 -# SO-NEXT: 0x30024 R_MIPS_TLS_DTPREL32 bar 0x0 -# SO-NEXT: 0x30008 R_MIPS_TLS_TPREL32 foo 0x0 -# SO-NEXT: 0x30010 R_MIPS_TLS_DTPMOD32 foo 0x0 -# SO-NEXT: 0x30014 R_MIPS_TLS_DTPREL32 foo 0x0 +# SO-NEXT: 0x30018 R_MIPS_TLS_DTPMOD32 - +# SO-NEXT: 0x3000C R_MIPS_TLS_TPREL32 bar +# SO-NEXT: 0x30020 R_MIPS_TLS_DTPMOD32 bar +# SO-NEXT: 0x30024 R_MIPS_TLS_DTPREL32 bar +# SO-NEXT: 0x30008 R_MIPS_TLS_TPREL32 foo +# SO-NEXT: 0x30010 R_MIPS_TLS_DTPMOD32 foo +# SO-NEXT: 0x30014 R_MIPS_TLS_DTPREL32 foo # SO-NEXT: } # SO-NEXT: ] # SO: Primary GOT { diff --git a/lld/test/ELF/mips64-eh-abs-reloc.s b/lld/test/ELF/mips64-eh-abs-reloc.s index 7c31e1b51edab6..a981f121197afc 100644 --- a/lld/test/ELF/mips64-eh-abs-reloc.s +++ b/lld/test/ELF/mips64-eh-abs-reloc.s @@ -21,7 +21,7 @@ # PIC-RELOCS: Relocations [ # PIC-RELOCS-NEXT: Section (7) .rel.dyn { -# PIC-RELOCS-NEXT: {{0x.+}} R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE - 0x0 +# PIC-RELOCS-NEXT: {{0x.+}} R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE - # PIC-RELOCS-NEXT: } # PIC-RELOCS-NEXT:] diff --git a/lld/test/ELF/pack-dyn-relocs-arm2.s b/lld/test/ELF/pack-dyn-relocs-arm2.s index b2aa8a5f0add4a..0648edba217fb4 100644 --- a/lld/test/ELF/pack-dyn-relocs-arm2.s +++ b/lld/test/ELF/pack-dyn-relocs-arm2.s @@ -8,40 +8,40 @@ // RUN: llvm-readobj -r %t.exe | FileCheck %s // CHECK: Section (5) .relr.dyn { -// CHECK-NEXT: 0x301E8 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x301EC R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x301F0 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x301F4 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x301F8 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x301FC R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30200 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30204 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30208 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x3020C R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30210 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30214 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30218 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x3021C R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30220 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30224 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30228 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x3022C R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30230 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30234 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30238 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x3023C R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30240 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30244 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30248 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x3024C R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30250 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30254 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30258 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x3025C R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30260 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30264 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x30268 R_ARM_RELATIVE - 0x0 -// CHECK-NEXT: 0x3026C R_ARM_RELATIVE - 0x0 +// CHECK-NEXT: 0x301E8 R_ARM_RELATIVE - +// CHECK-NEXT: 0x301EC R_ARM_RELATIVE - +// CHECK-NEXT: 0x301F0 R_ARM_RELATIVE - +// CHECK-NEXT: 0x301F4 R_ARM_RELATIVE - +// CHECK-NEXT: 0x301F8 R_ARM_RELATIVE - +// CHECK-NEXT: 0x301FC R_ARM_RELATIVE - +// CHECK-NEXT: 0x30200 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30204 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30208 R_ARM_RELATIVE - +// CHECK-NEXT: 0x3020C R_ARM_RELATIVE - +// CHECK-NEXT: 0x30210 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30214 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30218 R_ARM_RELATIVE - +// CHECK-NEXT: 0x3021C R_ARM_RELATIVE - +// CHECK-NEXT: 0x30220 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30224 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30228 R_ARM_RELATIVE - +// CHECK-NEXT: 0x3022C R_ARM_RELATIVE - +// CHECK-NEXT: 0x30230 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30234 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30238 R_ARM_RELATIVE - +// CHECK-NEXT: 0x3023C R_ARM_RELATIVE - +// CHECK-NEXT: 0x30240 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30244 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30248 R_ARM_RELATIVE - +// CHECK-NEXT: 0x3024C R_ARM_RELATIVE - +// CHECK-NEXT: 0x30250 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30254 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30258 R_ARM_RELATIVE - +// CHECK-NEXT: 0x3025C R_ARM_RELATIVE - +// CHECK-NEXT: 0x30260 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30264 R_ARM_RELATIVE - +// CHECK-NEXT: 0x30268 R_ARM_RELATIVE - +// CHECK-NEXT: 0x3026C R_ARM_RELATIVE - // CHECK-NEXT: } // RUN: llvm-readobj -S --dynamic-table %t.exe | FileCheck --check-prefix=HEADER %s diff --git a/lld/test/ELF/pack-dyn-relocs-relr-loop.s b/lld/test/ELF/pack-dyn-relocs-relr-loop.s index 883b8a3339a662..24f39cc390b865 100644 --- a/lld/test/ELF/pack-dyn-relocs-relr-loop.s +++ b/lld/test/ELF/pack-dyn-relocs-relr-loop.s @@ -12,9 +12,9 @@ # CHECK: .relr.dyn needs 1 padding word(s) # RELR: .relr.dyn { -# RELR-NEXT: 0x2F30 R_AARCH64_RELATIVE - 0x0 -# RELR-NEXT: 0x2F38 R_AARCH64_RELATIVE - 0x0 -# RELR-NEXT: 0x3000 R_AARCH64_RELATIVE - 0x0 +# RELR-NEXT: 0x2F30 R_AARCH64_RELATIVE - +# RELR-NEXT: 0x2F38 R_AARCH64_RELATIVE - +# RELR-NEXT: 0x3000 R_AARCH64_RELATIVE - # RELR-NEXT: } .section .data.rel.ro diff --git a/lld/test/ELF/pack-dyn-relocs.s b/lld/test/ELF/pack-dyn-relocs.s index 5b4d91070f5ec9..174d72b69dc888 100644 --- a/lld/test/ELF/pack-dyn-relocs.s +++ b/lld/test/ELF/pack-dyn-relocs.s @@ -8,42 +8,42 @@ /// Unpacked should have the relative relocations in their natural order. /// UNPACKED32: Section ({{.+}}) .rel.dyn { -// UNPACKED32-NEXT: 0x30324 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30328 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x3032C R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30330 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30334 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30338 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x3033C R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30340 R_ARM_RELATIVE - 0x0 - -// UNPACKED32-NEXT: 0x30348 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x3034C R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30350 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30354 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30358 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x3035C R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30360 R_ARM_RELATIVE - 0x0 - -// UNPACKED32-NEXT: 0x3036C R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30370 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30374 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30378 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x3037C R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30380 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30384 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30388 R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x3038C R_ARM_RELATIVE - 0x0 -// UNPACKED32-NEXT: 0x30391 R_ARM_RELATIVE - 0x0 - -// UNPACKED32-NEXT: 0x30344 R_ARM_ABS32 bar2 0x0 -// UNPACKED32-NEXT: 0x30368 R_ARM_ABS32 bar2 0x0 -// UNPACKED32-NEXT: 0x30395 R_ARM_ABS32 bar2 0x0 -// UNPACKED32-NEXT: 0x30399 R_ARM_ABS32 bar2 0x0 -// UNPACKED32-NEXT: 0x3039D R_ARM_ABS32 bar2 0x0 -// UNPACKED32-NEXT: 0x303A1 R_ARM_ABS32 bar2 0x0 -// UNPACKED32-NEXT: 0x303A5 R_ARM_ABS32 bar2 0x0 -// UNPACKED32-NEXT: 0x30364 R_ARM_ABS32 zed2 0x0 +// UNPACKED32-NEXT: 0x30324 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30328 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x3032C R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30330 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30334 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30338 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x3033C R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30340 R_ARM_RELATIVE - + +// UNPACKED32-NEXT: 0x30348 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x3034C R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30350 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30354 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30358 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x3035C R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30360 R_ARM_RELATIVE - + +// UNPACKED32-NEXT: 0x3036C R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30370 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30374 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30378 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x3037C R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30380 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30384 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30388 R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x3038C R_ARM_RELATIVE - +// UNPACKED32-NEXT: 0x30391 R_ARM_RELATIVE - + +// UNPACKED32-NEXT: 0x30344 R_ARM_ABS32 bar2 +// UNPACKED32-NEXT: 0x30368 R_ARM_ABS32 bar2 +// UNPACKED32-NEXT: 0x30395 R_ARM_ABS32 bar2 +// UNPACKED32-NEXT: 0x30399 R_ARM_ABS32 bar2 +// UNPACKED32-NEXT: 0x3039D R_ARM_ABS32 bar2 +// UNPACKED32-NEXT: 0x303A1 R_ARM_ABS32 bar2 +// UNPACKED32-NEXT: 0x303A5 R_ARM_ABS32 bar2 +// UNPACKED32-NEXT: 0x30364 R_ARM_ABS32 zed2 // UNPACKED32-NEXT: } // RUN: ld.lld -pie --pack-dyn-relocs=android %t.a32.o %t.a32.so -o %t3.a32 @@ -73,40 +73,40 @@ /// by the larger groups of relative relocations (i.e. the 8 and 9 followed /// by the 7.) // ANDROID32: Section ({{.+}}) .rel.dyn { -// ANDROID32-NEXT: 0x30254 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x30258 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x3025C R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x30260 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x30264 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x30268 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x3026C R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x30270 R_ARM_RELATIVE - 0x0 - -// ANDROID32-NEXT: 0x3029C R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x302A0 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x302A4 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x302A8 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x302AC R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x302B0 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x302B4 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x302B8 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x302BC R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x30278 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x3027C R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x30280 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x30284 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x30288 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x3028C R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x30290 R_ARM_RELATIVE - 0x0 -// ANDROID32-NEXT: 0x302C1 R_ARM_RELATIVE - 0x0 - -// ANDROID32-NEXT: 0x30274 R_ARM_ABS32 bar2 0x0 -// ANDROID32-NEXT: 0x30298 R_ARM_ABS32 bar2 0x0 -// ANDROID32-NEXT: 0x302C5 R_ARM_ABS32 bar2 0x0 -// ANDROID32-NEXT: 0x302C9 R_ARM_ABS32 bar2 0x0 -// ANDROID32-NEXT: 0x302CD R_ARM_ABS32 bar2 0x0 -// ANDROID32-NEXT: 0x302D1 R_ARM_ABS32 bar2 0x0 -// ANDROID32-NEXT: 0x302D5 R_ARM_ABS32 bar2 0x0 +// ANDROID32-NEXT: 0x30254 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x30258 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x3025C R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x30260 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x30264 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x30268 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x3026C R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x30270 R_ARM_RELATIVE - + +// ANDROID32-NEXT: 0x3029C R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x302A0 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x302A4 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x302A8 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x302AC R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x302B0 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x302B4 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x302B8 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x302BC R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x30278 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x3027C R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x30280 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x30284 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x30288 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x3028C R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x30290 R_ARM_RELATIVE - +// ANDROID32-NEXT: 0x302C1 R_ARM_RELATIVE - + +// ANDROID32-NEXT: 0x30274 R_ARM_ABS32 bar2 +// ANDROID32-NEXT: 0x30298 R_ARM_ABS32 bar2 +// ANDROID32-NEXT: 0x302C5 R_ARM_ABS32 bar2 +// ANDROID32-NEXT: 0x302C9 R_ARM_ABS32 bar2 +// ANDROID32-NEXT: 0x302CD R_ARM_ABS32 bar2 +// ANDROID32-NEXT: 0x302D1 R_ARM_ABS32 bar2 +// ANDROID32-NEXT: 0x302D5 R_ARM_ABS32 bar2 // ANDROID32-NEXT: 0x30294 R_ARM_ABS32 zed2 0x0 // ANDROID32-NEXT: } @@ -147,43 +147,43 @@ /// but contains only the relative relocations. /// Any relative relocations with odd offset stay in SHT_REL. // RELR32: Section ({{.+}}) .rel.dyn { -// RELR32-NEXT: 0x302F1 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302A4 R_ARM_ABS32 bar2 0x0 -// RELR32-NEXT: 0x302C8 R_ARM_ABS32 bar2 0x0 -// RELR32-NEXT: 0x302F5 R_ARM_ABS32 bar2 0x0 -// RELR32-NEXT: 0x302F9 R_ARM_ABS32 bar2 0x0 -// RELR32-NEXT: 0x302FD R_ARM_ABS32 bar2 0x0 -// RELR32-NEXT: 0x30301 R_ARM_ABS32 bar2 0x0 -// RELR32-NEXT: 0x30305 R_ARM_ABS32 bar2 0x0 -// RELR32-NEXT: 0x302C4 R_ARM_ABS32 zed2 0x0 +// RELR32-NEXT: 0x302F1 R_ARM_RELATIVE - +// RELR32-NEXT: 0x302A4 R_ARM_ABS32 bar2 +// RELR32-NEXT: 0x302C8 R_ARM_ABS32 bar2 +// RELR32-NEXT: 0x302F5 R_ARM_ABS32 bar2 +// RELR32-NEXT: 0x302F9 R_ARM_ABS32 bar2 +// RELR32-NEXT: 0x302FD R_ARM_ABS32 bar2 +// RELR32-NEXT: 0x30301 R_ARM_ABS32 bar2 +// RELR32-NEXT: 0x30305 R_ARM_ABS32 bar2 +// RELR32-NEXT: 0x302C4 R_ARM_ABS32 zed2 // RELR32-NEXT: } // RELR32-NEXT: Section ({{.+}}) .relr.dyn { -// RELR32-NEXT: 0x30284 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x30288 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x3028C R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x30290 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x30294 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x30298 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x3029C R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302A0 R_ARM_RELATIVE - 0x0 - -// RELR32-NEXT: 0x302A8 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302AC R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302B0 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302B4 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302B8 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302BC R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302C0 R_ARM_RELATIVE - 0x0 - -// RELR32-NEXT: 0x302CC R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302D0 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302D4 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302D8 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302DC R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302E0 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302E4 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302E8 R_ARM_RELATIVE - 0x0 -// RELR32-NEXT: 0x302EC R_ARM_RELATIVE - 0x0 +// RELR32-NEXT: 0x30284 R_ARM_RELATIVE - +// RELR32-NEXT: 0x30288 R_ARM_RELATIVE - +// RELR32-NEXT: 0x3028C R_ARM_RELATIVE - +// RELR32-NEXT: 0x30290 R_ARM_RELATIVE - +// RELR32-NEXT: 0x30294 R_ARM_RELATIVE - +// RELR32-NEXT: 0x30298 R_ARM_RELATIVE - +// RELR32-NEXT: 0x3029C R_ARM_RELATIVE - +// RELR32-NEXT: 0x302A0 R_ARM_RELATIVE - + +// RELR32-NEXT: 0x302A8 R_ARM_RELATIVE - +// RELR32-NEXT: 0x302AC R_ARM_RELATIVE - +// RELR32-NEXT: 0x302B0 R_ARM_RELATIVE - +// RELR32-NEXT: 0x302B4 R_ARM_RELATIVE - +// RELR32-NEXT: 0x302B8 R_ARM_RELATIVE - +// RELR32-NEXT: 0x302BC R_ARM_RELATIVE - +// RELR32-NEXT: 0x302C0 R_ARM_RELATIVE - + +// RELR32-NEXT: 0x302CC R_ARM_RELATIVE - +// RELR32-NEXT: 0x302D0 R_ARM_RELATIVE - +// RELR32-NEXT: 0x302D4 R_ARM_RELATIVE - +// RELR32-NEXT: 0x302D8 R_ARM_RELATIVE - +// RELR32-NEXT: 0x302DC R_ARM_RELATIVE - +// RELR32-NEXT: 0x302E0 R_ARM_RELATIVE - +// RELR32-NEXT: 0x302E4 R_ARM_RELATIVE - +// RELR32-NEXT: 0x302E8 R_ARM_RELATIVE - +// RELR32-NEXT: 0x302EC R_ARM_RELATIVE - // RELR32-NEXT: } // RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-linux %p/Inputs/shared2.s -o %t.a64.so.o @@ -340,30 +340,30 @@ // RELR64-NEXT: 0x30510 R_AARCH64_ABS64 zed2 0x0 // RELR64-NEXT: } // RELR64-NEXT: Section ({{.+}}) .relr.dyn { -// RELR64-NEXT: 0x30490 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x30498 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x304A0 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x304A8 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x304B0 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x304B8 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x304C0 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x304C8 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x304D8 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x304E0 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x304E8 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x304F0 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x304F8 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x30500 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x30508 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x30520 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x30528 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x30530 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x30538 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x30540 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x30548 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x30550 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x30558 R_AARCH64_RELATIVE - 0x0 -// RELR64-NEXT: 0x30560 R_AARCH64_RELATIVE - 0x0 +// RELR64-NEXT: 0x30490 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x30498 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x304A0 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x304A8 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x304B0 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x304B8 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x304C0 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x304C8 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x304D8 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x304E0 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x304E8 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x304F0 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x304F8 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x30500 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x30508 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x30520 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x30528 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x30530 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x30538 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x30540 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x30548 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x30550 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x30558 R_AARCH64_RELATIVE - +// RELR64-NEXT: 0x30560 R_AARCH64_RELATIVE - // RELR64-NEXT: } .data diff --git a/lld/test/ELF/rel-addend-with-rela-input.s b/lld/test/ELF/rel-addend-with-rela-input.s index 2dc5ead8a07eac..8bf5ec9b13e3ac 100644 --- a/lld/test/ELF/rel-addend-with-rela-input.s +++ b/lld/test/ELF/rel-addend-with-rela-input.s @@ -38,7 +38,7 @@ # ^--- Addend for relocation in .rel.dyn # RELA-TO-REL: Relocations [ # RELA-TO-REL-NEXT: Section ({{.+}}) .rel.dyn { -# RELA-TO-REL-NEXT: 0x[[DATA]] R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE foo 0x0 +# RELA-TO-REL-NEXT: 0x[[DATA]] R_MIPS_REL32/R_MIPS_64/R_MIPS_NONE foo # RELA-TO-REL-NEXT: } # RELA-TO-REL-NEXT: ] diff --git a/lld/test/ELF/relocatable-section-symbol.s b/lld/test/ELF/relocatable-section-symbol.s index 9924ddf1fbee3e..6657da2032fc0b 100644 --- a/lld/test/ELF/relocatable-section-symbol.s +++ b/lld/test/ELF/relocatable-section-symbol.s @@ -39,8 +39,8 @@ # REL: Relocations [ # REL-NEXT: Section ({{.*}}) .rel.data { -# REL-NEXT: 0x0 R_386_32 .text 0x0 -# REL-NEXT: 0x4 R_386_32 .text 0x0 +# REL-NEXT: 0x0 R_386_32 .text +# REL-NEXT: 0x4 R_386_32 .text # REL-NEXT: } # REL-NEXT: ] diff --git a/lld/test/ELF/relocation-copy-i686.s b/lld/test/ELF/relocation-copy-i686.s index af78068ae18ac9..2df535ce9261d2 100644 --- a/lld/test/ELF/relocation-copy-i686.s +++ b/lld/test/ELF/relocation-copy-i686.s @@ -35,19 +35,16 @@ movl $9, z // CHECK-NEXT: Offset: // CHECK-NEXT: Type: R_386_COPY // CHECK-NEXT: Symbol: x -// CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: // CHECK-NEXT: Type: R_386_COPY // CHECK-NEXT: Symbol: y -// CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: // CHECK-NEXT: Type: R_386_COPY // CHECK-NEXT: Symbol: z -// CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: ] diff --git a/lld/test/ELF/relocation-none-arm.s b/lld/test/ELF/relocation-none-arm.s index dc4eaa7b0b8d7c..a3ebc3189b34ee 100644 --- a/lld/test/ELF/relocation-none-arm.s +++ b/lld/test/ELF/relocation-none-arm.s @@ -14,7 +14,7 @@ # RUN: llvm-readobj -r %t | FileCheck --check-prefix=RELOC %s # RELOC: Section ({{.*}}) .rel.text { -# RELOC-NEXT: 0x0 R_ARM_NONE .data 0x0 +# RELOC-NEXT: 0x0 R_ARM_NONE .data # RELOC-NEXT: } .globl _start diff --git a/lld/test/ELF/relocation-none-i386.s b/lld/test/ELF/relocation-none-i386.s index 4174dc1ec382ba..54913b37ed8b5f 100644 --- a/lld/test/ELF/relocation-none-i386.s +++ b/lld/test/ELF/relocation-none-i386.s @@ -14,7 +14,7 @@ # RUN: llvm-readobj -r %t | FileCheck --check-prefix=RELOC %s # RELOC: Section ({{.*}}) .rel.text { -# RELOC-NEXT: 0x0 R_386_NONE .data 0x0 +# RELOC-NEXT: 0x0 R_386_NONE .data # RELOC-NEXT: } .globl _start diff --git a/lld/test/ELF/x86-64-zrel-zrela.s b/lld/test/ELF/x86-64-zrel-zrela.s index 62b154fe7e985c..a6d9f1b52408b5 100644 --- a/lld/test/ELF/x86-64-zrel-zrela.s +++ b/lld/test/ELF/x86-64-zrel-zrela.s @@ -37,12 +37,12 @@ # REL-NEXT: PLTGOT {{.*}} # REL-NEXT: PLTREL REL{{$}} # REL: .rel.dyn { -# REL-NEXT: R_X86_64_RELATIVE - 0x0 -# REL-NEXT: R_X86_64_GLOB_DAT func 0x0 -# REL-NEXT: R_X86_64_64 _start 0 +# REL-NEXT: R_X86_64_RELATIVE +# REL-NEXT: R_X86_64_GLOB_DAT func +# REL-NEXT: R_X86_64_64 _start # REL-NEXT: } # REL-NEXT: .rel.plt { -# REL-NEXT: R_X86_64_JUMP_SLOT func 0x0 +# REL-NEXT: R_X86_64_JUMP_SLOT func # REL-NEXT: } # REL: Hex dump of section '.data': diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll index d6e977bd20e103..ec7fce8be299db 100644 --- a/llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll +++ b/llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll @@ -12,7 +12,7 @@ ; ELF: Relocations [ ; ELF-NEXT: Section (3) .rel.text { -; ELF-NEXT: 0x{{[0-9]+}} R_AMDGPU_ABS32 doff_0_0_b {{.*}} +; ELF-NEXT: 0x{{[0-9]+}} R_AMDGPU_ABS32 doff_0_0_b{{$}} define amdgpu_ps void @ps_main(i32 %arg, i32 inreg %arg1, i32 inreg %arg2) local_unnamed_addr #0 { %rc = call i32 @llvm.amdgcn.reloc.constant(metadata !1) diff --git a/llvm/test/CodeGen/AMDGPU/lds-relocs.ll b/llvm/test/CodeGen/AMDGPU/lds-relocs.ll index 3e458378a7101e..0f8772eb3d5f48 100644 --- a/llvm/test/CodeGen/AMDGPU/lds-relocs.ll +++ b/llvm/test/CodeGen/AMDGPU/lds-relocs.ll @@ -6,8 +6,8 @@ ; ELF: Relocations [ ; ELF-NEXT: Section (3) .rel.text { -; ELF-NEXT: 0x{{[0-9a-f]*}} R_AMDGPU_ABS32 lds.external 0x0 -; ELF-NEXT: 0x{{[0-9a-f]*}} R_AMDGPU_ABS32 lds.defined 0x0 +; ELF-NEXT: 0x{{[0-9a-f]*}} R_AMDGPU_ABS32 lds.external +; ELF-NEXT: 0x{{[0-9a-f]*}} R_AMDGPU_ABS32 lds.defined ; ELF-NEXT: } ; ELF-NEXT: ] diff --git a/llvm/test/CodeGen/AMDGPU/no-initializer-constant-addrspace.ll b/llvm/test/CodeGen/AMDGPU/no-initializer-constant-addrspace.ll index feb582e28ff05e..dda0eabb4e3fe0 100644 --- a/llvm/test/CodeGen/AMDGPU/no-initializer-constant-addrspace.ll +++ b/llvm/test/CodeGen/AMDGPU/no-initializer-constant-addrspace.ll @@ -2,7 +2,7 @@ ; RUN: llc -mtriple=amdgcn- -mcpu=tonga -filetype=obj < %s | llvm-readobj -r --symbols - | FileCheck %s -check-prefix=GCN ; RUN: llc -mtriple=r600- -mcpu=cypress -filetype=obj < %s | llvm-readobj -r --symbols - | FileCheck %s -check-prefix=EG -; GCN: R_AMDGPU_GOTPCREL32_LO extern_const_addrspace 0x0 +; GCN: R_AMDGPU_GOTPCREL32_LO extern_const_addrspace ; EG: R_AMDGPU_ABS32 extern_const_addrspace ; CHECK-DAG: Name: extern_const_addrspace diff --git a/llvm/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll b/llvm/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll index 54460a77c4d0bb..2984c280b00ac7 100644 --- a/llvm/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll +++ b/llvm/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll @@ -4,7 +4,7 @@ ; CHECK: Relocations [ ; CHECK: Section (3) .rel.text { -; CHECK: 0x58 R_AMDGPU_ABS32 .text 0x0 +; CHECK: 0x58 R_AMDGPU_ABS32 .text ; CHECK: } ; CHECK: ] diff --git a/llvm/test/CodeGen/AMDGPU/scratch-simple.ll b/llvm/test/CodeGen/AMDGPU/scratch-simple.ll index af43d8a2c46011..ff795918f726e6 100644 --- a/llvm/test/CodeGen/AMDGPU/scratch-simple.ll +++ b/llvm/test/CodeGen/AMDGPU/scratch-simple.ll @@ -9,8 +9,8 @@ ; RUN: llc -march=amdgcn -mtriple=amdgcn--amdpal -mcpu=gfx900 -mattr=-flat-for-global -amdgpu-use-divergent-register-indexing -amdgpu-enable-flat-scratch -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,GFX9,GFX9_10,FLATSCR,GFX9-FLATSCR-PAL %s ; RUN: llc -march=amdgcn -mtriple=amdgcn--amdpal -mcpu=gfx1030 -mattr=-flat-for-global -amdgpu-use-divergent-register-indexing -amdgpu-enable-flat-scratch -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,GFX10_W32,GFX9_10,FLATSCR,GFX10-FLATSCR-PAL,GFX9_10-FLATSCR %s -; RELS: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0 -; RELS: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD1 0x0 +; RELS: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 +; RELS: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD1 ; This used to fail due to a v_add_i32 instruction with an illegal immediate ; operand that was created during Local Stack Slot Allocation. Test case derived diff --git a/llvm/test/MC/AMDGPU/elf-lds.s b/llvm/test/MC/AMDGPU/elf-lds.s index ec1c58e66b2151..59bd03eda2830d 100644 --- a/llvm/test/MC/AMDGPU/elf-lds.s +++ b/llvm/test/MC/AMDGPU/elf-lds.s @@ -34,8 +34,8 @@ test_kernel: // CHECK: Relocations [ // CHECK: Section (3) .rel.text { -// CHECK-NEXT: 0x4 R_AMDGPU_ABS32 lds0 0x0 -// CHECK-NEXT: 0x1C R_AMDGPU_ABS32 lds4 0x0 +// CHECK-NEXT: 0x4 R_AMDGPU_ABS32 lds0 +// CHECK-NEXT: 0x1C R_AMDGPU_ABS32 lds4 // CHECK-NEXT: } // CHECK: ] diff --git a/llvm/test/MC/AMDGPU/reloc.s b/llvm/test/MC/AMDGPU/reloc.s index f5650d809fe543..8fcaf78f44567c 100644 --- a/llvm/test/MC/AMDGPU/reloc.s +++ b/llvm/test/MC/AMDGPU/reloc.s @@ -2,18 +2,18 @@ // CHECK: Relocations [ // CHECK: .rel.text { -// CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0 -// CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD1 0x0 -// CHECK: R_AMDGPU_GOTPCREL global_var0 0x0 -// CHECK: R_AMDGPU_GOTPCREL32_LO global_var1 0x0 -// CHECK: R_AMDGPU_GOTPCREL32_HI global_var2 0x0 -// CHECK: R_AMDGPU_REL32_LO global_var3 0x0 -// CHECK: R_AMDGPU_REL32_HI global_var4 0x0 -// CHECK: R_AMDGPU_ABS32 var 0x0 +// CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 +// CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD1 +// CHECK: R_AMDGPU_GOTPCREL global_var0 +// CHECK: R_AMDGPU_GOTPCREL32_LO global_var1 +// CHECK: R_AMDGPU_GOTPCREL32_HI global_var2 +// CHECK: R_AMDGPU_REL32_LO global_var3 +// CHECK: R_AMDGPU_REL32_HI global_var4 +// CHECK: R_AMDGPU_ABS32 var // CHECK: } // CHECK: .rel.data { -// CHECK: R_AMDGPU_ABS64 temp 0x0 -// CHECK: R_AMDGPU_REL64 temp 0x0 +// CHECK: R_AMDGPU_ABS64 temp +// CHECK: R_AMDGPU_REL64 temp // CHECK: } // CHECK: ] diff --git a/llvm/test/MC/ARM/arm-elf-relocations.s b/llvm/test/MC/ARM/arm-elf-relocations.s index 4059591d95b18d..3e68c5a410db47 100644 --- a/llvm/test/MC/ARM/arm-elf-relocations.s +++ b/llvm/test/MC/ARM/arm-elf-relocations.s @@ -11,8 +11,8 @@ .byte abs8_1 +255 @ CHECK: Section {{.*}} .rel.text.r_arm_abs8 { -@ CHECK: 0x0 R_ARM_ABS8 abs8_0 0x0 -@ CHECK: 0x1 R_ARM_ABS8 abs8_1 0x0 +@ CHECK: 0x0 R_ARM_ABS8 abs8_0 +@ CHECK: 0x1 R_ARM_ABS8 abs8_1 @ CHECK: } .section .text.r_arm_abs16 @@ -21,8 +21,8 @@ .short abs16_1 +65535 @ CHECK: Section {{.*}} .rel.text.r_arm_abs16 { -@ CHECK: 0x0 R_ARM_ABS16 abs16_0 0x0 -@ CHECK: 0x2 R_ARM_ABS16 abs16_1 0x0 +@ CHECK: 0x0 R_ARM_ABS16 abs16_0 +@ CHECK: 0x2 R_ARM_ABS16 abs16_1 @ CHECK: } .section .text.r_arm_sbrel32 @@ -31,7 +31,7 @@ .word target(SBREL) @ CHECK: Section {{.*}} .rel.text.r_arm_sbrel32 { -@ CHECK: 0x0 R_ARM_SBREL32 target 0x0 -@ CHECK: 0x4 R_ARM_SBREL32 target 0x0 +@ CHECK: 0x0 R_ARM_SBREL32 target +@ CHECK: 0x4 R_ARM_SBREL32 target @ CHECK: } diff --git a/llvm/test/MC/ARM/arm-elf-symver.s b/llvm/test/MC/ARM/arm-elf-symver.s index 9d7da0c1331197..24b19dcdc3d956 100644 --- a/llvm/test/MC/ARM/arm-elf-symver.s +++ b/llvm/test/MC/ARM/arm-elf-symver.s @@ -24,11 +24,11 @@ global1: @ CHECK: Relocations [ @ CHECK-NEXT: Section {{.*}} .rel.text { -@ CHECK-NEXT: 0x0 R_ARM_ABS32 .text 0x0 -@ CHECK-NEXT: 0x4 R_ARM_ABS32 bar2@zed 0x0 -@ CHECK-NEXT: 0x8 R_ARM_ABS32 .text 0x0 -@ CHECK-NEXT: 0xC R_ARM_ABS32 .text 0x0 -@ CHECK-NEXT: 0x10 R_ARM_ABS32 bar6@zed 0x0 +@ CHECK-NEXT: 0x0 R_ARM_ABS32 .text +@ CHECK-NEXT: 0x4 R_ARM_ABS32 bar2@zed +@ CHECK-NEXT: 0x8 R_ARM_ABS32 .text +@ CHECK-NEXT: 0xC R_ARM_ABS32 .text +@ CHECK-NEXT: 0x10 R_ARM_ABS32 bar6@zed @ CHECK-NEXT: } @ CHECK-NEXT: ] diff --git a/llvm/test/MC/ARM/arm-thumb-tail-call.ll b/llvm/test/MC/ARM/arm-thumb-tail-call.ll index 4839d2b9741a3c..5cb1ee95e08747 100644 --- a/llvm/test/MC/ARM/arm-thumb-tail-call.ll +++ b/llvm/test/MC/ARM/arm-thumb-tail-call.ll @@ -20,6 +20,6 @@ attributes #2 = { "target-features"="+thumb-mode" } ; CHECK: Relocations [ ; CHECK-NEXT: Section (3) .rel.text { -; CHECK-NEXT: 0x0 R_ARM_JUMP24 thumb_fn 0x0 -; CHECK-NEXT: 0x4 R_ARM_THM_JUMP24 arm_fn 0x0 +; CHECK-NEXT: 0x0 R_ARM_JUMP24 thumb_fn +; CHECK-NEXT: 0x4 R_ARM_THM_JUMP24 arm_fn ; CHECK-NEXT: } diff --git a/llvm/test/MC/ARM/directive-tlsdescseq.s b/llvm/test/MC/ARM/directive-tlsdescseq.s index 087bc19b7b6f57..8ab2ae7c399877 100644 --- a/llvm/test/MC/ARM/directive-tlsdescseq.s +++ b/llvm/test/MC/ARM/directive-tlsdescseq.s @@ -18,10 +18,10 @@ tlsdescseq: .word variable(tlsdesc) + (. - 1b) @ CHECK: Relocations [ -@ CHECK: 0x4 R_ARM_TLS_DESCSEQ variable 0x0 -@ CHECK: 0x8 R_ARM_TLS_DESCSEQ variable 0x0 -@ CHECK: 0xC R_ARM_TLS_DESCSEQ variable 0x0 -@ CHECK: 0x10 R_ARM_TLS_GOTDESC variable 0x0 +@ CHECK: 0x4 R_ARM_TLS_DESCSEQ variable +@ CHECK: 0x8 R_ARM_TLS_DESCSEQ variable +@ CHECK: 0xC R_ARM_TLS_DESCSEQ variable +@ CHECK: 0x10 R_ARM_TLS_GOTDESC variable @ CHECK: ] @ CHECK-ASM: ldr r1, [pc, #8] diff --git a/llvm/test/MC/ARM/eh-compact-pr0.s b/llvm/test/MC/ARM/eh-compact-pr0.s index b96b67d3aaf5ce..0bb246b04a0497 100644 --- a/llvm/test/MC/ARM/eh-compact-pr0.s +++ b/llvm/test/MC/ARM/eh-compact-pr0.s @@ -70,8 +70,8 @@ func2: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.TEST1 @ RELOC: Relocations [ -@ RELOC-NOAND-NEXT: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0 -@ RELOC-NEXT: 0x0 R_ARM_PREL31 .TEST1 0x0 +@ RELOC-NOAND-NEXT: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 +@ RELOC-NEXT: 0x0 R_ARM_PREL31 .TEST1 @ RELOC-NEXT: ] @------------------------------------------------------------------------------- @@ -105,6 +105,6 @@ func2: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.TEST2 @ RELOC: Relocations [ -@ RELOC-NOAND-NEXT: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0 -@ RELOC-NEXT: 0x0 R_ARM_PREL31 .TEST2 0x0 +@ RELOC-NOAND-NEXT: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 +@ RELOC-NEXT: 0x0 R_ARM_PREL31 .TEST2 @ RELOC-NEXT: ] diff --git a/llvm/test/MC/ARM/eh-compact-pr1.s b/llvm/test/MC/ARM/eh-compact-pr1.s index 8f3a15c069bcca..de55fb150dbb52 100644 --- a/llvm/test/MC/ARM/eh-compact-pr1.s +++ b/llvm/test/MC/ARM/eh-compact-pr1.s @@ -68,7 +68,7 @@ func1: @ will keep __aeabi_unwind_cpp_pr1. @------------------------------------------------------------------------------- @ CHECK: Relocations [ -@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0 -@ CHECK: 0x0 R_ARM_PREL31 .TEST1 0x0 -@ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 0x0 +@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 +@ CHECK: 0x0 R_ARM_PREL31 .TEST1 +@ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 @ CHECK: ] diff --git a/llvm/test/MC/ARM/eh-directive-cantunwind.s b/llvm/test/MC/ARM/eh-directive-cantunwind.s index 86df4b48c414d0..864e812397c76f 100644 --- a/llvm/test/MC/ARM/eh-directive-cantunwind.s +++ b/llvm/test/MC/ARM/eh-directive-cantunwind.s @@ -47,5 +47,5 @@ func1: @ CHECK: } @ CHECK: ] @ CHECK: Relocations [ -@ CHECK: 0x0 R_ARM_PREL31 .text 0x0 +@ CHECK: 0x0 R_ARM_PREL31 .text @ CHECK: ] diff --git a/llvm/test/MC/ARM/eh-directive-handlerdata.s b/llvm/test/MC/ARM/eh-directive-handlerdata.s index a5f31d4f84f3b1..3efdf1fffa4fa3 100644 --- a/llvm/test/MC/ARM/eh-directive-handlerdata.s +++ b/llvm/test/MC/ARM/eh-directive-handlerdata.s @@ -48,9 +48,9 @@ func1: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.TEST1 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0 -@ RELOC: 0x0 R_ARM_PREL31 .TEST1 0x0 -@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 0x0 +@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 +@ RELOC: 0x0 R_ARM_PREL31 .TEST1 +@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 @ RELOC: ] @ RELOC: } @@ -108,8 +108,8 @@ func2: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.TEST2 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0 -@ RELOC: 0x0 R_ARM_PREL31 .TEST2 0x0 -@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST2 0x0 +@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 +@ RELOC: 0x0 R_ARM_PREL31 .TEST2 +@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST2 @ RELOC: ] @ RELOC: } diff --git a/llvm/test/MC/ARM/eh-directive-personality.s b/llvm/test/MC/ARM/eh-directive-personality.s index 9123dc2d144509..6b1a81cdb9dd31 100644 --- a/llvm/test/MC/ARM/eh-directive-personality.s +++ b/llvm/test/MC/ARM/eh-directive-personality.s @@ -38,7 +38,7 @@ func1: @ RELOC: Section { @ RELOC: Name: .rel.ARM.extab.TEST1 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0 +@ RELOC: 0x0 R_ARM_PREL31 __gxx_personality_v0 @ RELOC: ] @ RELOC: } @@ -52,8 +52,8 @@ func1: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.TEST1 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_PREL31 .TEST1 0x0 -@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 0x0 +@ RELOC: 0x0 R_ARM_PREL31 .TEST1 +@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 @ RELOC: ] @ RELOC: } @@ -89,7 +89,7 @@ func2: @ RELOC: Section { @ RELOC: Name: .rel.ARM.extab.TEST2 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0 +@ RELOC: 0x0 R_ARM_PREL31 __gxx_personality_v0 @ RELOC: ] @ RELOC: } @@ -103,7 +103,7 @@ func2: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.TEST2 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_PREL31 .TEST2 0x0 -@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST2 0x0 +@ RELOC: 0x0 R_ARM_PREL31 .TEST2 +@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST2 @ RELOC: ] @ RELOC: } diff --git a/llvm/test/MC/ARM/eh-directive-personalityindex.s b/llvm/test/MC/ARM/eh-directive-personalityindex.s index 03b92a6d829771..a3d544dfc013bd 100644 --- a/llvm/test/MC/ARM/eh-directive-personalityindex.s +++ b/llvm/test/MC/ARM/eh-directive-personalityindex.s @@ -28,8 +28,8 @@ pr0: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.pr0 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0 -@ RELOC: 0x0 R_ARM_PREL31 .pr0 0x0 +@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 +@ RELOC: 0x0 R_ARM_PREL31 .pr0 @ RELOC: ] @ RELOC: } @@ -57,8 +57,8 @@ pr0_nontrivial: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.pr0.nontrivial @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0 -@ RELOC: 0x0 R_ARM_PREL31 .pr0.nontrivial 0x0 +@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 +@ RELOC: 0x0 R_ARM_PREL31 .pr0.nontrivial @ RELOC: ] @ RELOC: } @@ -90,9 +90,9 @@ pr1: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.pr1 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0 -@ RELOC: 0x0 R_ARM_PREL31 .pr1 0x0 -@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.pr1 0x0 +@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 +@ RELOC: 0x0 R_ARM_PREL31 .pr1 +@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.pr1 @ RELOC: ] @ RELOC: } @@ -127,9 +127,9 @@ pr1_nontrivial: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.pr1.nontrivial @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0 -@ RELOC: 0x0 R_ARM_PREL31 .pr1.nontrivial 0x0 -@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.pr1.nontrivial 0x0 +@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 +@ RELOC: 0x0 R_ARM_PREL31 .pr1.nontrivial +@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.pr1.nontrivial @ RELOC: ] @ RELOC: } @@ -161,9 +161,9 @@ pr2: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.pr2 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr2 0x0 -@ RELOC: 0x0 R_ARM_PREL31 .pr2 0x0 -@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.pr2 0x0 +@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr2 +@ RELOC: 0x0 R_ARM_PREL31 .pr2 +@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.pr2 @ RELOC: ] @ RELOC: } @@ -196,8 +196,8 @@ pr2_nontrivial: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.pr2.nontrivial @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr2 0x0 -@ RELOC: 0x0 R_ARM_PREL31 .pr2.nontrivial 0x0 -@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.pr2.nontrivial 0x0 +@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr2 +@ RELOC: 0x0 R_ARM_PREL31 .pr2.nontrivial +@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.pr2.nontrivial @ RELOC: ] @ RELOC: } diff --git a/llvm/test/MC/ARM/eh-directive-section-multiple-func.s b/llvm/test/MC/ARM/eh-directive-section-multiple-func.s index 61629a7858bcd5..94c99239bf5877 100644 --- a/llvm/test/MC/ARM/eh-directive-section-multiple-func.s +++ b/llvm/test/MC/ARM/eh-directive-section-multiple-func.s @@ -76,8 +76,8 @@ func2: @ RELOC: Section { @ RELOC: Name: .rel.ARM.extab.TEST1 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0 -@ RELOC: 0x8 R_ARM_PREL31 __gxx_personality_v0 0x0 +@ RELOC: 0x0 R_ARM_PREL31 __gxx_personality_v0 +@ RELOC: 0x8 R_ARM_PREL31 __gxx_personality_v0 @ RELOC: ] @ RELOC: } @@ -105,10 +105,10 @@ func2: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.TEST1 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_PREL31 .TEST1 0x0 -@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 0x0 -@ RELOC: 0x8 R_ARM_PREL31 .TEST1 0x0 -@ RELOC: 0xC R_ARM_PREL31 .ARM.extab.TEST1 0x0 +@ RELOC: 0x0 R_ARM_PREL31 .TEST1 +@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 +@ RELOC: 0x8 R_ARM_PREL31 .TEST1 +@ RELOC: 0xC R_ARM_PREL31 .ARM.extab.TEST1 @ RELOC: ] @ RELOC: } diff --git a/llvm/test/MC/ARM/eh-directive-section.s b/llvm/test/MC/ARM/eh-directive-section.s index dfdc2147a2f27c..b09f627b405f4d 100644 --- a/llvm/test/MC/ARM/eh-directive-section.s +++ b/llvm/test/MC/ARM/eh-directive-section.s @@ -70,7 +70,7 @@ func2: @ RELOC: Section { @ RELOC: Name: .rel.ARM.extab.TEST1 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0 +@ RELOC: 0x0 R_ARM_PREL31 __gxx_personality_v0 @ RELOC: ] @ RELOC: } @@ -99,8 +99,8 @@ func2: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidx.TEST1 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_PREL31 .TEST1 0x0 -@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 0x0 +@ RELOC: 0x0 R_ARM_PREL31 .TEST1 +@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 @ RELOC: ] @ RELOC: } @@ -129,7 +129,7 @@ func2: @ RELOC: Section { @ RELOC: Name: .rel.ARM.extabTEST2 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0 +@ RELOC: 0x0 R_ARM_PREL31 __gxx_personality_v0 @ RELOC: ] @ RELOC: } @@ -158,8 +158,8 @@ func2: @ RELOC: Section { @ RELOC: Name: .rel.ARM.exidxTEST2 @ RELOC: Relocations [ -@ RELOC: 0x0 R_ARM_PREL31 TEST2 0x0 -@ RELOC: 0x4 R_ARM_PREL31 .ARM.extabTEST2 0x0 +@ RELOC: 0x0 R_ARM_PREL31 TEST2 +@ RELOC: 0x4 R_ARM_PREL31 .ARM.extabTEST2 @ RELOC: ] @ RELOC: } diff --git a/llvm/test/MC/ARM/eh-directive-text-section-multiple-func.s b/llvm/test/MC/ARM/eh-directive-text-section-multiple-func.s index d148f7b61dcaae..b84c59bdc16120 100644 --- a/llvm/test/MC/ARM/eh-directive-text-section-multiple-func.s +++ b/llvm/test/MC/ARM/eh-directive-text-section-multiple-func.s @@ -60,9 +60,9 @@ func2: @ The first word of each entry should be relocated to .text section. @------------------------------------------------------------------------------- @ CHECK: Relocations [ -@ CHECK: 0x0 R_ARM_PREL31 .text 0x0 -@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0 -@ CHECK: 0x8 R_ARM_PREL31 .text 0x0 +@ CHECK: 0x0 R_ARM_PREL31 .text +@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 +@ CHECK: 0x8 R_ARM_PREL31 .text @ CHECK: ] diff --git a/llvm/test/MC/ARM/eh-directive-text-section.s b/llvm/test/MC/ARM/eh-directive-text-section.s index e1de4e0dabc0d3..18606164e2691b 100644 --- a/llvm/test/MC/ARM/eh-directive-text-section.s +++ b/llvm/test/MC/ARM/eh-directive-text-section.s @@ -77,6 +77,6 @@ func1: @ add an relocation to __aeabi_unwind_cpp_pr0. @------------------------------------------------------------------------------- @ CHECK: Relocations [ -@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0 -@ CHECK: 0x0 R_ARM_PREL31 .text 0x0 +@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 +@ CHECK: 0x0 R_ARM_PREL31 .text @ CHECK: ] diff --git a/llvm/test/MC/ARM/elf-reloc-condcall.s b/llvm/test/MC/ARM/elf-reloc-condcall.s index 58dc9db2411031..23e3ee24e08a4f 100644 --- a/llvm/test/MC/ARM/elf-reloc-condcall.s +++ b/llvm/test/MC/ARM/elf-reloc-condcall.s @@ -9,10 +9,10 @@ // OBJ: Relocations [ // OBJ-NEXT: Section {{.*}} .rel.text { -// OBJ-NEXT: 0x0 R_ARM_JUMP24 some_label 0x0 -// OBJ-NEXT: 0x4 R_ARM_CALL some_label 0x0 -// OBJ-NEXT: 0x8 R_ARM_CALL some_label 0x0 -// OBJ-NEXT: 0xC R_ARM_JUMP24 some_label 0x0 -// OBJ-NEXT: 0x10 R_ARM_JUMP24 some_label 0x0 +// OBJ-NEXT: 0x0 R_ARM_JUMP24 some_label +// OBJ-NEXT: 0x4 R_ARM_CALL some_label +// OBJ-NEXT: 0x8 R_ARM_CALL some_label +// OBJ-NEXT: 0xC R_ARM_JUMP24 some_label +// OBJ-NEXT: 0x10 R_ARM_JUMP24 some_label // OBJ-NEXT: } // OBJ-NEXT: ] diff --git a/llvm/test/MC/ARM/elf-thumbfunc-reloc.s b/llvm/test/MC/ARM/elf-thumbfunc-reloc.s index 62e084b48fe996..fdc49bcde4edcf 100644 --- a/llvm/test/MC/ARM/elf-thumbfunc-reloc.s +++ b/llvm/test/MC/ARM/elf-thumbfunc-reloc.s @@ -23,13 +23,13 @@ ptr: @@ make sure an R_ARM_THM_CALL relocation is generated for the call to g @CHECK: Relocations [ @CHECK-NEXT: Section {{.*}} .rel.text { -@CHECK-NEXT: 0x4 R_ARM_THM_CALL g 0x0 +@CHECK-NEXT: 0x4 R_ARM_THM_CALL g @CHECK-NEXT: } @@ make sure the relocation is with f. That is one way to make sure it includes @@ the thumb bit. @CHECK-NEXT: Section ({{.*}}) .rel.data.rel.local { -@CHECK-NEXT: 0x0 R_ARM_ABS32 f 0x0 +@CHECK-NEXT: 0x0 R_ARM_ABS32 f @CHECK-NEXT: } @CHECK-NEXT: ] diff --git a/llvm/test/MC/ARM/elf-thumbfunc-reloc2.s b/llvm/test/MC/ARM/elf-thumbfunc-reloc2.s index f414a6d10a547e..eb7c3ce70af97d 100644 --- a/llvm/test/MC/ARM/elf-thumbfunc-reloc2.s +++ b/llvm/test/MC/ARM/elf-thumbfunc-reloc2.s @@ -29,11 +29,11 @@ bar: // CHECK: Relocations [ // CHECK-NEXT: Section {{.*}} .rel.text { -// CHECK-NEXT: 0x4 R_ARM_THM_CALL foo 0x0 +// CHECK-NEXT: 0x4 R_ARM_THM_CALL foo // CHECK-NEXT: } // CHECK-NEXT: Section {{.*}} .rel.ARM.exidx { -// CHECK-NEXT: 0x0 R_ARM_PREL31 .text 0x0 -// CHECK-NEXT: 0x8 R_ARM_PREL31 .text 0x0 +// CHECK-NEXT: 0x0 R_ARM_PREL31 .text +// CHECK-NEXT: 0x8 R_ARM_PREL31 .text // CHECK-NEXT: } // CHECK-NEXT: ] diff --git a/llvm/test/MC/ARM/mixed-arm-thumb-bl-fixup.ll b/llvm/test/MC/ARM/mixed-arm-thumb-bl-fixup.ll index d109197e98f863..6401c840998c8b 100644 --- a/llvm/test/MC/ARM/mixed-arm-thumb-bl-fixup.ll +++ b/llvm/test/MC/ARM/mixed-arm-thumb-bl-fixup.ll @@ -56,13 +56,13 @@ attributes #0 = { "target-features"="+thumb-mode" } attributes #1 = { "target-features"="-thumb-mode" } ; LINUX: Section (3) .rel.text { -; LINUX-NEXT: 0x2 R_ARM_THM_CALL internal_arm_fn 0x0 -; LINUX-NEXT: 0x6 R_ARM_THM_CALL global_arm_fn 0x0 -; LINUX-NEXT: 0xE R_ARM_THM_CALL global_thumb_fn 0x0 -; LINUX-NEXT: 0x1C R_ARM_CALL internal_arm_fn 0x0 -; LINUX-NEXT: 0x20 R_ARM_CALL global_arm_fn 0x0 -; LINUX-NEXT: 0x24 R_ARM_CALL internal_thumb_fn 0x0 -; LINUX-NEXT: 0x28 R_ARM_CALL global_thumb_fn 0x0 +; LINUX-NEXT: 0x2 R_ARM_THM_CALL internal_arm_fn +; LINUX-NEXT: 0x6 R_ARM_THM_CALL global_arm_fn +; LINUX-NEXT: 0xE R_ARM_THM_CALL global_thumb_fn +; LINUX-NEXT: 0x1C R_ARM_CALL internal_arm_fn +; LINUX-NEXT: 0x20 R_ARM_CALL global_arm_fn +; LINUX-NEXT: 0x24 R_ARM_CALL internal_thumb_fn +; LINUX-NEXT: 0x28 R_ARM_CALL global_thumb_fn ; LINUX-NEXT: } ; IOS: Section __text { diff --git a/llvm/test/MC/ARM/reloc-directive.s b/llvm/test/MC/ARM/reloc-directive.s index 6a69c5016fda29..3a2cd85ecd2c94 100644 --- a/llvm/test/MC/ARM/reloc-directive.s +++ b/llvm/test/MC/ARM/reloc-directive.s @@ -37,11 +37,11 @@ foo: # ARM relocations use the Elf32_Rel format. Addends are neither stored in the # relocation entries nor applied in the referenced locations. -# CHECK: 0x8 R_ARM_NONE .data 0x0 -# CHECK-NEXT: 0x4 R_ARM_NONE foo 0x0 -# CHECK-NEXT: 0x0 R_ARM_NONE - 0x0 -# CHECK-NEXT: 0x0 R_ARM_ALU_PC_G0 .data 0x0 -# CHECK-NEXT: 0x0 R_ARM_LDR_PC_G0 foo 0x0 -# CHECK-NEXT: 0x0 R_ARM_THM_ALU_PREL_11_0 - 0x0 +# CHECK: 0x8 R_ARM_NONE .data +# CHECK-NEXT: 0x4 R_ARM_NONE foo +# CHECK-NEXT: 0x0 R_ARM_NONE - +# CHECK-NEXT: 0x0 R_ARM_ALU_PC_G0 .data +# CHECK-NEXT: 0x0 R_ARM_LDR_PC_G0 foo +# CHECK-NEXT: 0x0 R_ARM_THM_ALU_PREL_11_0 - # HEX: 0x00000000 00000000 00000000 diff --git a/llvm/test/MC/ARM/target-expressions.s b/llvm/test/MC/ARM/target-expressions.s index ec431201d6f2d3..624f2a748aba8e 100644 --- a/llvm/test/MC/ARM/target-expressions.s +++ b/llvm/test/MC/ARM/target-expressions.s @@ -68,13 +68,13 @@ test: @ CHECK: movt r3, :upper16:(32) @ CHECK-RELOCATIONS: Relocations [ -@ CHECK-RELOCATIONS: 0x4 R_ARM_MOVW_ABS_NC function 0x0 -@ CHECK-RELOCATIONS: 0x8 R_ARM_MOVT_ABS function 0x0 -@ CHECK-RELOCATIONS: 0xC R_ARM_MOVW_ABS_NC function 0x0 -@ CHECK-RELOCATIONS: 0x10 R_ARM_MOVT_ABS function 0x0 -@ CHECK-RELOCATIONS: 0x34 R_ARM_MOVW_ABS_NC external 0x0 -@ CHECK-RELOCATIONS: 0x38 R_ARM_MOVT_ABS external 0x0 -@ CHECK-RELOCATIONS: 0x3C R_ARM_MOVW_ABS_NC external 0x0 -@ CHECK-RELOCATIONS: 0x40 R_ARM_MOVT_ABS external 0x0 +@ CHECK-RELOCATIONS: 0x4 R_ARM_MOVW_ABS_NC function +@ CHECK-RELOCATIONS: 0x8 R_ARM_MOVT_ABS function +@ CHECK-RELOCATIONS: 0xC R_ARM_MOVW_ABS_NC function +@ CHECK-RELOCATIONS: 0x10 R_ARM_MOVT_ABS function +@ CHECK-RELOCATIONS: 0x34 R_ARM_MOVW_ABS_NC external +@ CHECK-RELOCATIONS: 0x38 R_ARM_MOVT_ABS external +@ CHECK-RELOCATIONS: 0x3C R_ARM_MOVW_ABS_NC external +@ CHECK-RELOCATIONS: 0x40 R_ARM_MOVT_ABS external @ CHECK-RELOCATIONS: ] diff --git a/llvm/test/MC/ARM/thumb-far-jump.s b/llvm/test/MC/ARM/thumb-far-jump.s index 1131d08c9f0375..e1ca7286919537 100644 --- a/llvm/test/MC/ARM/thumb-far-jump.s +++ b/llvm/test/MC/ARM/thumb-far-jump.s @@ -22,5 +22,5 @@ end: main2: bx lr -@ CHECK-NOT: 0x0 R_ARM_THM_CALL end 0x0 -@ CHECK: 0x2004 R_ARM_THM_CALL main2 0x0 +@ CHECK-NOT: 0x0 R_ARM_THM_CALL end +@ CHECK: 0x2004 R_ARM_THM_CALL main2 diff --git a/llvm/test/MC/ARM/thumb-movwt-reloc.s b/llvm/test/MC/ARM/thumb-movwt-reloc.s index 0ca1d85ed574b3..db0ba91b1832c1 100644 --- a/llvm/test/MC/ARM/thumb-movwt-reloc.s +++ b/llvm/test/MC/ARM/thumb-movwt-reloc.s @@ -21,7 +21,7 @@ test: @ CHECK: movt r0, :upper16:function @ CHECK-RELOCATIONS: Relocations [ -@ CHECK-RELOCATIONS: 0x2 R_ARM_THM_MOVW_ABS_NC function 0x0 -@ CHECK-RELOCATIONS: 0x6 R_ARM_THM_MOVT_ABS function 0x0 +@ CHECK-RELOCATIONS: 0x2 R_ARM_THM_MOVW_ABS_NC function +@ CHECK-RELOCATIONS: 0x6 R_ARM_THM_MOVT_ABS function @ CHECK-RELOCATIONS: ] diff --git a/llvm/test/MC/ARM/thumb1-branch-reloc.s b/llvm/test/MC/ARM/thumb1-branch-reloc.s index 22384bec0274f5..eb097211d55da9 100644 --- a/llvm/test/MC/ARM/thumb1-branch-reloc.s +++ b/llvm/test/MC/ARM/thumb1-branch-reloc.s @@ -27,5 +27,5 @@ global: b global @CHECK: Section {{.*}} .rel.text.insection { -@CHECK-NEXT: 0x2 R_ARM_THM_JUMP11 global 0x0 +@CHECK-NEXT: 0x2 R_ARM_THM_JUMP11 global @CHECK-NEXT: } diff --git a/llvm/test/MC/ARM/thumb2-beq-fixup.s b/llvm/test/MC/ARM/thumb2-beq-fixup.s index f89e971a9c0e9b..1bf33fbbd37c46 100644 --- a/llvm/test/MC/ARM/thumb2-beq-fixup.s +++ b/llvm/test/MC/ARM/thumb2-beq-fixup.s @@ -34,7 +34,7 @@ global_thumb_fn: bx lr @ CHECK: Section (3) .rel.text -@ CHECK-NEXT: 0x0 R_ARM_THM_JUMP19 internal_arm_fn 0x0 -@ CHECK-NEXT: 0x4 R_ARM_THM_JUMP19 global_arm_fn 0x0 -@ CHECK-NEXT: 0x8 R_ARM_THM_JUMP19 global_thumb_fn 0x0 +@ CHECK-NEXT: 0x0 R_ARM_THM_JUMP19 internal_arm_fn +@ CHECK-NEXT: 0x4 R_ARM_THM_JUMP19 global_arm_fn +@ CHECK-NEXT: 0x8 R_ARM_THM_JUMP19 global_thumb_fn @ CHECK-NEXT: } diff --git a/llvm/test/MC/ELF/discriminator.s b/llvm/test/MC/ELF/discriminator.s index 2aab2404dfb828..77e46c926ad267 100644 --- a/llvm/test/MC/ELF/discriminator.s +++ b/llvm/test/MC/ELF/discriminator.s @@ -53,7 +53,7 @@ foo: # CHECK: Relocations [ # CHECK: Section ({{[^ ]+}}) .rel.debug_line { -# CHECK-NEXT: 0x2E R_386_32 .text 0x0 +# CHECK-NEXT: 0x2E R_386_32 .text # CHECK-NEXT: } # DWARF-DUMP: Address Line Column File ISA Discriminator Flags diff --git a/llvm/test/MC/ELF/gen-dwarf.s b/llvm/test/MC/ELF/gen-dwarf.s index dc70bf9bc6b0ef..e06479aa14cc0e 100644 --- a/llvm/test/MC/ELF/gen-dwarf.s +++ b/llvm/test/MC/ELF/gen-dwarf.s @@ -22,12 +22,12 @@ foo: // CHECK: Relocations [ // CHECK: Section ({{[^ ]+}}) .rel.debug_info { -// CHECK-NEXT: 0x6 R_386_32 .debug_abbrev 0x0 -// CHECK-NEXT: 0xC R_386_32 .debug_line 0x0 +// CHECK-NEXT: 0x6 R_386_32 .debug_abbrev +// CHECK-NEXT: 0xC R_386_32 .debug_line // CHECK: } // CHECK-NEXT: Section ({{[^ ]+}}) .rel.debug_aranges { -// CHECK-NEXT: 0x6 R_386_32 .debug_info 0x0 -// CHECK-NEXT: 0x10 R_386_32 .text 0x0 +// CHECK-NEXT: 0x6 R_386_32 .debug_info +// CHECK-NEXT: 0x10 R_386_32 .text // CHECK-NEXT: } // CHECK: ] diff --git a/llvm/test/MC/ELF/relocation-386.s b/llvm/test/MC/ELF/relocation-386.s index 4273750a419260..b1428c9b2b8a16 100644 --- a/llvm/test/MC/ELF/relocation-386.s +++ b/llvm/test/MC/ELF/relocation-386.s @@ -8,69 +8,69 @@ // I386: Format: elf32-i386 // CHECK: Relocations [ // CHECK-NEXT: Section {{.*}} .rel.text { -// CHECK-NEXT: 0x2 R_386_GOTOFF .Lfoo 0x0 -// CHECK-NEXT: 0x{{[^ ]+}} R_386_PLT32 bar2 0x0 -// CHECK-NEXT: 0x{{[^ ]+}} R_386_GOTPC _GLOBAL_OFFSET_TABLE_ 0x0 +// CHECK-NEXT: 0x2 R_386_GOTOFF .Lfoo +// CHECK-NEXT: 0x{{[^ ]+}} R_386_PLT32 bar2 +// CHECK-NEXT: 0x{{[^ ]+}} R_386_GOTPC _GLOBAL_OFFSET_TABLE_ // Relocation 3 (bar3@GOTOFF) is done with symbol 7 (bss) -// CHECK-NEXT: 0x{{[^ ]+}} R_386_GOTOFF .bss 0x0 +// CHECK-NEXT: 0x{{[^ ]+}} R_386_GOTOFF .bss // Relocation 4 (bar2@GOT) is of type R_386_GOT32 -// CHECK-NEXT: 0x{{[^ ]+}} R_386_GOT32 bar2j 0x0 +// CHECK-NEXT: 0x{{[^ ]+}} R_386_GOT32 bar2j // Relocation 5 (foo@TLSGD) is of type R_386_TLS_GD -// CHECK-NEXT: 0x20 R_386_TLS_GD foo 0x0 +// CHECK-NEXT: 0x20 R_386_TLS_GD foo // Relocation 6 ($foo@TPOFF) is of type R_386_TLS_LE_32 -// CHECK-NEXT: 0x25 R_386_TLS_LE_32 foo 0x0 +// CHECK-NEXT: 0x25 R_386_TLS_LE_32 foo // Relocation 7 (foo@INDNTPOFF) is of type R_386_TLS_IE -// CHECK-NEXT: 0x2B R_386_TLS_IE foo 0x0 +// CHECK-NEXT: 0x2B R_386_TLS_IE foo // Relocation 8 (foo@NTPOFF) is of type R_386_TLS_LE -// CHECK-NEXT: 0x31 R_386_TLS_LE foo 0x0 +// CHECK-NEXT: 0x31 R_386_TLS_LE foo // Relocation 9 (foo@GOTNTPOFF) is of type R_386_TLS_GOTIE -// CHECK-NEXT: 0x37 R_386_TLS_GOTIE foo 0x0 +// CHECK-NEXT: 0x37 R_386_TLS_GOTIE foo // Relocation 10 (foo@TLSLDM) is of type R_386_TLS_LDM -// CHECK-NEXT: 0x3D R_386_TLS_LDM foo 0x0 +// CHECK-NEXT: 0x3D R_386_TLS_LDM foo // Relocation 11 (foo@DTPOFF) is of type R_386_TLS_LDO_32 -// CHECK-NEXT: 0x43 R_386_TLS_LDO_32 foo 0x0 +// CHECK-NEXT: 0x43 R_386_TLS_LDO_32 foo // Relocation 12 (calll 4096) is of type R_386_PC32 -// CHECK-NEXT: 0x48 R_386_PC32 - 0x0 +// CHECK-NEXT: 0x48 R_386_PC32 - // Relocation 13 (zed@GOT) is of type R_386_GOT32 and uses the symbol -// CHECK-NEXT: 0x4E R_386_GOT32 zed 0x0 +// CHECK-NEXT: 0x4E R_386_GOT32 zed // Relocation 14 (zed@GOTOFF) is of type R_386_GOTOFF and uses the symbol -// CHECK-NEXT: 0x54 R_386_GOTOFF zed 0x0 +// CHECK-NEXT: 0x54 R_386_GOTOFF zed // Relocation 15 (zed@INDNTPOFF) is of type R_386_TLS_IE and uses the symbol -// CHECK-NEXT: 0x5A R_386_TLS_IE zed 0x0 +// CHECK-NEXT: 0x5A R_386_TLS_IE zed // Relocation 16 (zed@NTPOFF) is of type R_386_TLS_LE and uses the symbol -// CHECK-NEXT: 0x60 R_386_TLS_LE zed 0x0 +// CHECK-NEXT: 0x60 R_386_TLS_LE zed // Relocation 17 (zed@GOTNTPOFF) is of type R_386_TLS_GOTIE and uses the symbol -// CHECK-NEXT: 0x66 R_386_TLS_GOTIE zed 0x0 +// CHECK-NEXT: 0x66 R_386_TLS_GOTIE zed // Relocation 18 (zed@PLT) is of type R_386_PLT32 and uses the symbol -// CHECK-NEXT: 0x6B R_386_PLT32 zed 0x0 +// CHECK-NEXT: 0x6B R_386_PLT32 zed // Relocation 19 (zed@TLSGD) is of type R_386_TLS_GD and uses the symbol -// CHECK-NEXT: 0x71 R_386_TLS_GD zed 0x0 +// CHECK-NEXT: 0x71 R_386_TLS_GD zed // Relocation 20 (zed@TLSLDM) is of type R_386_TLS_LDM and uses the symbol -// CHECK-NEXT: 0x77 R_386_TLS_LDM zed 0x0 +// CHECK-NEXT: 0x77 R_386_TLS_LDM zed // Relocation 21 (zed@TPOFF) is of type R_386_TLS_LE_32 and uses the symbol -// CHECK-NEXT: 0x7D R_386_TLS_LE_32 zed 0x0 +// CHECK-NEXT: 0x7D R_386_TLS_LE_32 zed // Relocation 22 (zed@DTPOFF) is of type R_386_TLS_LDO_32 and uses the symbol -// CHECK-NEXT: 0x83 R_386_TLS_LDO_32 zed 0x0 +// CHECK-NEXT: 0x83 R_386_TLS_LDO_32 zed // Relocation 23 ($bar) is of type R_386_32 and uses the section -// CHECK-NEXT: 0x{{[^ ]+}} R_386_32 .text 0x0 +// CHECK-NEXT: 0x{{[^ ]+}} R_386_32 .text // Relocation 24 (foo@GOTTPOFF(%edx)) is of type R_386_TLS_IE_32 and uses the // symbol -// CHECK-NEXT: 0x8E R_386_TLS_IE_32 foo 0x0 +// CHECK-NEXT: 0x8E R_386_TLS_IE_32 foo // Relocation 25 (_GLOBAL_OFFSET_TABLE_-bar2) is of type R_386_GOTPC. -// CHECK-NEXT: 0x94 R_386_GOTPC _GLOBAL_OFFSET_TABLE_ 0x0 +// CHECK-NEXT: 0x94 R_386_GOTPC _GLOBAL_OFFSET_TABLE_ // Relocation 26 (und_symbol-bar2) is of type R_386_PC32 -// CHECK-NEXT: 0x9A R_386_PC32 und_symbol 0x0 +// CHECK-NEXT: 0x9A R_386_PC32 und_symbol // Relocation 27 (und_symbol-bar2) is of type R_386_PC16 -// CHECK-NEXT: 0x9E R_386_PC16 und_symbol 0x0 +// CHECK-NEXT: 0x9E R_386_PC16 und_symbol // Relocation 28 (und_symbol-bar2) is of type R_386_PC8 -// CHECK-NEXT: 0xA0 R_386_PC8 und_symbol 0x0 -// CHECK-NEXT: 0xA3 R_386_GOTOFF und_symbol 0x0 +// CHECK-NEXT: 0xA0 R_386_PC8 und_symbol +// CHECK-NEXT: 0xA3 R_386_GOTOFF und_symbol // Relocation 29 (zed@PLT) is of type R_386_PLT32 and uses the symbol -// CHECK-NEXT: 0xA9 R_386_PLT32 zed 0x0 -// CHECK-NEXT: 0xAF R_386_PC32 tr_start 0x0 -// CHECK-NEXT: 0xB3 R_386_16 foo 0x0 -// CHECK-NEXT: 0xB5 R_386_8 foo 0x0 +// CHECK-NEXT: 0xA9 R_386_PLT32 zed +// CHECK-NEXT: 0xAF R_386_PC32 tr_start +// CHECK-NEXT: 0xB3 R_386_16 foo +// CHECK-NEXT: 0xB5 R_386_8 foo // CHECK-NEXT: } // CHECK-NEXT: ] diff --git a/llvm/test/MC/Mips/micromips-func-addr.s b/llvm/test/MC/Mips/micromips-func-addr.s index 4a0e3fdbe4379d..85d7bf79870a19 100644 --- a/llvm/test/MC/Mips/micromips-func-addr.s +++ b/llvm/test/MC/Mips/micromips-func-addr.s @@ -2,8 +2,8 @@ # RUN: -mattr=micromips | llvm-readobj -r - \ # RUN: | FileCheck %s # CHECK: Relocations [ -# CHECK: 0x0 R_MIPS_32 bar 0x0 -# CHECK: 0x4 R_MIPS_32 L1 0x0 +# CHECK: 0x0 R_MIPS_32 bar +# CHECK: 0x4 R_MIPS_32 L1 .set micromips .type bar,@function diff --git a/llvm/test/MC/Mips/micromips32r6/relocations.s b/llvm/test/MC/Mips/micromips32r6/relocations.s index f5e1748d6c5f00..8f8e23d0a82107 100644 --- a/llvm/test/MC/Mips/micromips32r6/relocations.s +++ b/llvm/test/MC/Mips/micromips32r6/relocations.s @@ -36,15 +36,15 @@ # Check that the appropriate relocations were created. #------------------------------------------------------------------------------ # CHECK-ELF: Relocations [ -# CHECK-ELF: 0x0 R_MICROMIPS_PC26_S1 bar 0x0 -# CHECK-ELF: 0x4 R_MICROMIPS_PC26_S1 bar 0x0 -# CHECK-ELF: 0x8 R_MICROMIPS_PC19_S2 bar 0x0 -# CHECK-ELF: 0xC R_MICROMIPS_PC19_S2 bar 0x0 -# CHECK-ELF: 0x10 R_MICROMIPS_PC19_S2 bar 0x0 -# CHECK-ELF: 0x14 R_MICROMIPS_PC21_S1 bar 0x0 -# CHECK-ELF: 0x18 R_MICROMIPS_PC21_S1 bar 0x0 -# CHECK-ELF: 0x1C R_MICROMIPS_LO16 bar 0x0 -# CHECK-ELF: 0x20 R_MICROMIPS_LO16 bar 0x0 +# CHECK-ELF: 0x0 R_MICROMIPS_PC26_S1 bar +# CHECK-ELF: 0x4 R_MICROMIPS_PC26_S1 bar +# CHECK-ELF: 0x8 R_MICROMIPS_PC19_S2 bar +# CHECK-ELF: 0xC R_MICROMIPS_PC19_S2 bar +# CHECK-ELF: 0x10 R_MICROMIPS_PC19_S2 bar +# CHECK-ELF: 0x14 R_MICROMIPS_PC21_S1 bar +# CHECK-ELF: 0x18 R_MICROMIPS_PC21_S1 bar +# CHECK-ELF: 0x1C R_MICROMIPS_LO16 bar +# CHECK-ELF: 0x20 R_MICROMIPS_LO16 bar # CHECK-ELF: ] balc bar diff --git a/llvm/test/MC/Mips/mips-data-directives.s b/llvm/test/MC/Mips/mips-data-directives.s index 1fbbc8be4d4eb7..e794aa06b0b4a0 100644 --- a/llvm/test/MC/Mips/mips-data-directives.s +++ b/llvm/test/MC/Mips/mips-data-directives.s @@ -24,9 +24,9 @@ # CHECK-OBJ: Section { # CHECK-OBJ: Name: .rel.data # CHECK-OBJ: Relocations [ -# CHECK-OBJ: 0xE R_MIPS_32 .data 0x0 -# CHECK-OBJ: 0x12 R_MIPS_64 .data 0x0 -# CHECK-OBJ: 0x1A R_MIPS_16 .data 0x0 +# CHECK-OBJ: 0xE R_MIPS_32 .data +# CHECK-OBJ: 0x12 R_MIPS_64 .data +# CHECK-OBJ: 0x1A R_MIPS_16 .data # CHECK-OBJ: ] # CHECK-OBJ: } diff --git a/llvm/test/MC/Mips/mips-pdr.s b/llvm/test/MC/Mips/mips-pdr.s index 8769f904e1d288..a6a9646573a8d1 100644 --- a/llvm/test/MC/Mips/mips-pdr.s +++ b/llvm/test/MC/Mips/mips-pdr.s @@ -34,8 +34,8 @@ # We should also check if relocation information was correctly generated. # OBJOUT: Relocations [ # OBJOUT-NEXT: Section ({{.*}}) .rel.pdr { -# OBJOUT-NEXT: 0x0 R_MIPS_32 .text 0x0 -# OBJOUT-NEXT: 0x20 R_MIPS_32 _global_foo 0x0 +# OBJOUT-NEXT: 0x0 R_MIPS_32 .text +# OBJOUT-NEXT: 0x20 R_MIPS_32 _global_foo # OBJOUT-NEXT: } # OBJOUT-NEXT: ] diff --git a/llvm/test/MC/Mips/mips32r6/relocations.s b/llvm/test/MC/Mips/mips32r6/relocations.s index 68553fdf0177ae..dfd75e633bc2f7 100644 --- a/llvm/test/MC/Mips/mips32r6/relocations.s +++ b/llvm/test/MC/Mips/mips32r6/relocations.s @@ -50,19 +50,19 @@ # Check that the appropriate relocations were created. #------------------------------------------------------------------------------ # CHECK-ELF: Relocations [ -# CHECK-ELF: 0x0 R_MIPS_PC19_S2 bar 0x0 -# CHECK-ELF: 0x4 R_MIPS_PC16 bar 0x0 -# CHECK-ELF: 0x8 R_MIPS_PC16 bar 0x0 -# CHECK-ELF: 0xC R_MIPS_PC21_S2 bar 0x0 -# CHECK-ELF: 0x10 R_MIPS_PC21_S2 bar 0x0 -# CHECK-ELF: 0x14 R_MIPS_PC26_S2 bar 0x0 -# CHECK-ELF: 0x18 R_MIPS_PC26_S2 bar 0x0 -# CHECK-ELF: 0x1C R_MIPS_PCHI16 bar 0x0 -# CHECK-ELF: 0x20 R_MIPS_PCLO16 bar 0x0 -# CHECK-ELF: 0x24 R_MIPS_PC19_S2 bar 0x0 -# CHECK-ELF: 0x28 R_MIPS_PC19_S2 bar 0x0 -# CHECK-ELF: 0x2C R_MIPS_LO16 bar 0x0 -# CHECK-ELF: 0x30 R_MIPS_LO16 bar 0x0 +# CHECK-ELF: 0x0 R_MIPS_PC19_S2 bar +# CHECK-ELF: 0x4 R_MIPS_PC16 bar +# CHECK-ELF: 0x8 R_MIPS_PC16 bar +# CHECK-ELF: 0xC R_MIPS_PC21_S2 bar +# CHECK-ELF: 0x10 R_MIPS_PC21_S2 bar +# CHECK-ELF: 0x14 R_MIPS_PC26_S2 bar +# CHECK-ELF: 0x18 R_MIPS_PC26_S2 bar +# CHECK-ELF: 0x1C R_MIPS_PCHI16 bar +# CHECK-ELF: 0x20 R_MIPS_PCLO16 bar +# CHECK-ELF: 0x24 R_MIPS_PC19_S2 bar +# CHECK-ELF: 0x28 R_MIPS_PC19_S2 bar +# CHECK-ELF: 0x2C R_MIPS_LO16 bar +# CHECK-ELF: 0x30 R_MIPS_LO16 bar # CHECK-ELF: ] addiupc $2,bar diff --git a/llvm/test/MC/Mips/reloc-directive-label-offset.s b/llvm/test/MC/Mips/reloc-directive-label-offset.s index 8df9e6ad745a57..2c31414d40163d 100644 --- a/llvm/test/MC/Mips/reloc-directive-label-offset.s +++ b/llvm/test/MC/Mips/reloc-directive-label-offset.s @@ -48,22 +48,22 @@ bar: nop # OBJ-O32-LABEL: Relocations [ -# OBJ-O32: 0x0 R_MIPS_32 .text 0x0 -# OBJ-O32-NEXT: 0x4 R_MIPS_NONE .text 0x0 -# OBJ-O32-NEXT: 0xC R_MIPS_32 .text 0x0 -# OBJ-O32-NEXT: 0x10 R_MIPS_CALL16 foo 0x0 -# OBJ-O32-NEXT: 0x1C R_MIPS_GOT_OFST .text 0x0 -# OBJ-O32-NEXT: 0x20 R_MIPS_GOT_DISP foo 0x0 -# OBJ-O32-NEXT: 0x24 R_MIPS_GOT_PAGE .text 0x0 +# OBJ-O32: 0x0 R_MIPS_32 .text +# OBJ-O32-NEXT: 0x4 R_MIPS_NONE .text +# OBJ-O32-NEXT: 0xC R_MIPS_32 .text +# OBJ-O32-NEXT: 0x10 R_MIPS_CALL16 foo +# OBJ-O32-NEXT: 0x1C R_MIPS_GOT_OFST .text +# OBJ-O32-NEXT: 0x20 R_MIPS_GOT_DISP foo +# OBJ-O32-NEXT: 0x24 R_MIPS_GOT_PAGE .text # OBJ-N32-LABEL: Relocations [ -# OBJ-N32: 0x4 R_MIPS_NONE .text 0x0 -# OBJ-N32-NEXT: 0x1C R_MIPS_GOT_OFST .text 0x0 -# OBJ-N32-NEXT: 0x0 R_MIPS_32 .text 0x0 -# OBJ-N32-NEXT: 0xC R_MIPS_32 .text 0x0 -# OBJ-N32-NEXT: 0x10 R_MIPS_CALL16 foo 0x0 -# OBJ-N32-NEXT: 0x20 R_MIPS_GOT_DISP foo 0x0 -# OBJ-N32-NEXT: 0x24 R_MIPS_GOT_PAGE .text 0x0 +# OBJ-N32: 0x4 R_MIPS_NONE .text +# OBJ-N32-NEXT: 0x1C R_MIPS_GOT_OFST .text +# OBJ-N32-NEXT: 0x0 R_MIPS_32 .text +# OBJ-N32-NEXT: 0xC R_MIPS_32 .text +# OBJ-N32-NEXT: 0x10 R_MIPS_CALL16 foo +# OBJ-N32-NEXT: 0x20 R_MIPS_GOT_DISP foo +# OBJ-N32-NEXT: 0x24 R_MIPS_GOT_PAGE .text # OBJ-N64-LABEL: Relocations [ # OBJ-N64: 0x4 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x0 diff --git a/llvm/test/MC/Mips/reloc-directive.s b/llvm/test/MC/Mips/reloc-directive.s index b00ab8e1cfaae0..26c52e5e7ca0d6 100644 --- a/llvm/test/MC/Mips/reloc-directive.s +++ b/llvm/test/MC/Mips/reloc-directive.s @@ -96,40 +96,40 @@ foo: # OBJ-O32-NEXT: 0080: 00000000 00000000 # OBJ-O32-LABEL: } # OBJ-O32-LABEL: Relocations [ -# OBJ-O32: 0x0 R_MIPS_NONE .text 0x0 -# OBJ-O32-NEXT: 0x4 R_MIPS_NONE .text 0x0 -# OBJ-O32-NEXT: 0x8 R_MIPS_32 .text 0x0 -# OBJ-O32-NEXT: 0xC R_MIPS_NONE - 0x0 -# OBJ-O32-NEXT: 0x10 R_MIPS_CALL_HI16 - 0x0 -# OBJ-O32-NEXT: 0x14 R_MIPS_CALL_LO16 - 0x0 -# OBJ-O32-NEXT: 0x18 R_MIPS_CALL16 - 0x0 -# OBJ-O32-NEXT: 0x20 R_MIPS_GOT_PAGE - 0x0 -# OBJ-O32-NEXT: 0x24 R_MIPS_GOT_OFST - 0x0 -# OBJ-O32-NEXT: 0x28 R_MIPS_GOT_DISP - 0x0 -# OBJ-O32-NEXT: 0x2C R_MIPS_GOT_HI16 - 0x0 -# OBJ-O32-NEXT: 0x30 R_MIPS_GOT_LO16 - 0x0 -# OBJ-O32-NEXT: 0x34 R_MIPS_TLS_GOTTPREL - 0x0 -# OBJ-O32-NEXT: 0x38 R_MIPS_TLS_DTPREL_HI16 - 0x0 -# OBJ-O32-NEXT: 0x3C R_MIPS_TLS_DTPREL_LO16 - 0x0 -# OBJ-O32-NEXT: 0x40 R_MIPS_TLS_GD - 0x0 -# OBJ-O32-NEXT: 0x44 R_MIPS_TLS_LDM - 0x0 -# OBJ-O32-NEXT: 0x48 R_MIPS_TLS_TPREL_HI16 - 0x0 -# OBJ-O32-NEXT: 0x4C R_MIPS_TLS_TPREL_LO16 - 0x0 -# OBJ-O32-NEXT: 0x50 R_MICROMIPS_CALL16 - 0x0 -# OBJ-O32-NEXT: 0x54 R_MICROMIPS_GOT_DISP - 0x0 -# OBJ-O32-NEXT: 0x58 R_MICROMIPS_GOT_PAGE - 0x0 -# OBJ-O32-NEXT: 0x5C R_MICROMIPS_GOT_OFST - 0x0 -# OBJ-O32-NEXT: 0x64 R_MICROMIPS_TLS_GOTTPREL - 0x0 -# OBJ-O32-NEXT: 0x68 R_MICROMIPS_TLS_DTPREL_HI16 - 0x0 -# OBJ-O32-NEXT: 0x6C R_MICROMIPS_TLS_DTPREL_LO16 - 0x0 -# OBJ-O32-NEXT: 0x70 R_MICROMIPS_TLS_GD - 0x0 -# OBJ-O32-NEXT: 0x74 R_MICROMIPS_TLS_LDM - 0x0 -# OBJ-O32-NEXT: 0x78 R_MICROMIPS_TLS_TPREL_HI16 - 0x0 -# OBJ-O32-NEXT: 0x7C R_MICROMIPS_TLS_TPREL_LO16 - 0x0 -# OBJ-O32-NEXT: 0x80 R_MIPS_JALR - 0x0 -# OBJ-O32-NEXT: 0x84 R_MICROMIPS_JALR - 0x0 -# OBJ-O32-NEXT: 0x1C R_MIPS_GOT16 - 0x0 -# OBJ-O32-NEXT: 0x60 R_MICROMIPS_GOT16 - 0x0 +# OBJ-O32: 0x0 R_MIPS_NONE .text +# OBJ-O32-NEXT: 0x4 R_MIPS_NONE .text +# OBJ-O32-NEXT: 0x8 R_MIPS_32 .text +# OBJ-O32-NEXT: 0xC R_MIPS_NONE - +# OBJ-O32-NEXT: 0x10 R_MIPS_CALL_HI16 - +# OBJ-O32-NEXT: 0x14 R_MIPS_CALL_LO16 - +# OBJ-O32-NEXT: 0x18 R_MIPS_CALL16 - +# OBJ-O32-NEXT: 0x20 R_MIPS_GOT_PAGE - +# OBJ-O32-NEXT: 0x24 R_MIPS_GOT_OFST - +# OBJ-O32-NEXT: 0x28 R_MIPS_GOT_DISP - +# OBJ-O32-NEXT: 0x2C R_MIPS_GOT_HI16 - +# OBJ-O32-NEXT: 0x30 R_MIPS_GOT_LO16 - +# OBJ-O32-NEXT: 0x34 R_MIPS_TLS_GOTTPREL - +# OBJ-O32-NEXT: 0x38 R_MIPS_TLS_DTPREL_HI16 - +# OBJ-O32-NEXT: 0x3C R_MIPS_TLS_DTPREL_LO16 - +# OBJ-O32-NEXT: 0x40 R_MIPS_TLS_GD - +# OBJ-O32-NEXT: 0x44 R_MIPS_TLS_LDM - +# OBJ-O32-NEXT: 0x48 R_MIPS_TLS_TPREL_HI16 - +# OBJ-O32-NEXT: 0x4C R_MIPS_TLS_TPREL_LO16 - +# OBJ-O32-NEXT: 0x50 R_MICROMIPS_CALL16 - +# OBJ-O32-NEXT: 0x54 R_MICROMIPS_GOT_DISP - +# OBJ-O32-NEXT: 0x58 R_MICROMIPS_GOT_PAGE - +# OBJ-O32-NEXT: 0x5C R_MICROMIPS_GOT_OFST - +# OBJ-O32-NEXT: 0x64 R_MICROMIPS_TLS_GOTTPREL - +# OBJ-O32-NEXT: 0x68 R_MICROMIPS_TLS_DTPREL_HI16 - +# OBJ-O32-NEXT: 0x6C R_MICROMIPS_TLS_DTPREL_LO16 - +# OBJ-O32-NEXT: 0x70 R_MICROMIPS_TLS_GD - +# OBJ-O32-NEXT: 0x74 R_MICROMIPS_TLS_LDM - +# OBJ-O32-NEXT: 0x78 R_MICROMIPS_TLS_TPREL_HI16 - +# OBJ-O32-NEXT: 0x7C R_MICROMIPS_TLS_TPREL_LO16 - +# OBJ-O32-NEXT: 0x80 R_MIPS_JALR - +# OBJ-O32-NEXT: 0x84 R_MICROMIPS_JALR - +# OBJ-O32-NEXT: 0x1C R_MIPS_GOT16 - +# OBJ-O32-NEXT: 0x60 R_MICROMIPS_GOT16 - # OBJ-N32-LABEL: Name: .text # OBJ-N32: 0000: 00000000 00000000 00000000 00000000 diff --git a/llvm/test/MC/X86/reloc-directive-elf-32.s b/llvm/test/MC/X86/reloc-directive-elf-32.s index 06755863e57308..ed7e6bb756de6c 100644 --- a/llvm/test/MC/X86/reloc-directive-elf-32.s +++ b/llvm/test/MC/X86/reloc-directive-elf-32.s @@ -13,12 +13,12 @@ # X86 relocations use the Elf32_Rel format. Addends are neither stored in the # relocation entries nor applied in the referenced locations. -# CHECK: 0x2 R_386_NONE .data 0x0 -# CHECK-NEXT: 0x1 R_386_NONE foo 0x0 -# CHECK-NEXT: 0x0 R_386_NONE - 0x0 -# CHECK-NEXT: 0x0 R_386_32 .data 0x0 -# CHECK-NEXT: 0x0 R_386_IRELATIVE foo 0x0 -# CHECK-NEXT: 0x0 R_386_GOT32X - 0x0 +# CHECK: 0x2 R_386_NONE .data +# CHECK-NEXT: 0x1 R_386_NONE foo +# CHECK-NEXT: 0x0 R_386_NONE - +# CHECK-NEXT: 0x0 R_386_32 .data +# CHECK-NEXT: 0x0 R_386_IRELATIVE foo +# CHECK-NEXT: 0x0 R_386_GOT32X - # HEX: 0x00000000 00000000 00000000 diff --git a/llvm/test/Object/Lanai/yaml2obj-elf-lanai-rel.yaml b/llvm/test/Object/Lanai/yaml2obj-elf-lanai-rel.yaml index 498fa9dde90dd9..182897a3dc35ac 100644 --- a/llvm/test/Object/Lanai/yaml2obj-elf-lanai-rel.yaml +++ b/llvm/test/Object/Lanai/yaml2obj-elf-lanai-rel.yaml @@ -3,13 +3,13 @@ # CHECK: Relocations [ # CHECK-NEXT: Section (2) .rel.text { -# CHECK-NEXT: 0x0 R_LANAI_32 main 0x0 -# CHECK-NEXT: 0x4 R_LANAI_NONE - 0x0 -# CHECK-NEXT: 0x8 R_LANAI_21 - 0x0 -# CHECK-NEXT: 0xC R_LANAI_21_F - 0x0 -# CHECK-NEXT: 0x10 R_LANAI_25 - 0x0 -# CHECK-NEXT: 0x14 R_LANAI_HI16 - 0x0 -# CHECK-NEXT: 0x18 R_LANAI_LO16 - 0x0 +# CHECK-NEXT: 0x0 R_LANAI_32 main +# CHECK-NEXT: 0x4 R_LANAI_NONE - +# CHECK-NEXT: 0x8 R_LANAI_21 - +# CHECK-NEXT: 0xC R_LANAI_21_F - +# CHECK-NEXT: 0x10 R_LANAI_25 - +# CHECK-NEXT: 0x14 R_LANAI_HI16 - +# CHECK-NEXT: 0x18 R_LANAI_LO16 - # CHECK-NEXT: } # CHECK-NEXT: ] diff --git a/llvm/test/Object/X86/yaml2obj-elf-x86-rel.yaml b/llvm/test/Object/X86/yaml2obj-elf-x86-rel.yaml index 6a421479b1712f..5d9f33ed9faaac 100644 --- a/llvm/test/Object/X86/yaml2obj-elf-x86-rel.yaml +++ b/llvm/test/Object/X86/yaml2obj-elf-x86-rel.yaml @@ -3,7 +3,7 @@ # CHECK: Relocations [ # CHECK-NEXT: Section (2) .rel.text { -# CHECK-NEXT: 0x0 R_386_32 main 0x0 +# CHECK-NEXT: 0x0 R_386_32 main # CHECK-NEXT: } # CHECK-NEXT: ] diff --git a/llvm/test/Object/dyn-rel-relocation.test b/llvm/test/Object/dyn-rel-relocation.test index 9b563f36e6cde4..3738fb06eef960 100644 --- a/llvm/test/Object/dyn-rel-relocation.test +++ b/llvm/test/Object/dyn-rel-relocation.test @@ -32,19 +32,16 @@ RUN: %p/Inputs/dyn-rel.so.elf-mips | FileCheck %s // CHECK-NEXT: Offset: 0x0 // CHECK-NEXT: Type: R_MIPS_NONE (0) // CHECK-NEXT: Symbol: - (0) -// CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x102F8 // CHECK-NEXT: Type: R_MIPS_REL32 (3) // CHECK-NEXT: Symbol: - (0) -// CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x102F4 // CHECK-NEXT: Type: R_MIPS_REL32 (3) // CHECK-NEXT: Symbol: v2 (9) -// CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: } // CHECK-NEXT: ] @@ -54,18 +51,15 @@ RUN: %p/Inputs/dyn-rel.so.elf-mips | FileCheck %s // CHECK-NEXT: Offset: 0x0 // CHECK-NEXT: Type: R_MIPS_NONE (0) // CHECK-NEXT: Symbol: - -// CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x102F8 // CHECK-NEXT: Type: R_MIPS_REL32 (3) // CHECK-NEXT: Symbol: - -// CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: Relocation { // CHECK-NEXT: Offset: 0x102F4 // CHECK-NEXT: Type: R_MIPS_REL32 (3) // CHECK-NEXT: Symbol: v2 -// CHECK-NEXT: Addend: 0x0 // CHECK-NEXT: } // CHECK-NEXT: } diff --git a/llvm/test/Object/yaml2obj-elf-rel-noref.yaml b/llvm/test/Object/yaml2obj-elf-rel-noref.yaml index 904ec0e28f0195..e55f4e9356d94e 100644 --- a/llvm/test/Object/yaml2obj-elf-rel-noref.yaml +++ b/llvm/test/Object/yaml2obj-elf-rel-noref.yaml @@ -70,6 +70,6 @@ Symbols: # CHECK: } # CHECK: Relocations [ # CHECK-NEXT: Section (2) .rel.text { -# CHECK-NEXT: 0xC R_ARM_V4BX - 0x0 +# CHECK-NEXT: 0xC R_ARM_V4BX - # CHECK-NEXT: } # CHECK-NEXT: ] diff --git a/llvm/test/Object/yaml2obj-elf-rel.yaml b/llvm/test/Object/yaml2obj-elf-rel.yaml index 14e7f9effafcce..ae400f1e3c16b8 100644 --- a/llvm/test/Object/yaml2obj-elf-rel.yaml +++ b/llvm/test/Object/yaml2obj-elf-rel.yaml @@ -106,9 +106,9 @@ Symbols: # CHECK: } # CHECK: Relocations [ # CHECK-NEXT: Section (2) .rel.text { -# CHECK-NEXT: 0x1 R_MIPS_32 glob1 0x0 -# CHECK-NEXT: 0x1 R_MIPS_CALL16 glob2 0x0 -# CHECK-NEXT: 0x2 R_MIPS_LO16 loc1 0x0 +# CHECK-NEXT: 0x1 R_MIPS_32 glob1 +# CHECK-NEXT: 0x1 R_MIPS_CALL16 glob2 +# CHECK-NEXT: 0x2 R_MIPS_LO16 loc1 # CHECK-NEXT: } # CHECK-NEXT: Section (3) .rela.text { # CHECK-NEXT: 0x1 R_MIPS_32 glob1 0x1 diff --git a/llvm/test/tools/llvm-objcopy/ELF/basic-relocations.test b/llvm/test/tools/llvm-objcopy/ELF/basic-relocations.test index 9ffe13d67375d2..794b15b449c6c1 100644 --- a/llvm/test/tools/llvm-objcopy/ELF/basic-relocations.test +++ b/llvm/test/tools/llvm-objcopy/ELF/basic-relocations.test @@ -81,10 +81,10 @@ Symbols: # CHECK: Relocations [ # CHECK-NEXT: Section (2) .rel.text { -# CHECK-NEXT: 0x1000 R_X86_64_PC32 foo 0x0 +# CHECK-NEXT: 0x1000 R_X86_64_PC32 foo # CHECK-NEXT: } # CHECK-NEXT: Section (4) .rel.data { -# CHECK-NEXT: 0x2000 R_X86_64_PC32 bar 0x0 +# CHECK-NEXT: 0x2000 R_X86_64_PC32 bar # CHECK-NEXT: } # CHECK-NEXT: Section (5) .rela.data { # CHECK-NEXT: 0x2000 R_X86_64_PC32 barA 0x17 diff --git a/llvm/test/tools/llvm-objcopy/ELF/localize-hidden.test b/llvm/test/tools/llvm-objcopy/ELF/localize-hidden.test index ec44063ae7ed9a..f8004b2ba3c286 100644 --- a/llvm/test/tools/llvm-objcopy/ELF/localize-hidden.test +++ b/llvm/test/tools/llvm-objcopy/ELF/localize-hidden.test @@ -83,7 +83,7 @@ Symbols: #CHECK: Relocations [ #CHECK-NEXT: Section (3) .rel.text { -#CHECK-NEXT: 0x1000 R_X86_64_PC32 undefGlobal 0x0 +#CHECK-NEXT: 0x1000 R_X86_64_PC32 undefGlobal #CHECK-NEXT: } #CHECK-NEXT:] diff --git a/llvm/test/tools/llvm-objcopy/ELF/no-symbol-relocation.test b/llvm/test/tools/llvm-objcopy/ELF/no-symbol-relocation.test index 2c6a4b7d2e059b..2827f123e27cb3 100644 --- a/llvm/test/tools/llvm-objcopy/ELF/no-symbol-relocation.test +++ b/llvm/test/tools/llvm-objcopy/ELF/no-symbol-relocation.test @@ -24,7 +24,7 @@ Sections: # CHECK: Relocations [ # CHECK-NEXT: Section (2) .rel.text { -# CHECK-NEXT: 0x1000 R_X86_64_RELATIVE - 0x0 +# CHECK-NEXT: 0x1000 R_X86_64_RELATIVE - # CHECK-NEXT: } # CHECK-NEXT:] @@ -37,7 +37,7 @@ Sections: # STRIP: Relocations [ # STRIP-NEXT: Section {{.*}} .rel.text { -# STRIP-NEXT: 0x1000 R_X86_64_NONE - 0x0 +# STRIP-NEXT: 0x1000 R_X86_64_NONE - # STRIP-NEXT: } # STRIP-NEXT: ] # STRIP-NEXT: Symbols [ diff --git a/llvm/test/tools/llvm-objcopy/ELF/relocations-no-symtab.test b/llvm/test/tools/llvm-objcopy/ELF/relocations-no-symtab.test index d627d2d6de1cae..2c21299492c25d 100644 --- a/llvm/test/tools/llvm-objcopy/ELF/relocations-no-symtab.test +++ b/llvm/test/tools/llvm-objcopy/ELF/relocations-no-symtab.test @@ -7,7 +7,7 @@ # CHECK: Relocations [ # CHECK-NEXT: Section {{.*}} .rel.text { -# CHECK-NEXT: 0x1000 R_X86_64_RELATIVE - 0x0 +# CHECK-NEXT: 0x1000 R_X86_64_RELATIVE - # CHECK-NEXT: } # CHECK-NEXT:] diff --git a/llvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test b/llvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test index 0513b091326697..cdf205981420f0 100644 --- a/llvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test +++ b/llvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test @@ -315,8 +315,8 @@ ProgramHeaders: # RUN: llvm-readelf --dyn-relocations %t13 2>&1 | FileCheck %s -DFILE=%t13 --check-prefix=BOTH-RELA-REL-GNU # BOTH-RELA-REL-LLVM: Dynamic Relocations { -# BOTH-RELA-REL-LLVM-NEXT: 0x1 R_X86_64_NONE - 0x0 -# BOTH-RELA-REL-LLVM-NEXT: 0x2 R_X86_64_NONE - 0x0 +# BOTH-RELA-REL-LLVM-NEXT: 0x1 R_X86_64_NONE - 0x0{{$}} +# BOTH-RELA-REL-LLVM-NEXT: 0x2 R_X86_64_NONE -{{$}} # BOTH-RELA-REL-LLVM-NEXT: } # BOTH-RELA-REL-GNU: 'RELA' relocation section at offset 0x78 contains 24 bytes: diff --git a/llvm/test/tools/llvm-readobj/ELF/dynamic-reloc.test b/llvm/test/tools/llvm-readobj/ELF/dynamic-reloc.test index bed9985cdc68bc..89702b963c1113 100644 --- a/llvm/test/tools/llvm-readobj/ELF/dynamic-reloc.test +++ b/llvm/test/tools/llvm-readobj/ELF/dynamic-reloc.test @@ -33,9 +33,9 @@ FileHeader: # LLVM-RELOCS: Dynamic Relocations { # LLVM-RELOCS-NEXT: 0x1 R_X86_64_NONE foo 0x0 -# LLVM-RELOCS-NEXT: 0x2 R_X86_64_NONE foo 0x0 -# LLVM-RELOCS-NEXT: 0x4 R_X86_64_RELATIVE - 0x0 -# LLVM-RELOCS-NEXT: 0x8 R_X86_64_NONE foo 0x0 +# LLVM-RELOCS-NEXT: 0x2 R_X86_64_NONE foo +# LLVM-RELOCS-NEXT: 0x4 R_X86_64_RELATIVE +# LLVM-RELOCS-NEXT: 0x8 R_X86_64_NONE foo # LLVM-RELOCS-NEXT: } # GNU-RELOCS:'RELA' relocation section at offset 0x78 contains 24 bytes: @@ -141,8 +141,8 @@ ProgramHeaders: # PLTRELUNKNOWN-LLVM: warning: '[[FILE]]': unknown DT_PLTREL value of 255 # PLTRELUNKNOWN-LLVM: Dynamic Relocations { # PLTRELUNKNOWN-LLVM-NEXT: 0x1 R_X86_64_NONE foo 0x0 -# PLTRELUNKNOWN-LLVM-NEXT: 0x2 R_X86_64_NONE foo 0x0 -# PLTRELUNKNOWN-LLVM-NEXT: 0x4 R_X86_64_RELATIVE - 0x0 +# PLTRELUNKNOWN-LLVM-NEXT: 0x2 R_X86_64_NONE foo{{$}} +# PLTRELUNKNOWN-LLVM-NEXT: 0x4 R_X86_64_RELATIVE -{{$}} # PLTRELUNKNOWN-LLVM-NEXT: warning: '[[FILE]]': invalid DT_PLTRELSZ value (0x10) or PLTREL entry size (0x0) # PLTRELUNKNOWN-LLVM-NEXT: } diff --git a/llvm/test/tools/llvm-readobj/ELF/reloc-addends.test b/llvm/test/tools/llvm-readobj/ELF/reloc-addends.test index d64d2935c16218..0b47d9e024b447 100644 --- a/llvm/test/tools/llvm-readobj/ELF/reloc-addends.test +++ b/llvm/test/tools/llvm-readobj/ELF/reloc-addends.test @@ -31,10 +31,7 @@ # RUN: llvm-readobj -r %t.le64.rel | FileCheck %s --check-prefix=LLVM-REL64 # RUN: llvm-readelf -r %t.le64.rel | FileCheck %s --check-prefix=GNU-REL64 -## FIXME: We either should not dump an addend or should read it from a -## destination location for a SHT_REL case. -## See https://bugs.llvm.org/show_bug.cgi?id=44257. -# LLVM-REL64-COUNT-7: R_X86_64_NONE - 0x0{{$}} +# LLVM-REL64-COUNT-7: R_X86_64_NONE -{{$}} # LLVM-REL64-NOT: R_ # GNU-REL64: Type Symbol's Value Symbol's Name{{$}} @@ -108,10 +105,7 @@ Sections: # RUN: llvm-readobj -r %t.le32.rel | FileCheck %s --check-prefix=LLVM-REL32 # RUN: llvm-readelf -r %t.le32.rel | FileCheck %s --check-prefix=GNU-REL32 -## FIXME: We either should not dump an addend or should read it from a -## destination location for a SHT_REL case. -## See https://bugs.llvm.org/show_bug.cgi?id=44257. -# LLVM-REL32-COUNT-7: R_386_NONE - 0x0{{$}} +# LLVM-REL32-COUNT-7: R_386_NONE -{{$}} # LLVM-REL32-NOT: R_ # GNU-REL32: Type diff --git a/llvm/test/tools/llvm-readobj/ELF/relocation-errors.test b/llvm/test/tools/llvm-readobj/ELF/relocation-errors.test index ef9c4a1a90ce0a..39351492a6eea4 100644 --- a/llvm/test/tools/llvm-readobj/ELF/relocation-errors.test +++ b/llvm/test/tools/llvm-readobj/ELF/relocation-errors.test @@ -8,13 +8,13 @@ # LLVM-NEXT: Section (3) .rel.text { # LLVM-NEXT: warning: '[[FILE]]': unable to print relocation 1 in SHT_REL section with index 3: unable to access section [index 6] data at 0x17e7e7e8d0: offset goes past the end of file # LLVM-NEXT: warning: '[[FILE]]': unable to print relocation 2 in SHT_REL section with index 3: unable to access section [index 6] data at 0x17e7e7e8d0: offset goes past the end of file -# LLVM-NEXT: 0x2 R_X86_64_NONE - 0x0 -# LLVM-NEXT: 0x3 R_X86_64_NONE .sec.symbol1 0x0 +# LLVM-NEXT: 0x2 R_X86_64_NONE -{{$}} +# LLVM-NEXT: 0x3 R_X86_64_NONE .sec.symbol1{{$}} # LLVM-NEXT: warning: '[[FILE]]': invalid section index: 255 -# LLVM-NEXT: 0x4 R_X86_64_NONE
0x0 -# LLVM-NEXT: 0x5 R_X86_64_NONE .sec.symbol2 0x0 +# LLVM-NEXT: 0x4 R_X86_64_NONE
{{$}} +# LLVM-NEXT: 0x5 R_X86_64_NONE .sec.symbol2{{$}} # LLVM-NEXT: warning: '[[FILE]]': a section [index 2] has an invalid sh_name (0xfefefefe) offset which goes past the end of the section name string table -# LLVM-NEXT: 0x6 R_X86_64_NONE
0x0 +# LLVM-NEXT: 0x6 R_X86_64_NONE
{{$}} # LLVM-NEXT: } # LLVM-NEXT: Section (4) .rela.text { # LLVM-NEXT: warning: '[[FILE]]': unable to print relocation 1 in SHT_RELA section with index 4: invalid sh_type for symbol table, expected SHT_SYMTAB or SHT_DYNSYM diff --git a/llvm/test/tools/llvm-readobj/ELF/relocations.test b/llvm/test/tools/llvm-readobj/ELF/relocations.test index 1da0f2d0c4b9ea..887bada2545371 100644 --- a/llvm/test/tools/llvm-readobj/ELF/relocations.test +++ b/llvm/test/tools/llvm-readobj/ELF/relocations.test @@ -11,10 +11,10 @@ # LLVM-64:Relocations [ # LLVM-64-NEXT: Section (2) .rel.text { -# LLVM-64-NEXT: 0x0 R_X86_64_NONE rel_0 0x0 -# LLVM-64-NEXT: 0x1 R_X86_64_PC32 rel_neg 0x0 -# LLVM-64-NEXT: 0x5 R_X86_64_PLT32 rel_pos 0x0 -# LLVM-64-NEXT: 0x9 R_X86_64_64 rel_64 0x0 +# LLVM-64-NEXT: 0x0 R_X86_64_NONE rel_0 +# LLVM-64-NEXT: 0x1 R_X86_64_PC32 rel_neg +# LLVM-64-NEXT: 0x5 R_X86_64_PLT32 rel_pos +# LLVM-64-NEXT: 0x9 R_X86_64_64 rel_64 # LLVM-64-NEXT: } # LLVM-64-NEXT: Section (3) .rela.text { # LLVM-64-NEXT: 0x0 R_X86_64_NONE rela_0 0x0 @@ -60,25 +60,21 @@ # LLVM-EXPAND-64-NEXT: Offset: 0x0 # LLVM-EXPAND-64-NEXT: Type: R_X86_64_NONE (0) # LLVM-EXPAND-64-NEXT: Symbol: rel_0 (1) -# LLVM-EXPAND-64-NEXT: Addend: 0x0 # LLVM-EXPAND-64-NEXT: } # LLVM-EXPAND-64-NEXT: Relocation { # LLVM-EXPAND-64-NEXT: Offset: 0x1 # LLVM-EXPAND-64-NEXT: Type: R_X86_64_PC32 (2) # LLVM-EXPAND-64-NEXT: Symbol: rel_neg (2) -# LLVM-EXPAND-64-NEXT: Addend: 0x0 # LLVM-EXPAND-64-NEXT: } # LLVM-EXPAND-64-NEXT: Relocation { # LLVM-EXPAND-64-NEXT: Offset: 0x5 # LLVM-EXPAND-64-NEXT: Type: R_X86_64_PLT32 (4) # LLVM-EXPAND-64-NEXT: Symbol: rel_pos (3) -# LLVM-EXPAND-64-NEXT: Addend: 0x0 # LLVM-EXPAND-64-NEXT: } # LLVM-EXPAND-64-NEXT: Relocation { # LLVM-EXPAND-64-NEXT: Offset: 0x9 # LLVM-EXPAND-64-NEXT: Type: R_X86_64_64 (1) # LLVM-EXPAND-64-NEXT: Symbol: rel_64 (4) -# LLVM-EXPAND-64-NEXT: Addend: 0x0 # LLVM-EXPAND-64-NEXT: } # LLVM-EXPAND-64-NEXT: } # LLVM-EXPAND-64-NEXT: Section (3) .rela.text { @@ -243,10 +239,10 @@ Symbols: # BROKEN-RELA-LLVM: Relocations [ # BROKEN-RELA-LLVM-NEXT: Section (2) .rel.text { -# BROKEN-RELA-LLVM-NEXT: 0x0 R_X86_64_NONE rel_0 0x0 -# BROKEN-RELA-LLVM-NEXT: 0x1 R_X86_64_PC32 rel_neg 0x0 -# BROKEN-RELA-LLVM-NEXT: 0x5 R_X86_64_PLT32 rel_pos 0x0 -# BROKEN-RELA-LLVM-NEXT: 0x9 R_X86_64_64 rel_64 0x0 +# BROKEN-RELA-LLVM-NEXT: 0x0 R_X86_64_NONE rel_0{{$}} +# BROKEN-RELA-LLVM-NEXT: 0x1 R_X86_64_PC32 rel_neg{{$}} +# BROKEN-RELA-LLVM-NEXT: 0x5 R_X86_64_PLT32 rel_pos{{$}} +# BROKEN-RELA-LLVM-NEXT: 0x9 R_X86_64_64 rel_64{{$}} # BROKEN-RELA-LLVM-NEXT: } # BROKEN-RELA-LLVM-NEXT: Section (3) .rela.text { # BROKEN-RELA-LLVM-NEXT: warning: '[[FILE]]': unable to read relocations from SHT_RELA section with index 3: section [index 3] has an invalid sh_entsize: 1 @@ -300,9 +296,9 @@ Symbols: # LLVM-32:Relocations [ # LLVM-32-NEXT: Section (2) .rel.text { -# LLVM-32-NEXT: 0x0 R_386_NONE rel_0 0x0 -# LLVM-32-NEXT: 0x1 R_386_PC32 rel_neg 0x0 -# LLVM-32-NEXT: 0x5 R_386_PLT32 rel_pos 0x0 +# LLVM-32-NEXT: 0x0 R_386_NONE rel_0 +# LLVM-32-NEXT: 0x1 R_386_PC32 rel_neg +# LLVM-32-NEXT: 0x5 R_386_PLT32 rel_pos # LLVM-32-NEXT: } # LLVM-32-NEXT: Section (3) .rela.text { # LLVM-32-NEXT: 0x0 R_386_NONE rela_0 0x0 @@ -347,19 +343,16 @@ Symbols: # LLVM-EXPAND-32-NEXT: Offset: 0x0 # LLVM-EXPAND-32-NEXT: Type: R_386_NONE (0) # LLVM-EXPAND-32-NEXT: Symbol: rel_0 (1) -# LLVM-EXPAND-32-NEXT: Addend: 0x0 # LLVM-EXPAND-32-NEXT: } # LLVM-EXPAND-32-NEXT: Relocation { # LLVM-EXPAND-32-NEXT: Offset: 0x1 # LLVM-EXPAND-32-NEXT: Type: R_386_PC32 (2) # LLVM-EXPAND-32-NEXT: Symbol: rel_neg (2) -# LLVM-EXPAND-32-NEXT: Addend: 0x0 # LLVM-EXPAND-32-NEXT: } # LLVM-EXPAND-32-NEXT: Relocation { # LLVM-EXPAND-32-NEXT: Offset: 0x5 # LLVM-EXPAND-32-NEXT: Type: R_386_PLT32 (4) # LLVM-EXPAND-32-NEXT: Symbol: rel_pos (3) -# LLVM-EXPAND-32-NEXT: Addend: 0x0 # LLVM-EXPAND-32-NEXT: } # LLVM-EXPAND-32-NEXT: } # LLVM-EXPAND-32-NEXT: Section (3) .rela.text { @@ -475,10 +468,10 @@ Symbols: # LLVM-SHNAME: Relocations [ # LLVM-SHNAME-NEXT: warning: '[[FILE]]': unable to get the name of SHT_REL section with index 2: a section [index 2] has an invalid sh_name (0xffffffff) offset which goes past the end of the section name string table # LLVM-SHNAME-NEXT: Section (2) { -# LLVM-SHNAME-NEXT: 0x0 R_X86_64_NONE rel_0 0x0 -# LLVM-SHNAME-NEXT: 0x1 R_X86_64_PC32 rel_neg 0x0 -# LLVM-SHNAME-NEXT: 0x5 R_X86_64_PLT32 rel_pos 0x0 -# LLVM-SHNAME-NEXT: 0x9 R_X86_64_64 rel_64 0x0 +# LLVM-SHNAME-NEXT: 0x0 R_X86_64_NONE rel_0{{$}} +# LLVM-SHNAME-NEXT: 0x1 R_X86_64_PC32 rel_neg{{$}} +# LLVM-SHNAME-NEXT: 0x5 R_X86_64_PLT32 rel_pos{{$}} +# LLVM-SHNAME-NEXT: 0x9 R_X86_64_64 rel_64{{$}} # LLVM-SHNAME-NEXT: } # LLVM-SHNAME-NEXT: warning: '[[FILE]]': unable to get the name of SHT_RELA section with index 3: a section [index 3] has an invalid sh_name (0xffffffff) offset which goes past the end of the section name string table # LLVM-SHNAME-NEXT: Section (3) { diff --git a/llvm/test/tools/llvm-readobj/ELF/relr-relocs.test b/llvm/test/tools/llvm-readobj/ELF/relr-relocs.test index 7de0f1b01de350..06bea76c0846ed 100644 --- a/llvm/test/tools/llvm-readobj/ELF/relr-relocs.test +++ b/llvm/test/tools/llvm-readobj/ELF/relr-relocs.test @@ -11,29 +11,31 @@ # RAW-LLVM1-NEXT: 0xA700550400009 # RAW-LLVM1-NEXT: } -# RUN: llvm-readobj --relocations %t1 | FileCheck --check-prefix=LLVM1 %s +# RUN: llvm-readobj --relocations %t1 | \ +# RUN: FileCheck --match-full-lines --check-prefix=LLVM1 %s + # LLVM1: Section (1) .relr.dyn { -# LLVM1-NEXT: 0x10D60 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x10D68 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x10DA0 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20000 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20040 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20050 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20080 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20088 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20090 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20098 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20210 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x202A8 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x202D8 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x202E8 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x202F8 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20308 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20358 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20360 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20368 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20380 R_X86_64_RELATIVE - 0x0 -# LLVM1-NEXT: 0x20390 R_X86_64_RELATIVE - 0x0 +# LLVM1-NEXT: 0x10D60 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x10D68 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x10DA0 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20000 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20040 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20050 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20080 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20088 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20090 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20098 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20210 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x202A8 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x202D8 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x202E8 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x202F8 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20308 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20358 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20360 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20368 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20380 R_X86_64_RELATIVE - +# LLVM1-NEXT: 0x20390 R_X86_64_RELATIVE - # LLVM1-NEXT: } # RUN: llvm-readelf --relocations --raw-relr %t1 \ @@ -93,22 +95,24 @@ Sections: # RAW-LLVM2-NEXT: 0x50400009 # RAW-LLVM2-NEXT: } -# RUN: llvm-readobj --relocations %t2 | FileCheck --check-prefix=LLVM2 %s +# RUN: llvm-readobj --relocations %t2 | \ +# RUN: FileCheck --match-full-lines --check-prefix=LLVM2 %s + # LLVM2: Section (1) .relr.dyn { -# LLVM2-NEXT: 0x10D60 R_386_RELATIVE - 0x0 -# LLVM2-NEXT: 0x10D64 R_386_RELATIVE - 0x0 -# LLVM2-NEXT: 0x10D80 R_386_RELATIVE - 0x0 -# LLVM2-NEXT: 0x20000 R_386_RELATIVE - 0x0 -# LLVM2-NEXT: 0x20020 R_386_RELATIVE - 0x0 -# LLVM2-NEXT: 0x20028 R_386_RELATIVE - 0x0 -# LLVM2-NEXT: 0x20040 R_386_RELATIVE - 0x0 -# LLVM2-NEXT: 0x20044 R_386_RELATIVE - 0x0 -# LLVM2-NEXT: 0x20048 R_386_RELATIVE - 0x0 -# LLVM2-NEXT: 0x2004C R_386_RELATIVE - 0x0 -# LLVM2-NEXT: 0x20088 R_386_RELATIVE - 0x0 -# LLVM2-NEXT: 0x200D4 R_386_RELATIVE - 0x0 -# LLVM2-NEXT: 0x200EC R_386_RELATIVE - 0x0 -# LLVM2-NEXT: 0x200F4 R_386_RELATIVE - 0x0 +# LLVM2-NEXT: 0x10D60 R_386_RELATIVE - +# LLVM2-NEXT: 0x10D64 R_386_RELATIVE - +# LLVM2-NEXT: 0x10D80 R_386_RELATIVE - +# LLVM2-NEXT: 0x20000 R_386_RELATIVE - +# LLVM2-NEXT: 0x20020 R_386_RELATIVE - +# LLVM2-NEXT: 0x20028 R_386_RELATIVE - +# LLVM2-NEXT: 0x20040 R_386_RELATIVE - +# LLVM2-NEXT: 0x20044 R_386_RELATIVE - +# LLVM2-NEXT: 0x20048 R_386_RELATIVE - +# LLVM2-NEXT: 0x2004C R_386_RELATIVE - +# LLVM2-NEXT: 0x20088 R_386_RELATIVE - +# LLVM2-NEXT: 0x200D4 R_386_RELATIVE - +# LLVM2-NEXT: 0x200EC R_386_RELATIVE - +# LLVM2-NEXT: 0x200F4 R_386_RELATIVE - # LLVM2-NEXT: } # RUN: llvm-readelf --relocations --raw-relr %t2 | \ diff --git a/llvm/test/tools/yaml2obj/ELF/relocation-implicit-symbol-index.yaml b/llvm/test/tools/yaml2obj/ELF/relocation-implicit-symbol-index.yaml index b8e7c6d0c40e00..ffc8c18a2ad692 100644 --- a/llvm/test/tools/yaml2obj/ELF/relocation-implicit-symbol-index.yaml +++ b/llvm/test/tools/yaml2obj/ELF/relocation-implicit-symbol-index.yaml @@ -5,8 +5,8 @@ # CHECK: Relocations [ # CHECK-NEXT: Section (2) .rel.text { -# CHECK-NEXT: 0x1000 R_X86_64_RELATIVE - 0x0 -# CHECK-NEXT: 0x1001 R_X86_64_PC32 - 0x0 +# CHECK-NEXT: 0x1000 R_X86_64_RELATIVE - +# CHECK-NEXT: 0x1001 R_X86_64_PC32 - # CHECK-NEXT: } # CHECK-NEXT:] diff --git a/llvm/tools/llvm-readobj/ELFDumper.cpp b/llvm/tools/llvm-readobj/ELFDumper.cpp index a13a505b1368fc..27222c5639e66f 100644 --- a/llvm/tools/llvm-readobj/ELFDumper.cpp +++ b/llvm/tools/llvm-readobj/ELFDumper.cpp @@ -6419,18 +6419,20 @@ void LLVMStyle::printRelRelaReloc(const Relocation &R, SmallString<32> RelocName; this->Obj.getRelocationTypeName(R.Type, RelocName); - uintX_t Addend = R.Addend.getValueOr(0); if (opts::ExpandRelocs) { DictScope Group(W, "Relocation"); W.printHex("Offset", R.Offset); W.printNumber("Type", RelocName, R.Type); W.printNumber("Symbol", !SymbolName.empty() ? SymbolName : "-", R.Symbol); - W.printHex("Addend", Addend); + if (R.Addend) + W.printHex("Addend", (uintX_t)*R.Addend); } else { raw_ostream &OS = W.startLine(); OS << W.hex(R.Offset) << " " << RelocName << " " - << (!SymbolName.empty() ? SymbolName : "-") << " " << W.hex(Addend) - << "\n"; + << (!SymbolName.empty() ? SymbolName : "-"); + if (R.Addend) + OS << " " << W.hex((uintX_t)*R.Addend); + OS << "\n"; } } From 16aa00b6228533890cc108bc32871f36eb116e0e Mon Sep 17 00:00:00 2001 From: Jan Svoboda Date: Mon, 14 Dec 2020 10:03:18 +0100 Subject: [PATCH 03/10] [clang][cli] Port FileSystem options to new option parsing system Depends on D84187 Reviewed By: dexonsmith Original patch by Daniel Grumberg. Differential Revision: https://reviews.llvm.org/D84188 --- clang/include/clang/Driver/Options.td | 3 ++- clang/lib/Frontend/CompilerInvocation.cpp | 5 ----- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td index 4af1c0447dc048..67d41c3711f557 100644 --- a/clang/include/clang/Driver/Options.td +++ b/clang/include/clang/Driver/Options.td @@ -3354,7 +3354,8 @@ def : Flag<["-"], "no-integrated-as">, Alias, Flags<[CC1Option, NoXarchOption]>; def working_directory : JoinedOrSeparate<["-"], "working-directory">, Flags<[CC1Option]>, - HelpText<"Resolve file paths relative to the specified directory">; + HelpText<"Resolve file paths relative to the specified directory">, + MarshallingInfoString<"FileSystemOpts.WorkingDir">; def working_directory_EQ : Joined<["-"], "working-directory=">, Flags<[CC1Option]>, Alias; diff --git a/clang/lib/Frontend/CompilerInvocation.cpp b/clang/lib/Frontend/CompilerInvocation.cpp index 3add57ce60f41a..c1d5364d72ea45 100644 --- a/clang/lib/Frontend/CompilerInvocation.cpp +++ b/clang/lib/Frontend/CompilerInvocation.cpp @@ -1876,10 +1876,6 @@ bool clang::ParseDiagnosticArgs(DiagnosticOptions &Opts, ArgList &Args, return Success; } -static void ParseFileSystemArgs(FileSystemOptions &Opts, ArgList &Args) { - Opts.WorkingDir = std::string(Args.getLastArgValue(OPT_working_directory)); -} - /// Parse the argument to the -ftest-module-file-extension /// command-line argument. /// @@ -3839,7 +3835,6 @@ bool CompilerInvocation::CreateFromArgs(CompilerInvocation &Res, Success &= ParseDiagnosticArgs(Res.getDiagnosticOpts(), Args, &Diags, /*DefaultDiagColor=*/false); ParseCommentArgs(LangOpts.CommentOpts, Args); - ParseFileSystemArgs(Res.getFileSystemOpts(), Args); // FIXME: We shouldn't have to pass the DashX option around here InputKind DashX = ParseFrontendArgs(Res.getFrontendOpts(), Args, Diags, LangOpts.IsHeaderFile); From d9697c2e6b153ac7dc40a69450d9b672f71b1029 Mon Sep 17 00:00:00 2001 From: Raul Tambre Date: Mon, 14 Dec 2020 11:24:02 +0200 Subject: [PATCH 04/10] [compiler-rt][CMake] Define HAS_ASM_LSE on Apple if available Should hopefully fix 33b740f8dc3496237619a7bc6722f23655cb1f94 (D93178) failing on bots. Differential Revision: https://reviews.llvm.org/D93198 --- compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake b/compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake index f6689c2e79ad51..456a8dcda59f62 100644 --- a/compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake +++ b/compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake @@ -395,7 +395,9 @@ macro(darwin_add_builtin_libraries) set(CMAKE_CXX_FLAGS "") set(CMAKE_ASM_FLAGS "") - set(PROFILE_SOURCES ../profile/InstrProfiling + append_string_if(COMPILER_RT_HAS_ASM_LSE " -DHAS_ASM_LSE" CFLAGS) + + set(PROFILE_SOURCES ../profile/InstrProfiling ../profile/InstrProfilingBuffer ../profile/InstrProfilingPlatformDarwin ../profile/InstrProfilingWriter From 617cd01a4b7abcb4be9dc0139bf3ed03f241608a Mon Sep 17 00:00:00 2001 From: Raul Tambre Date: Mon, 14 Dec 2020 11:40:24 +0200 Subject: [PATCH 05/10] Revert "[CMake][compiler-rt][AArch64] Avoid preprocessing LSE builtins separately" Causing issues on Apple buildbots. http://green.lab.llvm.org/green/job/clang-stage1-RA/17019/console This reverts commit 33b740f8dc3496237619a7bc6722f23655cb1f94. This reverts commit d9697c2e6b153ac7dc40a69450d9b672f71b1029. Differential Revision: https://reviews.llvm.org/D93199 --- .../cmake/Modules/CompilerRTDarwinUtils.cmake | 4 +-- compiler-rt/lib/builtins/CMakeLists.txt | 25 +++++++++++-------- compiler-rt/lib/builtins/aarch64/lse.S | 2 +- 3 files changed, 17 insertions(+), 14 deletions(-) diff --git a/compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake b/compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake index 456a8dcda59f62..f6689c2e79ad51 100644 --- a/compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake +++ b/compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake @@ -395,9 +395,7 @@ macro(darwin_add_builtin_libraries) set(CMAKE_CXX_FLAGS "") set(CMAKE_ASM_FLAGS "") - append_string_if(COMPILER_RT_HAS_ASM_LSE " -DHAS_ASM_LSE" CFLAGS) - - set(PROFILE_SOURCES ../profile/InstrProfiling + set(PROFILE_SOURCES ../profile/InstrProfiling ../profile/InstrProfilingBuffer ../profile/InstrProfilingPlatformDarwin ../profile/InstrProfilingWriter diff --git a/compiler-rt/lib/builtins/CMakeLists.txt b/compiler-rt/lib/builtins/CMakeLists.txt index 5259e951dff3f1..d84f4d09e53e55 100644 --- a/compiler-rt/lib/builtins/CMakeLists.txt +++ b/compiler-rt/lib/builtins/CMakeLists.txt @@ -509,24 +509,31 @@ set(aarch64_SOURCES ) # Generate outline atomics helpers from lse.S base +set(CUSTOM_FLAGS ${CMAKE_C_FLAGS}) +if(NOT ANDROID) + append_list_if(COMPILER_RT_HAS_VISIBILITY_HIDDEN_FLAG -DVISIBILITY_HIDDEN CUSTOM_FLAGS) +endif() +append_list_if(COMPILER_RT_HAS_ASM_LSE -DHAS_ASM_LSE CUSTOM_FLAGS) +string(REPLACE " " "\t" CUSTOM_FLAGS "${CUSTOM_FLAGS}") set(OA_HELPERS_DIR "${CMAKE_CURRENT_BINARY_DIR}/outline_atomic_helpers.dir") -file(MAKE_DIRECTORY "${OA_HELPERS_DIR}") +file(MAKE_DIRECTORY ${OA_HELPERS_DIR}) foreach(pat cas swp ldadd ldclr ldeor ldset) foreach(size 1 2 4 8 16) foreach(model 1 2 3 4) if(pat STREQUAL "cas" OR NOT size STREQUAL "16") - set(helper_asm "${OA_HELPERS_DIR}/outline_atomic_${pat}${size}_${model}.S") + set(helper_asm ${OA_HELPERS_DIR}/outline_atomic_${pat}${size}_${model}.S) add_custom_command( OUTPUT ${helper_asm} - COMMAND ${CMAKE_COMMAND} -E create_symlink "${CMAKE_CURRENT_SOURCE_DIR}/aarch64/lse.S" "${helper_asm}" + COMMAND ${CMAKE_C_COMPILER} -E ${CUSTOM_FLAGS} -DL_${pat} -DSIZE=${size} -DMODEL=${model} + ${CMAKE_CURRENT_SOURCE_DIR}/aarch64/lse.S -o ${helper_asm} + DEPENDS aarch64/lse.S assembly.h ) - set_source_files_properties("${helper_asm}" - PROPERTIES - COMPILE_DEFINITIONS "L_${pat};SIZE=${size};MODEL=${model}" - INCLUDE_DIRECTORIES "${CMAKE_CURRENT_SOURCE_DIR}" + set_source_files_properties(${helper_asm} PROPERTIES GENERATED TRUE) + set(aarch64_SOURCES + ${aarch64_SOURCES} + ${helper_asm} ) - list(APPEND aarch64_SOURCES "${helper_asm}") endif() endforeach(model) endforeach(size) @@ -680,8 +687,6 @@ else () append_list_if(COMPILER_RT_HAS_VISIBILITY_HIDDEN_FLAG VISIBILITY_HIDDEN BUILTIN_DEFS) endif() - append_list_if(COMPILER_RT_HAS_ASM_LSE HAS_ASM_LSE BUILTIN_DEFS) - foreach (arch ${BUILTIN_SUPPORTED_ARCH}) if (CAN_TARGET_${arch}) # For ARM archs, exclude any VFP builtins if VFP is not supported diff --git a/compiler-rt/lib/builtins/aarch64/lse.S b/compiler-rt/lib/builtins/aarch64/lse.S index f030d5ddc1c596..4c75fa524c44d4 100644 --- a/compiler-rt/lib/builtins/aarch64/lse.S +++ b/compiler-rt/lib/builtins/aarch64/lse.S @@ -2,7 +2,7 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -#include "assembly.h" +#include "../assembly.h" // Out-of-line LSE atomics helpers. Ported from libgcc library. // N = {1, 2, 4, 8} From 1c6bc2c0b5afca9b4e7fdb33ea0ad95336df330c Mon Sep 17 00:00:00 2001 From: Frederik Gossen Date: Fri, 11 Dec 2020 18:00:17 +0100 Subject: [PATCH 06/10] [MLIR] Add lowerings for atan and atan2 to ROCDL intrinsics Differential Revision: https://reviews.llvm.org/D93123 --- .../GPUToROCDL/LowerGpuOpsToROCDLOps.cpp | 4 +++ .../Conversion/GPUToROCDL/gpu-to-rocdl.mlir | 30 +++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp index 4ed1f0761c9206..b6f4238a4a5ef3 100644 --- a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp +++ b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp @@ -105,6 +105,10 @@ void mlir::populateGpuToROCDLConversionPatterns( GPUFuncOpLowering<5>, GPUReturnOpLowering>(converter); patterns.insert>(converter, "__ocml_fabs_f32", "__ocml_fabs_f64"); + patterns.insert>(converter, "__ocml_atan_f32", + "__ocml_atan_f64"); + patterns.insert>(converter, "__ocml_atan2_f32", + "__ocml_atan2_f64"); patterns.insert>(converter, "__ocml_ceil_f32", "__ocml_ceil_f64"); patterns.insert>(converter, "__ocml_cos_f32", diff --git a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir index acc3826cacce1c..c57f98571df6cd 100644 --- a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir +++ b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir @@ -280,3 +280,33 @@ gpu.module @test_module { std.return %result32, %result64 : f32, f64 } } + +// ----- + +gpu.module @test_module { + // CHECK: llvm.func @__ocml_atan_f32(!llvm.float) -> !llvm.float + // CHECK: llvm.func @__ocml_atan_f64(!llvm.double) -> !llvm.double + // CHECK-LABEL: func @gpu_atan + func @gpu_atan(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) { + %result32 = std.atan %arg_f32 : f32 + // CHECK: llvm.call @__ocml_atan_f32(%{{.*}}) : (!llvm.float) -> !llvm.float + %result64 = std.atan %arg_f64 : f64 + // CHECK: llvm.call @__ocml_atan_f64(%{{.*}}) : (!llvm.double) -> !llvm.double + std.return %result32, %result64 : f32, f64 + } +} + +// ----- + +gpu.module @test_module { + // CHECK: llvm.func @__ocml_atan2_f32(!llvm.float, !llvm.float) -> !llvm.float + // CHECK: llvm.func @__ocml_atan2_f64(!llvm.double, !llvm.double) -> !llvm.double + // CHECK-LABEL: func @gpu_atan2 + func @gpu_atan2(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) { + %result32 = std.atan2 %arg_f32, %arg_f32 : f32 + // CHECK: llvm.call @__ocml_atan2_f32(%{{.*}}) : (!llvm.float, !llvm.float) -> !llvm.float + %result64 = std.atan2 %arg_f64, %arg_f64 : f64 + // CHECK: llvm.call @__ocml_atan2_f64(%{{.*}}) : (!llvm.double, !llvm.double) -> !llvm.double + std.return %result32, %result64 : f32, f64 + } +} From 5733167f54a582d52fc06617646c13cd1e0b3362 Mon Sep 17 00:00:00 2001 From: Sebastian Neubauer Date: Wed, 9 Dec 2020 17:25:53 +0100 Subject: [PATCH 07/10] [AMDGPU] Mark amdgpu_gfx functions as module entry function - Allows lds allocations - Writes resource usage into COMPUTE_PGM_RSRC1 registers in PAL metadata Differential Revision: https://reviews.llvm.org/D92946 --- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 40 +++++++++++-------- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 2 +- .../lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 2 +- .../Target/AMDGPU/AMDGPUMachineFunction.cpp | 12 +++--- .../lib/Target/AMDGPU/AMDGPUMachineFunction.h | 7 +++- .../Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 9 +++++ llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 9 +++++ .../Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp | 15 ++++--- .../Target/AMDGPU/Utils/AMDGPUPALMetadata.h | 5 ++- llvm/test/CodeGen/AMDGPU/amdpal-callable.ll | 26 +++++++++++- 10 files changed, 94 insertions(+), 33 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp index 137f6896c87bf6..a14f846b76d1f7 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp @@ -446,7 +446,7 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) { OutStreamer->SwitchSection(ConfigSection); } - if (MFI->isEntryFunction()) { + if (MFI->isModuleEntryFunction()) { getSIProgramInfo(CurrentProgramInfo, MF); } else { auto I = CallGraphResourceInfo.insert( @@ -459,7 +459,7 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) { if (STM.isAmdPalOS()) { if (MFI->isEntryFunction()) EmitPALMetadata(MF, CurrentProgramInfo); - else + else if (MFI->isModuleEntryFunction()) emitPALFunctionMetadata(MF); } else if (!STM.isAmdHsaOS()) { EmitProgramInfoSI(MF, CurrentProgramInfo); @@ -922,7 +922,22 @@ AMDGPUAsmPrinter::SIFunctionResourceInfo AMDGPUAsmPrinter::analyzeResourceUsage( = TII->getNamedOperand(MI, AMDGPU::OpName::callee); const Function *Callee = getCalleeFunction(*CalleeOp); - if (!Callee || Callee->isDeclaration()) { + DenseMap::const_iterator I = + CallGraphResourceInfo.end(); + bool IsExternal = !Callee || Callee->isDeclaration(); + if (!IsExternal) + I = CallGraphResourceInfo.find(Callee); + + if (IsExternal || I == CallGraphResourceInfo.end()) { + // Avoid crashing on undefined behavior with an illegal call to a + // kernel. If a callsite's calling convention doesn't match the + // function's, it's undefined behavior. If the callsite calling + // convention does match, that would have errored earlier. + // FIXME: The verifier shouldn't allow this. + if (!IsExternal && + AMDGPU::isEntryFunctionCC(Callee->getCallingConv())) + report_fatal_error("invalid call to entry function"); + // If this is a call to an external function, we can't do much. Make // conservative guesses. @@ -943,19 +958,6 @@ AMDGPUAsmPrinter::SIFunctionResourceInfo AMDGPUAsmPrinter::analyzeResourceUsage( // We force CodeGen to run in SCC order, so the callee's register // usage etc. should be the cumulative usage of all callees. - auto I = CallGraphResourceInfo.find(Callee); - if (I == CallGraphResourceInfo.end()) { - // Avoid crashing on undefined behavior with an illegal call to a - // kernel. If a callsite's calling convention doesn't match the - // function's, it's undefined behavior. If the callsite calling - // convention does match, that would have errored earlier. - // FIXME: The verifier shouldn't allow this. - if (AMDGPU::isEntryFunctionCC(Callee->getCallingConv())) - report_fatal_error("invalid call to entry function"); - - llvm_unreachable("callee should have been handled before caller"); - } - MaxSGPR = std::max(I->second.NumExplicitSGPR - 1, MaxSGPR); MaxVGPR = std::max(I->second.NumVGPR - 1, MaxVGPR); MaxAGPR = std::max(I->second.NumAGPR - 1, MaxAGPR); @@ -1266,7 +1268,11 @@ void AMDGPUAsmPrinter::EmitPALMetadata(const MachineFunction &MF, void AMDGPUAsmPrinter::emitPALFunctionMetadata(const MachineFunction &MF) { auto *MD = getTargetStreamer()->getPALMetadata(); const MachineFrameInfo &MFI = MF.getFrameInfo(); - MD->setStackFrameSize(MF, MFI.getStackSize()); + MD->setFunctionScratchSize(MF, MFI.getStackSize()); + // Set compute registers + MD->setRsrc1(CallingConv::AMDGPU_CS, + CurrentProgramInfo.getPGMRSrc1(CallingConv::AMDGPU_CS)); + MD->setRsrc2(CallingConv::AMDGPU_CS, CurrentProgramInfo.ComputePGMRSrc2); } // This is supposed to be log2(Size) diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index d0c348bc75d1c7..592446e00042d6 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -1301,7 +1301,7 @@ SDValue AMDGPUTargetLowering::LowerGlobalAddress(AMDGPUMachineFunction* MFI, if (G->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS || G->getAddressSpace() == AMDGPUAS::REGION_ADDRESS) { - if (!MFI->isEntryFunction()) { + if (!MFI->isModuleEntryFunction()) { SDLoc DL(Op); const Function &Fn = DAG.getMachineFunction().getFunction(); DiagnosticInfoUnsupported BadLDSDecl( diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index 11476ee397644f..9b39b86ae28fca 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -2260,7 +2260,7 @@ bool AMDGPULegalizerInfo::legalizeGlobalValue( SIMachineFunctionInfo *MFI = MF.getInfo(); if (AS == AMDGPUAS::LOCAL_ADDRESS || AS == AMDGPUAS::REGION_ADDRESS) { - if (!MFI->isEntryFunction()) { + if (!MFI->isModuleEntryFunction()) { const Function &Fn = MF.getFunction(); DiagnosticInfoUnsupported BadLDSDecl( Fn, "local memory global used by non-kernel function", MI.getDebugLoc(), diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp index 14890fc43de796..5cda80255e1cb0 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp @@ -13,11 +13,13 @@ using namespace llvm; -AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) : - MachineFunctionInfo(), - Mode(MF.getFunction()), - IsEntryFunction(AMDGPU::isEntryFunctionCC(MF.getFunction().getCallingConv())), - NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath) { +AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) + : MachineFunctionInfo(), Mode(MF.getFunction()), + IsEntryFunction( + AMDGPU::isEntryFunctionCC(MF.getFunction().getCallingConv())), + IsModuleEntryFunction( + AMDGPU::isModuleEntryFunctionCC(MF.getFunction().getCallingConv())), + NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath) { const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(MF); // FIXME: Should initialize KernArgSize based on ExplicitKernelArgOffset, diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h index 4a5c743e63018a..b794ec1d4daee7 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h @@ -44,10 +44,13 @@ class AMDGPUMachineFunction : public MachineFunctionInfo { // State of MODE register, assumed FP mode. AMDGPU::SIModeRegisterDefaults Mode; - // Kernels + shaders. i.e. functions called by the driver and not called + // Kernels + shaders. i.e. functions called by the hardware and not called // by other functions. bool IsEntryFunction = false; + // Entry points called by other functions instead of directly by the hardware. + bool IsModuleEntryFunction = false; + bool NoSignedZerosFPMath = false; // Function may be memory bound. @@ -77,6 +80,8 @@ class AMDGPUMachineFunction : public MachineFunctionInfo { return IsEntryFunction; } + bool isModuleEntryFunction() const { return IsModuleEntryFunction; } + bool hasNoSignedZerosFPMath() const { return NoSignedZerosFPMath; } diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp index 8193eedf391dd9..b5a0d43645d49e 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp @@ -1068,6 +1068,15 @@ bool isEntryFunctionCC(CallingConv::ID CC) { } } +bool isModuleEntryFunctionCC(CallingConv::ID CC) { + switch (CC) { + case CallingConv::AMDGPU_Gfx: + return true; + default: + return isEntryFunctionCC(CC); + } +} + bool hasXNACK(const MCSubtargetInfo &STI) { return STI.getFeatureBits()[AMDGPU::FeatureXNACK]; } diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h index 7afc1bca670c87..297ed3e2200862 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h @@ -576,6 +576,15 @@ bool isCompute(CallingConv::ID CC); LLVM_READNONE bool isEntryFunctionCC(CallingConv::ID CC); +// These functions are considered entrypoints into the current module, i.e. they +// are allowed to be called from outside the current module. This is different +// from isEntryFunctionCC, which is only true for functions that are entered by +// the hardware. Module entry points include all entry functions but also +// include functions that can be called from other functions inside or outside +// the current module. Module entry functions are allowed to allocate LDS. +LLVM_READNONE +bool isModuleEntryFunctionCC(CallingConv::ID CC); + // FIXME: Remove this when calling conventions cleaned up LLVM_READNONE inline bool isKernel(CallingConv::ID CC) { diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp index efabab90422f03..cea54d9fcfc319 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp @@ -238,12 +238,11 @@ void AMDGPUPALMetadata::setScratchSize(CallingConv::ID CC, unsigned Val) { getHwStage(CC)[".scratch_memory_size"] = MsgPackDoc.getNode(Val); } -// Set the scratch size in the metadata. -void AMDGPUPALMetadata::setStackFrameSize(const MachineFunction &MF, - unsigned Val) { - auto Node = MsgPackDoc.getMapNode(); +// Set the stack frame size of a function in the metadata. +void AMDGPUPALMetadata::setFunctionScratchSize(const MachineFunction &MF, + unsigned Val) { + auto Node = getShaderFunction(MF.getFunction().getName()); Node[".stack_frame_size_in_bytes"] = MsgPackDoc.getNode(Val); - getShaderFunctions()[MF.getFunction().getName()] = Node; } // Set the hardware register bit in PAL metadata to enable wave32 on the @@ -747,6 +746,12 @@ msgpack::MapDocNode AMDGPUPALMetadata::getShaderFunctions() { return ShaderFunctions.getMap(); } +// Get (create if necessary) a function in the shader functions map. +msgpack::MapDocNode AMDGPUPALMetadata::getShaderFunction(StringRef Name) { + auto Functions = getShaderFunctions(); + return Functions[Name].getMap(/*Convert=*/true); +} + // Return the PAL metadata hardware shader stage name. static const char *getStageName(CallingConv::ID CC) { switch (CC) { diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h b/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h index 3b1767bb1f6442..a17825edccd33b 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h @@ -79,7 +79,7 @@ class AMDGPUPALMetadata { void setScratchSize(unsigned CC, unsigned Val); // Set the stack frame size of a function in the metadata. - void setStackFrameSize(const MachineFunction &MF, unsigned Val); + void setFunctionScratchSize(const MachineFunction &MF, unsigned Val); // Set the hardware register bit in PAL metadata to enable wave32 on the // shader of the given calling convention. @@ -130,6 +130,9 @@ class AMDGPUPALMetadata { // Get (create if necessary) the shader functions map. msgpack::MapDocNode getShaderFunctions(); + // Get (create if necessary) a function in the shader functions map. + msgpack::MapDocNode getShaderFunction(StringRef Name); + // Get (create if necessary) the .hardware_stages entry for the given calling // convention. msgpack::MapDocNode getHwStage(unsigned CC); diff --git a/llvm/test/CodeGen/AMDGPU/amdpal-callable.ll b/llvm/test/CodeGen/AMDGPU/amdpal-callable.ll index c6a065e1e65fdd..0ffe97fd28b358 100644 --- a/llvm/test/CodeGen/AMDGPU/amdpal-callable.ll +++ b/llvm/test/CodeGen/AMDGPU/amdpal-callable.ll @@ -1,5 +1,4 @@ ; RUN: llc -mtriple=amdgcn--amdpal -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SDAG -enable-var-scope %s -; RUN: llc -mtriple=amdgcn--amdpal -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SDAG -enable-var-scope %s ; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SDAG -enable-var-scope %s ; RUN: llc -global-isel -mtriple=amdgcn--amdpal -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GISEL -enable-var-scope %s @@ -126,10 +125,29 @@ define amdgpu_gfx float @simple_stack_recurse(float %arg0) #0 { ret float %add } +@lds = internal addrspace(3) global [64 x float] undef + +define amdgpu_gfx float @simple_lds(float %arg0) #0 { + %lds_ptr = getelementptr [64 x float], [64 x float] addrspace(3)* @lds, i32 0, i32 0 + %val = load float, float addrspace(3)* %lds_ptr + ret float %val +} + +define amdgpu_gfx float @simple_lds_recurse(float %arg0) #0 { + %lds_ptr = getelementptr [64 x float], [64 x float] addrspace(3)* @lds, i32 0, i32 0 + %val = load float, float addrspace(3)* %lds_ptr + %res = call amdgpu_gfx float @simple_lds_recurse(float %val) + ret float %res +} + attributes #0 = { nounwind } ; GCN: amdpal.pipelines: -; GCN-NEXT: - .registers: {} +; GCN-NEXT: - .registers: +; SDAG-NEXT: 0x2e12 (COMPUTE_PGM_RSRC1): 0xaf01ca{{$}} +; SDAG-NEXT: 0x2e13 (COMPUTE_PGM_RSRC2): 0x8001{{$}} +; GISEL-NEXT: 0x2e12 (COMPUTE_PGM_RSRC1): 0xaf01cf{{$}} +; GISEL-NEXT: 0x2e13 (COMPUTE_PGM_RSRC2): 0x8001{{$}} ; GCN-NEXT: .shader_functions: ; GCN-NEXT: dynamic_stack: ; GCN-NEXT: .stack_frame_size_in_bytes: 0x10{{$}} @@ -148,6 +166,10 @@ attributes #0 = { nounwind } ; GISEL-NEXT: .stack_frame_size_in_bytes: 0xd0{{$}} ; GCN-NEXT: no_stack_indirect_call: ; GCN-NEXT: .stack_frame_size_in_bytes: 0x10{{$}} +; GCN-NEXT: simple_lds: +; GCN-NEXT: .stack_frame_size_in_bytes: 0{{$}} +; GCN-NEXT: simple_lds_recurse: +; GCN-NEXT: .stack_frame_size_in_bytes: 0x10{{$}} ; GCN-NEXT: simple_stack: ; GCN-NEXT: .stack_frame_size_in_bytes: 0x14{{$}} ; GCN-NEXT: simple_stack_call: From 75d9a46090249ed8abfafea090e686b4fecf182f Mon Sep 17 00:00:00 2001 From: Frederik Gossen Date: Fri, 11 Dec 2020 17:54:53 +0100 Subject: [PATCH 08/10] [MLIR] Add atan and atan2 lowerings to CUDA intrinsics Differential Revision: https://reviews.llvm.org/D93124 --- .../GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 4 ++ .../Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 41 +++++++++++++++++++ 2 files changed, 45 insertions(+) diff --git a/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp b/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp index 3e90894e2fe900..a8b4d074a08e0f 100644 --- a/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp +++ b/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp @@ -173,6 +173,10 @@ void mlir::populateGpuToNVVMConversionPatterns( GPUFuncOpLowering<0>>(converter); patterns.insert>(converter, "__nv_fabsf", "__nv_fabs"); + patterns.insert>(converter, "__nv_atanf", + "__nv_atan"); + patterns.insert>(converter, "__nv_atan2f", + "__nv_atan2"); patterns.insert>(converter, "__nv_ceilf", "__nv_ceil"); patterns.insert>(converter, "__nv_cosf", diff --git a/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir b/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir index 1c0257de0d5537..d8c4d7e064e520 100644 --- a/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir +++ b/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir @@ -335,6 +335,47 @@ gpu.module @test_module { // ----- +gpu.module @test_module { + // CHECK: llvm.func @__nv_atanf(!llvm.float) -> !llvm.float + // CHECK: llvm.func @__nv_atan(!llvm.double) -> !llvm.double + // CHECK-LABEL: func @gpu_atan + func @gpu_atan(%arg_f16 : f16, %arg_f32 : f32, %arg_f64 : f64) + -> (f16, f32, f64) { + %result16 = std.atan %arg_f16 : f16 + // CHECK: llvm.fpext %{{.*}} : !llvm.half to !llvm.float + // CHECK-NEXT: llvm.call @__nv_atanf(%{{.*}}) : (!llvm.float) -> !llvm.float + // CHECK-NEXT: llvm.fptrunc %{{.*}} : !llvm.float to !llvm.half + %result32 = std.atan %arg_f32 : f32 + // CHECK: llvm.call @__nv_atanf(%{{.*}}) : (!llvm.float) -> !llvm.float + %result64 = std.atan %arg_f64 : f64 + // CHECK: llvm.call @__nv_atan(%{{.*}}) : (!llvm.double) -> !llvm.double + std.return %result16, %result32, %result64 : f16, f32, f64 + } +} + +// ----- + +gpu.module @test_module { + // CHECK: llvm.func @__nv_atan2f(!llvm.float, !llvm.float) -> !llvm.float + // CHECK: llvm.func @__nv_atan2(!llvm.double, !llvm.double) -> !llvm.double + // CHECK-LABEL: func @gpu_atan2 + func @gpu_atan2(%arg_f16 : f16, %arg_f32 : f32, %arg_f64 : f64) + -> (f16, f32, f64) { + %result16 = std.atan2 %arg_f16, %arg_f16 : f16 + // CHECK: llvm.fpext %{{.*}} : !llvm.half to !llvm.float + // CHECK: llvm.fpext %{{.*}} : !llvm.half to !llvm.float + // CHECK-NEXT: llvm.call @__nv_atan2f(%{{.*}}) : (!llvm.float, !llvm.float) -> !llvm.float + // CHECK-NEXT: llvm.fptrunc %{{.*}} : !llvm.float to !llvm.half + %result32 = std.atan2 %arg_f32, %arg_f32 : f32 + // CHECK: llvm.call @__nv_atan2f(%{{.*}}) : (!llvm.float, !llvm.float) -> !llvm.float + %result64 = std.atan2 %arg_f64, %arg_f64 : f64 + // CHECK: llvm.call @__nv_atan2(%{{.*}}) : (!llvm.double, !llvm.double) -> !llvm.double + std.return %result16, %result32, %result64 : f16, f32, f64 + } +} + +// ----- + // Test that we handled properly operation with SymbolTable other than module op gpu.module @test_module { "test.symbol_scope"() ({ From 55f07a340070ebfb53eef68a624956d11936b1fe Mon Sep 17 00:00:00 2001 From: Raul Tambre Date: Mon, 14 Dec 2020 11:07:31 +0200 Subject: [PATCH 09/10] [XRay] Remove unnecessary include It hasn't been necessary since commit 4d4ed0e288bf1f3a90fba6e5b56bc25e2fe961c3 (D43278). Reviewed By: dberris Differential Revision: https://reviews.llvm.org/D93196 --- compiler-rt/lib/xray/xray_x86_64.inc | 1 - 1 file changed, 1 deletion(-) diff --git a/compiler-rt/lib/xray/xray_x86_64.inc b/compiler-rt/lib/xray/xray_x86_64.inc index 477900355cf43f..dc71fb87f63daa 100644 --- a/compiler-rt/lib/xray/xray_x86_64.inc +++ b/compiler-rt/lib/xray/xray_x86_64.inc @@ -11,7 +11,6 @@ //===----------------------------------------------------------------------===// #include -#include #include "sanitizer_common/sanitizer_internal_defs.h" #include "xray_defs.h" From af4570cd3ab94dd52574874b0e9c91a4f6e39272 Mon Sep 17 00:00:00 2001 From: Carl Ritson Date: Mon, 14 Dec 2020 20:00:53 +0900 Subject: [PATCH 10/10] [AMDGPU][NFC] Remove unused VOP3Mods0Clamp This is unused and the selection function does not exist. Reviewed By: foad Differential Revision: https://reviews.llvm.org/D93188 --- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 1 - 1 file changed, 1 deletion(-) diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index b2bc21975a53e0..295030d8024054 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -1316,7 +1316,6 @@ def DS128Bit8ByteAligned : ComplexPattern; def MOVRELOffset : ComplexPattern; def VOP3Mods0 : ComplexPattern; -def VOP3Mods0Clamp : ComplexPattern; def VOP3Mods : ComplexPattern; def VOP3NoMods : ComplexPattern; // VOP3Mods, but the input source is known to never be NaN.