From 7c8796f9db2c82ea6e3721744a7d98ebf0e77cd3 Mon Sep 17 00:00:00 2001 From: Cullen Rhodes Date: Tue, 8 Dec 2020 17:40:13 +0000 Subject: [PATCH 1/9] [TTI] Add supportsScalableVectors target hook This is split off from D91718 and adds a new target hook supportsScalableVectors that can be queried to check if scalable vectors are supported by the backend. For AArch64 this returns true if SVE is enabled. Reviewed By: david-arm Differential Revision: https://reviews.llvm.org/D93060 --- llvm/include/llvm/Analysis/TargetTransformInfo.h | 8 ++++++++ llvm/include/llvm/Analysis/TargetTransformInfoImpl.h | 2 ++ llvm/lib/Analysis/TargetTransformInfo.cpp | 4 ++++ llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h | 2 ++ 4 files changed, 16 insertions(+) diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h index b9b9df35cdb040..0953a3b3f45142 100644 --- a/llvm/include/llvm/Analysis/TargetTransformInfo.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h @@ -1340,6 +1340,9 @@ class TargetTransformInfo { /// to a stack reload. unsigned getGISelRematGlobalCost() const; + /// \returns True if the target supports scalable vectors. + bool supportsScalableVectors() const; + /// \name Vector Predication Information /// @{ /// Whether the target supports the %evl parameter of VP intrinsic efficiently @@ -1634,6 +1637,7 @@ class TargetTransformInfo::Concept { ReductionFlags) const = 0; virtual bool shouldExpandReduction(const IntrinsicInst *II) const = 0; virtual unsigned getGISelRematGlobalCost() const = 0; + virtual bool supportsScalableVectors() const = 0; virtual bool hasActiveVectorLength() const = 0; virtual int getInstructionLatency(const Instruction *I) = 0; }; @@ -2163,6 +2167,10 @@ class TargetTransformInfo::Model final : public TargetTransformInfo::Concept { return Impl.getGISelRematGlobalCost(); } + bool supportsScalableVectors() const override { + return Impl.supportsScalableVectors(); + } + bool hasActiveVectorLength() const override { return Impl.hasActiveVectorLength(); } diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h index 2c206094ac4a53..6415e7bfe7c308 100644 --- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h @@ -685,6 +685,8 @@ class TargetTransformInfoImplBase { unsigned getGISelRematGlobalCost() const { return 1; } + bool supportsScalableVectors() const { return false; } + bool hasActiveVectorLength() const { return false; } protected: diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp index 086a212ee65b70..becf74c64fd5ed 100644 --- a/llvm/lib/Analysis/TargetTransformInfo.cpp +++ b/llvm/lib/Analysis/TargetTransformInfo.cpp @@ -1056,6 +1056,10 @@ unsigned TargetTransformInfo::getGISelRematGlobalCost() const { return TTIImpl->getGISelRematGlobalCost(); } +bool TargetTransformInfo::supportsScalableVectors() const { + return TTIImpl->supportsScalableVectors(); +} + int TargetTransformInfo::getInstructionLatency(const Instruction *I) const { return TTIImpl->getInstructionLatency(I); } diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h index baf11cd7fa2387..c8e721b1fb9f70 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h @@ -228,6 +228,8 @@ class AArch64TTIImpl : public BasicTTIImplBase { return 2; } + bool supportsScalableVectors() const { return ST->hasSVE(); } + bool useReductionIntrinsic(unsigned Opcode, Type *Ty, TTI::ReductionFlags Flags) const; From b58b440d19c84f59aae4679608c55db0d95ff879 Mon Sep 17 00:00:00 2001 From: Carl Ritson Date: Fri, 18 Dec 2020 19:56:16 +0900 Subject: [PATCH 2/9] [AMDGPU][NFC] Document high parameter of f16 interp intrinsics --- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 2 ++ 1 file changed, 2 insertions(+) diff --git a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td index ea4a93f8bdef27..2cab7f38e2813e 100644 --- a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td +++ b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td @@ -1330,6 +1330,7 @@ def int_amdgcn_interp_p2 : // See int_amdgcn_v_interp_p1 for why this is IntrNoMem. // __builtin_amdgcn_interp_p1_f16 , , , , +// high selects whether high or low 16-bits are loaded from LDS def int_amdgcn_interp_p1_f16 : GCCBuiltin<"__builtin_amdgcn_interp_p1_f16">, Intrinsic<[llvm_float_ty], @@ -1338,6 +1339,7 @@ def int_amdgcn_interp_p1_f16 : ImmArg>, ImmArg>, ImmArg>]>; // __builtin_amdgcn_interp_p2_f16 , , , , , +// high selects whether high or low 16-bits are loaded from LDS def int_amdgcn_interp_p2_f16 : GCCBuiltin<"__builtin_amdgcn_interp_p2_f16">, Intrinsic<[llvm_half_ty], From da21f7ec146e7e46a1622253f1cce8af3b290e23 Mon Sep 17 00:00:00 2001 From: Lucas Prates Date: Thu, 19 Nov 2020 15:57:15 +0000 Subject: [PATCH 3/9] [AArch64] Add support for the Branch Record Buffer extension This introduces asm support for the Branch Record Buffer extension, through the new 'brbe' subtarget feature. It consists of a new set of system registers that enable the handling of branch records. Patch written by Simon Tatham. Reviewed By: ostannard Differential Revision: https://reviews.llvm.org/D92389 --- .../llvm/Support/AArch64TargetParser.def | 1 + .../llvm/Support/AArch64TargetParser.h | 1 + llvm/lib/Support/AArch64TargetParser.cpp | 2 + llvm/lib/Target/AArch64/AArch64.td | 3 + llvm/lib/Target/AArch64/AArch64InstrInfo.td | 2 + llvm/lib/Target/AArch64/AArch64Subtarget.h | 1 + .../Target/AArch64/AArch64SystemOperands.td | 19 +++ llvm/test/MC/AArch64/brbe.s | 135 ++++++++++++++++++ llvm/test/MC/Disassembler/AArch64/brbe.txt | 128 +++++++++++++++++ 9 files changed, 292 insertions(+) create mode 100644 llvm/test/MC/AArch64/brbe.s create mode 100644 llvm/test/MC/Disassembler/AArch64/brbe.txt diff --git a/llvm/include/llvm/Support/AArch64TargetParser.def b/llvm/include/llvm/Support/AArch64TargetParser.def index 3683148427b834..97172730e36443 100644 --- a/llvm/include/llvm/Support/AArch64TargetParser.def +++ b/llvm/include/llvm/Support/AArch64TargetParser.def @@ -107,6 +107,7 @@ AARCH64_ARCH_EXT_NAME("f32mm", AArch64::AEK_F32MM, "+f32mm", "-f32m AARCH64_ARCH_EXT_NAME("f64mm", AArch64::AEK_F64MM, "+f64mm", "-f64mm") AARCH64_ARCH_EXT_NAME("tme", AArch64::AEK_TME, "+tme", "-tme") AARCH64_ARCH_EXT_NAME("ls64", AArch64::AEK_LS64, "+ls64", "-ls64") +AARCH64_ARCH_EXT_NAME("brbe", AArch64::AEK_BRBE, "+brbe", "-brbe") #undef AARCH64_ARCH_EXT_NAME #ifndef AARCH64_CPU_NAME diff --git a/llvm/include/llvm/Support/AArch64TargetParser.h b/llvm/include/llvm/Support/AArch64TargetParser.h index aac9197b9c5dd5..a3c9c6a3048335 100644 --- a/llvm/include/llvm/Support/AArch64TargetParser.h +++ b/llvm/include/llvm/Support/AArch64TargetParser.h @@ -63,6 +63,7 @@ enum ArchExtKind : uint64_t { AEK_F32MM = 1ULL << 31, AEK_F64MM = 1ULL << 32, AEK_LS64 = 1ULL << 33, + AEK_BRBE = 1ULL << 34, }; enum class ArchKind { diff --git a/llvm/lib/Support/AArch64TargetParser.cpp b/llvm/lib/Support/AArch64TargetParser.cpp index ac8f5ac8ca0115..62761177c8c28c 100644 --- a/llvm/lib/Support/AArch64TargetParser.cpp +++ b/llvm/lib/Support/AArch64TargetParser.cpp @@ -100,6 +100,8 @@ bool AArch64::getExtensionFeatures(uint64_t Extensions, Features.push_back("+sve2-bitperm"); if (Extensions & AEK_RCPC) Features.push_back("+rcpc"); + if (Extensions & AEK_BRBE) + Features.push_back("+brbe"); return true; } diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index 69f2e31ecfb4e7..6457c86e926f9c 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -412,6 +412,9 @@ def FeatureHCX : SubtargetFeature< def FeatureLS64 : SubtargetFeature<"ls64", "HasLS64", "true", "Enable Armv8.7-A LD64B/ST64B Accelerator Extension">; +def FeatureBRBE : SubtargetFeature<"brbe", "HasBRBE", + "true", "Enable Branch Record Buffer Extension">; + def FeatureFineGrainedTraps : SubtargetFeature<"fgt", "HasFineGrainedTraps", "true", "Enable fine grained virtualization traps extension">; diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td index 97b2ea3c345a9d..5c55dd9834a7e5 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -157,6 +157,8 @@ def HasWFxT : Predicate<"Subtarget->hasWFxT()">, AssemblerPredicate<(all_of FeatureWFxT), "wfxt">; def HasLS64 : Predicate<"Subtarget->hasLS64()">, AssemblerPredicate<(all_of FeatureLS64), "ls64">; +def HasBRBE : Predicate<"Subtarget->hasBRBE()">, + AssemblerPredicate<(all_of FeatureBRBE), "brbe">; def IsLE : Predicate<"Subtarget->isLittleEndian()">; def IsBE : Predicate<"!Subtarget->isLittleEndian()">; def IsWindows : Predicate<"Subtarget->isTargetWindows()">; diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.h b/llvm/lib/Target/AArch64/AArch64Subtarget.h index 2a9426cf8c3067..169e8494f173c8 100644 --- a/llvm/lib/Target/AArch64/AArch64Subtarget.h +++ b/llvm/lib/Target/AArch64/AArch64Subtarget.h @@ -184,6 +184,7 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo { // Future architecture extensions. bool HasETE = false; bool HasTRBE = false; + bool HasBRBE = false; // HasZeroCycleRegMove - Has zero-cycle register mov instructions. bool HasZeroCycleRegMove = false; diff --git a/llvm/lib/Target/AArch64/AArch64SystemOperands.td b/llvm/lib/Target/AArch64/AArch64SystemOperands.td index 31bbc888e4e750..a753b4d4fbc4f0 100644 --- a/llvm/lib/Target/AArch64/AArch64SystemOperands.td +++ b/llvm/lib/Target/AArch64/AArch64SystemOperands.td @@ -1574,6 +1574,25 @@ def : RWSysReg<"CNTVCTSS_EL0", 0b11, 0b011, 0b1110, 0b0000, 0b110>; let Requires = [{ {AArch64::FeatureLS64} }] in def : RWSysReg<"ACCDATA_EL1", 0b11, 0b000, 0b1101, 0b0000, 0b101>; +// Branch Record Buffer system registers +let Requires = [{ {AArch64::FeatureBRBE} }] in { +def : RWSysReg<"BRBCR_EL1", 0b10, 0b001, 0b1001, 0b0000, 0b000>; +def : RWSysReg<"BRBCR_EL12", 0b10, 0b101, 0b1001, 0b0000, 0b000>; +def : RWSysReg<"BRBCR_EL2", 0b10, 0b100, 0b1001, 0b0000, 0b000>; +def : RWSysReg<"BRBFCR_EL1", 0b10, 0b001, 0b1001, 0b0000, 0b001>; +def : ROSysReg<"BRBIDR0_EL1", 0b10, 0b001, 0b1001, 0b0010, 0b000>; +def : RWSysReg<"BRBINFINJ_EL1", 0b10, 0b001, 0b1001, 0b0001, 0b000>; +def : RWSysReg<"BRBSRCINJ_EL1", 0b10, 0b001, 0b1001, 0b0001, 0b001>; +def : RWSysReg<"BRBTGTINJ_EL1", 0b10, 0b001, 0b1001, 0b0001, 0b010>; +def : RWSysReg<"BRBTS_EL1", 0b10, 0b001, 0b1001, 0b0000, 0b010>; +foreach n = 0-31 in { + defvar nb = !cast>(n); + def : ROSysReg<"BRBINF"#n#"_EL1", 0b10, 0b001, 0b1000, nb{3-0}, {nb{4},0b00}>; + def : ROSysReg<"BRBSRC"#n#"_EL1", 0b10, 0b001, 0b1000, nb{3-0}, {nb{4},0b01}>; + def : ROSysReg<"BRBTGT"#n#"_EL1", 0b10, 0b001, 0b1000, nb{3-0}, {nb{4},0b10}>; +} +} + // Cyclone specific system registers // Op0 Op1 CRn CRm Op2 let Requires = [{ {AArch64::ProcAppleA7} }] in diff --git a/llvm/test/MC/AArch64/brbe.s b/llvm/test/MC/AArch64/brbe.s new file mode 100644 index 00000000000000..7b0dfe4955ad60 --- /dev/null +++ b/llvm/test/MC/AArch64/brbe.s @@ -0,0 +1,135 @@ +// RUN: not llvm-mc -triple aarch64 -mattr +brbe -show-encoding %s 2>%t | FileCheck %s +// RUN: FileCheck --check-prefix=ERROR %s < %t +// RUN: not llvm-mc -triple aarch64 -show-encoding %s 2>%t +// RUN: FileCheck --check-prefix=ERROR-NO-BRBE %s < %t + +msr BRBCR_EL1, x0 +mrs x1, BRBCR_EL1 +// CHECK: msr BRBCR_EL1, x0 // encoding: [0x00,0x90,0x11,0xd5] +// CHECK: mrs x1, BRBCR_EL1 // encoding: [0x01,0x90,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:9: error: expected readable system register + +msr BRBCR_EL12, x2 +mrs x3, BRBCR_EL12 +// CHECK: msr BRBCR_EL12, x2 // encoding: [0x02,0x90,0x15,0xd5] +// CHECK: mrs x3, BRBCR_EL12 // encoding: [0x03,0x90,0x35,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:9: error: expected readable system register + +msr BRBCR_EL2, x4 +mrs x5, BRBCR_EL2 +// CHECK: msr BRBCR_EL2, x4 // encoding: [0x04,0x90,0x14,0xd5] +// CHECK: mrs x5, BRBCR_EL2 // encoding: [0x05,0x90,0x34,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:9: error: expected readable system register + +msr BRBFCR_EL1, x6 +mrs x7, BRBFCR_EL1 +// CHECK: msr BRBFCR_EL1, x6 // encoding: [0x26,0x90,0x11,0xd5] +// CHECK: mrs x7, BRBFCR_EL1 // encoding: [0x27,0x90,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:9: error: expected readable system register + +msr BRBIDR0_EL1, x8 +mrs x9, BRBIDR0_EL1 +// ERROR: [[@LINE-2]]:5: error: expected writable system register +// CHECK: mrs x9, BRBIDR0_EL1 // encoding: [0x09,0x92,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:9: error: expected readable system register + +msr BRBINFINJ_EL1, x10 +mrs x11, BRBINFINJ_EL1 +// CHECK: msr BRBINFINJ_EL1, x10 // encoding: [0x0a,0x91,0x11,0xd5] +// CHECK: mrs x11, BRBINFINJ_EL1 // encoding: [0x0b,0x91,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:10: error: expected readable system register + +msr BRBSRCINJ_EL1, x12 +mrs x13, BRBSRCINJ_EL1 +// CHECK: msr BRBSRCINJ_EL1, x12 // encoding: [0x2c,0x91,0x11,0xd5] +// CHECK: mrs x13, BRBSRCINJ_EL1 // encoding: [0x2d,0x91,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:10: error: expected readable system register + +msr BRBTGTINJ_EL1, x14 +mrs x15, BRBTGTINJ_EL1 +// CHECK: msr BRBTGTINJ_EL1, x14 // encoding: [0x4e,0x91,0x11,0xd5] +// CHECK: mrs x15, BRBTGTINJ_EL1 // encoding: [0x4f,0x91,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:10: error: expected readable system register + +msr BRBTS_EL1, x16 +mrs x17, BRBTS_EL1 +// CHECK: msr BRBTS_EL1, x16 // encoding: [0x50,0x90,0x11,0xd5] +// CHECK: mrs x17, BRBTS_EL1 // encoding: [0x51,0x90,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:10: error: expected readable system register + +// Rather than testing all 32 registers in the three BRBINF/BRBSRC/BRBTGT +// families, I'll test a representative sample, including all bits clear, +// all bits set, each bit set individually, and a couple of intermediate +// patterns. + +msr BRBINF0_EL1, x18 +mrs x19, BRBINF0_EL1 +// ERROR: [[@LINE-2]]:5: error: expected writable system register +// CHECK: mrs x19, BRBINF0_EL1 // encoding: [0x13,0x80,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:10: error: expected readable system register + +msr BRBINF1_EL1, x20 +mrs x21, BRBINF1_EL1 +// ERROR: [[@LINE-2]]:5: error: expected writable system register +// CHECK: mrs x21, BRBINF1_EL1 // encoding: [0x15,0x81,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:10: error: expected readable system register + +msr BRBINF2_EL1, x22 +mrs x23, BRBINF2_EL1 +// ERROR: [[@LINE-2]]:5: error: expected writable system register +// CHECK: mrs x23, BRBINF2_EL1 // encoding: [0x17,0x82,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:10: error: expected readable system register + +msr BRBSRC4_EL1, x24 +mrs x25, BRBSRC4_EL1 +// ERROR: [[@LINE-2]]:5: error: expected writable system register +// CHECK: mrs x25, BRBSRC4_EL1 // encoding: [0x39,0x84,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:10: error: expected readable system register + +msr BRBSRC8_EL1, x26 +mrs x27, BRBSRC8_EL1 +// ERROR: [[@LINE-2]]:5: error: expected writable system register +// CHECK: mrs x27, BRBSRC8_EL1 // encoding: [0x3b,0x88,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:10: error: expected readable system register + +msr BRBSRC16_EL1, x28 +mrs x29, BRBSRC16_EL1 +// ERROR: [[@LINE-2]]:5: error: expected writable system register +// CHECK: mrs x29, BRBSRC16_EL1 // encoding: [0xbd,0x80,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:10: error: expected readable system register + +msr BRBTGT10_EL1, x0 +mrs x1, BRBTGT10_EL1 +// ERROR: [[@LINE-2]]:5: error: expected writable system register +// CHECK: mrs x1, BRBTGT10_EL1 // encoding: [0x41,0x8a,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:9: error: expected readable system register + +msr BRBTGT21_EL1, x2 +mrs x3, BRBTGT21_EL1 +// ERROR: [[@LINE-2]]:5: error: expected writable system register +// CHECK: mrs x3, BRBTGT21_EL1 // encoding: [0xc3,0x85,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:9: error: expected readable system register + +msr BRBTGT31_EL1, x4 +mrs x5, BRBTGT31_EL1 +// ERROR: [[@LINE-2]]:5: error: expected writable system register +// CHECK: mrs x5, BRBTGT31_EL1 // encoding: [0xc5,0x8f,0x31,0xd5] +// ERROR-NO-BRBE: [[@LINE-4]]:5: error: expected writable system register +// ERROR-NO-BRBE: [[@LINE-4]]:9: error: expected readable system register diff --git a/llvm/test/MC/Disassembler/AArch64/brbe.txt b/llvm/test/MC/Disassembler/AArch64/brbe.txt new file mode 100644 index 00000000000000..745008e76f6dc7 --- /dev/null +++ b/llvm/test/MC/Disassembler/AArch64/brbe.txt @@ -0,0 +1,128 @@ +# RUN: llvm-mc -triple=aarch64 -mattr=+brbe -disassemble %s 2> %t | FileCheck %s +# RUN: llvm-mc -triple=aarch64 -disassemble %s 2> %t | FileCheck --check-prefix=NO-BRBE %s + +[0x00,0x90,0x11,0xd5] +[0x01,0x90,0x31,0xd5] +# CHECK: msr BRBCR_EL1, x0 +# CHECK: mrs x1, BRBCR_EL1 +# NO-BRBE: msr S2_1_C9_C0_0, x0 +# NO-BRBE: mrs x1, S2_1_C9_C0_0 + +[0x02,0x90,0x15,0xd5] +[0x03,0x90,0x35,0xd5] +# CHECK: msr BRBCR_EL12, x2 +# CHECK: mrs x3, BRBCR_EL12 +# NO-BRBE: msr S2_5_C9_C0_0, x2 +# NO-BRBE: mrs x3, S2_5_C9_C0_0 + +[0x04,0x90,0x14,0xd5] +[0x05,0x90,0x34,0xd5] +# CHECK: msr BRBCR_EL2, x4 +# CHECK: mrs x5, BRBCR_EL2 +# NO-BRBE: msr S2_4_C9_C0_0, x4 +# NO-BRBE: mrs x5, S2_4_C9_C0_0 + +[0x26,0x90,0x11,0xd5] +[0x27,0x90,0x31,0xd5] +# CHECK: msr BRBFCR_EL1, x6 +# CHECK: mrs x7, BRBFCR_EL1 +# NO-BRBE: msr S2_1_C9_C0_1, x6 +# NO-BRBE: mrs x7, S2_1_C9_C0_1 + +[0x08,0x92,0x11,0xd5] # expect failure: BRBIDR0_EL1 is RO +[0x09,0x92,0x31,0xd5] +# CHECK: msr S2_1_C9_C2_0, x8 +# CHECK: mrs x9, BRBIDR0_EL1 +# NO-BRBE: msr S2_1_C9_C2_0, x8 +# NO-BRBE: mrs x9, S2_1_C9_C2_0 + +[0x0a,0x91,0x11,0xd5] +[0x0b,0x91,0x31,0xd5] +# CHECK: msr BRBINFINJ_EL1, x10 +# CHECK: mrs x11, BRBINFINJ_EL1 +# NO-BRBE: msr S2_1_C9_C1_0, x10 +# NO-BRBE: mrs x11, S2_1_C9_C1_0 + +[0x2c,0x91,0x11,0xd5] +[0x2d,0x91,0x31,0xd5] +# CHECK: msr BRBSRCINJ_EL1, x12 +# CHECK: mrs x13, BRBSRCINJ_EL1 +# NO-BRBE: msr S2_1_C9_C1_1, x12 +# NO-BRBE: mrs x13, S2_1_C9_C1_1 + +[0x4e,0x91,0x11,0xd5] +[0x4f,0x91,0x31,0xd5] +# CHECK: msr BRBTGTINJ_EL1, x14 +# CHECK: mrs x15, BRBTGTINJ_EL1 +# NO-BRBE: msr S2_1_C9_C1_2, x14 +# NO-BRBE: mrs x15, S2_1_C9_C1_2 + +[0x50,0x90,0x11,0xd5] +[0x51,0x90,0x31,0xd5] +# CHECK: msr BRBTS_EL1, x16 +# CHECK: mrs x17, BRBTS_EL1 +# NO-BRBE: msr S2_1_C9_C0_2, x16 +# NO-BRBE: mrs x17, S2_1_C9_C0_2 + +[0x12,0x80,0x11,0xd5] # expect failure: BRBINF0_EL1 is RO +[0x13,0x80,0x31,0xd5] +# CHECK: msr S2_1_C8_C0_0, x18 +# CHECK: mrs x19, BRBINF0_EL1 +# NO-BRBE: msr S2_1_C8_C0_0, x18 +# NO-BRBE: mrs x19, S2_1_C8_C0_0 + +[0x14,0x81,0x11,0xd5] # expect failure: BRBINF1_EL1 is RO +[0x15,0x81,0x31,0xd5] +# CHECK: msr S2_1_C8_C1_0, x20 +# CHECK: mrs x21, BRBINF1_EL1 +# NO-BRBE: msr S2_1_C8_C1_0, x20 +# NO-BRBE: mrs x21, S2_1_C8_C1_0 + +[0x16,0x82,0x11,0xd5] # expect failure: BRBINF2_EL1 is RO +[0x17,0x82,0x31,0xd5] +# CHECK: msr S2_1_C8_C2_0, x22 +# CHECK: mrs x23, BRBINF2_EL1 +# NO-BRBE: msr S2_1_C8_C2_0, x22 +# NO-BRBE: mrs x23, S2_1_C8_C2_0 + +[0x38,0x84,0x11,0xd5] # expect failure: BRBSRC4_EL1 is RO +[0x39,0x84,0x31,0xd5] +# CHECK: msr S2_1_C8_C4_1, x24 +# CHECK: mrs x25, BRBSRC4_EL1 +# NO-BRBE: msr S2_1_C8_C4_1, x24 +# NO-BRBE: mrs x25, S2_1_C8_C4_1 + +[0x3a,0x88,0x11,0xd5] # expect failure: BRBSRC8_EL1 is RO +[0x3b,0x88,0x31,0xd5] +# CHECK: msr S2_1_C8_C8_1, x26 +# CHECK: mrs x27, BRBSRC8_EL1 +# NO-BRBE: msr S2_1_C8_C8_1, x26 +# NO-BRBE: mrs x27, S2_1_C8_C8_1 + +[0xbc,0x80,0x11,0xd5] # expect failure: BRBSRC16_EL1 is RO +[0xbd,0x80,0x31,0xd5] +# CHECK: msr S2_1_C8_C0_5, x28 +# CHECK: mrs x29, BRBSRC16_EL1 +# NO-BRBE: msr S2_1_C8_C0_5, x28 +# NO-BRBE: mrs x29, S2_1_C8_C0_5 + +[0x40,0x8a,0x11,0xd5] # expect failure: BRBTGT10_EL1 is RO +[0x41,0x8a,0x31,0xd5] +# CHECK: msr S2_1_C8_C10_2, x0 +# CHECK: mrs x1, BRBTGT10_EL1 +# NO-BRBE: msr S2_1_C8_C10_2, x0 +# NO-BRBE: mrs x1, S2_1_C8_C10_2 + +[0xc2,0x85,0x11,0xd5] # expect failure: BRBTGT21_EL1 is RO +[0xc3,0x85,0x31,0xd5] +# CHECK: msr S2_1_C8_C5_6, x2 +# CHECK: mrs x3, BRBTGT21_EL1 +# NO-BRBE: msr S2_1_C8_C5_6, x2 +# NO-BRBE: mrs x3, S2_1_C8_C5_6 + +[0xc4,0x8f,0x11,0xd5] # expect failure: BRBTGT31_EL1 is RO +[0xc5,0x8f,0x31,0xd5] +# CHECK: msr S2_1_C8_C15_6, x4 +# CHECK: mrs x5, BRBTGT31_EL1 +# NO-BRBE: msr S2_1_C8_C15_6, x4 +# NO-BRBE: mrs x5, S2_1_C8_C15_6 From 51fe17b0471a2b0a27ce038426e6b996218061a2 Mon Sep 17 00:00:00 2001 From: Lucas Prates Date: Fri, 20 Nov 2020 16:07:26 +0000 Subject: [PATCH 4/9] [AArch64] Add support for the SPE-EEF feature This is an addition to the existing Statistical Profiling extension, which introduces an extra system register that is enabled by the new 'spe-eef' subtarget feature. Patch written by Simon Tatham. Reviewed By: ostannard Differential Revision: https://reviews.llvm.org/D92391 --- llvm/lib/Target/AArch64/AArch64.td | 3 +++ llvm/lib/Target/AArch64/AArch64InstrInfo.td | 2 ++ llvm/lib/Target/AArch64/AArch64Subtarget.h | 1 + llvm/lib/Target/AArch64/AArch64SystemOperands.td | 4 ++++ llvm/test/MC/AArch64/spe.s | 6 ++++++ 5 files changed, 16 insertions(+) create mode 100644 llvm/test/MC/AArch64/spe.s diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index 6457c86e926f9c..2df4e92e42cb54 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -415,6 +415,9 @@ def FeatureLS64 : SubtargetFeature<"ls64", "HasLS64", def FeatureBRBE : SubtargetFeature<"brbe", "HasBRBE", "true", "Enable Branch Record Buffer Extension">; +def FeatureSPE_EEF : SubtargetFeature<"spe-eef", "HasSPE_EEF", + "true", "Enable extra register in the Statistical Profiling Extension">; + def FeatureFineGrainedTraps : SubtargetFeature<"fgt", "HasFineGrainedTraps", "true", "Enable fine grained virtualization traps extension">; diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td index 5c55dd9834a7e5..c1d8fd1aba3d77 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -159,6 +159,8 @@ def HasLS64 : Predicate<"Subtarget->hasLS64()">, AssemblerPredicate<(all_of FeatureLS64), "ls64">; def HasBRBE : Predicate<"Subtarget->hasBRBE()">, AssemblerPredicate<(all_of FeatureBRBE), "brbe">; +def HasSPE_EEF : Predicate<"Subtarget->hasSPE_EEF()">, + AssemblerPredicate<(all_of FeatureSPE_EEF), "spe-eef">; def IsLE : Predicate<"Subtarget->isLittleEndian()">; def IsBE : Predicate<"!Subtarget->isLittleEndian()">; def IsWindows : Predicate<"Subtarget->isTargetWindows()">; diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.h b/llvm/lib/Target/AArch64/AArch64Subtarget.h index 169e8494f173c8..641450a6d7767b 100644 --- a/llvm/lib/Target/AArch64/AArch64Subtarget.h +++ b/llvm/lib/Target/AArch64/AArch64Subtarget.h @@ -185,6 +185,7 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo { bool HasETE = false; bool HasTRBE = false; bool HasBRBE = false; + bool HasSPE_EEF = false; // HasZeroCycleRegMove - Has zero-cycle register mov instructions. bool HasZeroCycleRegMove = false; diff --git a/llvm/lib/Target/AArch64/AArch64SystemOperands.td b/llvm/lib/Target/AArch64/AArch64SystemOperands.td index a753b4d4fbc4f0..a69aa68405d40e 100644 --- a/llvm/lib/Target/AArch64/AArch64SystemOperands.td +++ b/llvm/lib/Target/AArch64/AArch64SystemOperands.td @@ -1593,6 +1593,10 @@ foreach n = 0-31 in { } } +// Statistical Profiling Extension system register +let Requires = [{ {AArch64::FeatureSPE_EEF} }] in +def : RWSysReg<"PMSNEVFR_EL1", 0b11, 0b000, 0b1001, 0b1001, 0b001>; + // Cyclone specific system registers // Op0 Op1 CRn CRm Op2 let Requires = [{ {AArch64::ProcAppleA7} }] in diff --git a/llvm/test/MC/AArch64/spe.s b/llvm/test/MC/AArch64/spe.s new file mode 100644 index 00000000000000..a6fb46291dea6c --- /dev/null +++ b/llvm/test/MC/AArch64/spe.s @@ -0,0 +1,6 @@ +// RUN: llvm-mc -triple aarch64 -mattr +spe-eef -show-encoding %s 2>%t | FileCheck %s + +msr PMSNEVFR_EL1, x0 +mrs x1, PMSNEVFR_EL1 +// CHECK: msr PMSNEVFR_EL1, x0 // encoding: [0x20,0x99,0x18,0xd5] +// CHECK: mrs x1, PMSNEVFR_EL1 // encoding: [0x21,0x99,0x38,0xd5] From 7722494834a8357a42d3da70d22f4a9d87c78e2c Mon Sep 17 00:00:00 2001 From: Carl Ritson Date: Fri, 18 Dec 2020 20:05:46 +0900 Subject: [PATCH 5/9] [AMDGPU][NFC] Remove unused Hi16Elt definition --- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 3 --- 1 file changed, 3 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index 5a6c81a0c89b63..746d08b8ce0e9c 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -1331,9 +1331,6 @@ def VOP3OpSelMods : ComplexPattern; def VOP3PMadMixMods : ComplexPattern; - -def Hi16Elt : ComplexPattern; - //===----------------------------------------------------------------------===// // SI assembler operands //===----------------------------------------------------------------------===// From 992fad03e27586d7ffd03833c4609e29be5b60c8 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Fri, 18 Dec 2020 01:01:39 +0000 Subject: [PATCH 6/9] [X86][AVX] Replace extract_subvector(broadcast(), 0) folds with generic SimplifyDemandedVectorEltsForTargetNode handling. Simplifies a few more cases, notably shuffle demanded elts cases. --- llvm/lib/Target/X86/X86ISelLowering.cpp | 50 +++++++++++-------- .../X86/avx512-shuffles/partial_permute.ll | 14 +++--- llvm/test/CodeGen/X86/oddshuffles.ll | 2 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 2 +- llvm/test/CodeGen/X86/vector-fshl-rot-256.ll | 8 +-- llvm/test/CodeGen/X86/vector-rotate-256.ll | 16 +++--- llvm/test/CodeGen/X86/vector-shift-shl-256.ll | 2 +- 7 files changed, 51 insertions(+), 43 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 20a75cb64fa8a2..d4aa97a706ef4d 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -38007,7 +38007,7 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode( SDValue Src = Op.getOperand(0); MVT SrcVT = Src.getSimpleValueType(); if (!SrcVT.isVector()) - return false; + break; // Don't bother broadcasting if we just need the 0'th element. if (DemandedElts == 1) { if (Src.getValueType() != VT) @@ -38060,6 +38060,33 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode( ExtSizeInBits = SizeInBits / 4; switch (Opc) { + // Scalar broadcast. + case X86ISD::VBROADCAST: { + SDLoc DL(Op); + SDValue Src = Op.getOperand(0); + if (Src.getValueSizeInBits() > ExtSizeInBits) + Src = extractSubVector(Src, 0, TLO.DAG, DL, ExtSizeInBits); + EVT BcstVT = EVT::getVectorVT(*TLO.DAG.getContext(), VT.getScalarType(), + ExtSizeInBits / VT.getScalarSizeInBits()); + SDValue Bcst = TLO.DAG.getNode(X86ISD::VBROADCAST, DL, BcstVT, Src); + return TLO.CombineTo(Op, insertSubVector(TLO.DAG.getUNDEF(VT), Bcst, 0, + TLO.DAG, DL, ExtSizeInBits)); + } + case X86ISD::VBROADCAST_LOAD: { + SDLoc DL(Op); + auto *MemIntr = cast(Op); + EVT BcstVT = EVT::getVectorVT(*TLO.DAG.getContext(), VT.getScalarType(), + ExtSizeInBits / VT.getScalarSizeInBits()); + SDVTList Tys = TLO.DAG.getVTList(BcstVT, MVT::Other); + SDValue Ops[] = {MemIntr->getOperand(0), MemIntr->getOperand(1)}; + SDValue Bcst = TLO.DAG.getMemIntrinsicNode( + X86ISD::VBROADCAST_LOAD, DL, Tys, Ops, MemIntr->getMemoryVT(), + MemIntr->getMemOperand()); + TLO.DAG.makeEquivalentMemoryOrdering(SDValue(MemIntr, 1), + Bcst.getValue(1)); + return TLO.CombineTo(Op, insertSubVector(TLO.DAG.getUNDEF(VT), Bcst, 0, + TLO.DAG, DL, ExtSizeInBits)); + } // Subvector broadcast. case X86ISD::SUBV_BROADCAST: { SDLoc DL(Op); @@ -49365,27 +49392,6 @@ static SDValue combineExtractSubvector(SDNode *N, SelectionDAG &DAG, InVec.getOperand(1), InVec.getOperand(2)); } - // If we're extracting from a broadcast then we're better off just - // broadcasting to the smaller type directly, assuming this is the only use. - // As its a broadcast we don't care about the extraction index. - if (InVec.getOpcode() == X86ISD::VBROADCAST && InVec.hasOneUse() && - InVec.getOperand(0).getValueSizeInBits() <= SizeInBits) - return DAG.getNode(X86ISD::VBROADCAST, SDLoc(N), VT, InVec.getOperand(0)); - - if (InVec.getOpcode() == X86ISD::VBROADCAST_LOAD && InVec.hasOneUse()) { - auto *MemIntr = cast(InVec); - if (MemIntr->getMemoryVT().getSizeInBits() <= SizeInBits) { - SDVTList Tys = DAG.getVTList(VT, MVT::Other); - SDValue Ops[] = {MemIntr->getChain(), MemIntr->getBasePtr()}; - SDValue BcastLd = - DAG.getMemIntrinsicNode(X86ISD::VBROADCAST_LOAD, SDLoc(N), Tys, Ops, - MemIntr->getMemoryVT(), - MemIntr->getMemOperand()); - DAG.ReplaceAllUsesOfValueWith(SDValue(MemIntr, 1), BcastLd.getValue(1)); - return BcastLd; - } - } - // If we're extracting an upper subvector from a broadcast we should just // extract the lowest subvector instead which should allow // SimplifyDemandedVectorElts do more simplifications. diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll b/llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll index 58fd4c9c586cea..29ea4d3bf55d30 100644 --- a/llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll +++ b/llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll @@ -3399,9 +3399,10 @@ define <4 x float> @test_masked_z_16xfloat_to_4xfloat_perm_mem_mask1(<16 x float define <4 x float> @test_masked_16xfloat_to_4xfloat_perm_mem_mask2(<16 x float>* %vp, <4 x float> %vec2, <4 x float> %mask) { ; CHECK-LABEL: test_masked_16xfloat_to_4xfloat_perm_mem_mask2: ; CHECK: # %bb.0: -; CHECK-NEXT: vmovaps 32(%rdi), %ymm2 -; CHECK-NEXT: vbroadcastsd {{.*#+}} ymm3 = [60129542148,60129542148,60129542148,60129542148] -; CHECK-NEXT: vpermi2ps (%rdi), %ymm2, %ymm3 +; CHECK-NEXT: vmovddup {{.*#+}} xmm2 = [60129542148,60129542148] +; CHECK-NEXT: # xmm2 = mem[0,0] +; CHECK-NEXT: vmovaps 32(%rdi), %ymm3 +; CHECK-NEXT: vpermt2ps (%rdi), %ymm2, %ymm3 ; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2 ; CHECK-NEXT: vcmpeqps %xmm2, %xmm1, %k1 ; CHECK-NEXT: vmovaps %xmm3, %xmm0 {%k1} @@ -3417,11 +3418,12 @@ define <4 x float> @test_masked_16xfloat_to_4xfloat_perm_mem_mask2(<16 x float>* define <4 x float> @test_masked_z_16xfloat_to_4xfloat_perm_mem_mask2(<16 x float>* %vp, <4 x float> %mask) { ; CHECK-LABEL: test_masked_z_16xfloat_to_4xfloat_perm_mem_mask2: ; CHECK: # %bb.0: -; CHECK-NEXT: vmovaps 32(%rdi), %ymm2 -; CHECK-NEXT: vbroadcastsd {{.*#+}} ymm1 = [60129542148,60129542148,60129542148,60129542148] +; CHECK-NEXT: vmovddup {{.*#+}} xmm2 = [60129542148,60129542148] +; CHECK-NEXT: # xmm2 = mem[0,0] +; CHECK-NEXT: vmovaps 32(%rdi), %ymm1 ; CHECK-NEXT: vxorps %xmm3, %xmm3, %xmm3 ; CHECK-NEXT: vcmpeqps %xmm3, %xmm0, %k1 -; CHECK-NEXT: vpermi2ps (%rdi), %ymm2, %ymm1 {%k1} {z} +; CHECK-NEXT: vpermt2ps (%rdi), %ymm2, %ymm1 {%k1} {z} ; CHECK-NEXT: vmovaps %xmm1, %xmm0 ; CHECK-NEXT: vzeroupper ; CHECK-NEXT: retq diff --git a/llvm/test/CodeGen/X86/oddshuffles.ll b/llvm/test/CodeGen/X86/oddshuffles.ll index 732395ee0f2ddb..b619fae6904a45 100644 --- a/llvm/test/CodeGen/X86/oddshuffles.ll +++ b/llvm/test/CodeGen/X86/oddshuffles.ll @@ -2027,7 +2027,7 @@ define <16 x i32> @splat_v3i32(<3 x i32>* %ptr) { ; AVX2-SLOW-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero ; AVX2-SLOW-NEXT: vxorps %xmm2, %xmm2, %xmm2 ; AVX2-SLOW-NEXT: vblendps {{.*#+}} ymm0 = ymm2[0],ymm1[1],ymm2[2,3,4,5,6,7] -; AVX2-SLOW-NEXT: vbroadcastss %xmm1, %ymm1 +; AVX2-SLOW-NEXT: vbroadcastss %xmm1, %xmm1 ; AVX2-SLOW-NEXT: vblendps {{.*#+}} ymm1 = ymm2[0,1],ymm1[2],ymm2[3,4,5,6,7] ; AVX2-SLOW-NEXT: retq ; diff --git a/llvm/test/CodeGen/X86/vec_int_to_fp.ll b/llvm/test/CodeGen/X86/vec_int_to_fp.ll index 20cd4d5fe1f4c7..05c6a799fd4dd0 100644 --- a/llvm/test/CodeGen/X86/vec_int_to_fp.ll +++ b/llvm/test/CodeGen/X86/vec_int_to_fp.ll @@ -734,8 +734,8 @@ define <2 x double> @uitofp_4i32_to_2f64(<4 x i32> %a) { ; ; AVX2-LABEL: uitofp_4i32_to_2f64: ; AVX2: # %bb.0: -; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero ; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm1 = [4.503599627370496E+15,4.503599627370496E+15] +; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero ; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vsubpd %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: retq diff --git a/llvm/test/CodeGen/X86/vector-fshl-rot-256.ll b/llvm/test/CodeGen/X86/vector-fshl-rot-256.ll index c29263f7b5c63a..bdb47d15cd58da 100644 --- a/llvm/test/CodeGen/X86/vector-fshl-rot-256.ll +++ b/llvm/test/CodeGen/X86/vector-fshl-rot-256.ll @@ -672,8 +672,8 @@ define <4 x i64> @splatvar_funnnel_v4i64(<4 x i64> %x, <4 x i64> %amt) nounwind ; ; XOPAVX2-LABEL: splatvar_funnnel_v4i64: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vpbroadcastq %xmm1, %xmm1 +; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vprotq %xmm1, %xmm2, %xmm2 ; XOPAVX2-NEXT: vprotq %xmm1, %xmm0, %xmm0 ; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 @@ -769,8 +769,8 @@ define <8 x i32> @splatvar_funnnel_v8i32(<8 x i32> %x, <8 x i32> %amt) nounwind ; ; XOPAVX2-LABEL: splatvar_funnnel_v8i32: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vpbroadcastd %xmm1, %xmm1 +; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vprotd %xmm1, %xmm2, %xmm2 ; XOPAVX2-NEXT: vprotd %xmm1, %xmm0, %xmm0 ; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 @@ -891,8 +891,8 @@ define <16 x i16> @splatvar_funnnel_v16i16(<16 x i16> %x, <16 x i16> %amt) nounw ; ; XOPAVX2-LABEL: splatvar_funnnel_v16i16: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vpbroadcastw %xmm1, %xmm1 +; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vprotw %xmm1, %xmm2, %xmm2 ; XOPAVX2-NEXT: vprotw %xmm1, %xmm0, %xmm0 ; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 @@ -1073,8 +1073,8 @@ define <32 x i8> @splatvar_funnnel_v32i8(<32 x i8> %x, <32 x i8> %amt) nounwind ; ; XOPAVX2-LABEL: splatvar_funnnel_v32i8: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1 +; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vprotb %xmm1, %xmm2, %xmm2 ; XOPAVX2-NEXT: vprotb %xmm1, %xmm0, %xmm0 ; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 diff --git a/llvm/test/CodeGen/X86/vector-rotate-256.ll b/llvm/test/CodeGen/X86/vector-rotate-256.ll index ee667abc2288ad..b1a07c91b08dbb 100644 --- a/llvm/test/CodeGen/X86/vector-rotate-256.ll +++ b/llvm/test/CodeGen/X86/vector-rotate-256.ll @@ -647,8 +647,8 @@ define <4 x i64> @splatvar_rotate_v4i64(<4 x i64> %a, <4 x i64> %b) nounwind { ; ; XOPAVX2-LABEL: splatvar_rotate_v4i64: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vpbroadcastq %xmm1, %xmm1 +; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vprotq %xmm1, %xmm2, %xmm2 ; XOPAVX2-NEXT: vprotq %xmm1, %xmm0, %xmm0 ; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 @@ -747,8 +747,8 @@ define <8 x i32> @splatvar_rotate_v8i32(<8 x i32> %a, <8 x i32> %b) nounwind { ; ; XOPAVX2-LABEL: splatvar_rotate_v8i32: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vpbroadcastd %xmm1, %xmm1 +; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vprotd %xmm1, %xmm2, %xmm2 ; XOPAVX2-NEXT: vprotd %xmm1, %xmm0, %xmm0 ; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 @@ -872,8 +872,8 @@ define <16 x i16> @splatvar_rotate_v16i16(<16 x i16> %a, <16 x i16> %b) nounwind ; ; XOPAVX2-LABEL: splatvar_rotate_v16i16: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vpbroadcastw %xmm1, %xmm1 +; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vprotw %xmm1, %xmm2, %xmm2 ; XOPAVX2-NEXT: vprotw %xmm1, %xmm0, %xmm0 ; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 @@ -979,8 +979,8 @@ define <32 x i8> @splatvar_rotate_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind { ; ; AVX512BW-LABEL: splatvar_rotate_v32i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero ; AVX512BW-NEXT: vpbroadcastb %xmm1, %xmm1 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero ; AVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero ; AVX512BW-NEXT: vpsllw %xmm2, %zmm0, %zmm2 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] @@ -993,8 +993,8 @@ define <32 x i8> @splatvar_rotate_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind { ; ; AVX512VLBW-LABEL: splatvar_rotate_v32i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero ; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %xmm1 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero ; AVX512VLBW-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero ; AVX512VLBW-NEXT: vpsllw %xmm2, %zmm0, %zmm2 ; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] @@ -1007,8 +1007,8 @@ define <32 x i8> @splatvar_rotate_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind { ; ; AVX512VBMI2-LABEL: splatvar_rotate_v32i8: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero ; AVX512VBMI2-NEXT: vpbroadcastb %xmm1, %xmm1 +; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero ; AVX512VBMI2-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero ; AVX512VBMI2-NEXT: vpsllw %xmm2, %zmm0, %zmm2 ; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] @@ -1021,8 +1021,8 @@ define <32 x i8> @splatvar_rotate_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind { ; ; AVX512VLVBMI2-LABEL: splatvar_rotate_v32i8: ; AVX512VLVBMI2: # %bb.0: -; AVX512VLVBMI2-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero ; AVX512VLVBMI2-NEXT: vpbroadcastb %xmm1, %xmm1 +; AVX512VLVBMI2-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero ; AVX512VLVBMI2-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero ; AVX512VLVBMI2-NEXT: vpsllw %xmm2, %zmm0, %zmm2 ; AVX512VLVBMI2-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] @@ -1045,8 +1045,8 @@ define <32 x i8> @splatvar_rotate_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind { ; ; XOPAVX2-LABEL: splatvar_rotate_v32i8: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1 +; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vprotb %xmm1, %xmm2, %xmm2 ; XOPAVX2-NEXT: vprotb %xmm1, %xmm0, %xmm0 ; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 diff --git a/llvm/test/CodeGen/X86/vector-shift-shl-256.ll b/llvm/test/CodeGen/X86/vector-shift-shl-256.ll index c033d0fd61817d..758de4e64f7356 100644 --- a/llvm/test/CodeGen/X86/vector-shift-shl-256.ll +++ b/llvm/test/CodeGen/X86/vector-shift-shl-256.ll @@ -669,8 +669,8 @@ define <32 x i8> @splatvar_shift_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind { ; ; XOPAVX2-LABEL: splatvar_shift_v32i8: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1 +; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 ; XOPAVX2-NEXT: vpshlb %xmm1, %xmm2, %xmm2 ; XOPAVX2-NEXT: vpshlb %xmm1, %xmm0, %xmm0 ; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 From 52e4084d9c3b15dbb73906f28f7f5aa45b835b64 Mon Sep 17 00:00:00 2001 From: Kerry McLaughlin Date: Fri, 18 Dec 2020 11:04:41 +0000 Subject: [PATCH 7/9] [SVE][CodeGen] Vector + immediate addressing mode for masked gather/scatter This patch extends LowerMGATHER/MSCATTER to make use of the vector + reg/immediate addressing modes for scalable masked gathers & scatters. selectGatherScatterAddrMode checks if the base pointer is null, in which case we can swap the base pointer and the index, e.g. getelementptr nullptr, (splat(%offset)) + %indices) -> getelementptr %offset, %indices Reviewed By: david-arm Differential Revision: https://reviews.llvm.org/D93132 --- .../Target/AArch64/AArch64ISelLowering.cpp | 66 ++++++- .../AArch64/sve-masked-gather-legalize.ll | 30 ++- .../AArch64/sve-masked-gather-vec-plus-imm.ll | 186 ++++++++++++++++++ .../AArch64/sve-masked-gather-vec-plus-reg.ll | 137 +++++++++++++ .../test/CodeGen/AArch64/sve-masked-gather.ll | 117 +++++++++++ .../sve-masked-scatter-vec-plus-imm.ll | 138 +++++++++++++ .../sve-masked-scatter-vec-plus-reg.ll | 99 ++++++++++ .../CodeGen/AArch64/sve-masked-scatter.ll | 84 ++++++++ 8 files changed, 847 insertions(+), 10 deletions(-) create mode 100644 llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-imm.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-reg.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-masked-gather.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-masked-scatter-vec-plus-imm.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-masked-scatter-vec-plus-reg.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-masked-scatter.ll diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 9eeacc8df0bf34..43db745d632811 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -3812,6 +3812,8 @@ unsigned getSignExtendedGatherOpcode(unsigned Opcode) { return Opcode; case AArch64ISD::GLD1_MERGE_ZERO: return AArch64ISD::GLD1S_MERGE_ZERO; + case AArch64ISD::GLD1_IMM_MERGE_ZERO: + return AArch64ISD::GLD1S_IMM_MERGE_ZERO; case AArch64ISD::GLD1_UXTW_MERGE_ZERO: return AArch64ISD::GLD1S_UXTW_MERGE_ZERO; case AArch64ISD::GLD1_SXTW_MERGE_ZERO: @@ -3843,6 +3845,60 @@ bool getGatherScatterIndexIsExtended(SDValue Index) { return false; } +// If the base pointer of a masked gather or scatter is null, we +// may be able to swap BasePtr & Index and use the vector + register +// or vector + immediate addressing mode, e.g. +// VECTOR + REGISTER: +// getelementptr nullptr, (splat(%offset)) + %indices) +// -> getelementptr %offset, %indices +// VECTOR + IMMEDIATE: +// getelementptr nullptr, (splat(#x)) + %indices) +// -> getelementptr #x, %indices +void selectGatherScatterAddrMode(SDValue &BasePtr, SDValue &Index, EVT MemVT, + unsigned &Opcode, bool IsGather, + SelectionDAG &DAG) { + if (!isNullConstant(BasePtr)) + return; + + ConstantSDNode *Offset = nullptr; + if (Index.getOpcode() == ISD::ADD) + if (auto SplatVal = DAG.getSplatValue(Index.getOperand(1))) { + if (isa(SplatVal)) + Offset = cast(SplatVal); + else { + BasePtr = SplatVal; + Index = Index->getOperand(0); + return; + } + } + + unsigned NewOp = + IsGather ? AArch64ISD::GLD1_IMM_MERGE_ZERO : AArch64ISD::SST1_IMM_PRED; + + if (!Offset) { + std::swap(BasePtr, Index); + Opcode = NewOp; + return; + } + + uint64_t OffsetVal = Offset->getZExtValue(); + unsigned ScalarSizeInBytes = MemVT.getScalarSizeInBits() / 8; + auto ConstOffset = DAG.getConstant(OffsetVal, SDLoc(Index), MVT::i64); + + if (OffsetVal % ScalarSizeInBytes || OffsetVal / ScalarSizeInBytes > 31) { + // Index is out of range for the immediate addressing mode + BasePtr = ConstOffset; + Index = Index->getOperand(0); + return; + } + + // Immediate is in range + Opcode = NewOp; + BasePtr = Index->getOperand(0); + Index = ConstOffset; + return; +} + SDValue AArch64TargetLowering::LowerMGATHER(SDValue Op, SelectionDAG &DAG) const { SDLoc DL(Op); @@ -3892,6 +3948,9 @@ SDValue AArch64TargetLowering::LowerMGATHER(SDValue Op, Index = Index.getOperand(0); unsigned Opcode = getGatherVecOpcode(IsScaled, IsSigned, IdxNeedsExtend); + selectGatherScatterAddrMode(BasePtr, Index, MemVT, Opcode, + /*isGather=*/true, DAG); + if (ResNeedsSignExtend) Opcode = getSignExtendedGatherOpcode(Opcode); @@ -3944,9 +4003,12 @@ SDValue AArch64TargetLowering::LowerMSCATTER(SDValue Op, if (getGatherScatterIndexIsExtended(Index)) Index = Index.getOperand(0); + unsigned Opcode = getScatterVecOpcode(IsScaled, IsSigned, NeedsExtend); + selectGatherScatterAddrMode(BasePtr, Index, MemVT, Opcode, + /*isGather=*/false, DAG); + SDValue Ops[] = {Chain, StoreVal, Mask, BasePtr, Index, InputVT}; - return DAG.getNode(getScatterVecOpcode(IsScaled, IsSigned, NeedsExtend), DL, - VTs, Ops); + return DAG.getNode(Opcode, DL, VTs, Ops); } // Custom lower trunc store for v4i8 vectors, since it is promoted to v4i16. diff --git a/llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll b/llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll index 4482730a7d74c0..6b1dc031dbb292 100644 --- a/llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll +++ b/llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll @@ -44,12 +44,29 @@ define @masked_sgather_zext(i8* %base, %of ; Tests that exercise various type legalisation scenarios for ISD::MGATHER. +; Code generate load of an illegal datatype via promotion. +define @masked_gather_nxv2i8( %ptrs, %mask) { +; CHECK-LABEL: masked_gather_nxv2i8: +; CHECK: ld1sb { z0.d }, p0/z, [z0.d] +; CHECK: ret + %data = call @llvm.masked.gather.nxv2i8( %ptrs, i32 1, %mask, undef) + ret %data +} + +; Code generate load of an illegal datatype via promotion. +define @masked_gather_nxv2i16( %ptrs, %mask) { +; CHECK-LABEL: masked_gather_nxv2i16: +; CHECK: ld1sh { z0.d }, p0/z, [z0.d] +; CHECK: ret + %data = call @llvm.masked.gather.nxv2i16( %ptrs, i32 2, %mask, undef) + ret %data +} + ; Code generate load of an illegal datatype via promotion. define @masked_gather_nxv2i32( %ptrs, %mask) { ; CHECK-LABEL: masked_gather_nxv2i32: -; CHECK-DAG: mov x8, xzr -; CHECK-DAG: ld1sw { z0.d }, p0/z, [x8, z0.d] -; CHECK: ret +; CHECK: ld1sw { z0.d }, p0/z, [z0.d] +; CHECK: ret %data = call @llvm.masked.gather.nxv2i32( %ptrs, i32 4, %mask, undef) ret %data } @@ -92,11 +109,10 @@ define @masked_gather_nxv32i32(i32* %base, @masked_sgather_nxv4i8( %ptrs, %mask) { ; CHECK-LABEL: masked_sgather_nxv4i8: ; CHECK: pfalse p1.b -; CHECK-NEXT: mov x8, xzr ; CHECK-NEXT: zip2 p2.s, p0.s, p1.s ; CHECK-NEXT: zip1 p0.s, p0.s, p1.s -; CHECK-NEXT: ld1sb { z1.d }, p2/z, [x8, z1.d] -; CHECK-NEXT: ld1sb { z0.d }, p0/z, [x8, z0.d] +; CHECK-NEXT: ld1sb { z1.d }, p2/z, [z1.d] +; CHECK-NEXT: ld1sb { z0.d }, p0/z, [z0.d] ; CHECK-NEXT: ptrue p0.s ; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s ; CHECK-NEXT: sxtb z0.s, p0/m, z0.s @@ -109,8 +125,6 @@ define @masked_sgather_nxv4i8( %ptrs, @llvm.masked.gather.nxv2i8(, i32, , ) declare @llvm.masked.gather.nxv2i16(, i32, , ) declare @llvm.masked.gather.nxv2i32(, i32, , ) - declare @llvm.masked.gather.nxv4i8(, i32, , ) - declare @llvm.masked.gather.nxv16i8(, i32, , ) declare @llvm.masked.gather.nxv32i32(, i32, , ) diff --git a/llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-imm.ll b/llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-imm.ll new file mode 100644 index 00000000000000..d2f595ebef760a --- /dev/null +++ b/llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-imm.ll @@ -0,0 +1,186 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s + +define @masked_gather_nxv2i8( %bases, %mask) { +; CHECK-LABEL: masked_gather_nxv2i8: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1b { z0.d }, p0/z, [z0.d, #1] +; CHECK-NEXT: ret + %ptrs = getelementptr i8, %bases, i32 1 + %vals = call @llvm.masked.gather.nxv2i8( %ptrs, i32 1, %mask, undef) + %vals.zext = zext %vals to + ret %vals.zext +} + +define @masked_gather_nxv2i16( %bases, %mask) { +; CHECK-LABEL: masked_gather_nxv2i16: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1h { z0.d }, p0/z, [z0.d, #2] +; CHECK-NEXT: ret + %ptrs = getelementptr i16, %bases, i32 1 + %vals = call @llvm.masked.gather.nxv2i16( %ptrs, i32 2, %mask, undef) + %vals.zext = zext %vals to + ret %vals.zext +} + +define @masked_gather_nxv2i32( %bases, %mask) { +; CHECK-LABEL: masked_gather_nxv2i32: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1w { z0.d }, p0/z, [z0.d, #4] +; CHECK-NEXT: ret + %ptrs = getelementptr i32, %bases, i32 1 + %vals = call @llvm.masked.gather.nxv2i32( %ptrs, i32 4, %mask, undef) + %vals.zext = zext %vals to + ret %vals.zext +} + +define @masked_gather_nxv2i64( %bases, %mask) { +; CHECK-LABEL: masked_gather_nxv2i64: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [z0.d, #8] +; CHECK-NEXT: ret + %ptrs = getelementptr i64, %bases, i32 1 + %vals.zext = call @llvm.masked.gather.nxv2i64( %ptrs, i32 8, %mask, undef) + ret %vals.zext +} + +define @masked_gather_nxv2f16( %bases, %mask) { +; CHECK-LABEL: masked_gather_nxv2f16: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1h { z0.d }, p0/z, [z0.d, #4] +; CHECK-NEXT: ret + %ptrs = getelementptr half, %bases, i32 2 + %vals = call @llvm.masked.gather.nxv2f16( %ptrs, i32 2, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2bf16( %bases, %mask) #0 { +; CHECK-LABEL: masked_gather_nxv2bf16: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1h { z0.d }, p0/z, [z0.d, #4] +; CHECK-NEXT: ret + %ptrs = getelementptr bfloat, %bases, i32 2 + %vals = call @llvm.masked.gather.nxv2bf16( %ptrs, i32 2, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2f32( %bases, %mask) { +; CHECK-LABEL: masked_gather_nxv2f32: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1w { z0.d }, p0/z, [z0.d, #12] +; CHECK-NEXT: ret + %ptrs = getelementptr float, %bases, i32 3 + %vals = call @llvm.masked.gather.nxv2f32( %ptrs, i32 4, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2f64( %bases, %mask) { +; CHECK-LABEL: masked_gather_nxv2f64: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [z0.d, #32] +; CHECK-NEXT: ret + %ptrs = getelementptr double, %bases, i32 4 + %vals = call @llvm.masked.gather.nxv2f64( %ptrs, i32 8, %mask, undef) + ret %vals +} + +define @masked_sgather_nxv2i8( %bases, %mask) { +; CHECK-LABEL: masked_sgather_nxv2i8: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1sb { z0.d }, p0/z, [z0.d, #5] +; CHECK-NEXT: ret + %ptrs = getelementptr i8, %bases, i32 5 + %vals = call @llvm.masked.gather.nxv2i8( %ptrs, i32 1, %mask, undef) + %vals.sext = sext %vals to + ret %vals.sext +} + +define @masked_sgather_nxv2i16( %bases, %mask) { +; CHECK-LABEL: masked_sgather_nxv2i16: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1sh { z0.d }, p0/z, [z0.d, #12] +; CHECK-NEXT: ret + %ptrs = getelementptr i16, %bases, i32 6 + %vals = call @llvm.masked.gather.nxv2i16( %ptrs, i32 2, %mask, undef) + %vals.sext = sext %vals to + ret %vals.sext +} + +define @masked_sgather_nxv2i32( %bases, %mask) { +; CHECK-LABEL: masked_sgather_nxv2i32: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1sw { z0.d }, p0/z, [z0.d, #28] +; CHECK-NEXT: ret + %ptrs = getelementptr i32, %bases, i32 7 + %vals = call @llvm.masked.gather.nxv2i32( %ptrs, i32 4, %mask, undef) + %vals.sext = sext %vals to + ret %vals.sext +} + +; Tests where the immediate is out of range + +define @masked_gather_nxv2i8_range( %bases, %mask) { +; CHECK-LABEL: masked_gather_nxv2i8_range: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #32 +; CHECK-NEXT: ld1b { z0.d }, p0/z, [x8, z0.d] +; CHECK-NEXT: ret + %ptrs = getelementptr i8, %bases, i32 32 + %vals = call @llvm.masked.gather.nxv2i8( %ptrs, i32 1, %mask, undef) + %vals.zext = zext %vals to + ret %vals.zext +} + +define @masked_gather_nxv2f16_range( %bases, %mask) { +; CHECK-LABEL: masked_gather_nxv2f16_range: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #64 +; CHECK-NEXT: ld1h { z0.d }, p0/z, [x8, z0.d] +; CHECK-NEXT: ret + %ptrs = getelementptr half, %bases, i32 32 + %vals = call @llvm.masked.gather.nxv2f16( %ptrs, i32 2, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2bf16_range( %bases, %mask) #0 { +; CHECK-LABEL: masked_gather_nxv2bf16_range: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #64 +; CHECK-NEXT: ld1h { z0.d }, p0/z, [x8, z0.d] +; CHECK-NEXT: ret + %ptrs = getelementptr bfloat, %bases, i32 32 + %vals = call @llvm.masked.gather.nxv2bf16( %ptrs, i32 2, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2f32_range( %bases, %mask) { +; CHECK-LABEL: masked_gather_nxv2f32_range: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #128 +; CHECK-NEXT: ld1w { z0.d }, p0/z, [x8, z0.d] +; CHECK-NEXT: ret + %ptrs = getelementptr float, %bases, i32 32 + %vals = call @llvm.masked.gather.nxv2f32( %ptrs, i32 4, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2f64_range( %bases, %mask) { +; CHECK-LABEL: masked_gather_nxv2f64_range: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #256 +; CHECK-NEXT: ld1d { z0.d }, p0/z, [x8, z0.d] +; CHECK-NEXT: ret + %ptrs = getelementptr double, %bases, i32 32 + %vals = call @llvm.masked.gather.nxv2f64( %ptrs, i32 8, %mask, undef) + ret %vals +} + +declare @llvm.masked.gather.nxv2i8(, i32, , ) +declare @llvm.masked.gather.nxv2i16(, i32, , ) +declare @llvm.masked.gather.nxv2i32(, i32, , ) +declare @llvm.masked.gather.nxv2i64(, i32, , ) +declare @llvm.masked.gather.nxv2f16(, i32, , ) +declare @llvm.masked.gather.nxv2bf16(, i32, , ) +declare @llvm.masked.gather.nxv2f32(, i32, , ) +declare @llvm.masked.gather.nxv2f64(, i32, , ) +attributes #0 = { "target-features"="+sve,+bf16" } diff --git a/llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-reg.ll b/llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-reg.ll new file mode 100644 index 00000000000000..212606ca24ae35 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/sve-masked-gather-vec-plus-reg.ll @@ -0,0 +1,137 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s + +define @masked_gather_nxv2i8( %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_gather_nxv2i8: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1b { z0.d }, p0/z, [x0, z0.d] +; CHECK-NEXT: ret + %ptrs = getelementptr i8, %bases, i64 %offset + %vals = call @llvm.masked.gather.nxv2i8( %ptrs, i32 1, %mask, undef) + %vals.zext = zext %vals to + ret %vals.zext +} + +define @masked_gather_nxv2i16( %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_gather_nxv2i16: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1h { z0.d }, p0/z, [x0, z0.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + %vals = call @llvm.masked.gather.nxv2i16( %ptrs, i32 2, %mask, undef) + %vals.zext = zext %vals to + ret %vals.zext +} + +define @masked_gather_nxv2i32( %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_gather_nxv2i32: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1w { z0.d }, p0/z, [x0, z0.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + %vals = call @llvm.masked.gather.nxv2i32( %ptrs, i32 4, %mask, undef) + %vals.zext = zext %vals to + ret %vals.zext +} + +define @masked_gather_nxv2i64( %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_gather_nxv2i64: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, z0.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + %vals = call @llvm.masked.gather.nxv2i64( %ptrs, i32 8, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2f16( %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_gather_nxv2f16: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1h { z0.d }, p0/z, [x0, z0.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + %vals = call @llvm.masked.gather.nxv2f16( %ptrs, i32 2, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2bf16( %bases, i64 %offset, %mask) #0 { +; CHECK-LABEL: masked_gather_nxv2bf16: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1h { z0.d }, p0/z, [x0, z0.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + %vals = call @llvm.masked.gather.nxv2bf16( %ptrs, i32 2, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2f32( %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_gather_nxv2f32: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1w { z0.d }, p0/z, [x0, z0.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + %vals = call @llvm.masked.gather.nxv2f32( %ptrs, i32 4, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2f64( %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_gather_nxv2f64: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, z0.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + %vals = call @llvm.masked.gather.nxv2f64( %ptrs, i32 8, %mask, undef) + ret %vals +} + +define @masked_sgather_nxv2i8( %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_sgather_nxv2i8: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1sb { z0.d }, p0/z, [x0, z0.d] +; CHECK-NEXT: ret + %ptrs = getelementptr i8, %bases, i64 %offset + %vals = call @llvm.masked.gather.nxv2i8( %ptrs, i32 1, %mask, undef) + %vals.sext = sext %vals to + ret %vals.sext +} + +define @masked_sgather_nxv2i16( %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_sgather_nxv2i16: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1sh { z0.d }, p0/z, [x0, z0.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + %vals = call @llvm.masked.gather.nxv2i16( %ptrs, i32 2, %mask, undef) + %vals.sext = sext %vals to + ret %vals.sext +} + +define @masked_sgather_nxv2i32( %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_sgather_nxv2i32: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1sw { z0.d }, p0/z, [x0, z0.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + %vals = call @llvm.masked.gather.nxv2i32( %ptrs, i32 4, %mask, undef) + %vals.sext = sext %vals to + ret %vals.sext +} + +declare @llvm.masked.gather.nxv2i8(, i32, , ) +declare @llvm.masked.gather.nxv2i16(, i32, , ) +declare @llvm.masked.gather.nxv2i32(, i32, , ) +declare @llvm.masked.gather.nxv2i64(, i32, , ) +declare @llvm.masked.gather.nxv2f16(, i32, , ) +declare @llvm.masked.gather.nxv2bf16(, i32, , ) +declare @llvm.masked.gather.nxv2f32(, i32, , ) +declare @llvm.masked.gather.nxv2f64(, i32, , ) +attributes #0 = { "target-features"="+sve,+bf16" } diff --git a/llvm/test/CodeGen/AArch64/sve-masked-gather.ll b/llvm/test/CodeGen/AArch64/sve-masked-gather.ll new file mode 100644 index 00000000000000..f9a476bbb1c1ac --- /dev/null +++ b/llvm/test/CodeGen/AArch64/sve-masked-gather.ll @@ -0,0 +1,117 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s + +define @masked_gather_nxv2i8( %ptrs, %mask) { +; CHECK-LABEL: masked_gather_nxv2i8: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1b { z0.d }, p0/z, [z0.d] +; CHECK-NEXT: ret + %vals = call @llvm.masked.gather.nxv2i8( %ptrs, i32 1, %mask, undef) + %vals.zext = zext %vals to + ret %vals.zext +} + +define @masked_gather_nxv2i16( %ptrs, %mask) { +; CHECK-LABEL: masked_gather_nxv2i16: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1h { z0.d }, p0/z, [z0.d] +; CHECK-NEXT: ret + %vals = call @llvm.masked.gather.nxv2i16( %ptrs, i32 2, %mask, undef) + %vals.zext = zext %vals to + ret %vals.zext +} + +define @masked_gather_nxv2i32( %ptrs, %mask) { +; CHECK-LABEL: masked_gather_nxv2i32: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1w { z0.d }, p0/z, [z0.d] +; CHECK-NEXT: ret + %vals = call @llvm.masked.gather.nxv2i32( %ptrs, i32 4, %mask, undef) + %vals.zext = zext %vals to + ret %vals.zext +} + +define @masked_gather_nxv2i64( %ptrs, %mask) { +; CHECK-LABEL: masked_gather_nxv2i64: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [z0.d] +; CHECK-NEXT: ret + %vals = call @llvm.masked.gather.nxv2i64( %ptrs, i32 8, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2f16( %ptrs, %mask) { +; CHECK-LABEL: masked_gather_nxv2f16: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1h { z0.d }, p0/z, [z0.d] +; CHECK-NEXT: ret + %vals = call @llvm.masked.gather.nxv2f16( %ptrs, i32 2, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2bf16( %ptrs, %mask) #0 { +; CHECK-LABEL: masked_gather_nxv2bf16: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1h { z0.d }, p0/z, [z0.d] +; CHECK-NEXT: ret + %vals = call @llvm.masked.gather.nxv2bf16( %ptrs, i32 2, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2f32( %ptrs, %mask) { +; CHECK-LABEL: masked_gather_nxv2f32: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1w { z0.d }, p0/z, [z0.d] +; CHECK-NEXT: ret + %vals = call @llvm.masked.gather.nxv2f32( %ptrs, i32 4, %mask, undef) + ret %vals +} + +define @masked_gather_nxv2f64( %ptrs, %mask) { +; CHECK-LABEL: masked_gather_nxv2f64: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [z0.d] +; CHECK-NEXT: ret + %vals = call @llvm.masked.gather.nxv2f64( %ptrs, i32 8, %mask, undef) + ret %vals +} + +define @masked_sgather_nxv2i8( %ptrs, %mask) { +; CHECK-LABEL: masked_sgather_nxv2i8: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1sb { z0.d }, p0/z, [z0.d] +; CHECK-NEXT: ret + %vals = call @llvm.masked.gather.nxv2i8( %ptrs, i32 1, %mask, undef) + %vals.sext = sext %vals to + ret %vals.sext +} + +define @masked_sgather_nxv2i16( %ptrs, %mask) { +; CHECK-LABEL: masked_sgather_nxv2i16: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1sh { z0.d }, p0/z, [z0.d] +; CHECK-NEXT: ret + %vals = call @llvm.masked.gather.nxv2i16( %ptrs, i32 2, %mask, undef) + %vals.sext = sext %vals to + ret %vals.sext +} + +define @masked_sgather_nxv2i32( %ptrs, %mask) { +; CHECK-LABEL: masked_sgather_nxv2i32: +; CHECK: // %bb.0: +; CHECK-NEXT: ld1sw { z0.d }, p0/z, [z0.d] +; CHECK-NEXT: ret + %vals = call @llvm.masked.gather.nxv2i32( %ptrs, i32 4, %mask, undef) + %vals.sext = sext %vals to + ret %vals.sext +} + +declare @llvm.masked.gather.nxv2i8(, i32, , ) +declare @llvm.masked.gather.nxv2i16(, i32, , ) +declare @llvm.masked.gather.nxv2i32(, i32, , ) +declare @llvm.masked.gather.nxv2i64(, i32, , ) +declare @llvm.masked.gather.nxv2f16(, i32, , ) +declare @llvm.masked.gather.nxv2bf16(, i32, , ) +declare @llvm.masked.gather.nxv2f32(, i32, , ) +declare @llvm.masked.gather.nxv2f64(, i32, , ) +attributes #0 = { "target-features"="+sve,+bf16" } diff --git a/llvm/test/CodeGen/AArch64/sve-masked-scatter-vec-plus-imm.ll b/llvm/test/CodeGen/AArch64/sve-masked-scatter-vec-plus-imm.ll new file mode 100644 index 00000000000000..cc33f77d7d88a6 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/sve-masked-scatter-vec-plus-imm.ll @@ -0,0 +1,138 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s + +define void @masked_scatter_nxv2i8( %data, %bases, %mask) { +; CHECK-LABEL: masked_scatter_nxv2i8: +; CHECK: // %bb.0: +; CHECK-NEXT: st1b { z0.d }, p0, [z1.d, #1] +; CHECK-NEXT: ret + %ptrs = getelementptr i8, %bases, i32 1 + call void @llvm.masked.scatter.nxv2i8( %data, %ptrs, i32 1, %mask) + ret void +} + +define void @masked_scatter_nxv2i16( %data, %bases, %mask) { +; CHECK-LABEL: masked_scatter_nxv2i16: +; CHECK: // %bb.0: +; CHECK-NEXT: st1h { z0.d }, p0, [z1.d, #2] +; CHECK-NEXT: ret + %ptrs = getelementptr i16, %bases, i32 1 + call void @llvm.masked.scatter.nxv2i16( %data, %ptrs, i32 2, %mask) + ret void +} + +define void @masked_scatter_nxv2i32( %data, %bases, %mask) { +; CHECK-LABEL: masked_scatter_nxv2i32: +; CHECK: // %bb.0: +; CHECK-NEXT: st1w { z0.d }, p0, [z1.d, #4] +; CHECK-NEXT: ret + %ptrs = getelementptr i32, %bases, i32 1 + call void @llvm.masked.scatter.nxv2i32( %data, %ptrs, i32 4, %mask) + ret void +} + +define void @masked_scatter_nxv2i64( %data, %bases, %mask) { +; CHECK-LABEL: masked_scatter_nxv2i64: +; CHECK: // %bb.0: +; CHECK-NEXT: st1d { z0.d }, p0, [z1.d, #8] +; CHECK-NEXT: ret + %ptrs = getelementptr i64, %bases, i32 1 + call void @llvm.masked.scatter.nxv2i64( %data, %ptrs, i32 8, %mask) + ret void +} + +define void @masked_scatter_nxv2f16( %data, %bases, %mask) { +; CHECK-LABEL: masked_scatter_nxv2f16: +; CHECK: // %bb.0: +; CHECK-NEXT: st1h { z0.d }, p0, [z1.d, #4] +; CHECK-NEXT: ret + %ptrs = getelementptr half, %bases, i32 2 + call void @llvm.masked.scatter.nxv2f16( %data, %ptrs, i32 2, %mask) + ret void +} + +define void @masked_scatter_nxv2bf16( %data, %bases, %mask) #0 { +; CHECK-LABEL: masked_scatter_nxv2bf16: +; CHECK: // %bb.0: +; CHECK-NEXT: st1h { z0.d }, p0, [z1.d, #4] +; CHECK-NEXT: ret + %ptrs = getelementptr bfloat, %bases, i32 2 + call void @llvm.masked.scatter.nxv2bf16( %data, %ptrs, i32 2, %mask) + ret void +} + +define void @masked_scatter_nxv2f32( %data, %bases, %mask) { +; CHECK-LABEL: masked_scatter_nxv2f32: +; CHECK: // %bb.0: +; CHECK-NEXT: st1w { z0.d }, p0, [z1.d, #12] +; CHECK-NEXT: ret + %ptrs = getelementptr float, %bases, i32 3 + call void @llvm.masked.scatter.nxv2f32( %data, %ptrs, i32 4, %mask) + ret void +} + +define void @masked_scatter_nxv2f64( %data, %bases, %mask) { +; CHECK-LABEL: masked_scatter_nxv2f64: +; CHECK: // %bb.0: +; CHECK-NEXT: st1d { z0.d }, p0, [z1.d, #32] +; CHECK-NEXT: ret + %ptrs = getelementptr double, %bases, i32 4 + call void @llvm.masked.scatter.nxv2f64( %data, %ptrs, i32 8, %mask) + ret void +} + +; Test where the immediate is out of range + +define void @masked_scatter_nxv2i8_range( %data, %bases, %mask) { +; CHECK-LABEL: masked_scatter_nxv2i8_range: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #32 +; CHECK-NEXT: st1b { z0.d }, p0, [x8, z1.d] +; CHECK-NEXT: ret + %ptrs = getelementptr i8, %bases, i32 32 + call void @llvm.masked.scatter.nxv2i8( %data, %ptrs, i32 1, %mask) + ret void +} + +define void @masked_scatter_nxv2i16_range( %data, %bases, %mask) { +; CHECK-LABEL: masked_scatter_nxv2i16_range: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #64 +; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d] +; CHECK-NEXT: ret + %ptrs = getelementptr i16, %bases, i32 32 + call void @llvm.masked.scatter.nxv2i16( %data, %ptrs, i32 2, %mask) + ret void +} + +define void @masked_scatter_nxv2i32_range( %data, %bases, %mask) { +; CHECK-LABEL: masked_scatter_nxv2i32_range: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #128 +; CHECK-NEXT: st1w { z0.d }, p0, [x8, z1.d] +; CHECK-NEXT: ret + %ptrs = getelementptr i32, %bases, i32 32 + call void @llvm.masked.scatter.nxv2i32( %data, %ptrs, i32 1, %mask) + ret void +} + +define void @masked_scatter_nxv2f64_range( %data, %bases, %mask) { +; CHECK-LABEL: masked_scatter_nxv2f64_range: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #256 +; CHECK-NEXT: st1d { z0.d }, p0, [x8, z1.d] +; CHECK-NEXT: ret + %ptrs = getelementptr double, %bases, i32 32 + call void @llvm.masked.scatter.nxv2f64( %data, %ptrs, i32 8, %mask) + ret void +} + +declare void @llvm.masked.scatter.nxv2i8(, , i32, ) +declare void @llvm.masked.scatter.nxv2i16(, , i32, ) +declare void @llvm.masked.scatter.nxv2i32(, , i32, ) +declare void @llvm.masked.scatter.nxv2i64(, , i32, ) +declare void @llvm.masked.scatter.nxv2f16(, , i32, ) +declare void @llvm.masked.scatter.nxv2bf16(, , i32, ) +declare void @llvm.masked.scatter.nxv2f32(, , i32, ) +declare void @llvm.masked.scatter.nxv2f64(, , i32, ) +attributes #0 = { "target-features"="+sve,+bf16" } diff --git a/llvm/test/CodeGen/AArch64/sve-masked-scatter-vec-plus-reg.ll b/llvm/test/CodeGen/AArch64/sve-masked-scatter-vec-plus-reg.ll new file mode 100644 index 00000000000000..4164158c36cb90 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/sve-masked-scatter-vec-plus-reg.ll @@ -0,0 +1,99 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s + +define void @masked_scatter_nxv2i8( %data, %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_scatter_nxv2i8: +; CHECK: // %bb.0: +; CHECK-NEXT: st1b { z0.d }, p0, [x0, z1.d] +; CHECK-NEXT: ret + %ptrs = getelementptr i8, %bases, i64 %offset + call void @llvm.masked.scatter.nxv2i8( %data, %ptrs, i32 1, %mask) + ret void +} + +define void @masked_scatter_nxv2i16( %data, %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_scatter_nxv2i16: +; CHECK: // %bb.0: +; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + call void @llvm.masked.scatter.nxv2i16( %data, %ptrs, i32 2, %mask) + ret void +} + +define void @masked_scatter_nxv2i32( %data, %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_scatter_nxv2i32: +; CHECK: // %bb.0: +; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + call void @llvm.masked.scatter.nxv2i32( %data, %ptrs, i32 4, %mask) + ret void +} + +define void @masked_scatter_nxv2i64( %data, %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_scatter_nxv2i64: +; CHECK: // %bb.0: +; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + call void @llvm.masked.scatter.nxv2i64( %data, %ptrs, i32 8, %mask) + ret void +} + +define void @masked_scatter_nxv2f16( %data, %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_scatter_nxv2f16: +; CHECK: // %bb.0: +; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + call void @llvm.masked.scatter.nxv2f16( %data, %ptrs, i32 2, %mask) + ret void +} + +define void @masked_scatter_nxv2bf16( %data, %bases, i64 %offset, %mask) #0 { +; CHECK-LABEL: masked_scatter_nxv2bf16: +; CHECK: // %bb.0: +; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + call void @llvm.masked.scatter.nxv2bf16( %data, %ptrs, i32 2, %mask) + ret void +} + +define void @masked_scatter_nxv2f32( %data, %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_scatter_nxv2f32: +; CHECK: // %bb.0: +; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + call void @llvm.masked.scatter.nxv2f32( %data, %ptrs, i32 4, %mask) + ret void +} + +define void @masked_scatter_nxv2f64( %data, %bases, i64 %offset, %mask) { +; CHECK-LABEL: masked_scatter_nxv2f64: +; CHECK: // %bb.0: +; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d] +; CHECK-NEXT: ret + %byte_ptrs = getelementptr i8, %bases, i64 %offset + %ptrs = bitcast %byte_ptrs to + call void @llvm.masked.scatter.nxv2f64( %data, %ptrs, i32 8, %mask) + ret void +} + +declare void @llvm.masked.scatter.nxv2i8(, , i32, ) +declare void @llvm.masked.scatter.nxv2i16(, , i32, ) +declare void @llvm.masked.scatter.nxv2i32(, , i32, ) +declare void @llvm.masked.scatter.nxv2i64(, , i32, ) +declare void @llvm.masked.scatter.nxv2f16(, , i32, ) +declare void @llvm.masked.scatter.nxv2bf16(, , i32, ) +declare void @llvm.masked.scatter.nxv2f32(, , i32, ) +declare void @llvm.masked.scatter.nxv2f64(, , i32, ) +attributes #0 = { "target-features"="+sve,+bf16" } diff --git a/llvm/test/CodeGen/AArch64/sve-masked-scatter.ll b/llvm/test/CodeGen/AArch64/sve-masked-scatter.ll new file mode 100644 index 00000000000000..002fb6ae5a6751 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/sve-masked-scatter.ll @@ -0,0 +1,84 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s + +define void @masked_scatter_nxv2i8( %data, %ptrs, %masks) nounwind { +; CHECK-LABEL: masked_scatter_nxv2i8: +; CHECK: // %bb.0: +; CHECK-NEXT: st1b { z0.d }, p0, [z1.d] +; CHECK-NEXT: ret + call void @llvm.masked.scatter.nxv2i8( %data, %ptrs, i32 0, %masks) + ret void +} + +define void @masked_scatter_nxv2i16( %data, %ptrs, %masks) nounwind { +; CHECK-LABEL: masked_scatter_nxv2i16: +; CHECK: // %bb.0: +; CHECK-NEXT: st1h { z0.d }, p0, [z1.d] +; CHECK-NEXT: ret + call void @llvm.masked.scatter.nxv2i16( %data, %ptrs, i32 0, %masks) + ret void +} + +define void @masked_scatter_nxv2i32( %data, %ptrs, %masks) nounwind { +; CHECK-LABEL: masked_scatter_nxv2i32: +; CHECK: // %bb.0: +; CHECK-NEXT: st1w { z0.d }, p0, [z1.d] +; CHECK-NEXT: ret + call void @llvm.masked.scatter.nxv2i32( %data, %ptrs, i32 0, %masks) + ret void +} + +define void @masked_scatter_nxv2i64( %data, %ptrs, %masks) nounwind { +; CHECK-LABEL: masked_scatter_nxv2i64: +; CHECK: // %bb.0: +; CHECK-NEXT: st1d { z0.d }, p0, [z1.d] +; CHECK-NEXT: ret + call void @llvm.masked.scatter.nxv2i64( %data, %ptrs, i32 0, %masks) + ret void +} + +define void @masked_scatter_nxv2f16( %data, %ptrs, %masks) nounwind { +; CHECK-LABEL: masked_scatter_nxv2f16: +; CHECK: // %bb.0: +; CHECK-NEXT: st1h { z0.d }, p0, [z1.d] +; CHECK-NEXT: ret + call void @llvm.masked.scatter.nxv2f16( %data, %ptrs, i32 0, %masks) + ret void +} + +define void @masked_scatter_nxv2bf16( %data, %ptrs, %masks) nounwind #0 { +; CHECK-LABEL: masked_scatter_nxv2bf16: +; CHECK: // %bb.0: +; CHECK-NEXT: st1h { z0.d }, p0, [z1.d] +; CHECK-NEXT: ret + call void @llvm.masked.scatter.nxv2bf16( %data, %ptrs, i32 0, %masks) + ret void +} + +define void @masked_scatter_nxv2f32( %data, %ptrs, %masks) nounwind { +; CHECK-LABEL: masked_scatter_nxv2f32: +; CHECK: // %bb.0: +; CHECK-NEXT: st1w { z0.d }, p0, [z1.d] +; CHECK-NEXT: ret + call void @llvm.masked.scatter.nxv2f32( %data, %ptrs, i32 0, %masks) + ret void +} + +define void @masked_scatter_nxv2f64( %data, %ptrs, %masks) nounwind { +; CHECK-LABEL: masked_scatter_nxv2f64: +; CHECK: // %bb.0: +; CHECK-NEXT: st1d { z0.d }, p0, [z1.d] +; CHECK-NEXT: ret + call void @llvm.masked.scatter.nxv2f64( %data, %ptrs, i32 0, %masks) + ret void +} + +declare void @llvm.masked.scatter.nxv2f16(, , i32, ) +declare void @llvm.masked.scatter.nxv2bf16(, , i32, ) +declare void @llvm.masked.scatter.nxv2f32(, , i32, ) +declare void @llvm.masked.scatter.nxv2f64(, , i32, ) +declare void @llvm.masked.scatter.nxv2i16(, , i32, ) +declare void @llvm.masked.scatter.nxv2i32(, , i32, ) +declare void @llvm.masked.scatter.nxv2i64(, , i32, ) +declare void @llvm.masked.scatter.nxv2i8(, , i32, ) +attributes #0 = { "target-features"="+sve,+bf16" } From c15c29652118292c389d5f9fde1b11b55c248cd9 Mon Sep 17 00:00:00 2001 From: Pavel Labath Date: Thu, 10 Dec 2020 15:52:00 +0100 Subject: [PATCH 8/9] [lldb/test] Reduce boilerplate in lldb-server tests Nearly all of our lldb-server tests have two flavours (lldb-server and debugserver). Each of them is tagged with an appropriate decorator, and each of them starts with a call to a matching "init" method. The init calls are mandatory, and it's not possible to meaningfully combine them with a different decorator. This patch leverages the existing decorators to also tag the tests with the appropriate debug server tag, similar to how we do with debug info flavours. This allows us to make the "init" calls from inside the common setUp method. --- .../Python/lldbsuite/test/decorators.py | 2 + .../tools/lldb-server/gdbremote_testcase.py | 14 ++++- .../TestAutoInstallMainExecutable.py | 1 - .../lldb-server/TestAppleSimulatorOSType.py | 1 - .../tools/lldb-server/TestGdbRemoteAttach.py | 2 - .../lldb-server/TestGdbRemoteAuxvSupport.py | 7 --- .../lldb-server/TestGdbRemoteExitCode.py | 4 -- .../TestGdbRemoteExpeditedRegisters.py | 11 ---- .../lldb-server/TestGdbRemoteHostInfo.py | 4 -- .../tools/lldb-server/TestGdbRemoteKill.py | 2 - .../lldb-server/TestGdbRemoteModuleInfo.py | 1 - .../lldb-server/TestGdbRemoteProcessInfo.py | 12 ---- .../lldb-server/TestGdbRemoteRegisterState.py | 4 -- .../lldb-server/TestGdbRemoteSingleStep.py | 2 - .../TestGdbRemoteThreadsInStopReply.py | 10 --- .../TestGdbRemote_qThreadStopInfo.py | 6 -- .../tools/lldb-server/TestGdbRemote_vCont.py | 12 ---- .../lldb-server/TestGdbRemote_vContThreads.py | 8 --- .../tools/lldb-server/TestLldbGdbServer.py | 63 ------------------- .../commandline/TestGdbRemoteConnection.py | 4 -- .../lldb-server/commandline/TestStubSetSID.py | 6 -- .../inferior-crash/TestGdbRemoteAbort.py | 2 - .../inferior-crash/TestGdbRemoteSegFault.py | 2 - .../TestGdbRemoteLibrariesSvr4Support.py | 1 - .../TestGdbRemoteMemoryAllocation.py | 3 - .../TestPlatformProcessConnect.py | 1 - .../register-reading/TestGdbRemoteGPacket.py | 3 - .../TestGdbRemoteTargetXmlPacket.py | 1 - .../TestGdbRemote_QPassSignals.py | 4 -- .../thread-name/TestGdbRemoteThreadName.py | 1 - 30 files changed, 14 insertions(+), 180 deletions(-) diff --git a/lldb/packages/Python/lldbsuite/test/decorators.py b/lldb/packages/Python/lldbsuite/test/decorators.py index ff445fa0b926e8..a17cd6ea33ab1f 100644 --- a/lldb/packages/Python/lldbsuite/test/decorators.py +++ b/lldb/packages/Python/lldbsuite/test/decorators.py @@ -373,11 +373,13 @@ def should_skip_simulator_test(): def debugserver_test(func): """Decorate the item as a debugserver test.""" + func.debug_server = "debugserver" return add_test_categories(["debugserver"])(func) def llgs_test(func): """Decorate the item as a lldb-server test.""" + func.debug_server = "llgs" return add_test_categories(["llgs"])(func) diff --git a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py index b578aae1206251..03cf2d4ab98183 100644 --- a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py +++ b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py @@ -80,6 +80,10 @@ def isVerboseLoggingRequested(self): return any(("gdb-remote" in channel) for channel in lldbtest_config.channels) + def getDebugServer(self): + method = getattr(self, self.testMethodName) + return getattr(method, "debug_server", None) + def setUp(self): super(GdbRemoteTestCaseBase, self).setUp() @@ -114,6 +118,12 @@ def setUp(self): else: self.stub_hostname = "localhost" + debug_server = self.getDebugServer() + if debug_server == "debugserver": + self._init_debugserver_test() + else: + self._init_llgs_test() + def tearDown(self): self.logger.removeHandler(self._verbose_log_handler) self._verbose_log_handler = None @@ -150,7 +160,7 @@ def reset_test_sequence(self): self.test_sequence = GdbRemoteTestSequence(self.logger) - def init_llgs_test(self): + def _init_llgs_test(self): reverse_connect = True if lldb.remote_platform: # Reverse connections may be tricky due to firewalls/NATs. @@ -198,7 +208,7 @@ def init_llgs_test(self): self.reverse_connect = reverse_connect - def init_debugserver_test(self): + def _init_debugserver_test(self): self.debug_monitor_exe = get_debugserver_exe() if not self.debug_monitor_exe: self.skipTest("debugserver exe not found") diff --git a/lldb/test/API/commands/target/auto-install-main-executable/TestAutoInstallMainExecutable.py b/lldb/test/API/commands/target/auto-install-main-executable/TestAutoInstallMainExecutable.py index fe4e124cd605a0..5afb57f3ac46c1 100644 --- a/lldb/test/API/commands/target/auto-install-main-executable/TestAutoInstallMainExecutable.py +++ b/lldb/test/API/commands/target/auto-install-main-executable/TestAutoInstallMainExecutable.py @@ -19,7 +19,6 @@ class TestAutoInstallMainExecutable(gdbremote_testcase.GdbRemoteTestCaseBase): @expectedFailureAll(hostoslist=["windows"], triple='.*-android') def test_target_auto_install_main_executable(self): self.build() - self.init_llgs_test() # Manually install the modified binary. working_dir = lldb.remote_platform.GetWorkingDirectory() diff --git a/lldb/test/API/tools/lldb-server/TestAppleSimulatorOSType.py b/lldb/test/API/tools/lldb-server/TestAppleSimulatorOSType.py index 2db6e334752d40..67ff19f4944858 100644 --- a/lldb/test/API/tools/lldb-server/TestAppleSimulatorOSType.py +++ b/lldb/test/API/tools/lldb-server/TestAppleSimulatorOSType.py @@ -75,7 +75,6 @@ def check_simulator_ostype(self, sdk, platform, arch='x86_64'): self.assertIsNotNone(pid) # Launch debug monitor attaching to the simulated process - self.init_debugserver_test() server = self.connect_to_debug_monitor(attach_pid=pid) # Setup packet sequences diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteAttach.py b/lldb/test/API/tools/lldb-server/TestGdbRemoteAttach.py index c81944f547b24a..84d44b5e0b8492 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemoteAttach.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteAttach.py @@ -53,14 +53,12 @@ def attach_with_vAttach(self): @debugserver_test def test_attach_with_vAttach_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_attach_manually() self.attach_with_vAttach() @llgs_test def test_attach_with_vAttach_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_attach_manually() self.attach_with_vAttach() diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteAuxvSupport.py b/lldb/test/API/tools/lldb-server/TestGdbRemoteAuxvSupport.py index b89448fd5ba6ad..f9c8fadc15b916 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemoteAuxvSupport.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteAuxvSupport.py @@ -104,7 +104,6 @@ def supports_auxv(self): @skipIfWindows # no auxv support. @llgs_test def test_supports_auxv_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.supports_auxv() @@ -120,7 +119,6 @@ def auxv_data_is_correct_size(self): @debugserver_test def test_auxv_data_is_correct_size_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.auxv_data_is_correct_size() @@ -129,7 +127,6 @@ def test_auxv_data_is_correct_size_debugserver(self): @expectedFailureNetBSD @llgs_test def test_auxv_data_is_correct_size_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.auxv_data_is_correct_size() @@ -160,7 +157,6 @@ def auxv_keys_look_valid(self): @debugserver_test def test_auxv_keys_look_valid_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.auxv_keys_look_valid() @@ -169,7 +165,6 @@ def test_auxv_keys_look_valid_debugserver(self): @expectedFailureNetBSD @llgs_test def test_auxv_keys_look_valid_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.auxv_keys_look_valid() @@ -209,7 +204,6 @@ def auxv_chunked_reads_work(self): @debugserver_test def test_auxv_chunked_reads_work_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.auxv_chunked_reads_work() @@ -218,7 +212,6 @@ def test_auxv_chunked_reads_work_debugserver(self): @expectedFailureNetBSD @llgs_test def test_auxv_chunked_reads_work_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.auxv_chunked_reads_work() diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteExitCode.py b/lldb/test/API/tools/lldb-server/TestGdbRemoteExitCode.py index 90a131e645311e..96ebbfb09bdc7c 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemoteExitCode.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteExitCode.py @@ -24,13 +24,11 @@ def inferior_exit_0(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_inferior_exit_0_debugserver(self): - self.init_debugserver_test() self.build() self.inferior_exit_0() @llgs_test def test_inferior_exit_0_llgs(self): - self.init_llgs_test() self.build() self.inferior_exit_0() @@ -50,12 +48,10 @@ def inferior_exit_42(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_inferior_exit_42_debugserver(self): - self.init_debugserver_test() self.build() self.inferior_exit_42() @llgs_test def test_inferior_exit_42_llgs(self): - self.init_llgs_test() self.build() self.inferior_exit_42() diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteExpeditedRegisters.py b/lldb/test/API/tools/lldb-server/TestGdbRemoteExpeditedRegisters.py index a6bca741c6ba2f..a07e227b1a44fa 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemoteExpeditedRegisters.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteExpeditedRegisters.py @@ -86,14 +86,12 @@ def stop_notification_contains_any_registers(self): @debugserver_test def test_stop_notification_contains_any_registers_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.stop_notification_contains_any_registers() @llgs_test def test_stop_notification_contains_any_registers_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.stop_notification_contains_any_registers() @@ -112,14 +110,12 @@ def stop_notification_contains_no_duplicate_registers(self): @debugserver_test def test_stop_notification_contains_no_duplicate_registers_debugserver( self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.stop_notification_contains_no_duplicate_registers() @llgs_test def test_stop_notification_contains_no_duplicate_registers_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.stop_notification_contains_no_duplicate_registers() @@ -129,14 +125,12 @@ def stop_notification_contains_pc_register(self): @debugserver_test def test_stop_notification_contains_pc_register_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.stop_notification_contains_pc_register() @llgs_test def test_stop_notification_contains_pc_register_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.stop_notification_contains_pc_register() @@ -148,14 +142,12 @@ def stop_notification_contains_fp_register(self): @debugserver_test def test_stop_notification_contains_fp_register_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.stop_notification_contains_fp_register() @llgs_test def test_stop_notification_contains_fp_register_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.stop_notification_contains_fp_register() @@ -165,14 +157,12 @@ def stop_notification_contains_sp_register(self): @debugserver_test def test_stop_notification_contains_sp_register_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.stop_notification_contains_sp_register() @llgs_test def test_stop_notification_contains_sp_register_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.stop_notification_contains_sp_register() @@ -183,7 +173,6 @@ def test_stop_notification_contains_sp_register_llgs(self): def test_stop_notification_contains_vg_register_llgs(self): if not self.isAArch64SVE(): self.skipTest('SVE registers must be supported.') - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.stop_notification_contains_aarch64_vg_register() diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteHostInfo.py b/lldb/test/API/tools/lldb-server/TestGdbRemoteHostInfo.py index 832096a0ff5ac1..abb1a003d1253f 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemoteHostInfo.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteHostInfo.py @@ -102,14 +102,12 @@ def validate_darwin_minimum_host_info_keys(self, host_info_dict): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet @debugserver_test def test_qHostInfo_returns_at_least_one_key_val_pair_debugserver(self): - self.init_debugserver_test() self.build() self.get_qHostInfo_response() @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet @llgs_test def test_qHostInfo_returns_at_least_one_key_val_pair_llgs(self): - self.init_llgs_test() self.build() self.get_qHostInfo_response() @@ -117,7 +115,6 @@ def test_qHostInfo_returns_at_least_one_key_val_pair_llgs(self): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet @debugserver_test def test_qHostInfo_contains_darwin_required_keys_debugserver(self): - self.init_debugserver_test() self.build() host_info_dict = self.get_qHostInfo_response() self.validate_darwin_minimum_host_info_keys(host_info_dict) @@ -126,7 +123,6 @@ def test_qHostInfo_contains_darwin_required_keys_debugserver(self): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet @llgs_test def test_qHostInfo_contains_darwin_required_keys_llgs(self): - self.init_llgs_test() self.build() host_info_dict = self.get_qHostInfo_response() self.validate_darwin_minimum_host_info_keys(host_info_dict) diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteKill.py b/lldb/test/API/tools/lldb-server/TestGdbRemoteKill.py index 038ef1a21e0b39..175ecfed538b8b 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemoteKill.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteKill.py @@ -46,14 +46,12 @@ def attach_commandline_kill_after_initial_stop(self): @debugserver_test def test_attach_commandline_kill_after_initial_stop_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_attach() self.attach_commandline_kill_after_initial_stop() @llgs_test def test_attach_commandline_kill_after_initial_stop_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_attach() self.attach_commandline_kill_after_initial_stop() diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteModuleInfo.py b/lldb/test/API/tools/lldb-server/TestGdbRemoteModuleInfo.py index 5e94dbcf922748..8365b657f93233 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemoteModuleInfo.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteModuleInfo.py @@ -37,7 +37,6 @@ def module_info(self): @llgs_test def test_module_info(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.module_info() diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteProcessInfo.py b/lldb/test/API/tools/lldb-server/TestGdbRemoteProcessInfo.py index 3bfe212cc3512a..a4708679e0d800 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemoteProcessInfo.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteProcessInfo.py @@ -36,13 +36,11 @@ def qProcessInfo_returns_running_process(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qProcessInfo_returns_running_process_debugserver(self): - self.init_debugserver_test() self.build() self.qProcessInfo_returns_running_process() @llgs_test def test_qProcessInfo_returns_running_process_llgs(self): - self.init_llgs_test() self.build() self.qProcessInfo_returns_running_process() @@ -69,14 +67,12 @@ def attach_commandline_qProcessInfo_reports_correct_pid(self): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_attach_commandline_qProcessInfo_reports_correct_pid_debugserver( self): - self.init_debugserver_test() self.build() self.set_inferior_startup_attach() self.attach_commandline_qProcessInfo_reports_correct_pid() @llgs_test def test_attach_commandline_qProcessInfo_reports_correct_pid_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_attach() self.attach_commandline_qProcessInfo_reports_correct_pid() @@ -101,13 +97,11 @@ def qProcessInfo_reports_valid_endian(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qProcessInfo_reports_valid_endian_debugserver(self): - self.init_debugserver_test() self.build() self.qProcessInfo_reports_valid_endian() @llgs_test def test_qProcessInfo_reports_valid_endian_llgs(self): - self.init_llgs_test() self.build() self.qProcessInfo_reports_valid_endian() @@ -162,20 +156,17 @@ def qProcessInfo_does_not_contain_keys(self, absent_key_set): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qProcessInfo_contains_cputype_cpusubtype_debugserver_darwin(self): - self.init_debugserver_test() self.build() self.qProcessInfo_contains_keys(set(['cputype', 'cpusubtype'])) @skipUnlessDarwin @llgs_test def test_qProcessInfo_contains_cputype_cpusubtype_llgs_darwin(self): - self.init_llgs_test() self.build() self.qProcessInfo_contains_keys(set(['cputype', 'cpusubtype'])) @llgs_test def test_qProcessInfo_contains_triple_ppid_llgs(self): - self.init_llgs_test() self.build() self.qProcessInfo_contains_keys(set(['triple', 'parent-pid'])) @@ -183,7 +174,6 @@ def test_qProcessInfo_contains_triple_ppid_llgs(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qProcessInfo_does_not_contain_triple_debugserver_darwin(self): - self.init_debugserver_test() self.build() # We don't expect to see triple on darwin. If we do, we'll prefer triple # to cputype/cpusubtype and skip some darwin-based ProcessGDBRemote ArchSpec setup @@ -193,7 +183,6 @@ def test_qProcessInfo_does_not_contain_triple_debugserver_darwin(self): @skipUnlessDarwin @llgs_test def test_qProcessInfo_does_not_contain_triple_llgs_darwin(self): - self.init_llgs_test() self.build() # We don't expect to see triple on darwin. If we do, we'll prefer triple # to cputype/cpusubtype and skip some darwin-based ProcessGDBRemote ArchSpec setup @@ -203,6 +192,5 @@ def test_qProcessInfo_does_not_contain_triple_llgs_darwin(self): @skipIfDarwin @llgs_test def test_qProcessInfo_does_not_contain_cputype_cpusubtype_llgs(self): - self.init_llgs_test() self.build() self.qProcessInfo_does_not_contain_keys(set(['cputype', 'cpusubtype'])) diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteRegisterState.py b/lldb/test/API/tools/lldb-server/TestGdbRemoteRegisterState.py index e20948ba38af65..3d07e19d2d3822 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemoteRegisterState.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteRegisterState.py @@ -95,7 +95,6 @@ def grp_register_save_restore_works(self, with_suffix): @debugserver_test def test_grp_register_save_restore_works_with_suffix_debugserver(self): USE_THREAD_SUFFIX = True - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.grp_register_save_restore_works(USE_THREAD_SUFFIX) @@ -103,7 +102,6 @@ def test_grp_register_save_restore_works_with_suffix_debugserver(self): @llgs_test def test_grp_register_save_restore_works_with_suffix_llgs(self): USE_THREAD_SUFFIX = True - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.grp_register_save_restore_works(USE_THREAD_SUFFIX) @@ -111,7 +109,6 @@ def test_grp_register_save_restore_works_with_suffix_llgs(self): @debugserver_test def test_grp_register_save_restore_works_no_suffix_debugserver(self): USE_THREAD_SUFFIX = False - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.grp_register_save_restore_works(USE_THREAD_SUFFIX) @@ -119,7 +116,6 @@ def test_grp_register_save_restore_works_no_suffix_debugserver(self): @llgs_test def test_grp_register_save_restore_works_no_suffix_llgs(self): USE_THREAD_SUFFIX = False - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.grp_register_save_restore_works(USE_THREAD_SUFFIX) diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteSingleStep.py b/lldb/test/API/tools/lldb-server/TestGdbRemoteSingleStep.py index 84c2419790836d..fba8bec8ee6b8b 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemoteSingleStep.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteSingleStep.py @@ -13,7 +13,6 @@ class TestGdbRemoteSingleStep(gdbremote_testcase.GdbRemoteTestCaseBase): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet @debugserver_test def test_single_step_only_steps_one_instruction_with_s_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.single_step_only_steps_one_instruction( @@ -23,7 +22,6 @@ def test_single_step_only_steps_one_instruction_with_s_debugserver(self): @llgs_test @skipIf(triple='^mips') def test_single_step_only_steps_one_instruction_with_s_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.single_step_only_steps_one_instruction( diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteThreadsInStopReply.py b/lldb/test/API/tools/lldb-server/TestGdbRemoteThreadsInStopReply.py index 891a0101614a6d..c83b4fbdd37dc6 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemoteThreadsInStopReply.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteThreadsInStopReply.py @@ -177,14 +177,12 @@ def QListThreadsInStopReply_supported(self): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet @debugserver_test def test_QListThreadsInStopReply_supported_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.QListThreadsInStopReply_supported() @llgs_test def test_QListThreadsInStopReply_supported_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.QListThreadsInStopReply_supported() @@ -199,7 +197,6 @@ def stop_reply_reports_multiple_threads(self, thread_count): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet @debugserver_test def test_stop_reply_reports_multiple_threads_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.stop_reply_reports_multiple_threads(5) @@ -212,7 +209,6 @@ def test_stop_reply_reports_multiple_threads_debugserver(self): @skipIfNetBSD @llgs_test def test_stop_reply_reports_multiple_threads_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.stop_reply_reports_multiple_threads(5) @@ -226,7 +222,6 @@ def no_QListThreadsInStopReply_supplies_no_threads(self, thread_count): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet @debugserver_test def test_no_QListThreadsInStopReply_supplies_no_threads_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.no_QListThreadsInStopReply_supplies_no_threads(5) @@ -235,7 +230,6 @@ def test_no_QListThreadsInStopReply_supplies_no_threads_debugserver(self): @skipIfNetBSD @llgs_test def test_no_QListThreadsInStopReply_supplies_no_threads_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.no_QListThreadsInStopReply_supplies_no_threads(5) @@ -265,7 +259,6 @@ def stop_reply_reports_correct_threads(self, thread_count): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet @debugserver_test def test_stop_reply_reports_correct_threads_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.stop_reply_reports_correct_threads(5) @@ -274,7 +267,6 @@ def test_stop_reply_reports_correct_threads_debugserver(self): @skipIfNetBSD @llgs_test def test_stop_reply_reports_correct_threads_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.stop_reply_reports_correct_threads(5) @@ -300,7 +292,6 @@ def stop_reply_contains_thread_pcs(self, thread_count): @skipIfNetBSD @llgs_test def test_stop_reply_contains_thread_pcs_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.stop_reply_contains_thread_pcs(5) @@ -308,7 +299,6 @@ def test_stop_reply_contains_thread_pcs_llgs(self): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet @debugserver_test def test_stop_reply_contains_thread_pcs_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.stop_reply_contains_thread_pcs(5) diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemote_qThreadStopInfo.py b/lldb/test/API/tools/lldb-server/TestGdbRemote_qThreadStopInfo.py index 076b0dadd528b6..f8ecf5509b5647 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemote_qThreadStopInfo.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemote_qThreadStopInfo.py @@ -117,7 +117,6 @@ def qThreadStopInfo_works_for_multiple_threads(self, thread_count): @debugserver_test def test_qThreadStopInfo_works_for_multiple_threads_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.qThreadStopInfo_works_for_multiple_threads(self.THREAD_COUNT) @@ -125,7 +124,6 @@ def test_qThreadStopInfo_works_for_multiple_threads_debugserver(self): @llgs_test @skipIfNetBSD def test_qThreadStopInfo_works_for_multiple_threads_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.qThreadStopInfo_works_for_multiple_threads(self.THREAD_COUNT) @@ -157,7 +155,6 @@ def qThreadStopInfo_only_reports_one_thread_stop_reason_during_interrupt( @debugserver_test def test_qThreadStopInfo_only_reports_one_thread_stop_reason_during_interrupt_debugserver( self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.qThreadStopInfo_only_reports_one_thread_stop_reason_during_interrupt( @@ -168,7 +165,6 @@ def test_qThreadStopInfo_only_reports_one_thread_stop_reason_during_interrupt_de @llgs_test def test_qThreadStopInfo_only_reports_one_thread_stop_reason_during_interrupt_llgs( self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.qThreadStopInfo_only_reports_one_thread_stop_reason_during_interrupt( @@ -187,7 +183,6 @@ def qThreadStopInfo_has_valid_thread_names( @unittest2.skip("MacOSX doesn't have a default thread name") @debugserver_test def test_qThreadStopInfo_has_valid_thread_names_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.qThreadStopInfo_has_valid_thread_names(self.THREAD_COUNT, "a.out") @@ -197,7 +192,6 @@ def test_qThreadStopInfo_has_valid_thread_names_debugserver(self): @skipUnlessPlatform(["linux", "windows"]) @llgs_test def test_qThreadStopInfo_has_valid_thread_names_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.qThreadStopInfo_has_valid_thread_names(self.THREAD_COUNT, "a.out") diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemote_vCont.py b/lldb/test/API/tools/lldb-server/TestGdbRemote_vCont.py index 758b0bc72fc6ee..e622932e19e0a1 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemote_vCont.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemote_vCont.py @@ -41,56 +41,48 @@ def vCont_supports_S(self): @expectedFailureAll(oslist=["ios", "tvos", "watchos", "bridgeos"], bugnumber="rdar://27005337") @debugserver_test def test_vCont_supports_c_debugserver(self): - self.init_debugserver_test() self.build() self.vCont_supports_c() @expectedFailureAll(oslist=["ios", "tvos", "watchos", "bridgeos"], bugnumber="rdar://27005337") @llgs_test def test_vCont_supports_c_llgs(self): - self.init_llgs_test() self.build() self.vCont_supports_c() @expectedFailureAll(oslist=["ios", "tvos", "watchos", "bridgeos"], bugnumber="rdar://27005337") @debugserver_test def test_vCont_supports_C_debugserver(self): - self.init_debugserver_test() self.build() self.vCont_supports_C() @expectedFailureAll(oslist=["ios", "tvos", "watchos", "bridgeos"], bugnumber="rdar://27005337") @llgs_test def test_vCont_supports_C_llgs(self): - self.init_llgs_test() self.build() self.vCont_supports_C() @expectedFailureAll(oslist=["ios", "tvos", "watchos", "bridgeos"], bugnumber="rdar://27005337") @debugserver_test def test_vCont_supports_s_debugserver(self): - self.init_debugserver_test() self.build() self.vCont_supports_s() @expectedFailureAll(oslist=["ios", "tvos", "watchos", "bridgeos"], bugnumber="rdar://27005337") @llgs_test def test_vCont_supports_s_llgs(self): - self.init_llgs_test() self.build() self.vCont_supports_s() @expectedFailureAll(oslist=["ios", "tvos", "watchos", "bridgeos"], bugnumber="rdar://27005337") @debugserver_test def test_vCont_supports_S_debugserver(self): - self.init_debugserver_test() self.build() self.vCont_supports_S() @expectedFailureAll(oslist=["ios", "tvos", "watchos", "bridgeos"], bugnumber="rdar://27005337") @llgs_test def test_vCont_supports_S_llgs(self): - self.init_llgs_test() self.build() self.vCont_supports_S() @@ -98,7 +90,6 @@ def test_vCont_supports_S_llgs(self): @debugserver_test def test_single_step_only_steps_one_instruction_with_Hc_vCont_s_debugserver( self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.single_step_only_steps_one_instruction( @@ -109,7 +100,6 @@ def test_single_step_only_steps_one_instruction_with_Hc_vCont_s_debugserver( @skipIf(triple='^mips') @expectedFailureAll(oslist=["ios", "tvos", "watchos", "bridgeos"], bugnumber="rdar://27005337") def test_single_step_only_steps_one_instruction_with_Hc_vCont_s_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.single_step_only_steps_one_instruction( @@ -119,7 +109,6 @@ def test_single_step_only_steps_one_instruction_with_Hc_vCont_s_llgs(self): @debugserver_test def test_single_step_only_steps_one_instruction_with_vCont_s_thread_debugserver( self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.single_step_only_steps_one_instruction( @@ -131,7 +120,6 @@ def test_single_step_only_steps_one_instruction_with_vCont_s_thread_debugserver( @expectedFailureAll(oslist=["ios", "tvos", "watchos", "bridgeos"], bugnumber="rdar://27005337") def test_single_step_only_steps_one_instruction_with_vCont_s_thread_llgs( self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.single_step_only_steps_one_instruction( diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemote_vContThreads.py b/lldb/test/API/tools/lldb-server/TestGdbRemote_vContThreads.py index e16a28a335adc7..e9ad057e369b5a 100644 --- a/lldb/test/API/tools/lldb-server/TestGdbRemote_vContThreads.py +++ b/lldb/test/API/tools/lldb-server/TestGdbRemote_vContThreads.py @@ -47,7 +47,6 @@ def signal_one_thread(self): @skipUnlessPlatform(["netbsd"]) @debugserver_test def test_signal_one_thread_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.signal_one_thread() @@ -55,7 +54,6 @@ def test_signal_one_thread_debugserver(self): @skipUnlessPlatform(["netbsd"]) @llgs_test def test_signal_one_thread_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.signal_one_thread() @@ -76,7 +74,6 @@ def signal_all_threads(self): @skipUnlessPlatform(["netbsd"]) @debugserver_test def test_signal_all_threads_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.signal_all_threads() @@ -84,7 +81,6 @@ def test_signal_all_threads_debugserver(self): @skipUnlessPlatform(["netbsd"]) @llgs_test def test_signal_all_threads_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.signal_all_threads() @@ -105,7 +101,6 @@ def signal_two_of_three_threads(self): @skipUnlessPlatform(["netbsd"]) @debugserver_test def test_signal_two_of_three_threads_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.signal_two_of_three_threads() @@ -113,7 +108,6 @@ def test_signal_two_of_three_threads_debugserver(self): @skipUnlessPlatform(["netbsd"]) @llgs_test def test_signal_two_of_three_threads_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.signal_two_of_three_threads() @@ -134,7 +128,6 @@ def signal_two_signals(self): @skipUnlessPlatform(["netbsd"]) @debugserver_test def test_signal_two_signals_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.signal_two_signals() @@ -142,7 +135,6 @@ def test_signal_two_signals_debugserver(self): @skipUnlessPlatform(["netbsd"]) @llgs_test def test_signal_two_signals_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.signal_two_signals() diff --git a/lldb/test/API/tools/lldb-server/TestLldbGdbServer.py b/lldb/test/API/tools/lldb-server/TestLldbGdbServer.py index 8a9b7187a7168e..d3bbfe03dbd8c4 100644 --- a/lldb/test/API/tools/lldb-server/TestLldbGdbServer.py +++ b/lldb/test/API/tools/lldb-server/TestLldbGdbServer.py @@ -27,12 +27,10 @@ class LldbGdbServerTestCase(gdbremote_testcase.GdbRemoteTestCaseBase, DwarfOpcod @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_exe_starts_debugserver(self): - self.init_debugserver_test() server = self.connect_to_debug_monitor() @llgs_test def test_exe_starts_llgs(self): - self.init_llgs_test() server = self.connect_to_debug_monitor() def thread_suffix_supported(self): @@ -50,12 +48,10 @@ def thread_suffix_supported(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_thread_suffix_supported_debugserver(self): - self.init_debugserver_test() self.thread_suffix_supported() @llgs_test def test_thread_suffix_supported_llgs(self): - self.init_llgs_test() self.thread_suffix_supported() def list_threads_in_stop_reply_supported(self): @@ -72,12 +68,10 @@ def list_threads_in_stop_reply_supported(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_list_threads_in_stop_reply_supported_debugserver(self): - self.init_debugserver_test() self.list_threads_in_stop_reply_supported() @llgs_test def test_list_threads_in_stop_reply_supported_llgs(self): - self.init_llgs_test() self.list_threads_in_stop_reply_supported() def c_packet_works(self): @@ -92,13 +86,11 @@ def c_packet_works(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_c_packet_works_debugserver(self): - self.init_debugserver_test() self.build() self.c_packet_works() @llgs_test def test_c_packet_works_llgs(self): - self.init_llgs_test() self.build() self.c_packet_works() @@ -117,7 +109,6 @@ def inferior_print_exit(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_inferior_print_exit_debugserver(self): - self.init_debugserver_test() self.build() self.inferior_print_exit() @@ -125,7 +116,6 @@ def test_inferior_print_exit_debugserver(self): @llgs_test @expectedFlakeyLinux("llvm.org/pr25652") def test_inferior_print_exit_llgs(self): - self.init_llgs_test() self.build() self.inferior_print_exit() @@ -145,13 +135,11 @@ def first_launch_stop_reply_thread_matches_first_qC(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_first_launch_stop_reply_thread_matches_first_qC_debugserver(self): - self.init_debugserver_test() self.build() self.first_launch_stop_reply_thread_matches_first_qC() @llgs_test def test_first_launch_stop_reply_thread_matches_first_qC_llgs(self): - self.init_llgs_test() self.build() self.first_launch_stop_reply_thread_matches_first_qC() @@ -181,14 +169,12 @@ def attach_commandline_continue_app_exits(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_attach_commandline_continue_app_exits_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_attach() self.attach_commandline_continue_app_exits() @llgs_test def test_attach_commandline_continue_app_exits_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_attach() self.attach_commandline_continue_app_exits() @@ -212,13 +198,11 @@ def qRegisterInfo_returns_one_valid_result(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qRegisterInfo_returns_one_valid_result_debugserver(self): - self.init_debugserver_test() self.build() self.qRegisterInfo_returns_one_valid_result() @llgs_test def test_qRegisterInfo_returns_one_valid_result_llgs(self): - self.init_llgs_test() self.build() self.qRegisterInfo_returns_one_valid_result() @@ -237,13 +221,11 @@ def qRegisterInfo_returns_all_valid_results(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qRegisterInfo_returns_all_valid_results_debugserver(self): - self.init_debugserver_test() self.build() self.qRegisterInfo_returns_all_valid_results() @llgs_test def test_qRegisterInfo_returns_all_valid_results_llgs(self): - self.init_llgs_test() self.build() self.qRegisterInfo_returns_all_valid_results() @@ -278,13 +260,11 @@ def qRegisterInfo_contains_required_generics(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qRegisterInfo_contains_required_generics_debugserver(self): - self.init_debugserver_test() self.build() self.qRegisterInfo_contains_required_generics() @llgs_test def test_qRegisterInfo_contains_required_generics_llgs(self): - self.init_llgs_test() self.build() self.qRegisterInfo_contains_required_generics() @@ -308,13 +288,11 @@ def qRegisterInfo_contains_at_least_one_register_set(self): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qRegisterInfo_contains_at_least_one_register_set_debugserver( self): - self.init_debugserver_test() self.build() self.qRegisterInfo_contains_at_least_one_register_set() @llgs_test def test_qRegisterInfo_contains_at_least_one_register_set_llgs(self): - self.init_llgs_test() self.build() self.qRegisterInfo_contains_at_least_one_register_set() @@ -360,7 +338,6 @@ def qRegisterInfo_contains_avx_registers(self): @expectedFailureAll(oslist=["netbsd"]) @llgs_test def test_qRegisterInfo_contains_avx_registers_llgs(self): - self.init_llgs_test() self.build() self.qRegisterInfo_contains_avx_registers() @@ -382,14 +359,12 @@ def qThreadInfo_contains_thread(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qThreadInfo_contains_thread_launch_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.qThreadInfo_contains_thread() @llgs_test def test_qThreadInfo_contains_thread_launch_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.qThreadInfo_contains_thread() @@ -397,7 +372,6 @@ def test_qThreadInfo_contains_thread_launch_llgs(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qThreadInfo_contains_thread_attach_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_attach() self.qThreadInfo_contains_thread() @@ -405,7 +379,6 @@ def test_qThreadInfo_contains_thread_attach_debugserver(self): @expectedFailureAll(oslist=["windows"]) # expect one more thread stopped @llgs_test def test_qThreadInfo_contains_thread_attach_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_attach() self.qThreadInfo_contains_thread() @@ -441,14 +414,12 @@ def qThreadInfo_matches_qC(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qThreadInfo_matches_qC_launch_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.qThreadInfo_matches_qC() @llgs_test def test_qThreadInfo_matches_qC_launch_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.qThreadInfo_matches_qC() @@ -456,7 +427,6 @@ def test_qThreadInfo_matches_qC_launch_llgs(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qThreadInfo_matches_qC_attach_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_attach() self.qThreadInfo_matches_qC() @@ -464,7 +434,6 @@ def test_qThreadInfo_matches_qC_attach_debugserver(self): @expectedFailureAll(oslist=["windows"]) # expect one more thread stopped @llgs_test def test_qThreadInfo_matches_qC_attach_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_attach() self.qThreadInfo_matches_qC() @@ -526,7 +495,6 @@ def p_returns_correct_data_size_for_each_qRegisterInfo(self): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_p_returns_correct_data_size_for_each_qRegisterInfo_launch_debugserver( self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.p_returns_correct_data_size_for_each_qRegisterInfo() @@ -535,7 +503,6 @@ def test_p_returns_correct_data_size_for_each_qRegisterInfo_launch_debugserver( @llgs_test def test_p_returns_correct_data_size_for_each_qRegisterInfo_launch_llgs( self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.p_returns_correct_data_size_for_each_qRegisterInfo() @@ -544,7 +511,6 @@ def test_p_returns_correct_data_size_for_each_qRegisterInfo_launch_llgs( @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_p_returns_correct_data_size_for_each_qRegisterInfo_attach_debugserver( self): - self.init_debugserver_test() self.build() self.set_inferior_startup_attach() self.p_returns_correct_data_size_for_each_qRegisterInfo() @@ -553,7 +519,6 @@ def test_p_returns_correct_data_size_for_each_qRegisterInfo_attach_debugserver( @llgs_test def test_p_returns_correct_data_size_for_each_qRegisterInfo_attach_llgs( self): - self.init_llgs_test() self.build() self.set_inferior_startup_attach() self.p_returns_correct_data_size_for_each_qRegisterInfo() @@ -593,7 +558,6 @@ def Hg_switches_to_3_threads(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_Hg_switches_to_3_threads_launch_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.Hg_switches_to_3_threads() @@ -601,7 +565,6 @@ def test_Hg_switches_to_3_threads_launch_debugserver(self): @expectedFailureAll(oslist=["windows"]) # expect 4 threads @llgs_test def test_Hg_switches_to_3_threads_launch_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.Hg_switches_to_3_threads() @@ -609,7 +572,6 @@ def test_Hg_switches_to_3_threads_launch_llgs(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_Hg_switches_to_3_threads_attach_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_attach() self.Hg_switches_to_3_threads() @@ -617,7 +579,6 @@ def test_Hg_switches_to_3_threads_attach_debugserver(self): @expectedFailureAll(oslist=["windows"]) # expecting one more thread @llgs_test def test_Hg_switches_to_3_threads_attach_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_attach() self.Hg_switches_to_3_threads() @@ -737,7 +698,6 @@ def Hc_then_Csignal_signals_correct_thread(self, segfault_signo): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_Hc_then_Csignal_signals_correct_thread_launch_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() # Darwin debugserver translates some signals like SIGSEGV into some gdb @@ -749,7 +709,6 @@ def test_Hc_then_Csignal_signals_correct_thread_launch_debugserver(self): @expectedFailureNetBSD @llgs_test def test_Hc_then_Csignal_signals_correct_thread_launch_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.Hc_then_Csignal_signals_correct_thread( @@ -810,7 +769,6 @@ def m_packet_reads_memory(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_m_packet_reads_memory_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.m_packet_reads_memory() @@ -818,7 +776,6 @@ def test_m_packet_reads_memory_debugserver(self): @skipIfWindows # No pty support to test any inferior output @llgs_test def test_m_packet_reads_memory_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.m_packet_reads_memory() @@ -837,14 +794,12 @@ def qMemoryRegionInfo_is_supported(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qMemoryRegionInfo_is_supported_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.qMemoryRegionInfo_is_supported() @llgs_test def test_qMemoryRegionInfo_is_supported_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.qMemoryRegionInfo_is_supported() @@ -901,7 +856,6 @@ def qMemoryRegionInfo_reports_code_address_as_executable(self): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qMemoryRegionInfo_reports_code_address_as_executable_debugserver( self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.qMemoryRegionInfo_reports_code_address_as_executable() @@ -909,7 +863,6 @@ def test_qMemoryRegionInfo_reports_code_address_as_executable_debugserver( @skipIfWindows # No pty support to test any inferior output @llgs_test def test_qMemoryRegionInfo_reports_code_address_as_executable_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.qMemoryRegionInfo_reports_code_address_as_executable() @@ -967,7 +920,6 @@ def qMemoryRegionInfo_reports_stack_address_as_readable_writeable(self): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qMemoryRegionInfo_reports_stack_address_as_readable_writeable_debugserver( self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.qMemoryRegionInfo_reports_stack_address_as_readable_writeable() @@ -976,7 +928,6 @@ def test_qMemoryRegionInfo_reports_stack_address_as_readable_writeable_debugserv @llgs_test def test_qMemoryRegionInfo_reports_stack_address_as_readable_writeable_llgs( self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.qMemoryRegionInfo_reports_stack_address_as_readable_writeable() @@ -1033,7 +984,6 @@ def qMemoryRegionInfo_reports_heap_address_as_readable_writeable(self): @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qMemoryRegionInfo_reports_heap_address_as_readable_writeable_debugserver( self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.qMemoryRegionInfo_reports_heap_address_as_readable_writeable() @@ -1042,7 +992,6 @@ def test_qMemoryRegionInfo_reports_heap_address_as_readable_writeable_debugserve @llgs_test def test_qMemoryRegionInfo_reports_heap_address_as_readable_writeable_llgs( self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.qMemoryRegionInfo_reports_heap_address_as_readable_writeable() @@ -1182,7 +1131,6 @@ def breakpoint_set_and_remove_work(self, want_hardware=False): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_software_breakpoint_set_and_remove_work_debugserver(self): - self.init_debugserver_test() if self.getArchitecture() == "arm": # TODO: Handle case when setting breakpoint in thumb code self.build(dictionary={'CFLAGS_EXTRAS': '-marm'}) @@ -1195,7 +1143,6 @@ def test_software_breakpoint_set_and_remove_work_debugserver(self): @llgs_test @expectedFlakeyLinux("llvm.org/pr25652") def test_software_breakpoint_set_and_remove_work_llgs(self): - self.init_llgs_test() if self.getArchitecture() == "arm": # TODO: Handle case when setting breakpoint in thumb code self.build(dictionary={'CFLAGS_EXTRAS': '-marm'}) @@ -1210,7 +1157,6 @@ def test_software_breakpoint_set_and_remove_work_llgs(self): @skipIf(archs=no_match(['arm', 'aarch64'])) @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_hardware_breakpoint_set_and_remove_work_debugserver(self): - self.init_debugserver_test() if self.getArchitecture() == "arm": # TODO: Handle case when setting breakpoint in thumb code self.build(dictionary={'CFLAGS_EXTRAS': '-marm'}) @@ -1223,7 +1169,6 @@ def test_hardware_breakpoint_set_and_remove_work_debugserver(self): @skipUnlessPlatform(oslist=['linux']) @skipIf(archs=no_match(['arm', 'aarch64'])) def test_hardware_breakpoint_set_and_remove_work_llgs(self): - self.init_llgs_test() if self.getArchitecture() == "arm": # TODO: Handle case when setting breakpoint in thumb code self.build(dictionary={'CFLAGS_EXTRAS': '-marm'}) @@ -1249,14 +1194,12 @@ def qSupported_returns_known_stub_features(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_qSupported_returns_known_stub_features_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.qSupported_returns_known_stub_features() @llgs_test def test_qSupported_returns_known_stub_features_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.qSupported_returns_known_stub_features() @@ -1323,7 +1266,6 @@ def written_M_content_reads_back_correctly(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_written_M_content_reads_back_correctly_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.written_M_content_reads_back_correctly() @@ -1332,7 +1274,6 @@ def test_written_M_content_reads_back_correctly_debugserver(self): @llgs_test @expectedFlakeyLinux("llvm.org/pr25652") def test_written_M_content_reads_back_correctly_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.written_M_content_reads_back_correctly() @@ -1374,14 +1315,12 @@ def P_writes_all_gpr_registers(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_P_writes_all_gpr_registers_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.P_writes_all_gpr_registers() @llgs_test def test_P_writes_all_gpr_registers_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.P_writes_all_gpr_registers() @@ -1499,7 +1438,6 @@ def P_and_p_thread_suffix_work(self): @debugserver_test @skipIfDarwinEmbedded # lldb-server tests not updated to work on ios etc yet def test_P_and_p_thread_suffix_work_debugserver(self): - self.init_debugserver_test() self.build() self.set_inferior_startup_launch() self.P_and_p_thread_suffix_work() @@ -1507,7 +1445,6 @@ def test_P_and_p_thread_suffix_work_debugserver(self): @skipIfWindows @llgs_test def test_P_and_p_thread_suffix_work_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.P_and_p_thread_suffix_work() diff --git a/lldb/test/API/tools/lldb-server/commandline/TestGdbRemoteConnection.py b/lldb/test/API/tools/lldb-server/commandline/TestGdbRemoteConnection.py index 70224ecadb0dc9..dda7d707a56ff2 100644 --- a/lldb/test/API/tools/lldb-server/commandline/TestGdbRemoteConnection.py +++ b/lldb/test/API/tools/lldb-server/commandline/TestGdbRemoteConnection.py @@ -15,13 +15,11 @@ class TestGdbRemoteConnection(gdbremote_testcase.GdbRemoteTestCaseBase): # lldb-server tests not updated to work on ios etc yet @skipIfDarwinEmbedded def test_reverse_connect_debugserver(self): - self.init_debugserver_test() self._reverse_connect() @llgs_test @skipIfRemote # reverse connect is not a supported use case for now def test_reverse_connect_llgs(self): - self.init_llgs_test() self._reverse_connect() def _reverse_connect(self): @@ -33,14 +31,12 @@ def _reverse_connect(self): @debugserver_test @skipIfRemote def test_named_pipe_debugserver(self): - self.init_debugserver_test() self._named_pipe() @llgs_test @skipIfRemote @skipIfWindows def test_named_pipe_llgs(self): - self.init_llgs_test() self._named_pipe() def _named_pipe(self): diff --git a/lldb/test/API/tools/lldb-server/commandline/TestStubSetSID.py b/lldb/test/API/tools/lldb-server/commandline/TestStubSetSID.py index 51c2966b8c9f7d..21005b6a6b6429 100644 --- a/lldb/test/API/tools/lldb-server/commandline/TestStubSetSID.py +++ b/lldb/test/API/tools/lldb-server/commandline/TestStubSetSID.py @@ -42,7 +42,6 @@ def sid_is_different_with_S(self): @debugserver_test @skipIfRemote # --setsid not used on remote platform and currently it is also impossible to get the sid of lldb-platform running on a remote target def test_sid_is_same_without_setsid_debugserver(self): - self.init_debugserver_test() self.set_inferior_startup_launch() self.sid_is_same_without_setsid() @@ -50,14 +49,12 @@ def test_sid_is_same_without_setsid_debugserver(self): @llgs_test @skipIfRemote # --setsid not used on remote platform and currently it is also impossible to get the sid of lldb-platform running on a remote target def test_sid_is_same_without_setsid_llgs(self): - self.init_llgs_test() self.set_inferior_startup_launch() self.sid_is_same_without_setsid() @debugserver_test @skipIfRemote # --setsid not used on remote platform and currently it is also impossible to get the sid of lldb-platform running on a remote target def test_sid_is_different_with_setsid_debugserver(self): - self.init_debugserver_test() self.set_inferior_startup_launch() self.sid_is_different_with_setsid() @@ -65,14 +62,12 @@ def test_sid_is_different_with_setsid_debugserver(self): @llgs_test @skipIfRemote # --setsid not used on remote platform and currently it is also impossible to get the sid of lldb-platform running on a remote target def test_sid_is_different_with_setsid_llgs(self): - self.init_llgs_test() self.set_inferior_startup_launch() self.sid_is_different_with_setsid() @debugserver_test @skipIfRemote # --setsid not used on remote platform and currently it is also impossible to get the sid of lldb-platform running on a remote target def test_sid_is_different_with_S_debugserver(self): - self.init_debugserver_test() self.set_inferior_startup_launch() self.sid_is_different_with_S() @@ -80,6 +75,5 @@ def test_sid_is_different_with_S_debugserver(self): @llgs_test @skipIfRemote # --setsid not used on remote platform and currently it is also impossible to get the sid of lldb-platform running on a remote target def test_sid_is_different_with_S_llgs(self): - self.init_llgs_test() self.set_inferior_startup_launch() self.sid_is_different_with_S() diff --git a/lldb/test/API/tools/lldb-server/inferior-crash/TestGdbRemoteAbort.py b/lldb/test/API/tools/lldb-server/inferior-crash/TestGdbRemoteAbort.py index 5292913aa42e69..8bce3b9aa87bd8 100644 --- a/lldb/test/API/tools/lldb-server/inferior-crash/TestGdbRemoteAbort.py +++ b/lldb/test/API/tools/lldb-server/inferior-crash/TestGdbRemoteAbort.py @@ -31,7 +31,6 @@ def inferior_abort_received(self): @debugserver_test def test_inferior_abort_received_debugserver(self): - self.init_debugserver_test() self.build() self.inferior_abort_received() @@ -40,6 +39,5 @@ def test_inferior_abort_received_debugserver(self): # std::abort() on <= API 16 raises SIGSEGV - b.android.com/179836 @expectedFailureAndroid(api_levels=list(range(16 + 1))) def test_inferior_abort_received_llgs(self): - self.init_llgs_test() self.build() self.inferior_abort_received() diff --git a/lldb/test/API/tools/lldb-server/inferior-crash/TestGdbRemoteSegFault.py b/lldb/test/API/tools/lldb-server/inferior-crash/TestGdbRemoteSegFault.py index e0ba3d7eb684be..b9b4bef0117712 100644 --- a/lldb/test/API/tools/lldb-server/inferior-crash/TestGdbRemoteSegFault.py +++ b/lldb/test/API/tools/lldb-server/inferior-crash/TestGdbRemoteSegFault.py @@ -33,13 +33,11 @@ def inferior_seg_fault_received(self, expected_signo): @debugserver_test def test_inferior_seg_fault_received_debugserver(self): - self.init_debugserver_test() self.build() self.inferior_seg_fault_received(self.GDB_REMOTE_STOP_CODE_BAD_ACCESS) @skipIfWindows # No signal is sent on Windows. @llgs_test def test_inferior_seg_fault_received_llgs(self): - self.init_llgs_test() self.build() self.inferior_seg_fault_received(lldbutil.get_signal_number('SIGSEGV')) diff --git a/lldb/test/API/tools/lldb-server/libraries-svr4/TestGdbRemoteLibrariesSvr4Support.py b/lldb/test/API/tools/lldb-server/libraries-svr4/TestGdbRemoteLibrariesSvr4Support.py index 902a17639d56a0..aa2cf19bbf5a4c 100644 --- a/lldb/test/API/tools/lldb-server/libraries-svr4/TestGdbRemoteLibrariesSvr4Support.py +++ b/lldb/test/API/tools/lldb-server/libraries-svr4/TestGdbRemoteLibrariesSvr4Support.py @@ -12,7 +12,6 @@ class TestGdbRemoteLibrariesSvr4Support(gdbremote_testcase.GdbRemoteTestCaseBase FEATURE_NAME = "qXfer:libraries-svr4:read" def setup_test(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() env = {} diff --git a/lldb/test/API/tools/lldb-server/memory-allocation/TestGdbRemoteMemoryAllocation.py b/lldb/test/API/tools/lldb-server/memory-allocation/TestGdbRemoteMemoryAllocation.py index 954eb23f05afa6..dc8f6368720992 100644 --- a/lldb/test/API/tools/lldb-server/memory-allocation/TestGdbRemoteMemoryAllocation.py +++ b/lldb/test/API/tools/lldb-server/memory-allocation/TestGdbRemoteMemoryAllocation.py @@ -51,7 +51,6 @@ def allocate(self, size, permissions): def test_supported(self): """Make sure (de)allocation works on platforms where it's supposed to work""" - self.init_llgs_test() self.build() self.set_inferior_startup_launch() procs = self.prep_debug_monitor_and_inferior() @@ -68,7 +67,6 @@ def test_unsupported(self): """Make sure we get an "unsupported" error on platforms where the feature is not implemented.""" - self.init_llgs_test() self.build() self.set_inferior_startup_launch() procs = self.prep_debug_monitor_and_inferior() @@ -83,7 +81,6 @@ def test_unsupported(self): def test_bad_packet(self): """Make sure we get a proper error for malformed packets.""" - self.init_llgs_test() self.build() self.set_inferior_startup_launch() procs = self.prep_debug_monitor_and_inferior() diff --git a/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py b/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py index fcfb0a829e03d3..177388fad5fc58 100644 --- a/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py +++ b/lldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py @@ -16,7 +16,6 @@ class TestPlatformProcessConnect(gdbremote_testcase.GdbRemoteTestCaseBase): @expectedFailureAll(hostoslist=["windows"], triple='.*-android') def test_platform_process_connect(self): self.build() - self.init_llgs_test() working_dir = lldb.remote_platform.GetWorkingDirectory() src = lldb.SBFileSpec(self.getBuildArtifact("a.out")) diff --git a/lldb/test/API/tools/lldb-server/register-reading/TestGdbRemoteGPacket.py b/lldb/test/API/tools/lldb-server/register-reading/TestGdbRemoteGPacket.py index a61187b2cf28fc..1380b63955b796 100644 --- a/lldb/test/API/tools/lldb-server/register-reading/TestGdbRemoteGPacket.py +++ b/lldb/test/API/tools/lldb-server/register-reading/TestGdbRemoteGPacket.py @@ -53,7 +53,6 @@ def run_test_g_packet(self): @debugserver_test @skipIfDarwinEmbedded def test_g_packet_debugserver(self): - self.init_debugserver_test() self.run_test_g_packet() @skipIf(archs=no_match(["x86_64"])) @@ -140,7 +139,6 @@ def g_returns_correct_data(self, with_suffix): @expectedFailureNetBSD @llgs_test def test_g_returns_correct_data_with_suffix_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.g_returns_correct_data(True) @@ -149,7 +147,6 @@ def test_g_returns_correct_data_with_suffix_llgs(self): @expectedFailureNetBSD @llgs_test def test_g_returns_correct_data_no_suffix_llgs(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() self.g_returns_correct_data(False) diff --git a/lldb/test/API/tools/lldb-server/registers-target-xml-reading/TestGdbRemoteTargetXmlPacket.py b/lldb/test/API/tools/lldb-server/registers-target-xml-reading/TestGdbRemoteTargetXmlPacket.py index cd14fcf8125c0a..3e8951ce6941ee 100644 --- a/lldb/test/API/tools/lldb-server/registers-target-xml-reading/TestGdbRemoteTargetXmlPacket.py +++ b/lldb/test/API/tools/lldb-server/registers-target-xml-reading/TestGdbRemoteTargetXmlPacket.py @@ -15,7 +15,6 @@ class TestGdbRemoteTargetXmlPacket(gdbremote_testcase.GdbRemoteTestCaseBase): @expectedFailureNetBSD @llgs_test def test_g_target_xml_returns_correct_data(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() diff --git a/lldb/test/API/tools/lldb-server/signal-filtering/TestGdbRemote_QPassSignals.py b/lldb/test/API/tools/lldb-server/signal-filtering/TestGdbRemote_QPassSignals.py index 72e0d94d4de960..946d53341bef4a 100644 --- a/lldb/test/API/tools/lldb-server/signal-filtering/TestGdbRemote_QPassSignals.py +++ b/lldb/test/API/tools/lldb-server/signal-filtering/TestGdbRemote_QPassSignals.py @@ -49,7 +49,6 @@ def signal_name_to_hex(signame): @llgs_test @skipUnlessPlatform(["linux", "android"]) def test_q_pass_signals(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() procs = self.prep_debug_monitor_and_inferior() @@ -65,7 +64,6 @@ def test_q_pass_signals(self): @llgs_test @skipUnlessPlatform(["linux", "android"]) def test_change_signals_at_runtime(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() procs = self.prep_debug_monitor_and_inferior() @@ -84,7 +82,6 @@ def test_change_signals_at_runtime(self): @expectedFailureNetBSD @llgs_test def test_default_signals_behavior(self): - self.init_llgs_test() self.build() self.set_inferior_startup_launch() procs = self.prep_debug_monitor_and_inferior() @@ -99,7 +96,6 @@ def test_default_signals_behavior(self): @llgs_test @skipUnlessPlatform(["linux", "android"]) def test_support_q_pass_signals(self): - self.init_llgs_test() self.build() # Start up the stub and start/prep the inferior. diff --git a/lldb/test/API/tools/lldb-server/thread-name/TestGdbRemoteThreadName.py b/lldb/test/API/tools/lldb-server/thread-name/TestGdbRemoteThreadName.py index 9ec40c11742883..16978b056044bb 100644 --- a/lldb/test/API/tools/lldb-server/thread-name/TestGdbRemoteThreadName.py +++ b/lldb/test/API/tools/lldb-server/thread-name/TestGdbRemoteThreadName.py @@ -32,7 +32,6 @@ def run_and_check_name(self, expected_name): @llgs_test def test(self): """ Make sure lldb-server can retrieve inferior thread name""" - self.init_llgs_test() self.build() self.set_inferior_startup_launch() procs = self.prep_debug_monitor_and_inferior() From e35f9229dcb264be4a0a1ecf5cca2493f2c48878 Mon Sep 17 00:00:00 2001 From: Aleksandr Platonov Date: Fri, 18 Dec 2020 15:14:15 +0300 Subject: [PATCH 9/9] [clangd] Ignore the static index refs from the dynamic index files. This patch fixes the following problem: - open a file with references to the symbol `Foo` - remove all references to `Foo` (from the dynamic index). - `MergedIndex::refs()` result will contain positions of removed references (from the static index). The idea of this patch is to keep a set of files which were used during index build inside the index. Thus at processing the static index references we can check if the file of processing reference is a part of the dynamic index or not. Reviewed By: sammccall Differential Revision: https://reviews.llvm.org/D93393 --- clang-tools-extra/clangd/index/FileIndex.cpp | 9 ++- clang-tools-extra/clangd/index/Index.cpp | 5 ++ clang-tools-extra/clangd/index/Index.h | 9 +++ clang-tools-extra/clangd/index/MemIndex.cpp | 12 ++++ clang-tools-extra/clangd/index/MemIndex.h | 17 +++++ clang-tools-extra/clangd/index/Merge.cpp | 19 +++--- clang-tools-extra/clangd/index/Merge.h | 2 + .../clangd/index/ProjectAware.cpp | 11 ++++ clang-tools-extra/clangd/index/dex/Dex.cpp | 11 ++++ clang-tools-extra/clangd/index/dex/Dex.h | 15 +++++ .../clangd/index/remote/Client.cpp | 8 +++ .../clangd/unittests/CodeCompleteTests.cpp | 5 ++ .../clangd/unittests/DexTests.cpp | 14 ++++ .../clangd/unittests/IndexTests.cpp | 65 +++++++++++++++++-- .../clangd/unittests/RenameTests.cpp | 12 ++++ clang-tools-extra/clangd/unittests/TestFS.cpp | 5 +- 16 files changed, 199 insertions(+), 20 deletions(-) diff --git a/clang-tools-extra/clangd/index/FileIndex.cpp b/clang-tools-extra/clangd/index/FileIndex.cpp index 1ccfb448563838..143e7686377739 100644 --- a/clang-tools-extra/clangd/index/FileIndex.cpp +++ b/clang-tools-extra/clangd/index/FileIndex.cpp @@ -266,11 +266,14 @@ FileSymbols::buildIndex(IndexType Type, DuplicateHandling DuplicateHandle, std::vector> SymbolSlabs; std::vector> RefSlabs; std::vector> RelationSlabs; + llvm::StringSet<> Files; std::vector MainFileRefs; { std::lock_guard Lock(Mutex); - for (const auto &FileAndSymbols : SymbolsSnapshot) + for (const auto &FileAndSymbols : SymbolsSnapshot) { SymbolSlabs.push_back(FileAndSymbols.second); + Files.insert(FileAndSymbols.first()); + } for (const auto &FileAndRefs : RefsSnapshot) { RefSlabs.push_back(FileAndRefs.second.Slab); if (FileAndRefs.second.CountReferences) @@ -372,14 +375,14 @@ FileSymbols::buildIndex(IndexType Type, DuplicateHandling DuplicateHandle, case IndexType::Light: return std::make_unique( llvm::make_pointee_range(AllSymbols), std::move(AllRefs), - std::move(AllRelations), + std::move(AllRelations), std::move(Files), std::make_tuple(std::move(SymbolSlabs), std::move(RefSlabs), std::move(RefsStorage), std::move(SymsStorage)), StorageSize); case IndexType::Heavy: return std::make_unique( llvm::make_pointee_range(AllSymbols), std::move(AllRefs), - std::move(AllRelations), + std::move(AllRelations), std::move(Files), std::make_tuple(std::move(SymbolSlabs), std::move(RefSlabs), std::move(RefsStorage), std::move(SymsStorage)), StorageSize); diff --git a/clang-tools-extra/clangd/index/Index.cpp b/clang-tools-extra/clangd/index/Index.cpp index b309053972eb4b..5da06f36ffe4f6 100644 --- a/clang-tools-extra/clangd/index/Index.cpp +++ b/clang-tools-extra/clangd/index/Index.cpp @@ -76,6 +76,11 @@ void SwapIndex::relations( return snapshot()->relations(R, CB); } +llvm::unique_function +SwapIndex::indexedFiles() const { + return snapshot()->indexedFiles(); +} + size_t SwapIndex::estimateMemoryUsage() const { return snapshot()->estimateMemoryUsage(); } diff --git a/clang-tools-extra/clangd/index/Index.h b/clang-tools-extra/clangd/index/Index.h index f0959e71d50f36..c961aa9d8bd951 100644 --- a/clang-tools-extra/clangd/index/Index.h +++ b/clang-tools-extra/clangd/index/Index.h @@ -14,6 +14,7 @@ #include "Symbol.h" #include "SymbolID.h" #include "llvm/ADT/DenseSet.h" +#include "llvm/ADT/FunctionExtras.h" #include "llvm/ADT/Optional.h" #include "llvm/ADT/StringExtras.h" #include "llvm/Support/JSON.h" @@ -121,6 +122,11 @@ class SymbolIndex { llvm::function_ref Callback) const = 0; + /// Returns function which checks if the specified file was used to build this + /// index or not. The function must only be called while the index is alive. + virtual llvm::unique_function + indexedFiles() const = 0; + /// Returns estimated size of index (in bytes). virtual size_t estimateMemoryUsage() const = 0; }; @@ -145,6 +151,9 @@ class SwapIndex : public SymbolIndex { llvm::function_ref) const override; + llvm::unique_function + indexedFiles() const override; + size_t estimateMemoryUsage() const override; private: diff --git a/clang-tools-extra/clangd/index/MemIndex.cpp b/clang-tools-extra/clangd/index/MemIndex.cpp index 46e9c0a8ee45eb..2352e801d1fcfa 100644 --- a/clang-tools-extra/clangd/index/MemIndex.cpp +++ b/clang-tools-extra/clangd/index/MemIndex.cpp @@ -109,6 +109,18 @@ void MemIndex::relations( } } +llvm::unique_function +MemIndex::indexedFiles() const { + return [this](llvm::StringRef FileURI) { + auto Path = URI::resolve(FileURI); + if (!Path) { + llvm::consumeError(Path.takeError()); + return false; + } + return Files.contains(*Path); + }; +} + size_t MemIndex::estimateMemoryUsage() const { return Index.getMemorySize() + Refs.getMemorySize() + Relations.getMemorySize() + BackingDataSize; diff --git a/clang-tools-extra/clangd/index/MemIndex.h b/clang-tools-extra/clangd/index/MemIndex.h index 10ecd79e7c547e..7855630fda0243 100644 --- a/clang-tools-extra/clangd/index/MemIndex.h +++ b/clang-tools-extra/clangd/index/MemIndex.h @@ -10,6 +10,7 @@ #define LLVM_CLANG_TOOLS_EXTRA_CLANGD_INDEX_MEMINDEX_H #include "Index.h" +#include "llvm/ADT/StringSet.h" #include namespace clang { @@ -44,6 +45,17 @@ class MemIndex : public SymbolIndex { this->BackingDataSize = BackingDataSize; } + template + MemIndex(SymbolRange &&Symbols, RefRange &&Refs, RelationRange &&Relations, + FileRange &&Files, Payload &&BackingData, size_t BackingDataSize) + : MemIndex(std::forward(Symbols), + std::forward(Refs), + std::forward(Relations), + std::forward(BackingData), BackingDataSize) { + this->Files = std::forward(Files); + } + /// Builds an index from slabs. The index takes ownership of the data. static std::unique_ptr build(SymbolSlab Symbols, RefSlab Refs, RelationSlab Relations); @@ -62,6 +74,9 @@ class MemIndex : public SymbolIndex { llvm::function_ref Callback) const override; + llvm::unique_function + indexedFiles() const override; + size_t estimateMemoryUsage() const override; private: @@ -73,6 +88,8 @@ class MemIndex : public SymbolIndex { static_assert(sizeof(RelationKind) == sizeof(uint8_t), "RelationKind should be of same size as a uint8_t"); llvm::DenseMap, std::vector> Relations; + // Set of files which were used during this index build. + llvm::StringSet<> Files; std::shared_ptr KeepAlive; // poor man's move-only std::any // Size of memory retained by KeepAlive. size_t BackingDataSize = 0; diff --git a/clang-tools-extra/clangd/index/Merge.cpp b/clang-tools-extra/clangd/index/Merge.cpp index a93aa204e18fb4..97babacf2b38ef 100644 --- a/clang-tools-extra/clangd/index/Merge.cpp +++ b/clang-tools-extra/clangd/index/Merge.cpp @@ -99,23 +99,18 @@ bool MergedIndex::refs(const RefsRequest &Req, // and we can't reliably deduplicate them because offsets may differ slightly. // We consider the dynamic index authoritative and report all its refs, // and only report static index refs from other files. - // - // FIXME: The heuristic fails if the dynamic index contains a file, but all - // refs were removed (we will report stale ones from the static index). - // Ultimately we should explicit check which index has the file instead. - llvm::StringSet<> DynamicIndexFileURIs; More |= Dynamic->refs(Req, [&](const Ref &O) { - DynamicIndexFileURIs.insert(O.Location.FileURI); Callback(O); assert(Remaining != 0); --Remaining; }); if (Remaining == 0 && More) return More; + auto DynamicContainsFile = Dynamic->indexedFiles(); // We return less than Req.Limit if static index returns more refs for dirty // files. - bool StaticHadMore = Static->refs(Req, [&](const Ref &O) { - if (DynamicIndexFileURIs.count(O.Location.FileURI)) + bool StaticHadMore = Static->refs(Req, [&](const Ref &O) { + if (DynamicContainsFile(O.Location.FileURI)) return; // ignore refs that have been seen from dynamic index. if (Remaining == 0) { More = true; @@ -127,6 +122,14 @@ bool MergedIndex::refs(const RefsRequest &Req, return More || StaticHadMore; } +llvm::unique_function +MergedIndex::indexedFiles() const { + return [DynamicContainsFile{Dynamic->indexedFiles()}, + StaticContainsFile{Static->indexedFiles()}](llvm::StringRef FileURI) { + return DynamicContainsFile(FileURI) || StaticContainsFile(FileURI); + }; +} + void MergedIndex::relations( const RelationsRequest &Req, llvm::function_ref Callback) const { diff --git a/clang-tools-extra/clangd/index/Merge.h b/clang-tools-extra/clangd/index/Merge.h index 3288aef120fc16..0cdff38f06786c 100644 --- a/clang-tools-extra/clangd/index/Merge.h +++ b/clang-tools-extra/clangd/index/Merge.h @@ -45,6 +45,8 @@ class MergedIndex : public SymbolIndex { void relations(const RelationsRequest &, llvm::function_ref) const override; + llvm::unique_function + indexedFiles() const override; size_t estimateMemoryUsage() const override { return Dynamic->estimateMemoryUsage() + Static->estimateMemoryUsage(); } diff --git a/clang-tools-extra/clangd/index/ProjectAware.cpp b/clang-tools-extra/clangd/index/ProjectAware.cpp index 63f8f823f3a726..bafe5550f605e2 100644 --- a/clang-tools-extra/clangd/index/ProjectAware.cpp +++ b/clang-tools-extra/clangd/index/ProjectAware.cpp @@ -54,6 +54,9 @@ class ProjectAwareIndex : public SymbolIndex { llvm::function_ref Callback) const override; + llvm::unique_function + indexedFiles() const override; + ProjectAwareIndex(IndexFactory Gen) : Gen(std::move(Gen)) {} private: @@ -112,6 +115,14 @@ void ProjectAwareIndex::relations( return Idx->relations(Req, Callback); } +llvm::unique_function +ProjectAwareIndex::indexedFiles() const { + trace::Span Tracer("ProjectAwareIndex::indexedFiles"); + if (auto *Idx = getIndex()) + return Idx->indexedFiles(); + return [](llvm::StringRef) { return false; }; +} + SymbolIndex *ProjectAwareIndex::getIndex() const { const auto &C = Config::current(); if (!C.Index.External) diff --git a/clang-tools-extra/clangd/index/dex/Dex.cpp b/clang-tools-extra/clangd/index/dex/Dex.cpp index 29aea353e07cf0..dc072accb05b7b 100644 --- a/clang-tools-extra/clangd/index/dex/Dex.cpp +++ b/clang-tools-extra/clangd/index/dex/Dex.cpp @@ -313,6 +313,17 @@ void Dex::relations( } } +llvm::unique_function Dex::indexedFiles() const { + return [this](llvm::StringRef FileURI) { + auto Path = URI::resolve(FileURI); + if (!Path) { + llvm::consumeError(Path.takeError()); + return false; + } + return Files.contains(*Path); + }; +} + size_t Dex::estimateMemoryUsage() const { size_t Bytes = Symbols.size() * sizeof(const Symbol *); Bytes += SymbolQuality.size() * sizeof(float); diff --git a/clang-tools-extra/clangd/index/dex/Dex.h b/clang-tools-extra/clangd/index/dex/Dex.h index 3a66031a89d07d..318a74951379c0 100644 --- a/clang-tools-extra/clangd/index/dex/Dex.h +++ b/clang-tools-extra/clangd/index/dex/Dex.h @@ -67,6 +67,16 @@ class Dex : public SymbolIndex { this->BackingDataSize = BackingDataSize; } + template + Dex(SymbolRange &&Symbols, RefsRange &&Refs, RelationsRange &&Relations, + FileRange &&Files, Payload &&BackingData, size_t BackingDataSize) + : Dex(std::forward(Symbols), std::forward(Refs), + std::forward(Relations), + std::forward(BackingData), BackingDataSize) { + this->Files = std::forward(Files); + } + /// Builds an index from slabs. The index takes ownership of the slab. static std::unique_ptr build(SymbolSlab, RefSlab, RelationSlab); @@ -84,6 +94,9 @@ class Dex : public SymbolIndex { llvm::function_ref Callback) const override; + llvm::unique_function + indexedFiles() const override; + size_t estimateMemoryUsage() const override; private: @@ -112,6 +125,8 @@ class Dex : public SymbolIndex { "RelationKind should be of same size as a uint8_t"); llvm::DenseMap, std::vector> Relations; std::shared_ptr KeepAlive; // poor man's move-only std::any + // Set of files which were used during this index build. + llvm::StringSet<> Files; // Size of memory retained by KeepAlive. size_t BackingDataSize = 0; }; diff --git a/clang-tools-extra/clangd/index/remote/Client.cpp b/clang-tools-extra/clangd/index/remote/Client.cpp index bda3a971f418fb..b09dbf915e462e 100644 --- a/clang-tools-extra/clangd/index/remote/Client.cpp +++ b/clang-tools-extra/clangd/index/remote/Client.cpp @@ -152,6 +152,14 @@ class IndexClient : public clangd::SymbolIndex { }); } + llvm::unique_function indexedFiles() const { + // FIXME: For now we always return "false" regardless of whether the file + // was indexed or not. A possible implementation could be based on + // the idea that we do not want to send a request at every + // call of a function returned by IndexClient::indexedFiles(). + return [](llvm::StringRef) { return false; }; + } + // IndexClient does not take any space since the data is stored on the // server. size_t estimateMemoryUsage() const override { return 0; } diff --git a/clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp b/clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp index a19c6a83e95460..76b193b4979162 100644 --- a/clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp +++ b/clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp @@ -1349,6 +1349,11 @@ class IndexRequestCollector : public SymbolIndex { llvm::function_ref) const override {} + llvm::unique_function + indexedFiles() const override { + return [](llvm::StringRef) { return false; }; + } + // This is incorrect, but IndexRequestCollector is not an actual index and it // isn't used in production code. size_t estimateMemoryUsage() const override { return 0; } diff --git a/clang-tools-extra/clangd/unittests/DexTests.cpp b/clang-tools-extra/clangd/unittests/DexTests.cpp index e83cd3052b6540..d2cd22df1e36c0 100644 --- a/clang-tools-extra/clangd/unittests/DexTests.cpp +++ b/clang-tools-extra/clangd/unittests/DexTests.cpp @@ -732,6 +732,20 @@ TEST(DexTests, Relations) { EXPECT_THAT(Results, UnorderedElementsAre(Child1.ID, Child2.ID)); } +TEST(DexIndex, IndexedFiles) { + SymbolSlab Symbols; + RefSlab Refs; + auto Size = Symbols.bytes() + Refs.bytes(); + auto Data = std::make_pair(std::move(Symbols), std::move(Refs)); + llvm::StringSet<> Files = {testPath("foo.cc"), testPath("bar.cc")}; + Dex I(std::move(Data.first), std::move(Data.second), RelationSlab(), + std::move(Files), std::move(Data), Size); + auto ContainsFile = I.indexedFiles(); + EXPECT_TRUE(ContainsFile("unittest:///foo.cc")); + EXPECT_TRUE(ContainsFile("unittest:///bar.cc")); + EXPECT_FALSE(ContainsFile("unittest:///foobar.cc")); +} + TEST(DexTest, PreferredTypesBoosting) { auto Sym1 = symbol("t1"); Sym1.Type = "T1"; diff --git a/clang-tools-extra/clangd/unittests/IndexTests.cpp b/clang-tools-extra/clangd/unittests/IndexTests.cpp index f04ac8a455a798..8efc637d1250b7 100644 --- a/clang-tools-extra/clangd/unittests/IndexTests.cpp +++ b/clang-tools-extra/clangd/unittests/IndexTests.cpp @@ -224,6 +224,20 @@ TEST(MemIndexTest, Lookup) { EXPECT_THAT(lookup(*I, SymbolID("ns::nonono")), UnorderedElementsAre()); } +TEST(MemIndexTest, IndexedFiles) { + SymbolSlab Symbols; + RefSlab Refs; + auto Size = Symbols.bytes() + Refs.bytes(); + auto Data = std::make_pair(std::move(Symbols), std::move(Refs)); + llvm::StringSet<> Files = {testPath("foo.cc"), testPath("bar.cc")}; + MemIndex I(std::move(Data.first), std::move(Data.second), RelationSlab(), + std::move(Files), std::move(Data), Size); + auto ContainsFile = I.indexedFiles(); + EXPECT_TRUE(ContainsFile("unittest:///foo.cc")); + EXPECT_TRUE(ContainsFile("unittest:///bar.cc")); + EXPECT_FALSE(ContainsFile("unittest:///foobar.cc")); +} + TEST(MemIndexTest, TemplateSpecialization) { SymbolSlab::Builder B; @@ -367,7 +381,7 @@ TEST(MergeIndexTest, Refs) { Test.Code = std::string(Test1Code.code()); Test.Filename = "test.cc"; auto AST = Test.build(); - Dyn.updateMain(Test.Filename, AST); + Dyn.updateMain(testPath(Test.Filename), AST); // Build static index for test.cc. Test.HeaderCode = HeaderCode; @@ -375,7 +389,7 @@ TEST(MergeIndexTest, Refs) { Test.Filename = "test.cc"; auto StaticAST = Test.build(); // Add stale refs for test.cc. - StaticIndex.updateMain(Test.Filename, StaticAST); + StaticIndex.updateMain(testPath(Test.Filename), StaticAST); // Add refs for test2.cc Annotations Test2Code(R"(class $Foo[[Foo]] {};)"); @@ -384,7 +398,7 @@ TEST(MergeIndexTest, Refs) { Test2.Code = std::string(Test2Code.code()); Test2.Filename = "test2.cc"; StaticAST = Test2.build(); - StaticIndex.updateMain(Test2.Filename, StaticAST); + StaticIndex.updateMain(testPath(Test2.Filename), StaticAST); RefsRequest Request; Request.IDs = {Foo.ID}; @@ -403,10 +417,47 @@ TEST(MergeIndexTest, Refs) { RefSlab::Builder Results2; EXPECT_TRUE( Merge.refs(Request, [&](const Ref &O) { Results2.insert(Foo.ID, O); })); - EXPECT_THAT(std::move(Results2).build(), - ElementsAre(Pair( - _, ElementsAre(AnyOf(FileURI("unittest:///test.cc"), - FileURI("unittest:///test2.cc")))))); + + // Remove all refs for test.cc from dynamic index, + // merged index should not return results from static index for test.cc. + Test.Code = ""; + AST = Test.build(); + Dyn.updateMain(testPath(Test.Filename), AST); + + Request.Limit = llvm::None; + RefSlab::Builder Results3; + EXPECT_FALSE( + Merge.refs(Request, [&](const Ref &O) { Results3.insert(Foo.ID, O); })); + EXPECT_THAT(std::move(Results3).build(), + ElementsAre(Pair(_, UnorderedElementsAre(AllOf( + RefRange(Test2Code.range("Foo")), + FileURI("unittest:///test2.cc")))))); +} + +TEST(MergeIndexTest, IndexedFiles) { + SymbolSlab DynSymbols; + RefSlab DynRefs; + auto DynSize = DynSymbols.bytes() + DynRefs.bytes(); + auto DynData = std::make_pair(std::move(DynSymbols), std::move(DynRefs)); + llvm::StringSet<> DynFiles = {testPath("foo.cc")}; + MemIndex DynIndex(std::move(DynData.first), std::move(DynData.second), + RelationSlab(), std::move(DynFiles), std::move(DynData), + DynSize); + SymbolSlab StaticSymbols; + RefSlab StaticRefs; + auto StaticData = + std::make_pair(std::move(StaticSymbols), std::move(StaticRefs)); + llvm::StringSet<> StaticFiles = {testPath("bar.cc")}; + MemIndex StaticIndex(std::move(StaticData.first), + std::move(StaticData.second), RelationSlab(), + std::move(StaticFiles), std::move(StaticData), + StaticSymbols.bytes() + StaticRefs.bytes()); + MergedIndex Merge(&DynIndex, &StaticIndex); + + auto ContainsFile = Merge.indexedFiles(); + EXPECT_TRUE(ContainsFile("unittest:///foo.cc")); + EXPECT_TRUE(ContainsFile("unittest:///bar.cc")); + EXPECT_FALSE(ContainsFile("unittest:///foobar.cc")); } TEST(MergeIndexTest, NonDocumentation) { diff --git a/clang-tools-extra/clangd/unittests/RenameTests.cpp b/clang-tools-extra/clangd/unittests/RenameTests.cpp index 0aa87c61baebc7..6402f4eac6c659 100644 --- a/clang-tools-extra/clangd/unittests/RenameTests.cpp +++ b/clang-tools-extra/clangd/unittests/RenameTests.cpp @@ -1237,6 +1237,12 @@ TEST(CrossFileRenameTests, DirtyBuffer) { void relations(const RelationsRequest &Req, llvm::function_ref Callback) const override {} + + llvm::unique_function + indexedFiles() const override { + return [](llvm::StringRef) { return false; }; + } + size_t estimateMemoryUsage() const override { return 0; } } PIndex; Results = rename({MainCode.point(), @@ -1285,6 +1291,12 @@ TEST(CrossFileRenameTests, DeduplicateRefsFromIndex) { void relations(const RelationsRequest &, llvm::function_ref) const override {} + + llvm::unique_function + indexedFiles() const override { + return [](llvm::StringRef) { return false; }; + } + size_t estimateMemoryUsage() const override { return 0; } Ref ReturnedRef; } DIndex(XRefInBarCC); diff --git a/clang-tools-extra/clangd/unittests/TestFS.cpp b/clang-tools-extra/clangd/unittests/TestFS.cpp index ba4010cb45817d..0926c6d72a8a3c 100644 --- a/clang-tools-extra/clangd/unittests/TestFS.cpp +++ b/clang-tools-extra/clangd/unittests/TestFS.cpp @@ -99,8 +99,9 @@ class TestScheme : public URIScheme { llvm::Expected getAbsolutePath(llvm::StringRef /*Authority*/, llvm::StringRef Body, llvm::StringRef HintPath) const override { - if (!HintPath.startswith(testRoot())) - return error("Hint path doesn't start with test root: {0}", HintPath); + if (!HintPath.empty() && !HintPath.startswith(testRoot())) + return error("Hint path is not empty and doesn't start with {0}: {1}", + testRoot(), HintPath); if (!Body.consume_front("/")) return error("Body of an unittest: URI must start with '/'"); llvm::SmallString<16> Path(Body.begin(), Body.end());