RISC-V : Test every instructions in a same fashion as it was done for ARM

[clebreto]

No description provided.

[clebreto]

• add / intrinsic_add:
  • Conditionals add do not exist, flags either
  • We dont do these shifts: x = arg0 + (arg1 << 0); => asmgen: invalid rexpr for oprd (x11 <<32u ((8u) 0))
  • Too large immediates used in intrinsics / or even through lowering are not captured by the compiler, only by llvm-mc:
    error: operand must be a symbol with %lo/%pcrel_lo/%tprel_lo modifier or an integer in the range [-2048, 2047] addi ra, ra, -892679478

[eponier]

@clebreto Is this fixed by #781 ?

[clebreto]

@clebreto Is this fixed by #781 ?

Yes