forked from MarlinFirmware/Marlin
-
Notifications
You must be signed in to change notification settings - Fork 0
/
tft_spi.cpp
358 lines (301 loc) · 11.6 KB
/
tft_spi.cpp
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
/**
* Marlin 3D Printer Firmware
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
*
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
#include "../../platforms.h"
#ifdef HAL_STM32
#include "../../../inc/MarlinConfig.h"
#if HAS_SPI_TFT
#include "tft_spi.h"
#include "pinconfig.h"
SPI_HandleTypeDef TFT_SPI::SPIx;
DMA_HandleTypeDef TFT_SPI::DMAtx;
void TFT_SPI::Init() {
SPI_TypeDef *spiInstance;
OUT_WRITE(TFT_A0_PIN, HIGH);
OUT_WRITE(TFT_CS_PIN, HIGH);
if ((spiInstance = (SPI_TypeDef *)pinmap_peripheral(digitalPinToPinName(TFT_SCK_PIN), PinMap_SPI_SCLK)) == NP) return;
if (spiInstance != (SPI_TypeDef *)pinmap_peripheral(digitalPinToPinName(TFT_MOSI_PIN), PinMap_SPI_MOSI)) return;
#if PIN_EXISTS(TFT_MISO) && TFT_MISO_PIN != TFT_MOSI_PIN
if (spiInstance != (SPI_TypeDef *)pinmap_peripheral(digitalPinToPinName(TFT_MISO_PIN), PinMap_SPI_MISO)) return;
#endif
SPIx.Instance = spiInstance;
SPIx.State = HAL_SPI_STATE_RESET;
SPIx.Init.NSS = SPI_NSS_SOFT;
SPIx.Init.Mode = SPI_MODE_MASTER;
SPIx.Init.Direction = (TFT_MISO_PIN == TFT_MOSI_PIN) ? SPI_DIRECTION_1LINE : SPI_DIRECTION_2LINES;
SPIx.Init.CLKPhase = SPI_PHASE_1EDGE;
SPIx.Init.CLKPolarity = SPI_POLARITY_LOW;
SPIx.Init.DataSize = SPI_DATASIZE_8BIT;
SPIx.Init.FirstBit = SPI_FIRSTBIT_MSB;
SPIx.Init.TIMode = SPI_TIMODE_DISABLE;
SPIx.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
SPIx.Init.CRCPolynomial = 10;
#ifdef STM32H7xx
SPIx.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; // 20 MBit/s for H743
SPIx.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
SPIx.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
SPIx.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
SPIx.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
SPIx.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
SPIx.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
SPIx.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE;
SPIx.Init.IOSwap = SPI_IO_SWAP_DISABLE;
#else
SPIx.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; // 18 MBit/s for F103, 21 MBit/s for F407, 25 MBit/s for F411
#endif
pinmap_pinout(digitalPinToPinName(TFT_SCK_PIN), PinMap_SPI_SCLK);
pinmap_pinout(digitalPinToPinName(TFT_MOSI_PIN), PinMap_SPI_MOSI);
#if PIN_EXISTS(TFT_MISO) && TFT_MISO_PIN != TFT_MOSI_PIN
pinmap_pinout(digitalPinToPinName(TFT_MISO_PIN), PinMap_SPI_MISO);
#endif
#ifdef SPI1_BASE
if (SPIx.Instance == SPI1) {
__HAL_RCC_SPI1_CLK_ENABLE();
#ifdef STM32F1xx
__HAL_RCC_DMA1_CLK_ENABLE();
DMAtx.Instance = DMA1_Channel3;
SPIx.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; // SPI1 clock on F1 and F4 is two times faster that SPI2 and SPI3 clock
#elif defined(STM32F4xx)
__HAL_RCC_DMA2_CLK_ENABLE();
DMAtx.Instance = DMA2_Stream3;
DMAtx.Init.Channel = DMA_CHANNEL_3;
SPIx.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4; // SPI1 clock on F1 and F4 is two times faster that SPI2 and SPI3 clock
#elif defined(STM32H7xx)
__HAL_RCC_DMA1_CLK_ENABLE();
DMAtx.Instance = DMA1_Stream4;
DMAtx.Init.Request = DMA_REQUEST_SPI1_TX;
#endif
}
#endif
#ifdef SPI2_BASE
if (SPIx.Instance == SPI2) {
__HAL_RCC_SPI2_CLK_ENABLE();
#ifdef STM32F1xx
__HAL_RCC_DMA1_CLK_ENABLE();
DMAtx.Instance = DMA1_Channel5;
#elif defined(STM32F4xx)
__HAL_RCC_DMA1_CLK_ENABLE();
DMAtx.Instance = DMA1_Stream4;
DMAtx.Init.Channel = DMA_CHANNEL_0;
#elif defined(STM32H7xx)
__HAL_RCC_DMA1_CLK_ENABLE();
DMAtx.Instance = DMA1_Stream4;
DMAtx.Init.Request = DMA_REQUEST_SPI2_TX;
#endif
}
#endif
#ifdef SPI3_BASE
if (SPIx.Instance == SPI3) {
__HAL_RCC_SPI3_CLK_ENABLE();
#ifdef STM32F1xx
__HAL_RCC_DMA2_CLK_ENABLE();
DMAtx.Instance = DMA2_Channel2;
#elif defined(STM32F4xx)
__HAL_RCC_DMA1_CLK_ENABLE();
DMAtx.Instance = DMA1_Stream5;
DMAtx.Init.Channel = DMA_CHANNEL_0;
#elif defined(STM32H7xx)
__HAL_RCC_DMA1_CLK_ENABLE();
DMAtx.Instance = DMA1_Stream4;
DMAtx.Init.Request = DMA_REQUEST_SPI3_TX;
#endif
}
#endif
DMAtx.Init.Direction = DMA_MEMORY_TO_PERIPH;
DMAtx.Init.PeriphInc = DMA_PINC_DISABLE;
DMAtx.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
DMAtx.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
DMAtx.Init.Mode = DMA_NORMAL;
DMAtx.Init.Priority = DMA_PRIORITY_LOW;
#if ANY(STM32F4xx, STM32H7xx)
DMAtx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
#endif
}
void TFT_SPI::DataTransferBegin(uint16_t DataSize) {
SPIx.Init.DataSize = DataSize;
HAL_SPI_Init(&SPIx);
WRITE(TFT_CS_PIN, LOW);
}
#ifdef TFT_DEFAULT_DRIVER
#include "../../../lcd/tft_io/tft_ids.h"
#endif
uint32_t TFT_SPI::GetID() {
uint32_t id;
id = ReadID(LCD_READ_ID);
if ((id & 0xFFFF) == 0 || (id & 0xFFFF) == 0xFFFF) {
id = ReadID(LCD_READ_ID4);
#ifdef TFT_DEFAULT_DRIVER
if ((id & 0xFFFF) == 0 || (id & 0xFFFF) == 0xFFFF)
id = TFT_DEFAULT_DRIVER;
#endif
}
return id;
}
uint32_t TFT_SPI::ReadID(uint16_t Reg) {
uint32_t Data = 0;
#if PIN_EXISTS(TFT_MISO)
uint32_t BaudRatePrescaler = SPIx.Init.BaudRatePrescaler;
SPIx.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64;
DataTransferBegin(DATASIZE_8BIT);
WriteReg(Reg);
if (SPIx.Init.Direction == SPI_DIRECTION_1LINE) SPI_1LINE_RX(&SPIx);
#ifdef STM32H7xx
for (uint32_t i = 0; i < 4; i++) {
MODIFY_REG(SPIx.Instance->CR2, SPI_CR2_TSIZE, 1);
__HAL_SPI_ENABLE(&SPIx);
SET_BIT(SPIx.Instance->CR1, SPI_CR1_CSTART);
#if TFT_MISO_PIN != TFT_MOSI_PIN
SPIx.Instance->TXDR = 0;
#endif
while (!__HAL_SPI_GET_FLAG(&SPIx, SPI_FLAG_EOT)) {}
Data = (Data << 8) | SPIx.Instance->RXDR;
__HAL_SPI_DISABLE(&SPIx);
__HAL_SPI_CLEAR_EOTFLAG(&SPIx);
__HAL_SPI_CLEAR_TXTFFLAG(&SPIx);
}
#else
__HAL_SPI_ENABLE(&SPIx);
for (uint32_t i = 0; i < 4; i++) {
#if TFT_MISO_PIN != TFT_MOSI_PIN
while (!__HAL_SPI_GET_FLAG(&SPIx, SPI_FLAG_TXE)) {}
SPIx.Instance->DR = 0;
#endif
while (!__HAL_SPI_GET_FLAG(&SPIx, SPI_FLAG_RXNE)) {}
Data = (Data << 8) | SPIx.Instance->DR;
}
#endif
DataTransferEnd();
SPIx.Init.BaudRatePrescaler = BaudRatePrescaler;
#endif
return Data >> 7;
}
bool TFT_SPI::isBusy() {
#ifdef STM32F1xx
#define __IS_DMA_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CCR & DMA_CCR_EN)
#define __IS_DMA_CONFIGURED(__HANDLE__) ((__HANDLE__)->Instance->CPAR != 0)
#elif defined(STM32F4xx)
#define __IS_DMA_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR & DMA_SxCR_EN)
#define __IS_DMA_CONFIGURED(__HANDLE__) ((__HANDLE__)->Instance->PAR != 0)
#elif defined(STM32H7xx)
#define __IS_DMA_ENABLED(__HANDLE__) (((DMA_Stream_TypeDef *)((__HANDLE__)->Instance))->CR & DMA_SxCR_EN)
#define __IS_DMA_CONFIGURED(__HANDLE__) (((DMA_Stream_TypeDef *)((__HANDLE__)->Instance))->PAR != 0)
#endif
if (!__IS_DMA_CONFIGURED(&DMAtx)) return false;
if (__HAL_DMA_GET_FLAG(&DMAtx, __HAL_DMA_GET_TE_FLAG_INDEX(&DMAtx))) {
// You should not be here - DMA transfer error flag is set
// Abort DMA transfer and release SPI
}
else {
// Check if DMA transfer completed flag is set
if (__HAL_DMA_GET_FLAG(&DMAtx, __HAL_DMA_GET_TC_FLAG_INDEX(&DMAtx)) == 0) return true;
#ifdef STM32H7xx
// Check if SPI data transfer is completed
if (!__HAL_SPI_GET_FLAG(&SPIx, SPI_FLAG_EOT)) return true;
#else
// Check if SPI is idle
if (__HAL_SPI_GET_FLAG(&SPIx, SPI_FLAG_BSY)) return true;
#endif
}
Abort();
return false;
}
void TFT_SPI::Abort() {
HAL_DMA_Abort(&DMAtx); // Abort DMA transfer if any
HAL_DMA_DeInit(&DMAtx);
#ifdef STM32H7xx
CLEAR_BIT(SPIx.Instance->CFG1, SPI_CFG1_TXDMAEN);
__HAL_SPI_CLEAR_EOTFLAG(&SPIx);
__HAL_SPI_CLEAR_TXTFFLAG(&SPIx);
#else
CLEAR_BIT(SPIx.Instance->CR2, SPI_CR2_TXDMAEN);
#endif
DataTransferEnd(); // Stop SPI and deselect CS
}
void TFT_SPI::Transmit(uint16_t Data) {
#if TFT_MISO_PIN == TFT_MOSI_PIN
SPI_1LINE_TX(&SPIx);
#endif
#ifdef STM32H7xx
MODIFY_REG(SPIx.Instance->CR2, SPI_CR2_TSIZE, 1);
__HAL_SPI_ENABLE(&SPIx);
SET_BIT(SPIx.Instance->CR1, SPI_CR1_CSTART);
SPIx.Instance->TXDR = Data;
while (!__HAL_SPI_GET_FLAG(&SPIx, SPI_SR_EOT)) {}
__HAL_SPI_CLEAR_EOTFLAG(&SPIx);
__HAL_SPI_CLEAR_TXTFFLAG(&SPIx);
#else
__HAL_SPI_ENABLE(&SPIx);
SPIx.Instance->DR = Data;
while (__HAL_SPI_GET_FLAG(&SPIx, SPI_FLAG_BSY)) {}
#endif
__HAL_SPI_DISABLE(&SPIx);
#if TFT_MISO_PIN != TFT_MOSI_PIN
__HAL_SPI_CLEAR_OVRFLAG(&SPIx); // Clear overrun flag in 2 Lines communication mode because received data is not read
#endif
}
void TFT_SPI::TransmitDMA(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
DMAtx.Init.MemInc = MemoryIncrease;
HAL_DMA_Init(&DMAtx);
#if TFT_MISO_PIN == TFT_MOSI_PIN
SPI_1LINE_TX(&SPIx);
#endif
DataTransferBegin();
#ifdef STM32H7xx
HAL_DMA_Start(&DMAtx, (uint32_t)Data, (uint32_t)&(SPIx.Instance->TXDR), Count);
CLEAR_BIT(SPIx.Instance->CFG1, SPI_CFG1_TXDMAEN);
MODIFY_REG(SPIx.Instance->CR2, SPI_CR2_TSIZE, Count);
SET_BIT(SPIx.Instance->CFG1, SPI_CFG1_TXDMAEN); // Enable Tx DMA Request
__HAL_SPI_ENABLE(&SPIx);
SET_BIT(SPIx.Instance->CR1, SPI_CR1_CSTART);
#else
HAL_DMA_Start(&DMAtx, (uint32_t)Data, (uint32_t)&(SPIx.Instance->DR), Count);
__HAL_SPI_ENABLE(&SPIx);
SET_BIT(SPIx.Instance->CR2, SPI_CR2_TXDMAEN); // Enable Tx DMA Request
#endif
TERN_(TFT_SHARED_SPI, while (isBusy()));
}
void TFT_SPI::Transmit(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
TransmitDMA(MemoryIncrease, Data, Count);
HAL_DMA_PollForTransfer(&DMAtx, HAL_DMA_FULL_TRANSFER, HAL_MAX_DELAY);
#ifdef STM32H7xx
while (!__HAL_SPI_GET_FLAG(&SPIx, SPI_SR_EOT)) {}
#else
while (__HAL_SPI_GET_FLAG(&SPIx, SPI_FLAG_BSY)) {}
#endif
Abort();
}
#if ENABLED(USE_SPI_DMA_TC)
void TFT_SPI::TransmitDMA_IT(uint32_t MemoryIncrease, uint16_t *Data, uint16_t Count) {
DMAtx.Init.MemInc = MemoryIncrease;
HAL_DMA_Init(&DMAtx);
if (TFT_MISO_PIN == TFT_MOSI_PIN)
SPI_1LINE_TX(&SPIx);
DataTransferBegin();
HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
HAL_DMA_Start_IT(&DMAtx, (uint32_t)Data, (uint32_t)&(SPIx.Instance->DR), Count);
__HAL_SPI_ENABLE(&SPIx);
SET_BIT(SPIx.Instance->CR2, SPI_CR2_TXDMAEN); // Enable Tx DMA Request
}
extern "C" void DMA2_Stream3_IRQHandler(void) { TFT_SPI::DMA_IRQHandler(); }
#endif
#endif // HAS_SPI_TFT
#endif // HAL_STM32