{"payload":{"header_redesign_enabled":false,"results":[{"id":"176198509","archived":false,"color":"#b2b7f8","followers":2,"has_funding_file":false,"hl_name":"kaii789/simptel-O9","hl_trunc_description":"Single-cycle CPU running a custom MIPS-like ISA.","language":"Verilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":176198509,"name":"simptel-O9","owner_id":39175841,"owner_login":"kaii789","updated_at":"2019-04-16T05:49:40.563Z","has_issues":true}},"sponsorable":false,"topics":[],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":114,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Akaii789%252Fsimptel-O9%2B%2Blanguage%253AVerilog","metadata":null,"csrf_tokens":{"/kaii789/simptel-O9/star":{"post":"APAXGwbEqZbBMlcyi66o9WotfHNIY1WX1KJA4okgshAMJaanAL4Nt1SYSYO5DxatB2_ecSPBvSWWF-Wxj-orUQ"},"/kaii789/simptel-O9/unstar":{"post":"Uf3aXqZe_MS3tf4MXDZ736335vQciBLUBLGVPpECuBa4rkRS55DP3SkPEyilQUf4dhp2WQUIJ_GSVf2upxwhtA"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"-BZ2Z1CJdZakqG-rtXXql2UvnNrY-aDjUjgM0v0BcWkzIhdXq0MP509vum2fbdkDL-aboPnKX1LjnBZr-113rw"}}},"title":"Repository search results"}