Hardware implementations of Xoodyak Lightweight cryptographic scheme, as described in NIST LWC Round 2 submission spec.
Xoodyak is a cryptographic primitive using 12 rounds of Xoodoo permutation with claimed security strength of 128 bits.
The implementations support both Authenticated Encryption/Decryption (AEAD) and hashing.
The implementation tries to adhere to the KISS design principle, while adding an array of optimization tricks, making it the fastest FPGA implementation of Xoodyak.
Two Variants are available:
- v1 (
Xoodyak): 12 cycles permutation - v2 (
Xoodyak2x): 2x unrolled, 6 cycles permutation
FPGA implementation targeting Xilinx xc7a12tcsg325-3 using Vivado 2020.1 for maximum frequency (results obtained through Xeda fmax:vivado_synth)
| F_max (MHz) | LUTs | FFs | Slices | AD Throughput | PT/CT Throughput | Hash Throughput | |
|---|---|---|---|---|---|---|---|
| v1 | 314.961 | 1501 | 1249 | 490 | 8528.2 Mbps | 4651.7 Mbps | 3101.2 Mbps |
| v2 | 199.045 | 2322 | 1228 | 692 | 5838.7 Mbps | 5459.5 Mbps | 3639.7 Mbps |
For further details on throughput measurements and comparison to other LWC submissions, please see here. Further details about Keccak Team's implementation are available here.
Standalone Python script for generating verilog and running verification tests.
--gen: Generate Verilog using Bluespec Compiler--gtkwave: Generate GTKWave filters based on BSV type definitions.--tests: ChoosecocoLightverification tests to run:randomized_tests: randomized sequence of Encrypt, Decrypt, and Hash operations with random inputs.measure_timings: Measure number of cycles for different operations and input sizes.