diff --git a/Bootloader.cydsn/Bootloader.cydwr b/Bootloader.cydsn/Bootloader.cydwr
index b783c45..aa7f5fd 100644
--- a/Bootloader.cydsn/Bootloader.cydwr
+++ b/Bootloader.cydsn/Bootloader.cydwr
@@ -1542,19 +1542,19 @@
-
+
-
+
-
+
-
+
diff --git a/Bootloader.cydsn/Bootloader.cyprj b/Bootloader.cydsn/Bootloader.cyprj
index c41e5fe..971204b 100644
--- a/Bootloader.cydsn/Bootloader.cyprj
+++ b/Bootloader.cydsn/Bootloader.cyprj
@@ -317,20 +317,20 @@
-
+
-
+
-
+
diff --git a/CHANGELOG.md b/CHANGELOG.md
index dc22e92..1f9268f 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -8,10 +8,14 @@
* Increased debounce poll rate
-2017-07-04 v1.2 Kate Gray
+2017-07-04 v2.0 Kate Gray
* Switched to Direct Memory Access and ISRs for minimum latency
* Added option to see firmware version of current GHETT-iO
- * Further increased debounce poll rate
\ No newline at end of file
+ * Further increased debounce poll rate
+
+ * Address issue where device resets when used in a pad
+
+ * Change pin configuration to support future accessories
\ No newline at end of file
diff --git a/GHETT-iO.cydsn/GHETT-iO.cydwr b/GHETT-iO.cydsn/GHETT-iO.cydwr
index ab18c24..0be4cb9 100644
--- a/GHETT-iO.cydsn/GHETT-iO.cydwr
+++ b/GHETT-iO.cydsn/GHETT-iO.cydwr
@@ -3470,7 +3470,7 @@
-
+
diff --git a/GHETT-iO.cydsn/GHETT-iO.cyprj b/GHETT-iO.cydsn/GHETT-iO.cyprj
index 55a04f0..b7c843b 100644
--- a/GHETT-iO.cydsn/GHETT-iO.cyprj
+++ b/GHETT-iO.cydsn/GHETT-iO.cyprj
@@ -142,6 +142,20 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -308,20 +322,20 @@
-
+
-
+
-
+
@@ -425,21 +439,21 @@
-
-
+
+
-
-
+
+
-
-
+
+
@@ -451,27 +465,27 @@
-
+
-
+
-
+
-
+
@@ -657,27 +671,27 @@
-
+
-
+
-
+
-
+
@@ -716,20 +730,20 @@
-
+
-
+
-
+
@@ -742,6 +756,58 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
@@ -1139,36 +1205,48 @@
+
+
+
+
+
+
+
-
+
-
+
-
+
-
+
+
+
+
+
+
-
+
-
+
-
+
@@ -1179,6 +1257,58 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/GHETT-iO.cydsn/TopDesign/TopDesign.cysch b/GHETT-iO.cydsn/TopDesign/TopDesign.cysch
index 747ae3a..195bb9f 100644
Binary files a/GHETT-iO.cydsn/TopDesign/TopDesign.cysch and b/GHETT-iO.cydsn/TopDesign/TopDesign.cysch differ
diff --git a/GHETT-iO.cydsn/main.c b/GHETT-iO.cydsn/main.c
index 330bcca..4aefa4a 100644
--- a/GHETT-iO.cydsn/main.c
+++ b/GHETT-iO.cydsn/main.c
@@ -61,7 +61,7 @@ int main()
uint8 DMA_INPUTS_TD[1];
// Allocate the DMA chanel, with bursts of 1 byte, and store the channel number
- DMA_INPUTS_Chan = DMA_INPUTS_DmaInitialize(DMA_INPUTS_BYTES_PER_BURST, DMA_INPUTS_REQUEST_PER_BURST,
+ DMA_INPUTS_Chan = DMA_Inputs_DmaInitialize(DMA_INPUTS_BYTES_PER_BURST, DMA_INPUTS_REQUEST_PER_BURST,
HI16(DMA_INPUTS_SRC_BASE), HI16(DMA_INPUTS_DST_BASE));
// Allocate the transaction descriptor and configure it to copy from the peripheral (status register)
@@ -70,8 +70,8 @@ int main()
// input address.
DMA_INPUTS_TD[0] = CyDmaTdAllocate();
CyDmaTdSetConfiguration(DMA_INPUTS_TD[0], DMA_INPUTS_TD_TRANSFER_INDEFINITELY,
- DMA_INPUTS_TD[0], DMA_INPUTS__TD_TERMOUT_EN);
- CyDmaTdSetAddress(DMA_INPUTS_TD[0], LO16((uint32)SR_INPUTS_Status_PTR), LO16((uint32)&input));
+ DMA_INPUTS_TD[0], DMA_Inputs__TD_TERMOUT_EN);
+ CyDmaTdSetAddress(DMA_INPUTS_TD[0], LO16((uint32)SR_Inputs_Status_PTR), LO16((uint32)&input));
// Configure our TD to be the first TD in the "chain" and enable it.
CyDmaChSetInitialTd(DMA_INPUTS_Chan, DMA_INPUTS_TD[0]);
@@ -84,7 +84,7 @@ int main()
#endif
// Configure the Status Register interrupts
- SR_INPUTS_InterruptEnable();
+ SR_Inputs_InterruptEnable();
// Enable interrupts (macro for an inline ASM instruction)
CyGlobalIntEnable;
diff --git a/docs/GHETT-iO.pdf b/docs/GHETT-iO.pdf
index 0b70572..c451964 100644
Binary files a/docs/GHETT-iO.pdf and b/docs/GHETT-iO.pdf differ