From 6b02a4fe25cfd48bf7e55d502692cd3ba89b9522 Mon Sep 17 00:00:00 2001 From: Stephan Date: Sun, 16 Jul 2023 00:12:29 +0200 Subject: [PATCH] add NMI handler to libmips-rt --- mips-rt/Cargo.toml | 2 +- mips-rt/link.x | 4 +- mips-rt/native_lib/Makefile | 3 +- mips-rt/native_lib/crt0.S | 85 +++++++------------------ mips-rt/native_lib/exception_context.S | 39 +++--------- mips-rt/native_lib/exception_table.S | 4 +- mips-rt/native_lib/isr_context.S | 4 +- mips-rt/native_lib/libmips-rt.a | Bin 21936 -> 21732 bytes 8 files changed, 43 insertions(+), 98 deletions(-) diff --git a/mips-rt/Cargo.toml b/mips-rt/Cargo.toml index 0946451..f6eab22 100644 --- a/mips-rt/Cargo.toml +++ b/mips-rt/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "mips-rt" -version = "0.3.2" +version = "0.3.3" authors = ["Stephan #include -.extern _general_exception_handler -.section .text.general_exception, "ax" +.section .text.exception_context, "ax" .set noreorder .set noat .set nomips16 -.globl _general_exception_context -.ent _general_exception_context +.globl _exception_context +.ent _exception_context -_general_exception_context: +_exception_context: # Save off the non-callee saved registers that may get mucked with addiu sp, sp, -88 @@ -50,24 +51,11 @@ _general_exception_context: mfhi t0 sw t0, 80(sp) -#if defined(__PIC__) - lw t9,%call16(_general_exception_handler)(gp) - nop - # Pass Cause and Status to the handler function - mfc0 a0, _CP0_CAUSE - mfc0 a1, _CP0_STATUS - jalr t9 - nop -#else - la k0,_general_exception_handler - nop - # Pass Cause and Status to the handler function mfc0 a0, _CP0_CAUSE mfc0 a1, _CP0_STATUS jalr k0 nop -#endif lw t0, 80(sp) mthi t0 @@ -97,11 +85,4 @@ _general_exception_context: ehb eret - .end _general_exception_context - -.weak _general_exception_handler -.ent _general_exception_handler -_general_exception_handler: - jr ra - nop -.end _general_exception_handler + .end _exception_context diff --git a/mips-rt/native_lib/exception_table.S b/mips-rt/native_lib/exception_table.S index dddc69c..d6e9cf1 100644 --- a/mips-rt/native_lib/exception_table.S +++ b/mips-rt/native_lib/exception_table.S @@ -21,8 +21,8 @@ _default_isr_fn: .ent _gen_exception .global _gen_exception _gen_exception: - la k0,_general_exception_context - jr k0 + la k0,_general_exception_handler + j _exception_context nop .end _gen_exception diff --git a/mips-rt/native_lib/isr_context.S b/mips-rt/native_lib/isr_context.S index 35acc5c..3b94f30 100644 --- a/mips-rt/native_lib/isr_context.S +++ b/mips-rt/native_lib/isr_context.S @@ -1,7 +1,7 @@ /* - * wrapper for exception handlers that saves registers on the stack + * wrapper for interrupt handlers that saves registers on the stack * - * address of exception handler to be called must be in register k0 + * address of interrupt handler to be called must be in register k0 * */ diff --git a/mips-rt/native_lib/libmips-rt.a b/mips-rt/native_lib/libmips-rt.a index 7c3739e5e1f30732e8c002ff63e94ea4c052a8a6..76872625e516e68af22a0e2de5d945eb84872106 100644 GIT binary patch delta 3678 zcmZXXdu$X{6vpq}-P!H3Ep4Hc-M*%@&~{4|C`H&(XlYU29bTGLG!zPnD3+=Z-#RC{?9GDnog))jnF` z9Z}w1&~(7JED=!c!%ekkcfkhLzNty6f(E7TtOUyF|4`qrX|cDCrY(8HGh0)GuPoYy z!`y>v5G#&a`OKbJo3P^h6w178q)&a7)@Gmu^lGR)YpWO7qm=1(IGqUHAQ8i4MgV4sfT9T~nkeHY%FskJohU;S%~V~^O_XyJP&6@`n}DJTD4H05i z0!_5grV4JNf}5!1CZK2niYBVK2`HL?qKPOs5k(U-X>XL9sOBc1Xrg+FM~$Fs)n)#g zi8!&LXEVF{pBuX+GvPD$1X;{KE7z6FU3t7KH@mXq$}3#C^TwP|kKPE>)2{r2EAMdS z{jPk(l~1|yw>RV#{0nXXxT~7msVwFfDRkv3SFWdc%+|}O54wQ{pwCkhx}Q?eGZd+} zJ<6i``Vu{g+UjlHOmS!j^+9`R0QwRop@%31y+Dzvw$7j!G)isIxfF-qM}5$zXaKsC zlF;`l1^s~{4Ytmq7<2-)K^IdT`VjR&alJuzQxf_KrJz?RGR@Xuia}%42ECKw&_}2b zx|s%`Z&4C@no`i~6q#=8Qi?%mP#bh5#i5T;A9O1XKo3$9dY)3y07V*YT}3hI9BPB! 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