All notable changes to this project will be documented in this file.
The format is based on Keep a Changelog and this project adheres to Semantic Versioning.
thumbv6m-none-eabi
support. When compiled for that target this crate will only expose 32 interrupts, which is the maximum number of interrupts thatcortex-m-rt
allows for the ARMv6-M architecture.
v0.1.2 - 2018-10-30
- Inlined a few functions
v0.1.1 - 2018-10-24
- Ship a memory.x file describing the memory layout of the LM3S6965.
Initial release