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support non-default AS for va_list/va_copy/va_start/va_end
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@yuri91
yuri91 committed Oct 31, 2024
1 parent b531840 commit 2f1cac6
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Showing 50 changed files with 262 additions and 243 deletions.
17 changes: 12 additions & 5 deletions clang/lib/CodeGen/CGBuiltin.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -739,13 +739,17 @@ EncompassingIntegerType(ArrayRef<struct WidthAndSignedness> Types) {
}

Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) {
llvm::Type *DestType = Int8PtrTy;
if (ArgValue->getType() != DestType)
llvm::PointerType *DestType = Int8PtrTy;
if (getLangOpts().Cheerp) {
DestType = llvm::PointerType::getWithSamePointeeType(DestType, ArgValue->getType()->getPointerAddressSpace());
}
if (ArgValue->getType() != DestType) {
ArgValue =
Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data());
}

Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend;
return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue);
return Builder.CreateCall(CGM.getIntrinsic(inst, {DestType}), ArgValue);
}

/// Checks if using the result of __builtin_object_size(p, @p From) in place of
Expand Down Expand Up @@ -2548,11 +2552,14 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer();
Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer();

llvm::Type *Type = Int8PtrTy;
llvm::PointerType *Type = Int8PtrTy;

if (getLangOpts().Cheerp) {
Type = llvm::PointerType::getWithSamePointeeType(Type, SrcPtr->getType()->getPointerAddressSpace());
}
DstPtr = Builder.CreateBitCast(DstPtr, Type);
SrcPtr = Builder.CreateBitCast(SrcPtr, Type);
Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), {DstPtr, SrcPtr});
Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy, {Type, Type}), {DstPtr, SrcPtr});
return RValue::get(nullptr);
}
case Builtin::BI__builtin_abs:
Expand Down
22 changes: 17 additions & 5 deletions clang/lib/Sema/SemaExpr.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -6455,7 +6455,8 @@ static FunctionDecl *rewriteBuiltinFunctionDecl(Sema *Sema, ASTContext &Context,
QualType DeclType = FDecl->getType();
const FunctionProtoType *FT = dyn_cast<FunctionProtoType>(DeclType);

if (!Context.BuiltinInfo.hasPtrArgsOrResult(FDecl->getBuiltinID()) || !FT ||
if (!(Context.BuiltinInfo.hasPtrArgsOrResult(FDecl->getBuiltinID()) ||
Context.BuiltinInfo.hasReferenceArgsOrResult(FDecl->getBuiltinID())) || !FT ||
ArgExprs.size() < FT->getNumParams())
return nullptr;

Expand All @@ -6472,9 +6473,12 @@ static FunctionDecl *rewriteBuiltinFunctionDecl(Sema *Sema, ASTContext &Context,
return nullptr;
Expr *Arg = ArgRes.get();
QualType ArgType = Arg->getType();
if (!ParamType->isPointerType() ||
auto isPointerOrRef = [](QualType Ty) {
return Ty->isPointerType() || Ty->isReferenceType();
};
if (!isPointerOrRef(ParamType) ||
ParamType.hasAddressSpace() ||
!ArgType->isPointerType() ||
!isPointerOrRef(ArgType) ||
!ArgType->getPointeeType().hasAddressSpace()) {
OverloadParams.push_back(ParamType);
continue;
Expand All @@ -6488,7 +6492,14 @@ static FunctionDecl *rewriteBuiltinFunctionDecl(Sema *Sema, ASTContext &Context,
LangAS AS = ArgType->getPointeeType().getAddressSpace();

PointeeType = Context.getAddrSpaceQualType(PointeeType, AS);
OverloadParams.push_back(Context.getPointerType(PointeeType));
QualType Type;
if (ParamType->isPointerType()) {
Type = Context.getPointerType(PointeeType);
} else {
assert(ParamType->isReferenceType());
Type = Context.getLValueReferenceType(PointeeType);
}
OverloadParams.push_back(Type);
}

if (!NeedsNewDecl)
Expand Down Expand Up @@ -16815,8 +16826,9 @@ ExprResult Sema::BuildVAArgExpr(SourceLocation BuiltinLoc,
}
}

QualType ETyNoAS = Context.removeAddrSpaceQualType(E->getType());
if (!IsMS && !E->isTypeDependent() &&
!Context.hasSameType(VaListType, E->getType()))
!Context.hasSameType(VaListType, ETyNoAS))
return ExprError(
Diag(E->getBeginLoc(),
diag::err_first_argument_to_va_arg_not_of_type_va_list)
Expand Down
16 changes: 8 additions & 8 deletions clang/test/CodeGen/CSKY/csky-abi.c
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Original file line number Diff line number Diff line change
Expand Up @@ -185,13 +185,13 @@ void f_va_caller(void) {
// CHECK: [[VA:%.*]] = alloca ptr, align 4
// CHECK: [[V:%.*]] = alloca i32, align 4
// CHECK: store ptr %fmt, ptr [[FMT_ADDR]], align 4
// CHECK: call void @llvm.va_start(ptr [[VA]])
// CHECK: call void @llvm.va_start.p0(ptr [[VA]])
// CHECK: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
// CHECK: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4
// CHECK: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
// CHECK: [[TMP1:%.*]] = load i32, ptr [[ARGP_CUR]], align 4
// CHECK: store i32 [[TMP1]], ptr [[V]], align 4
// CHECK: call void @llvm.va_end(ptr [[VA]])
// CHECK: call void @llvm.va_end.p0(ptr [[VA]])
// CHECK: [[TMP2:%.*]] = load i32, ptr [[V]], align 4
// CHECK: ret i32 [[TMP2]]
// CHECK: }
Expand All @@ -210,13 +210,13 @@ int f_va_1(char *fmt, ...) {
// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 4
// CHECK-NEXT: [[V:%.*]] = alloca double, align 4
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
// CHECK-NEXT: call void @llvm.va_start(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 8
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
// CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[ARGP_CUR]], align 4
// CHECK-NEXT: store double [[TMP4]], ptr [[V]], align 4
// CHECK-NEXT: call void @llvm.va_end(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
// CHECK-NEXT: [[TMP5:%.*]] = load double, ptr [[V]], align 4
// CHECK-NEXT: ret double [[TMP5]]
double f_va_2(char *fmt, ...) {
Expand All @@ -236,7 +236,7 @@ double f_va_2(char *fmt, ...) {
// CHECK-NEXT: [[W:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[X:%.*]] = alloca double, align 4
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
// CHECK-NEXT: call void @llvm.va_start(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 8
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
Expand All @@ -252,7 +252,7 @@ double f_va_2(char *fmt, ...) {
// CHECK-NEXT: store ptr [[ARGP_NEXT5]], ptr [[VA]], align 4
// CHECK-NEXT: [[TMP11:%.*]] = load double, ptr [[ARGP_CUR4]], align 4
// CHECK-NEXT: store double [[TMP11]], ptr [[X]], align 4
// CHECK-NEXT: call void @llvm.va_end(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
// CHECK-NEXT: [[TMP12:%.*]] = load double, ptr [[V]], align 4
// CHECK-NEXT: [[TMP13:%.*]] = load double, ptr [[X]], align 4
// CHECK-NEXT: [[ADD:%.*]] = fadd double [[TMP12]], [[TMP13]]
Expand All @@ -279,7 +279,7 @@ double f_va_3(char *fmt, ...) {
// CHECK-NEXT: [[LS:%.*]] = alloca [[STRUCT_LARGE:%.*]], align 4
// CHECK-NEXT: [[RET:%.*]] = alloca i32, align 4
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
// CHECK-NEXT: call void @llvm.va_start(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
Expand All @@ -302,7 +302,7 @@ double f_va_3(char *fmt, ...) {
// CHECK-NEXT: [[ARGP_NEXT9:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR8]], i32 16
// CHECK-NEXT: store ptr [[ARGP_NEXT9]], ptr [[VA]], align 4
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[LS]], ptr align 4 [[ARGP_CUR8]], i32 16, i1 false)
// CHECK-NEXT: call void @llvm.va_end(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
int f_va_4(char *fmt, ...) {
__builtin_va_list va;

Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/LoongArch/abi-lp64d.c
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Original file line number Diff line number Diff line change
Expand Up @@ -449,13 +449,13 @@ void f_va_caller(void) {
// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 8
// CHECK-NEXT: [[V:%.*]] = alloca i32, align 4
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 8
// CHECK-NEXT: call void @llvm.va_start(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i64 8
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 8
// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARGP_CUR]], align 8
// CHECK-NEXT: store i32 [[TMP0]], ptr [[V]], align 4
// CHECK-NEXT: call void @llvm.va_end(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[V]], align 4
// CHECK-NEXT: ret i32 [[TMP1]]
int f_va_int(char *fmt, ...) {
Expand Down
4 changes: 2 additions & 2 deletions clang/test/CodeGen/PowerPC/aix-altivec-vaargs.c
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Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ vector double vector_varargs(int count, ...) {

// CHECK: %arg_list = alloca i8*
// CHECK: %arg_list1 = bitcast i8** %arg_list to i8*
// CHECK: call void @llvm.va_start(i8* %arg_list1)
// CHECK: call void @llvm.va_start.p0(i8* %arg_list1)

// AIX32: for.body:
// AIX32-NEXT: %argp.cur = load i8*, i8** %arg_list, align 4
Expand Down Expand Up @@ -49,4 +49,4 @@ vector double vector_varargs(int count, ...) {

// CHECK: for.end:
// CHECK: %arg_list2 = bitcast i8** %arg_list to i8*
// CHECK: call void @llvm.va_end(i8* %arg_list2)
// CHECK: call void @llvm.va_end.p0(i8* %arg_list2)
14 changes: 7 additions & 7 deletions clang/test/CodeGen/PowerPC/aix-vaargs.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@ void testva (int n, ...) {
// CHECK-NEXT: %v = alloca i32, align 4
// CHECK-NEXT: store i32 %n, i32* %n.addr, align 4
// CHECK-NEXT: %ap1 = bitcast i8** %ap to i8*
// CHECK-NEXT: call void @llvm.va_start(i8* %ap1)
// CHECK-NEXT: call void @llvm.va_start.p0(i8* %ap1)

// AIX32-NEXT: %argp.cur = load i8*, i8** %ap, align 4
// AIX32-NEXT: %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 16
Expand All @@ -54,7 +54,7 @@ void testva (int n, ...) {

// CHECK-NEXT: %3 = bitcast i8** %ap2 to i8*
// CHECK-NEXT: %4 = bitcast i8** %ap to i8*
// CHECK-NEXT: call void @llvm.va_copy(i8* %3, i8* %4)
// CHECK-NEXT: call void @llvm.va_copy.p0.p0(i8* %3, i8* %4)

// AIX32-NEXT: %argp.cur2 = load i8*, i8** %ap2, align 4
// AIX32-NEXT: %argp.next3 = getelementptr inbounds i8, i8* %argp.cur2, i32 4
Expand All @@ -71,15 +71,15 @@ void testva (int n, ...) {
// AIX64-NEXT: store i32 %7, i32* %v, align 4

// CHECK-NEXT: %ap24 = bitcast i8** %ap2 to i8*
// CHECK-NEXT: call void @llvm.va_end(i8* %ap24)
// CHECK-NEXT: call void @llvm.va_end.p0(i8* %ap24)
// CHECK-NEXT: %ap5 = bitcast i8** %ap to i8*
// CHECK-NEXT: call void @llvm.va_end(i8* %ap5)
// CHECK-NEXT: call void @llvm.va_end.p0(i8* %ap5)
// CHECK-NEXT: ret void

// CHECK: declare void @llvm.va_start(i8*)
// CHECK: declare void @llvm.va_start.p0(i8*)

// AIX32: declare void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i32, i1 immarg)
// AIX64: declare void @llvm.memcpy.p0i8.p0i8.i64(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i64, i1 immarg)

// CHECK: declare void @llvm.va_copy(i8*, i8*)
// CHECK: declare void @llvm.va_end(i8*)
// CHECK: declare void @llvm.va_copy.p0.p0(i8*, i8*)
// CHECK: declare void @llvm.va_end.p0(i8*)
18 changes: 9 additions & 9 deletions clang/test/CodeGen/PowerPC/ppc64le-varargs-f128.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@ void foo_ls(ldbl128_s);
// OMP-TARGET: call void @foo_ld(ppc_fp128 noundef %[[V3]])

// OMP-HOST-LABEL: define{{.*}} void @omp(
// OMP-HOST: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
// OMP-HOST: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
// OMP-HOST: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]], align 8
// OMP-HOST: %[[V0:[0-9a-zA-Z_.]+]] = ptrtoint ptr %[[CUR]] to i64
// OMP-HOST: %[[V1:[0-9a-zA-Z_.]+]] = add i64 %[[V0]], 15
Expand All @@ -51,15 +51,15 @@ void omp(int n, ...) {
}

// IEEE-LABEL: define{{.*}} void @f128
// IEEE: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
// IEEE: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
// IEEE: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]]
// IEEE: %[[V0:[0-9a-zA-Z_.]+]] = ptrtoint ptr %[[CUR]] to i64
// IEEE: %[[V1:[0-9a-zA-Z_.]+]] = add i64 %[[V0]], 15
// IEEE: %[[V2:[0-9a-zA-Z_.]+]] = and i64 %[[V1]], -16
// IEEE: %[[ALIGN:[0-9a-zA-Z_.]+]] = inttoptr i64 %[[V2]] to ptr
// IEEE: %[[V4:[0-9a-zA-Z_.]+]] = load fp128, ptr %[[ALIGN]], align 16
// IEEE: call void @foo_fq(fp128 noundef %[[V4]])
// IEEE: call void @llvm.va_end(ptr %[[AP]])
// IEEE: call void @llvm.va_end.p0(ptr %[[AP]])
void f128(int n, ...) {
va_list ap;
va_start(ap, n);
Expand All @@ -68,22 +68,22 @@ void f128(int n, ...) {
}

// IEEE-LABEL: define{{.*}} void @long_double
// IEEE: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
// IEEE: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
// IEEE: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]]
// IEEE: %[[V0:[0-9a-zA-Z_.]+]] = ptrtoint ptr %[[CUR]] to i64
// IEEE: %[[V1:[0-9a-zA-Z_.]+]] = add i64 %[[V0]], 15
// IEEE: %[[V2:[0-9a-zA-Z_.]+]] = and i64 %[[V1]], -16
// IEEE: %[[ALIGN:[0-9a-zA-Z_.]+]] = inttoptr i64 %[[V2]] to ptr
// IEEE: %[[V4:[0-9a-zA-Z_.]+]] = load fp128, ptr %[[ALIGN]], align 16
// IEEE: call void @foo_ld(fp128 noundef %[[V4]])
// IEEE: call void @llvm.va_end(ptr %[[AP]])
// IEEE: call void @llvm.va_end.p0(ptr %[[AP]])

// IBM-LABEL: define{{.*}} void @long_double
// IBM: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
// IBM: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
// IBM: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]]
// IBM: %[[V4:[0-9a-zA-Z_.]+]] = load ppc_fp128, ptr %[[CUR]], align 8
// IBM: call void @foo_ld(ppc_fp128 noundef %[[V4]])
// IBM: call void @llvm.va_end(ptr %[[AP]])
// IBM: call void @llvm.va_end.p0(ptr %[[AP]])
void long_double(int n, ...) {
va_list ap;
va_start(ap, n);
Expand All @@ -92,7 +92,7 @@ void long_double(int n, ...) {
}

// IEEE-LABEL: define{{.*}} void @long_double_struct
// IEEE: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
// IEEE: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
// IEEE: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]]
// IEEE: %[[P0:[0-9a-zA-Z_.]+]] = ptrtoint ptr %[[CUR]] to i64
// IEEE: %[[P1:[0-9a-zA-Z_.]+]] = add i64 %[[P0]], 15
Expand All @@ -104,7 +104,7 @@ void long_double(int n, ...) {
// IEEE: %[[COERCE:[0-9a-zA-Z_.]+]] = getelementptr inbounds %struct.ldbl128_s, ptr %[[TMP]], i32 0, i32 0
// IEEE: %[[V4:[0-9a-zA-Z_.]+]] = load fp128, ptr %[[COERCE]], align 16
// IEEE: call void @foo_ls(fp128 inreg %[[V4]])
// IEEE: call void @llvm.va_end(ptr %[[AP]])
// IEEE: call void @llvm.va_end.p0(ptr %[[AP]])
void long_double_struct(int n, ...) {
va_list ap;
va_start(ap, n);
Expand Down
16 changes: 8 additions & 8 deletions clang/test/CodeGen/RISCV/riscv32-ilp32-ilp32f-ilp32d-abi.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -249,13 +249,13 @@ void f_va_caller(void) {
// CHECK: [[VA:%.*]] = alloca ptr, align 4
// CHECK: [[V:%.*]] = alloca i32, align 4
// CHECK: store ptr %fmt, ptr [[FMT_ADDR]], align 4
// CHECK: call void @llvm.va_start(ptr [[VA]])
// CHECK: call void @llvm.va_start.p0(ptr [[VA]])
// CHECK: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
// CHECK: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4
// CHECK: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
// CHECK: [[TMP1:%.*]] = load i32, ptr [[ARGP_CUR]], align 4
// CHECK: store i32 [[TMP1]], ptr [[V]], align 4
// CHECK: call void @llvm.va_end(ptr [[VA]])
// CHECK: call void @llvm.va_end.p0(ptr [[VA]])
// CHECK: [[TMP2:%.*]] = load i32, ptr [[V]], align 4
// CHECK: ret i32 [[TMP2]]
// CHECK: }
Expand All @@ -278,7 +278,7 @@ int f_va_1(char *fmt, ...) {
// CHECK-NEXT: [[VA:%.*]] = alloca ptr, align 4
// CHECK-NEXT: [[V:%.*]] = alloca double, align 8
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
// CHECK-NEXT: call void @llvm.va_start(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
// CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[ARGP_CUR]] to i32
// CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 7
Expand All @@ -288,7 +288,7 @@ int f_va_1(char *fmt, ...) {
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
// CHECK-NEXT: [[TMP4:%.*]] = load double, ptr [[ARGP_CUR_ALIGNED]], align 8
// CHECK-NEXT: store double [[TMP4]], ptr [[V]], align 8
// CHECK-NEXT: call void @llvm.va_end(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
// CHECK-NEXT: [[TMP5:%.*]] = load double, ptr [[V]], align 8
// CHECK-NEXT: ret double [[TMP5]]
double f_va_2(char *fmt, ...) {
Expand All @@ -310,7 +310,7 @@ double f_va_2(char *fmt, ...) {
// CHECK-NEXT: [[W:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[X:%.*]] = alloca double, align 8
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
// CHECK-NEXT: call void @llvm.va_start(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
// CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[ARGP_CUR]] to i32
// CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 7
Expand All @@ -334,7 +334,7 @@ double f_va_2(char *fmt, ...) {
// CHECK-NEXT: store ptr [[ARGP_NEXT5]], ptr [[VA]], align 4
// CHECK-NEXT: [[TMP11:%.*]] = load double, ptr [[ARGP_CUR4_ALIGNED]], align 8
// CHECK-NEXT: store double [[TMP11]], ptr [[X]], align 8
// CHECK-NEXT: call void @llvm.va_end(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
// CHECK-NEXT: [[TMP12:%.*]] = load double, ptr [[V]], align 8
// CHECK-NEXT: [[TMP13:%.*]] = load double, ptr [[X]], align 8
// CHECK-NEXT: [[ADD:%.*]] = fadd double [[TMP12]], [[TMP13]]
Expand All @@ -361,7 +361,7 @@ double f_va_3(char *fmt, ...) {
// CHECK-NEXT: [[LS:%.*]] = alloca [[STRUCT_LARGE:%.*]], align 4
// CHECK-NEXT: [[RET:%.*]] = alloca i32, align 4
// CHECK-NEXT: store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
// CHECK-NEXT: call void @llvm.va_start(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_start.p0(ptr [[VA]])
// CHECK-NEXT: [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4
// CHECK-NEXT: store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
Expand All @@ -386,7 +386,7 @@ double f_va_3(char *fmt, ...) {
// CHECK-NEXT: store ptr [[ARGP_NEXT9]], ptr [[VA]], align 4
// CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[ARGP_CUR8]], align 4
// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[LS]], ptr align 4 [[TMP12]], i32 16, i1 false)
// CHECK-NEXT: call void @llvm.va_end(ptr [[VA]])
// CHECK-NEXT: call void @llvm.va_end.p0(ptr [[VA]])
int f_va_4(char *fmt, ...) {
__builtin_va_list va;

Expand Down
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