diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index e1a36968f974..c26bff2654c2 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -739,13 +739,17 @@ EncompassingIntegerType(ArrayRef<struct WidthAndSignedness> Types) {
 }
 
 Value *CodeGenFunction::EmitVAStartEnd(Value *ArgValue, bool IsStart) {
-  llvm::Type *DestType = Int8PtrTy;
-  if (ArgValue->getType() != DestType)
+  llvm::PointerType *DestType = Int8PtrTy;
+  if (getLangOpts().Cheerp) {
+    DestType = llvm::PointerType::getWithSamePointeeType(DestType, ArgValue->getType()->getPointerAddressSpace());
+  }
+  if (ArgValue->getType() != DestType) {
     ArgValue =
         Builder.CreateBitCast(ArgValue, DestType, ArgValue->getName().data());
+  }
 
   Intrinsic::ID inst = IsStart ? Intrinsic::vastart : Intrinsic::vaend;
-  return Builder.CreateCall(CGM.getIntrinsic(inst), ArgValue);
+  return Builder.CreateCall(CGM.getIntrinsic(inst, {DestType}), ArgValue);
 }
 
 /// Checks if using the result of __builtin_object_size(p, @p From) in place of
@@ -2548,11 +2552,14 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
     Value *DstPtr = EmitVAListRef(E->getArg(0)).getPointer();
     Value *SrcPtr = EmitVAListRef(E->getArg(1)).getPointer();
 
-    llvm::Type *Type = Int8PtrTy;
+    llvm::PointerType *Type = Int8PtrTy;
 
+    if (getLangOpts().Cheerp) {
+      Type = llvm::PointerType::getWithSamePointeeType(Type, SrcPtr->getType()->getPointerAddressSpace());
+    }
     DstPtr = Builder.CreateBitCast(DstPtr, Type);
     SrcPtr = Builder.CreateBitCast(SrcPtr, Type);
-    Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy), {DstPtr, SrcPtr});
+    Builder.CreateCall(CGM.getIntrinsic(Intrinsic::vacopy, {Type, Type}), {DstPtr, SrcPtr});
     return RValue::get(nullptr);
   }
   case Builtin::BI__builtin_abs:
diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index 021113999566..e23dcfb1f208 100644
--- a/clang/lib/Sema/SemaExpr.cpp
+++ b/clang/lib/Sema/SemaExpr.cpp
@@ -6455,7 +6455,8 @@ static FunctionDecl *rewriteBuiltinFunctionDecl(Sema *Sema, ASTContext &Context,
   QualType DeclType = FDecl->getType();
   const FunctionProtoType *FT = dyn_cast<FunctionProtoType>(DeclType);
 
-  if (!Context.BuiltinInfo.hasPtrArgsOrResult(FDecl->getBuiltinID()) || !FT ||
+  if (!(Context.BuiltinInfo.hasPtrArgsOrResult(FDecl->getBuiltinID()) ||
+        Context.BuiltinInfo.hasReferenceArgsOrResult(FDecl->getBuiltinID())) || !FT ||
       ArgExprs.size() < FT->getNumParams())
     return nullptr;
 
@@ -6472,9 +6473,12 @@ static FunctionDecl *rewriteBuiltinFunctionDecl(Sema *Sema, ASTContext &Context,
       return nullptr;
     Expr *Arg = ArgRes.get();
     QualType ArgType = Arg->getType();
-    if (!ParamType->isPointerType() ||
+    auto isPointerOrRef = [](QualType Ty) {
+      return Ty->isPointerType() || Ty->isReferenceType();
+    };
+    if (!isPointerOrRef(ParamType) ||
         ParamType.hasAddressSpace() ||
-        !ArgType->isPointerType() ||
+        !isPointerOrRef(ArgType) ||
         !ArgType->getPointeeType().hasAddressSpace()) {
       OverloadParams.push_back(ParamType);
       continue;
@@ -6488,7 +6492,14 @@ static FunctionDecl *rewriteBuiltinFunctionDecl(Sema *Sema, ASTContext &Context,
     LangAS AS = ArgType->getPointeeType().getAddressSpace();
 
     PointeeType = Context.getAddrSpaceQualType(PointeeType, AS);
-    OverloadParams.push_back(Context.getPointerType(PointeeType));
+    QualType Type;
+    if (ParamType->isPointerType()) {
+      Type = Context.getPointerType(PointeeType);
+    } else {
+      assert(ParamType->isReferenceType());
+      Type = Context.getLValueReferenceType(PointeeType);
+    }
+    OverloadParams.push_back(Type);
   }
 
   if (!NeedsNewDecl)
@@ -16815,8 +16826,9 @@ ExprResult Sema::BuildVAArgExpr(SourceLocation BuiltinLoc,
     }
   }
 
+  QualType ETyNoAS = Context.removeAddrSpaceQualType(E->getType());
   if (!IsMS && !E->isTypeDependent() &&
-      !Context.hasSameType(VaListType, E->getType()))
+      !Context.hasSameType(VaListType, ETyNoAS))
     return ExprError(
         Diag(E->getBeginLoc(),
              diag::err_first_argument_to_va_arg_not_of_type_va_list)
diff --git a/clang/test/CodeGen/CSKY/csky-abi.c b/clang/test/CodeGen/CSKY/csky-abi.c
index a24d4d8d6407..525c2b979dc6 100644
--- a/clang/test/CodeGen/CSKY/csky-abi.c
+++ b/clang/test/CodeGen/CSKY/csky-abi.c
@@ -185,13 +185,13 @@ void f_va_caller(void) {
 // CHECK:   [[VA:%.*]] = alloca ptr, align 4
 // CHECK:   [[V:%.*]] = alloca i32, align 4
 // CHECK:   store ptr %fmt, ptr [[FMT_ADDR]], align 4
-// CHECK:   call void @llvm.va_start(ptr [[VA]])
+// CHECK:   call void @llvm.va_start.p0(ptr [[VA]])
 // CHECK:   [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
 // CHECK:   [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4
 // CHECK:   store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
 // CHECK:   [[TMP1:%.*]] = load i32, ptr [[ARGP_CUR]], align 4
 // CHECK:   store i32 [[TMP1]], ptr [[V]], align 4
-// CHECK:   call void @llvm.va_end(ptr [[VA]])
+// CHECK:   call void @llvm.va_end.p0(ptr [[VA]])
 // CHECK:   [[TMP2:%.*]] = load i32, ptr [[V]], align 4
 // CHECK:   ret i32 [[TMP2]]
 // CHECK: }
@@ -210,13 +210,13 @@ int f_va_1(char *fmt, ...) {
 // CHECK-NEXT:    [[VA:%.*]] = alloca ptr, align 4
 // CHECK-NEXT:    [[V:%.*]] = alloca double, align 4
 // CHECK-NEXT:    store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
-// CHECK-NEXT:    call void @llvm.va_start(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
 // CHECK-NEXT:    [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 8
 // CHECK-NEXT:    store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
 // CHECK-NEXT:    [[TMP4:%.*]] = load double, ptr [[ARGP_CUR]], align 4
 // CHECK-NEXT:    store double [[TMP4]], ptr [[V]], align 4
-// CHECK-NEXT:    call void @llvm.va_end(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
 // CHECK-NEXT:    [[TMP5:%.*]] = load double, ptr [[V]], align 4
 // CHECK-NEXT:    ret double [[TMP5]]
 double f_va_2(char *fmt, ...) {
@@ -236,7 +236,7 @@ double f_va_2(char *fmt, ...) {
 // CHECK-NEXT:    [[W:%.*]] = alloca i32, align 4
 // CHECK-NEXT:    [[X:%.*]] = alloca double, align 4
 // CHECK-NEXT:    store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
-// CHECK-NEXT:    call void @llvm.va_start(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
 // CHECK-NEXT:    [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 8
 // CHECK-NEXT:    store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
@@ -252,7 +252,7 @@ double f_va_2(char *fmt, ...) {
 // CHECK-NEXT:    store ptr [[ARGP_NEXT5]], ptr [[VA]], align 4
 // CHECK-NEXT:    [[TMP11:%.*]] = load double, ptr [[ARGP_CUR4]], align 4
 // CHECK-NEXT:    store double [[TMP11]], ptr [[X]], align 4
-// CHECK-NEXT:    call void @llvm.va_end(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
 // CHECK-NEXT:    [[TMP12:%.*]] = load double, ptr [[V]], align 4
 // CHECK-NEXT:    [[TMP13:%.*]] = load double, ptr [[X]], align 4
 // CHECK-NEXT:    [[ADD:%.*]] = fadd double [[TMP12]], [[TMP13]]
@@ -279,7 +279,7 @@ double f_va_3(char *fmt, ...) {
 // CHECK-NEXT:    [[LS:%.*]] = alloca [[STRUCT_LARGE:%.*]], align 4
 // CHECK-NEXT:    [[RET:%.*]] = alloca i32, align 4
 // CHECK-NEXT:    store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
-// CHECK-NEXT:    call void @llvm.va_start(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
 // CHECK-NEXT:    [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4
 // CHECK-NEXT:    store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
@@ -302,7 +302,7 @@ double f_va_3(char *fmt, ...) {
 // CHECK-NEXT:    [[ARGP_NEXT9:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR8]], i32 16
 // CHECK-NEXT:    store ptr [[ARGP_NEXT9]], ptr [[VA]], align 4
 // CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[LS]], ptr align 4 [[ARGP_CUR8]], i32 16, i1 false)
-// CHECK-NEXT:    call void @llvm.va_end(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
 int f_va_4(char *fmt, ...) {
   __builtin_va_list va;
 
diff --git a/clang/test/CodeGen/LoongArch/abi-lp64d.c b/clang/test/CodeGen/LoongArch/abi-lp64d.c
index 66b480a7f068..fc7f1eada586 100644
--- a/clang/test/CodeGen/LoongArch/abi-lp64d.c
+++ b/clang/test/CodeGen/LoongArch/abi-lp64d.c
@@ -449,13 +449,13 @@ void f_va_caller(void) {
 // CHECK-NEXT:    [[VA:%.*]] = alloca ptr, align 8
 // CHECK-NEXT:    [[V:%.*]] = alloca i32, align 4
 // CHECK-NEXT:    store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 8
-// CHECK-NEXT:    call void @llvm.va_start(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8
 // CHECK-NEXT:    [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i64 8
 // CHECK-NEXT:    store ptr [[ARGP_NEXT]], ptr [[VA]], align 8
 // CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr [[ARGP_CUR]], align 8
 // CHECK-NEXT:    store i32 [[TMP0]], ptr [[V]], align 4
-// CHECK-NEXT:    call void @llvm.va_end(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
 // CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[V]], align 4
 // CHECK-NEXT:    ret i32 [[TMP1]]
 int f_va_int(char *fmt, ...) {
diff --git a/clang/test/CodeGen/PowerPC/aix-altivec-vaargs.c b/clang/test/CodeGen/PowerPC/aix-altivec-vaargs.c
index 4eea05213519..4423736412de 100644
--- a/clang/test/CodeGen/PowerPC/aix-altivec-vaargs.c
+++ b/clang/test/CodeGen/PowerPC/aix-altivec-vaargs.c
@@ -18,7 +18,7 @@ vector double vector_varargs(int count, ...) {
 
 // CHECK:         %arg_list = alloca i8*
 // CHECK:         %arg_list1 = bitcast i8** %arg_list to i8*
-// CHECK:         call void @llvm.va_start(i8* %arg_list1)
+// CHECK:         call void @llvm.va_start.p0(i8* %arg_list1)
 
 // AIX32:       for.body:
 // AIX32-NEXT:    %argp.cur = load i8*, i8** %arg_list, align 4
@@ -49,4 +49,4 @@ vector double vector_varargs(int count, ...) {
 
 // CHECK:      for.end:
 // CHECK:        %arg_list2 = bitcast i8** %arg_list to i8*
-// CHECK:        call void @llvm.va_end(i8* %arg_list2)
+// CHECK:        call void @llvm.va_end.p0(i8* %arg_list2)
diff --git a/clang/test/CodeGen/PowerPC/aix-vaargs.c b/clang/test/CodeGen/PowerPC/aix-vaargs.c
index a67498bba1d1..ed30f8c067a7 100644
--- a/clang/test/CodeGen/PowerPC/aix-vaargs.c
+++ b/clang/test/CodeGen/PowerPC/aix-vaargs.c
@@ -36,7 +36,7 @@ void testva (int n, ...) {
 // CHECK-NEXT:  %v = alloca i32, align 4
 // CHECK-NEXT:  store i32 %n, i32* %n.addr, align 4
 // CHECK-NEXT:  %ap1 = bitcast i8** %ap to i8*
-// CHECK-NEXT:  call void @llvm.va_start(i8* %ap1)
+// CHECK-NEXT:  call void @llvm.va_start.p0(i8* %ap1)
 
 // AIX32-NEXT:  %argp.cur = load i8*, i8** %ap, align 4
 // AIX32-NEXT:  %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 16
@@ -54,7 +54,7 @@ void testva (int n, ...) {
 
 // CHECK-NEXT:  %3 = bitcast i8** %ap2 to i8*
 // CHECK-NEXT:  %4 = bitcast i8** %ap to i8*
-// CHECK-NEXT:  call void @llvm.va_copy(i8* %3, i8* %4)
+// CHECK-NEXT:  call void @llvm.va_copy.p0.p0(i8* %3, i8* %4)
 
 // AIX32-NEXT:  %argp.cur2 = load i8*, i8** %ap2, align 4
 // AIX32-NEXT:  %argp.next3 = getelementptr inbounds i8, i8* %argp.cur2, i32 4
@@ -71,15 +71,15 @@ void testva (int n, ...) {
 // AIX64-NEXT:  store i32 %7, i32* %v, align 4
 
 // CHECK-NEXT:  %ap24 = bitcast i8** %ap2 to i8*
-// CHECK-NEXT:  call void @llvm.va_end(i8* %ap24)
+// CHECK-NEXT:  call void @llvm.va_end.p0(i8* %ap24)
 // CHECK-NEXT:  %ap5 = bitcast i8** %ap to i8*
-// CHECK-NEXT:  call void @llvm.va_end(i8* %ap5)
+// CHECK-NEXT:  call void @llvm.va_end.p0(i8* %ap5)
 // CHECK-NEXT:  ret void
 
-// CHECK: declare void @llvm.va_start(i8*)
+// CHECK: declare void @llvm.va_start.p0(i8*)
 
 // AIX32: declare void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i32, i1 immarg)
 // AIX64: declare void @llvm.memcpy.p0i8.p0i8.i64(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i64, i1 immarg)
 
-// CHECK: declare void @llvm.va_copy(i8*, i8*)
-// CHECK: declare void @llvm.va_end(i8*)
+// CHECK: declare void @llvm.va_copy.p0.p0(i8*, i8*)
+// CHECK: declare void @llvm.va_end.p0(i8*)
diff --git a/clang/test/CodeGen/PowerPC/ppc64le-varargs-f128.c b/clang/test/CodeGen/PowerPC/ppc64le-varargs-f128.c
index 50b3c0451bd8..ebaf4973321a 100644
--- a/clang/test/CodeGen/PowerPC/ppc64le-varargs-f128.c
+++ b/clang/test/CodeGen/PowerPC/ppc64le-varargs-f128.c
@@ -31,7 +31,7 @@ void foo_ls(ldbl128_s);
 // OMP-TARGET: call void @foo_ld(ppc_fp128 noundef %[[V3]])
 
 // OMP-HOST-LABEL: define{{.*}} void @omp(
-// OMP-HOST: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
+// OMP-HOST: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
 // OMP-HOST: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]], align 8
 // OMP-HOST: %[[V0:[0-9a-zA-Z_.]+]] = ptrtoint ptr %[[CUR]] to i64
 // OMP-HOST: %[[V1:[0-9a-zA-Z_.]+]] = add i64 %[[V0]], 15
@@ -51,7 +51,7 @@ void omp(int n, ...) {
 }
 
 // IEEE-LABEL: define{{.*}} void @f128
-// IEEE: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
+// IEEE: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
 // IEEE: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]]
 // IEEE: %[[V0:[0-9a-zA-Z_.]+]] = ptrtoint ptr %[[CUR]] to i64
 // IEEE: %[[V1:[0-9a-zA-Z_.]+]] = add i64 %[[V0]], 15
@@ -59,7 +59,7 @@ void omp(int n, ...) {
 // IEEE: %[[ALIGN:[0-9a-zA-Z_.]+]] = inttoptr i64 %[[V2]] to ptr
 // IEEE: %[[V4:[0-9a-zA-Z_.]+]] = load fp128, ptr %[[ALIGN]], align 16
 // IEEE: call void @foo_fq(fp128 noundef %[[V4]])
-// IEEE: call void @llvm.va_end(ptr %[[AP]])
+// IEEE: call void @llvm.va_end.p0(ptr %[[AP]])
 void f128(int n, ...) {
   va_list ap;
   va_start(ap, n);
@@ -68,7 +68,7 @@ void f128(int n, ...) {
 }
 
 // IEEE-LABEL: define{{.*}} void @long_double
-// IEEE: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
+// IEEE: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
 // IEEE: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]]
 // IEEE: %[[V0:[0-9a-zA-Z_.]+]] = ptrtoint ptr %[[CUR]] to i64
 // IEEE: %[[V1:[0-9a-zA-Z_.]+]] = add i64 %[[V0]], 15
@@ -76,14 +76,14 @@ void f128(int n, ...) {
 // IEEE: %[[ALIGN:[0-9a-zA-Z_.]+]] = inttoptr i64 %[[V2]] to ptr
 // IEEE: %[[V4:[0-9a-zA-Z_.]+]] = load fp128, ptr %[[ALIGN]], align 16
 // IEEE: call void @foo_ld(fp128 noundef %[[V4]])
-// IEEE: call void @llvm.va_end(ptr %[[AP]])
+// IEEE: call void @llvm.va_end.p0(ptr %[[AP]])
 
 // IBM-LABEL: define{{.*}} void @long_double
-// IBM: call void @llvm.va_start(ptr  %[[AP:[0-9a-zA-Z_.]+]])
+// IBM: call void @llvm.va_start.p0(ptr  %[[AP:[0-9a-zA-Z_.]+]])
 // IBM: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]]
 // IBM: %[[V4:[0-9a-zA-Z_.]+]] = load ppc_fp128, ptr %[[CUR]], align 8
 // IBM: call void @foo_ld(ppc_fp128 noundef %[[V4]])
-// IBM: call void @llvm.va_end(ptr %[[AP]])
+// IBM: call void @llvm.va_end.p0(ptr %[[AP]])
 void long_double(int n, ...) {
   va_list ap;
   va_start(ap, n);
@@ -92,7 +92,7 @@ void long_double(int n, ...) {
 }
 
 // IEEE-LABEL: define{{.*}} void @long_double_struct
-// IEEE: call void @llvm.va_start(ptr %[[AP:[0-9a-zA-Z_.]+]])
+// IEEE: call void @llvm.va_start.p0(ptr %[[AP:[0-9a-zA-Z_.]+]])
 // IEEE: %[[CUR:[0-9a-zA-Z_.]+]] = load ptr, ptr %[[AP]]
 // IEEE: %[[P0:[0-9a-zA-Z_.]+]] = ptrtoint ptr %[[CUR]] to i64
 // IEEE: %[[P1:[0-9a-zA-Z_.]+]] = add i64 %[[P0]], 15
@@ -104,7 +104,7 @@ void long_double(int n, ...) {
 // IEEE: %[[COERCE:[0-9a-zA-Z_.]+]] = getelementptr inbounds %struct.ldbl128_s, ptr %[[TMP]], i32 0, i32 0
 // IEEE: %[[V4:[0-9a-zA-Z_.]+]] = load fp128, ptr %[[COERCE]], align 16
 // IEEE: call void @foo_ls(fp128 inreg %[[V4]])
-// IEEE: call void @llvm.va_end(ptr %[[AP]])
+// IEEE: call void @llvm.va_end.p0(ptr %[[AP]])
 void long_double_struct(int n, ...) {
   va_list ap;
   va_start(ap, n);
diff --git a/clang/test/CodeGen/RISCV/riscv32-ilp32-ilp32f-ilp32d-abi.c b/clang/test/CodeGen/RISCV/riscv32-ilp32-ilp32f-ilp32d-abi.c
index c2203774392f..f921f8f45465 100644
--- a/clang/test/CodeGen/RISCV/riscv32-ilp32-ilp32f-ilp32d-abi.c
+++ b/clang/test/CodeGen/RISCV/riscv32-ilp32-ilp32f-ilp32d-abi.c
@@ -249,13 +249,13 @@ void f_va_caller(void) {
 // CHECK:   [[VA:%.*]] = alloca ptr, align 4
 // CHECK:   [[V:%.*]] = alloca i32, align 4
 // CHECK:   store ptr %fmt, ptr [[FMT_ADDR]], align 4
-// CHECK:   call void @llvm.va_start(ptr [[VA]])
+// CHECK:   call void @llvm.va_start.p0(ptr [[VA]])
 // CHECK:   [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
 // CHECK:   [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4
 // CHECK:   store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
 // CHECK:   [[TMP1:%.*]] = load i32, ptr [[ARGP_CUR]], align 4
 // CHECK:   store i32 [[TMP1]], ptr [[V]], align 4
-// CHECK:   call void @llvm.va_end(ptr [[VA]])
+// CHECK:   call void @llvm.va_end.p0(ptr [[VA]])
 // CHECK:   [[TMP2:%.*]] = load i32, ptr [[V]], align 4
 // CHECK:   ret i32 [[TMP2]]
 // CHECK: }
@@ -278,7 +278,7 @@ int f_va_1(char *fmt, ...) {
 // CHECK-NEXT:    [[VA:%.*]] = alloca ptr, align 4
 // CHECK-NEXT:    [[V:%.*]] = alloca double, align 8
 // CHECK-NEXT:    store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
-// CHECK-NEXT:    call void @llvm.va_start(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
 // CHECK-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[ARGP_CUR]] to i32
 // CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[TMP0]], 7
@@ -288,7 +288,7 @@ int f_va_1(char *fmt, ...) {
 // CHECK-NEXT:    store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
 // CHECK-NEXT:    [[TMP4:%.*]] = load double, ptr [[ARGP_CUR_ALIGNED]], align 8
 // CHECK-NEXT:    store double [[TMP4]], ptr [[V]], align 8
-// CHECK-NEXT:    call void @llvm.va_end(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
 // CHECK-NEXT:    [[TMP5:%.*]] = load double, ptr [[V]], align 8
 // CHECK-NEXT:    ret double [[TMP5]]
 double f_va_2(char *fmt, ...) {
@@ -310,7 +310,7 @@ double f_va_2(char *fmt, ...) {
 // CHECK-NEXT:    [[W:%.*]] = alloca i32, align 4
 // CHECK-NEXT:    [[X:%.*]] = alloca double, align 8
 // CHECK-NEXT:    store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
-// CHECK-NEXT:    call void @llvm.va_start(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
 // CHECK-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[ARGP_CUR]] to i32
 // CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[TMP0]], 7
@@ -334,7 +334,7 @@ double f_va_2(char *fmt, ...) {
 // CHECK-NEXT:    store ptr [[ARGP_NEXT5]], ptr [[VA]], align 4
 // CHECK-NEXT:    [[TMP11:%.*]] = load double, ptr [[ARGP_CUR4_ALIGNED]], align 8
 // CHECK-NEXT:    store double [[TMP11]], ptr [[X]], align 8
-// CHECK-NEXT:    call void @llvm.va_end(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
 // CHECK-NEXT:    [[TMP12:%.*]] = load double, ptr [[V]], align 8
 // CHECK-NEXT:    [[TMP13:%.*]] = load double, ptr [[X]], align 8
 // CHECK-NEXT:    [[ADD:%.*]] = fadd double [[TMP12]], [[TMP13]]
@@ -361,7 +361,7 @@ double f_va_3(char *fmt, ...) {
 // CHECK-NEXT:    [[LS:%.*]] = alloca [[STRUCT_LARGE:%.*]], align 4
 // CHECK-NEXT:    [[RET:%.*]] = alloca i32, align 4
 // CHECK-NEXT:    store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 4
-// CHECK-NEXT:    call void @llvm.va_start(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 4
 // CHECK-NEXT:    [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i32 4
 // CHECK-NEXT:    store ptr [[ARGP_NEXT]], ptr [[VA]], align 4
@@ -386,7 +386,7 @@ double f_va_3(char *fmt, ...) {
 // CHECK-NEXT:    store ptr [[ARGP_NEXT9]], ptr [[VA]], align 4
 // CHECK-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[ARGP_CUR8]], align 4
 // CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[LS]], ptr align 4 [[TMP12]], i32 16, i1 false)
-// CHECK-NEXT:    call void @llvm.va_end(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
 int f_va_4(char *fmt, ...) {
   __builtin_va_list va;
 
diff --git a/clang/test/CodeGen/RISCV/riscv64-lp64-lp64f-lp64d-abi.c b/clang/test/CodeGen/RISCV/riscv64-lp64-lp64f-lp64d-abi.c
index acaf1487080d..409dee5f6457 100644
--- a/clang/test/CodeGen/RISCV/riscv64-lp64-lp64f-lp64d-abi.c
+++ b/clang/test/CodeGen/RISCV/riscv64-lp64-lp64f-lp64d-abi.c
@@ -246,13 +246,13 @@ void f_va_caller(void) {
 // CHECK:   [[VA:%.*]] = alloca ptr, align 8
 // CHECK:   [[V:%.*]] = alloca i32, align 4
 // CHECK:   store ptr %fmt, ptr [[FMT_ADDR]], align 8
-// CHECK:   call void @llvm.va_start(ptr [[VA]])
+// CHECK:   call void @llvm.va_start.p0(ptr [[VA]])
 // CHECK:   [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8
 // CHECK:   [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i64 8
 // CHECK:   store ptr [[ARGP_NEXT]], ptr [[VA]], align 8
 // CHECK:   [[TMP1:%.*]] = load i32, ptr [[ARGP_CUR]], align 8
 // CHECK:   store i32 [[TMP1]], ptr [[V]], align 4
-// CHECK:   call void @llvm.va_end(ptr [[VA]])
+// CHECK:   call void @llvm.va_end.p0(ptr [[VA]])
 // CHECK:   [[TMP2:%.*]] = load i32, ptr [[V]], align 4
 // CHECK:   ret i32 [[TMP2]]
 // CHECK: }
@@ -275,7 +275,7 @@ int f_va_1(char *fmt, ...) {
 // CHECK-NEXT:    [[VA:%.*]] = alloca ptr, align 8
 // CHECK-NEXT:    [[V:%.*]] = alloca fp128, align 16
 // CHECK-NEXT:    store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 8
-// CHECK-NEXT:    call void @llvm.va_start(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8
 // CHECK-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[ARGP_CUR]] to i64
 // CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[TMP0]], 15
@@ -285,7 +285,7 @@ int f_va_1(char *fmt, ...) {
 // CHECK-NEXT:    store ptr [[ARGP_NEXT]], ptr [[VA]], align 8
 // CHECK-NEXT:    [[TMP4:%.*]] = load fp128, ptr [[ARGP_CUR_ALIGNED]], align 16
 // CHECK-NEXT:    store fp128 [[TMP4]], ptr [[V]], align 16
-// CHECK-NEXT:    call void @llvm.va_end(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
 // CHECK-NEXT:    [[TMP5:%.*]] = load fp128, ptr [[V]], align 16
 // CHECK-NEXT:    ret fp128 [[TMP5]]
 long double f_va_2(char *fmt, ...) {
@@ -307,7 +307,7 @@ long double f_va_2(char *fmt, ...) {
 // CHECK-NEXT:    [[W:%.*]] = alloca i32, align 4
 // CHECK-NEXT:    [[X:%.*]] = alloca fp128, align 16
 // CHECK-NEXT:    store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 8
-// CHECK-NEXT:    call void @llvm.va_start(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8
 // CHECK-NEXT:    [[TMP0:%.*]] = ptrtoint ptr [[ARGP_CUR]] to i64
 // CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[TMP0]], 15
@@ -331,7 +331,7 @@ long double f_va_2(char *fmt, ...) {
 // CHECK-NEXT:    store ptr [[ARGP_NEXT5]], ptr [[VA]], align 8
 // CHECK-NEXT:    [[TMP11:%.*]] = load fp128, ptr [[ARGP_CUR4_ALIGNED]], align 16
 // CHECK-NEXT:    store fp128 [[TMP11]], ptr [[X]], align 16
-// CHECK-NEXT:    call void @llvm.va_end(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
 // CHECK-NEXT:    [[TMP12:%.*]] = load fp128, ptr [[V]], align 16
 // CHECK-NEXT:    [[TMP13:%.*]] = load fp128, ptr [[X]], align 16
 // CHECK-NEXT:    [[ADD:%.*]] = fadd fp128 [[TMP12]], [[TMP13]]
@@ -357,7 +357,7 @@ long double f_va_3(char *fmt, ...) {
 // CHECK-NEXT:    [[LS:%.*]] = alloca [[STRUCT_LARGE:%.*]], align 8
 // CHECK-NEXT:    [[RET:%.*]] = alloca i32, align 4
 // CHECK-NEXT:    store ptr [[FMT:%.*]], ptr [[FMT_ADDR]], align 8
-// CHECK-NEXT:    call void @llvm.va_start(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]])
 // CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[VA]], align 8
 // CHECK-NEXT:    [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, ptr [[ARGP_CUR]], i64 8
 // CHECK-NEXT:    store ptr [[ARGP_NEXT]], ptr [[VA]], align 8
@@ -376,7 +376,7 @@ long double f_va_3(char *fmt, ...) {
 // CHECK-NEXT:    store ptr [[ARGP_NEXT7]], ptr [[VA]], align 8
 // CHECK-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[ARGP_CUR6]], align 8
 // CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[LS]], ptr align 8 [[TMP9]], i64 32, i1 false)
-// CHECK-NEXT:    call void @llvm.va_end(ptr [[VA]])
+// CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VA]])
 // CHECK-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_TINY]], ptr [[TS]], i32 0, i32 0
 // CHECK-NEXT:    [[TMP12:%.*]] = load i16, ptr [[A]], align 2
 // CHECK-NEXT:    [[CONV:%.*]] = zext i16 [[TMP12]] to i64
diff --git a/clang/test/CodeGen/WebAssembly/wasm-varargs.c b/clang/test/CodeGen/WebAssembly/wasm-varargs.c
index 91840c296096..5fae6dab9cb3 100644
--- a/clang/test/CodeGen/WebAssembly/wasm-varargs.c
+++ b/clang/test/CodeGen/WebAssembly/wasm-varargs.c
@@ -18,7 +18,7 @@ int test_i32(char *fmt, ...) {
 // CHECK:   [[V:%[^,=]+]] = alloca i32, align 4
 // CHECK:   store i8* %fmt, i8** [[FMT_ADDR]], align 4
 // CHECK:   [[VA1:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK:   call void @llvm.va_start(i8* [[VA1]])
+// CHECK:   call void @llvm.va_start.p0i8(i8* [[VA1]])
 // CHECK:   [[ARGP_CUR:%[^,=]+]] = load i8*, i8** [[VA]], align 4
 // CHECK:   [[ARGP_NEXT:%[^,=]+]] = getelementptr inbounds i8, i8* [[ARGP_CUR]], i32 4
 // CHECK:   store i8* [[ARGP_NEXT]], i8** [[VA]], align 4
@@ -26,7 +26,7 @@ int test_i32(char *fmt, ...) {
 // CHECK:   [[R4:%[^,=]+]] = load i32, i32* [[R3]], align 4
 // CHECK:   store i32 [[R4]], i32* [[V]], align 4
 // CHECK:   [[VA2:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK:   call void @llvm.va_end(i8* [[VA2]])
+// CHECK:   call void @llvm.va_end.p0i8(i8* [[VA2]])
 // CHECK:   [[R5:%[^,=]+]] = load i32, i32* [[V]], align 4
 // CHECK:   ret i32 [[R5]]
 // CHECK: }
@@ -47,7 +47,7 @@ long long test_i64(char *fmt, ...) {
 // CHECK:   [[V:%[^,=]+]] = alloca i64, align 8
 // CHECK:   store i8* %fmt, i8** [[FMT_ADDR]], align 4
 // CHECK:   [[VA1:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK:   call void @llvm.va_start(i8* [[VA1]])
+// CHECK:   call void @llvm.va_start.p0i8(i8* [[VA1]])
 // CHECK:   [[ARGP_CUR:%[^,=]+]] = load i8*, i8** [[VA]], align 4
 // CHECK:   [[R0:%[^,=]+]] = ptrtoint i8* [[ARGP_CUR]] to i32
 // CHECK:   [[R1:%[^,=]+]] = add i32 [[R0]], 7
@@ -59,7 +59,7 @@ long long test_i64(char *fmt, ...) {
 // CHECK:   [[R4:%[^,=]+]] = load i64, i64* [[R3]], align 8
 // CHECK:   store i64 [[R4]], i64* [[V]], align 8
 // CHECK:   [[VA2:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK:   call void @llvm.va_end(i8* [[VA2]])
+// CHECK:   call void @llvm.va_end.p0i8(i8* [[VA2]])
 // CHECK:   [[R5:%[^,=]+]] = load i64, i64* [[V]], align 8
 // CHECK:   ret i64 [[R5]]
 // CHECK: }
@@ -85,7 +85,7 @@ struct S test_struct(char *fmt, ...) {
 // CHECK-NEXT:   [[VA:%[^,=]+]] = alloca i8*, align 4
 // CHECK-NEXT:   store i8* %fmt, i8** [[FMT_ADDR]], align 4
 // CHECK-NEXT:   [[VA1:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK-NEXT:   call void @llvm.va_start(i8* [[VA1]])
+// CHECK-NEXT:   call void @llvm.va_start.p0i8(i8* [[VA1]])
 // CHECK-NEXT:   [[ARGP_CUR:%[^,=]+]] = load i8*, i8** [[VA]], align 4
 // CHECK-NEXT:   [[ARGP_NEXT:%[^,=]+]] = getelementptr inbounds i8, i8* [[ARGP_CUR]], i32 4
 // CHECK-NEXT:   store i8* [[ARGP_NEXT]], i8** [[VA]], align 4
@@ -95,7 +95,7 @@ struct S test_struct(char *fmt, ...) {
 // CHECK-NEXT:   [[R6:%[^,=]+]] = bitcast [[STRUCT_S]]* [[R4]] to i8*
 // CHECK-NEXT:   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[R5]], i8* align 4 [[R6]], i32 12, i1 false)
 // CHECK-NEXT:   [[VA2:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK-NEXT:   call void @llvm.va_end(i8* [[VA2]])
+// CHECK-NEXT:   call void @llvm.va_end.p0i8(i8* [[VA2]])
 // CHECK-NEXT:   ret void
 // CHECK-NEXT: }
 
@@ -118,7 +118,7 @@ struct S test_empty_struct(char *fmt, ...) {
 // CHECK-NEXT:   [[U:%[^,=]+]] = alloca [[STRUCT_Z:%[^,=]+]], align 1
 // CHECK-NEXT:   store i8* %fmt, i8** [[FMT_ADDR]], align 4
 // CHECK-NEXT:   [[VA1:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK-NEXT:   call void @llvm.va_start(i8* [[VA1]])
+// CHECK-NEXT:   call void @llvm.va_start.p0i8(i8* [[VA1]])
 // CHECK-NEXT:   [[ARGP_CUR:%[^,=]+]] = load i8*, i8** [[VA]], align 4
 // CHECK-NEXT:   [[ARGP_NEXT:%[^,=]+]] = getelementptr inbounds i8, i8* [[ARGP_CUR]], i32 0
 // CHECK-NEXT:   store i8* [[ARGP_NEXT]], i8** [[VA]], align 4
@@ -135,6 +135,6 @@ struct S test_empty_struct(char *fmt, ...) {
 // CHECK-NEXT:   [[R6:%[^,=]+]] = bitcast [[STRUCT_S]]* [[R4]] to i8*
 // CHECK-NEXT:   call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[R5]], i8* align 4 [[R6]], i32 12, i1 false)
 // CHECK-NEXT:   [[VA2:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK-NEXT:   call void @llvm.va_end(i8* [[VA2]])
+// CHECK-NEXT:   call void @llvm.va_end.p0i8(i8* [[VA2]])
 // CHECK-NEXT:   ret void
 // CHECK-NEXT: }
diff --git a/clang/test/CodeGen/X86/va-arg-sse.c b/clang/test/CodeGen/X86/va-arg-sse.c
index e040b0e5790b..b7d00dad1453 100644
--- a/clang/test/CodeGen/X86/va-arg-sse.c
+++ b/clang/test/CodeGen/X86/va-arg-sse.c
@@ -21,7 +21,7 @@ struct S a[5];
 // CHECK-NEXT:    store i32 0, ptr [[J]], align 4
 // CHECK-NEXT:    store i32 0, ptr [[K]], align 4
 // CHECK-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[AP]], i64 0, i64 0
-// CHECK-NEXT:    call void @llvm.va_start(ptr [[ARRAYDECAY]])
+// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[ARRAYDECAY]])
 // CHECK-NEXT:    store ptr getelementptr inbounds ([5 x %struct.S], ptr @a, i64 0, i64 2), ptr [[P]], align 8
 // CHECK-NEXT:    [[ARRAYDECAY2:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[AP]], i64 0, i64 0
 // CHECK-NEXT:    [[FP_OFFSET_P:%.*]] = getelementptr inbounds [[STRUCT___VA_LIST_TAG:%.*]], ptr [[ARRAYDECAY2]], i32 0, i32 1
@@ -52,7 +52,7 @@ struct S a[5];
 // CHECK-NEXT:    [[VAARG_ADDR:%.*]] = phi ptr [ [[TMP]], [[VAARG_IN_REG]] ], [ [[OVERFLOW_ARG_AREA]], [[VAARG_IN_MEM]] ]
 // CHECK-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARG]], ptr align 4 [[VAARG_ADDR]], i64 12, i1 false)
 // CHECK-NEXT:    [[ARRAYDECAY3:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[AP]], i64 0, i64 0
-// CHECK-NEXT:    call void @llvm.va_end(ptr [[ARRAYDECAY3]])
+// CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[ARRAYDECAY3]])
 // CHECK-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[P]], align 8
 // CHECK-NEXT:    [[TOBOOL:%.*]] = icmp ne ptr [[TMP15]], null
 // CHECK-NEXT:    br i1 [[TOBOOL]], label [[LAND_LHS_TRUE:%.*]], label [[IF_END:%.*]]
diff --git a/clang/test/CodeGen/aarch64-varargs.c b/clang/test/CodeGen/aarch64-varargs.c
index ad457750c1e0..5002247dda9c 100644
--- a/clang/test/CodeGen/aarch64-varargs.c
+++ b/clang/test/CodeGen/aarch64-varargs.c
@@ -891,7 +891,7 @@ void check_start(int n, ...) {
   va_start(the_list, n);
 // CHECK: [[THE_LIST:%[a-z_0-9]+]] = alloca %struct.__va_list
 // CHECK: [[VOIDP_THE_LIST:%[a-z_0-9]+]] = bitcast %struct.__va_list* [[THE_LIST]] to i8*
-// CHECK: call void @llvm.va_start(i8* [[VOIDP_THE_LIST]])
+// CHECK: call void @llvm.va_start.p0i8(i8* [[VOIDP_THE_LIST]])
 }
 
 
diff --git a/clang/test/CodeGen/arm-varargs.c b/clang/test/CodeGen/arm-varargs.c
index c8a8899a967d..ec8e986d5100 100644
--- a/clang/test/CodeGen/arm-varargs.c
+++ b/clang/test/CodeGen/arm-varargs.c
@@ -278,5 +278,5 @@ void check_start(int n, ...) {
   va_list the_list;
   va_start(the_list, n);
 // CHECK: [[THE_LIST:%[a-z0-9._]+]] = alloca %struct.__va_list
-// CHECK: call void @llvm.va_start(ptr [[THE_LIST]])
+// CHECK: call void @llvm.va_start.p0(ptr [[THE_LIST]])
 }
diff --git a/clang/test/CodeGen/hexagon-linux-vararg.c b/clang/test/CodeGen/hexagon-linux-vararg.c
index ffa949deb6c7..a979a3524096 100644
--- a/clang/test/CodeGen/hexagon-linux-vararg.c
+++ b/clang/test/CodeGen/hexagon-linux-vararg.c
@@ -9,7 +9,7 @@ struct AAA {
   int d;
 };
 
-// CHECK:   call void @llvm.va_start(i8* %arraydecay1)
+// CHECK:   call void @llvm.va_start.p0(i8* %arraydecay1)
 // CHECK:   %arraydecay2 = getelementptr inbounds [1 x %struct.__va_list_tag],
 // [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0
 // CHECK:   br label %vaarg.maybe_reg
diff --git a/clang/test/CodeGen/mips-varargs.c b/clang/test/CodeGen/mips-varargs.c
index 54c96c061f6b..f4c6b6f37326 100644
--- a/clang/test/CodeGen/mips-varargs.c
+++ b/clang/test/CodeGen/mips-varargs.c
@@ -30,7 +30,7 @@ int test_i32(char *fmt, ...) {
 // NEW:   [[PROMOTION_TEMP:%.*]] = alloca i32, align 4
 //
 // ALL:   [[VA:%.+]] = bitcast i8** %va to i8*
-// ALL:   call void @llvm.va_start(i8* [[VA]])
+// ALL:   call void @llvm.va_start.p0i8(i8* [[VA]])
 // ALL:   [[AP_CUR:%.+]] = load i8*, i8** %va, align [[$PTRALIGN]]
 // O32:   [[AP_NEXT:%.+]] = getelementptr inbounds i8, i8* [[AP_CUR]], [[$INTPTR_T:i32]] [[$CHUNKSIZE:4]]
 // NEW:   [[AP_NEXT:%.+]] = getelementptr inbounds i8, i8* [[AP_CUR]], [[$INTPTR_T:i32|i64]] [[$CHUNKSIZE:8]]
@@ -50,7 +50,7 @@ int test_i32(char *fmt, ...) {
 // ALL:   store i32 [[ARG]], i32* [[V]], align 4
 //
 // ALL:   [[VA1:%.+]] = bitcast i8** %va to i8*
-// ALL:   call void @llvm.va_end(i8* [[VA1]])
+// ALL:   call void @llvm.va_end.p0i8(i8* [[VA1]])
 // ALL: }
 
 long long test_i64(char *fmt, ...) {
@@ -67,7 +67,7 @@ long long test_i64(char *fmt, ...) {
 //
 // ALL:   %va = alloca i8*, align [[$PTRALIGN]]
 // ALL:   [[VA:%.+]] = bitcast i8** %va to i8*
-// ALL:   call void @llvm.va_start(i8* [[VA]])
+// ALL:   call void @llvm.va_start.p0i8(i8* [[VA]])
 // ALL:   [[AP_CUR:%.+]] = load i8*, i8** %va, align [[$PTRALIGN]]
 //
 // i64 is 8-byte aligned, while this is within O32's stack alignment there's no
@@ -84,7 +84,7 @@ long long test_i64(char *fmt, ...) {
 // ALL:   [[ARG:%.+]] = load i64, i64* [[AP_CAST]], align 8
 //
 // ALL:   [[VA1:%.+]] = bitcast i8** %va to i8*
-// ALL:   call void @llvm.va_end(i8* [[VA1]])
+// ALL:   call void @llvm.va_end.p0i8(i8* [[VA1]])
 // ALL: }
 
 char *test_ptr(char *fmt, ...) {
@@ -103,7 +103,7 @@ char *test_ptr(char *fmt, ...) {
 // ALL:   [[V:%.*]] = alloca i8*, align [[$PTRALIGN]]
 // N32:   [[AP_CAST:%.+]] = alloca i8*, align 4
 // ALL:   [[VA:%.+]] = bitcast i8** %va to i8*
-// ALL:   call void @llvm.va_start(i8* [[VA]])
+// ALL:   call void @llvm.va_start.p0i8(i8* [[VA]])
 // ALL:   [[AP_CUR:%.+]] = load i8*, i8** %va, align [[$PTRALIGN]]
 // ALL:   [[AP_NEXT:%.+]] = getelementptr inbounds i8, i8* [[AP_CUR]], [[$INTPTR_T]] [[$CHUNKSIZE]]
 // ALL:   store i8* [[AP_NEXT]], i8** %va, align [[$PTRALIGN]]
@@ -122,7 +122,7 @@ char *test_ptr(char *fmt, ...) {
 // ALL:   store i8* [[ARG]], i8** [[V]], align [[$PTRALIGN]]
 //
 // ALL:   [[VA1:%.+]] = bitcast i8** %va to i8*
-// ALL:   call void @llvm.va_end(i8* [[VA1]])
+// ALL:   call void @llvm.va_end.p0i8(i8* [[VA1]])
 // ALL: }
 
 int test_v4i32(char *fmt, ...) {
@@ -142,7 +142,7 @@ int test_v4i32(char *fmt, ...) {
 // ALL:   %va = alloca i8*, align [[$PTRALIGN]]
 // ALL:   [[V:%.+]] = alloca <4 x i32>, align 16
 // ALL:   [[VA1:%.+]] = bitcast i8** %va to i8*
-// ALL:   call void @llvm.va_start(i8* [[VA1]])
+// ALL:   call void @llvm.va_start.p0i8(i8* [[VA1]])
 // ALL:   [[AP_CUR:%.+]] = load i8*, i8** %va, align [[$PTRALIGN]]
 //
 // Vectors are 16-byte aligned, however the O32 ABI has a maximum alignment of
@@ -167,7 +167,7 @@ int test_v4i32(char *fmt, ...) {
 // ALL:   store <4 x i32> [[ARG]], <4 x i32>* [[V]], align 16
 //
 // ALL:   [[VA1:%.+]] = bitcast i8** %va to i8*
-// ALL:   call void @llvm.va_end(i8* [[VA1]])
+// ALL:   call void @llvm.va_end.p0i8(i8* [[VA1]])
 // ALL:   [[VECEXT:%.+]] = extractelement <4 x i32> {{.*}}, i32 0
 // ALL:   ret i32 [[VECEXT]]
 // ALL: }
diff --git a/clang/test/CodeGen/pr53127.cpp b/clang/test/CodeGen/pr53127.cpp
index 97fe1291352d..501222f4582d 100644
--- a/clang/test/CodeGen/pr53127.cpp
+++ b/clang/test/CodeGen/pr53127.cpp
@@ -34,7 +34,7 @@ void operator delete(void*);
 // CHECK-NEXT:    br i1 [[CALL6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]]
 // CHECK:       cond.true7:
 // CHECK-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[L]], i64 0, i64 0
-// CHECK-NEXT:    call void @llvm.va_start(ptr [[ARRAYDECAY]])
+// CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[ARRAYDECAY]])
 // CHECK-NEXT:    br label [[COND_END9:%.*]]
 // CHECK:       cond.false8:
 // CHECK-NEXT:    br label [[COND_END9]]
@@ -44,7 +44,7 @@ void operator delete(void*);
 // CHECK:       cond.true11:
 // CHECK-NEXT:    [[ARRAYDECAY12:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[L]], i64 0, i64 0
 // CHECK-NEXT:    [[ARRAYDECAY13:%.*]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr [[L2]], i64 0, i64 0
-// CHECK-NEXT:    call void @llvm.va_copy(ptr [[ARRAYDECAY12]], ptr [[ARRAYDECAY13]])
+// CHECK-NEXT:    call void @llvm.va_copy.p0.p0(ptr [[ARRAYDECAY12]], ptr [[ARRAYDECAY13]])
 // CHECK-NEXT:    br label [[COND_END15:%.*]]
 // CHECK:       cond.false14:
 // CHECK-NEXT:    br label [[COND_END15]]
diff --git a/clang/test/CodeGen/xcore-abi.c b/clang/test/CodeGen/xcore-abi.c
index 88a96bd311a8..b7ccdc267c36 100644
--- a/clang/test/CodeGen/xcore-abi.c
+++ b/clang/test/CodeGen/xcore-abi.c
@@ -27,7 +27,7 @@ void testva (int n, ...) {
   va_start(ap,n);
   // CHECK: [[AP:%[a-z0-9]+]] = alloca i8*, align 4
   // CHECK: [[AP1:%[a-z0-9]+]] = bitcast i8** [[AP]] to i8*
-  // CHECK: call void @llvm.va_start(i8* [[AP1]])
+  // CHECK: call void @llvm.va_start.p0(i8* [[AP1]])
 
   char* v1 = va_arg (ap, char*);
   f(v1);
diff --git a/clang/test/CodeGenCXX/ext-int.cpp b/clang/test/CodeGenCXX/ext-int.cpp
index aeb2c9a7022b..15a6248b003e 100644
--- a/clang/test/CodeGenCXX/ext-int.cpp
+++ b/clang/test/CodeGenCXX/ext-int.cpp
@@ -172,9 +172,9 @@ void TakesVarargs(int i, ...) {
   // WIN: %[[ARGS:.+]] = alloca ptr
   __builtin_va_start(args, i);
   // LIN64: %[[STARTAD:.+]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr %[[ARGS]]
-  // LIN64: call void @llvm.va_start(ptr %[[STARTAD]])
-  // LIN32: call void @llvm.va_start(ptr %[[ARGS]])
-  // WIN: call void @llvm.va_start(ptr %[[ARGS]])
+  // LIN64: call void @llvm.va_start.p0(ptr %[[STARTAD]])
+  // LIN32: call void @llvm.va_start.p0(ptr %[[ARGS]])
+  // WIN: call void @llvm.va_start.p0(ptr %[[ARGS]])
 
   _BitInt(92) A = __builtin_va_arg(args, _BitInt(92));
   // LIN64: %[[AD1:.+]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr %[[ARGS]]
@@ -317,9 +317,9 @@ void TakesVarargs(int i, ...) {
 
   __builtin_va_end(args);
   // LIN64: %[[ENDAD:.+]] = getelementptr inbounds [1 x %struct.__va_list_tag], ptr %[[ARGS]]
-  // LIN64: call void @llvm.va_end(ptr %[[ENDAD]])
-  // LIN32: call void @llvm.va_end(ptr %[[ARGS]])
-  // WIN: call void @llvm.va_end(ptr %[[ARGS]])
+  // LIN64: call void @llvm.va_end.p0(ptr %[[ENDAD]])
+  // LIN32: call void @llvm.va_end.p0(ptr %[[ARGS]])
+  // WIN: call void @llvm.va_end.p0(ptr %[[ARGS]])
 }
 void typeid_tests() {
   // LIN: define{{.*}} void @_Z12typeid_testsv()
diff --git a/clang/test/CodeGenCXX/ibm128-declarations.cpp b/clang/test/CodeGenCXX/ibm128-declarations.cpp
index 5ee4f354d379..e0187e20cde4 100644
--- a/clang/test/CodeGenCXX/ibm128-declarations.cpp
+++ b/clang/test/CodeGenCXX/ibm128-declarations.cpp
@@ -107,13 +107,13 @@ int main(void) {
 // CHECK: define dso_local noundef ppc_fp128 @_Z10func_vaargiz(i32 noundef signext %n, ...)
 // CHECK: entry:
 // CHECK:   store i32 %n, ptr %n.addr, align 4
-// CHECK:   call void @llvm.va_start(ptr %ap)
+// CHECK:   call void @llvm.va_start.p0(ptr %ap)
 // CHECK:   %argp.cur = load ptr, ptr %ap, align 8
 // CHECK:   %argp.next = getelementptr inbounds i8, ptr %argp.cur, i64 16
 // CHECK:   store ptr %argp.next, ptr %ap, align 8
 // CHECK:   %0 = load ppc_fp128, ptr %argp.cur, align 8
 // CHECK:   store ppc_fp128 %0, ptr %r, align 16
-// CHECK:   call void @llvm.va_end(ptr %ap)
+// CHECK:   call void @llvm.va_end.p0(ptr %ap)
 // CHECK:   %1 = load ppc_fp128, ptr %r, align 16
 // CHECK:   ret ppc_fp128 %1
 // CHECK: }
diff --git a/clang/test/Modules/codegen.test b/clang/test/Modules/codegen.test
index d9c70e4385f8..969665192a9c 100644
--- a/clang/test/Modules/codegen.test
+++ b/clang/test/Modules/codegen.test
@@ -26,7 +26,7 @@ USE: $_Z4instIiEvv = comdat any
 USE: $_Z10always_inlv = comdat any
 FOO: $_ZN13implicit_dtorD2Ev = comdat any
 FOO: define weak_odr void @_Z2f1PKcz(i8* noundef %fmt, ...) #{{[0-9]+}} comdat
-FOO:   call void @llvm.va_start(i8* %{{[a-zA-Z0-9]*}})
+FOO:   call void @llvm.va_start.p0i8(i8* %{{[a-zA-Z0-9]*}})
 
 Test that implicit special members are emitted into the FOO module if they're
 ODR used there, otherwise emit them linkonce_odr as usual in the use.
diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td
index cb710d8008a9..14ea40e0f2f4 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -408,10 +408,10 @@ class MSBuiltin<string name> {
 //===--------------- Variable Argument Handling Intrinsics ----------------===//
 //
 
-def int_vastart : DefaultAttrsIntrinsic<[], [llvm_ptr_ty], [], "llvm.va_start">;
-def int_vacopy  : DefaultAttrsIntrinsic<[], [llvm_ptr_ty, llvm_ptr_ty], [],
+def int_vastart : DefaultAttrsIntrinsic<[], [llvm_anyptr_ty], [], "llvm.va_start">;
+def int_vacopy  : DefaultAttrsIntrinsic<[], [llvm_anyptr_ty, llvm_anyptr_ty], [],
                             "llvm.va_copy">;
-def int_vaend   : DefaultAttrsIntrinsic<[], [llvm_ptr_ty], [], "llvm.va_end">;
+def int_vaend   : DefaultAttrsIntrinsic<[], [llvm_anyptr_ty], [], "llvm.va_end">;
 
 //===------------------- Garbage Collection Intrinsics --------------------===//
 //
diff --git a/llvm/test/Bitcode/compatibility.ll b/llvm/test/Bitcode/compatibility.ll
index 60c2e375f4c2..e4f0e2e30906 100644
--- a/llvm/test/Bitcode/compatibility.ll
+++ b/llvm/test/Bitcode/compatibility.ll
@@ -1621,24 +1621,24 @@ proceed:
 ;; Intrinsic Functions
 
 ; Intrinsic Functions -- Variable Argument Handling
-declare void @llvm.va_start(i8*)
-declare void @llvm.va_copy(i8*, i8*)
-declare void @llvm.va_end(i8*)
+declare void @llvm.va_start.p0i8(i8*)
+declare void @llvm.va_copy.p0i8.p0i8(i8*, i8*)
+declare void @llvm.va_end.p0i8(i8*)
 define void @instructions.va_arg(i8* %v, ...) {
   %ap = alloca i8*
   %ap2 = bitcast i8** %ap to i8*
 
-  call void @llvm.va_start(i8* %ap2)
-  ; CHECK: call void @llvm.va_start(i8* %ap2)
+  call void @llvm.va_start.p0i8(i8* %ap2)
+  ; CHECK: call void @llvm.va_start.p0i8(i8* %ap2)
 
   va_arg i8* %ap2, i32
   ; CHECK: va_arg i8* %ap2, i32
 
-  call void @llvm.va_copy(i8* %v, i8* %ap2)
-  ; CHECK: call void @llvm.va_copy(i8* %v, i8* %ap2)
+  call void @llvm.va_copy.p0i8.p0i8(i8* %v, i8* %ap2)
+  ; CHECK: call void @llvm.va_copy.p0i8.p0i8(i8* %v, i8* %ap2)
 
-  call void @llvm.va_end(i8* %ap2)
-  ; CHECK: call void @llvm.va_end(i8* %ap2)
+  call void @llvm.va_end.p0i8(i8* %ap2)
+  ; CHECK: call void @llvm.va_end.p0i8(i8* %ap2)
 
   ret void
 }
diff --git a/llvm/test/Bitcode/thinlto-function-summary.ll b/llvm/test/Bitcode/thinlto-function-summary.ll
index 68636ed192a1..06e4dd65f55b 100644
--- a/llvm/test/Bitcode/thinlto-function-summary.ll
+++ b/llvm/test/Bitcode/thinlto-function-summary.ll
@@ -12,10 +12,10 @@
 ; BC-NEXT: <FUNCTION op0=7 op1=39
 ; "variadic"
 ; BC-NEXT: <FUNCTION op0=46 op1=8
-; "llvm.va_start"
-; BC-NEXT: <FUNCTION op0=54 op1=13
+; "llvm.va_start.p0i8"
+; BC-NEXT: <FUNCTION op0=54 op1=18
 ; "f"
-; BC-NEXT: <ALIAS op0=67 op1=1
+; BC-NEXT: <ALIAS op0=72 op1=1
 ; BC: <GLOBALVAL_SUMMARY_BLOCK
 ; BC-NEXT: <VERSION
 ; BC-NEXT: <FLAGS
@@ -27,7 +27,7 @@
 ; BC-NEXT: <BLOCK_COUNT op0=5/>
 ; BC-NEXT: </GLOBALVAL_SUMMARY_BLOCK
 ; BC: <STRTAB_BLOCK
-; BC-NEXT: blob data = 'hfoobaranon.{{................................}}.0variadicllvm.va_startf{{.*}}'
+; BC-NEXT: blob data = 'hfoobaranon.{{................................}}.0variadicllvm.va_start.p0i8f{{.*}}'
 
 
 ; RUN: opt -passes=name-anon-globals -module-summary < %s | llvm-dis | FileCheck %s
@@ -75,8 +75,8 @@ return:         ; preds = %entry
 define i32 @variadic(...) {
     %ap = alloca i8*, align 8
     %ap.0 = bitcast i8** %ap to i8*
-    call void @llvm.va_start(i8* %ap.0)
+    call void @llvm.va_start.p0i8(i8* %ap.0)
     ret i32 42
 }
 
-declare void @llvm.va_start(i8*) nounwind
+declare void @llvm.va_start.p0i8(i8*) nounwind
diff --git a/llvm/test/Bitcode/variableArgumentIntrinsic.3.2.ll b/llvm/test/Bitcode/variableArgumentIntrinsic.3.2.ll
index ad70f0542e88..88000040d5ce 100644
--- a/llvm/test/Bitcode/variableArgumentIntrinsic.3.2.ll
+++ b/llvm/test/Bitcode/variableArgumentIntrinsic.3.2.ll
@@ -10,8 +10,8 @@ define i32 @varArgIntrinsic(i32 %X, ...) {
   %ap = alloca i8*
   %ap2 = bitcast i8** %ap to i8*
 
-; CHECK: call void @llvm.va_start(i8* %ap2)
-  call void @llvm.va_start(i8* %ap2)
+; CHECK: call void @llvm.va_start.p0i8(i8* %ap2)
+  call void @llvm.va_start.p0i8(i8* %ap2)
 
 ; CHECK-NEXT: %tmp = va_arg i8** %ap, i32
   %tmp = va_arg i8** %ap, i32
@@ -19,16 +19,16 @@ define i32 @varArgIntrinsic(i32 %X, ...) {
   %aq = alloca i8*
   %aq2 = bitcast i8** %aq to i8*
 
-; CHECK: call void @llvm.va_copy(i8* %aq2, i8* %ap2)
-  call void @llvm.va_copy(i8* %aq2, i8* %ap2)
-; CHECK-NEXT: call void @llvm.va_end(i8* %aq2)
-  call void @llvm.va_end(i8* %aq2)
+; CHECK: call void @llvm.va_copy.p0i8.p0i8(i8* %aq2, i8* %ap2)
+  call void @llvm.va_copy.p0i8.p0i8(i8* %aq2, i8* %ap2)
+; CHECK-NEXT: call void @llvm.va_end.p0i8(i8* %aq2)
+  call void @llvm.va_end.p0i8(i8* %aq2)
 
-; CHECK-NEXT:  call void @llvm.va_end(i8* %ap2)
-  call void @llvm.va_end(i8* %ap2)
+; CHECK-NEXT:  call void @llvm.va_end.p0i8(i8* %ap2)
+  call void @llvm.va_end.p0i8(i8* %ap2)
   ret i32 %tmp
 }
 
-declare void @llvm.va_start(i8*)
-declare void @llvm.va_copy(i8*, i8*)
-declare void @llvm.va_end(i8*)
+declare void @llvm.va_start.p0i8(i8*)
+declare void @llvm.va_copy.p0i8.p0i8(i8*, i8*)
+declare void @llvm.va_end.p0i8(i8*)
diff --git a/llvm/test/Instrumentation/MemorySanitizer/AArch64/vararg.ll b/llvm/test/Instrumentation/MemorySanitizer/AArch64/vararg.ll
index 0bd0968b0f1a..c5cb0f55b7e2 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/AArch64/vararg.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/AArch64/vararg.ll
@@ -8,8 +8,8 @@ target triple = "aarch64-unknown-linux-gnu"
 define i32 @foo(i32 %guard, ...) {
   %vl = alloca %struct.__va_list, align 8
   call void @llvm.lifetime.start.p0(i64 32, ptr %vl)
-  call void @llvm.va_start(ptr %vl)
-  call void @llvm.va_end(ptr %vl)
+  call void @llvm.va_start.p0(ptr %vl)
+  call void @llvm.va_end.p0(ptr %vl)
   call void @llvm.lifetime.end.p0(i64 32, ptr %vl)
   ret i32 0
 }
@@ -46,8 +46,8 @@ define i32 @foo(i32 %guard, ...) {
 ; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 {{%.*}}, ptr align 16 [[STACK]], i64 {{%.*}}, i1 false)
 
 declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #1
-declare void @llvm.va_start(ptr) #2
-declare void @llvm.va_end(ptr) #2
+declare void @llvm.va_start.p0(ptr) #2
+declare void @llvm.va_end.p0(ptr) #2
 declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #1
 
 define i32 @bar() {
diff --git a/llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64.ll b/llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64.ll
index 85e98b703018..9dd51c1fe68b 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64.ll
@@ -6,8 +6,8 @@ target triple = "mips64--linux"
 define i32 @foo(i32 %guard, ...) {
   %vl = alloca ptr, align 8
   call void @llvm.lifetime.start.p0(i64 32, ptr %vl)
-  call void @llvm.va_start(ptr %vl)
-  call void @llvm.va_end(ptr %vl)
+  call void @llvm.va_start.p0(ptr %vl)
+  call void @llvm.va_end.p0(ptr %vl)
   call void @llvm.lifetime.end.p0(i64 32, ptr %vl)
   ret i32 0
 }
@@ -22,8 +22,8 @@ define i32 @foo(i32 %guard, ...) {
 ; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[C]], ptr align 8 @__msan_va_arg_tls, i64 [[B]], i1 false)
 
 declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #1
-declare void @llvm.va_start(ptr) #2
-declare void @llvm.va_end(ptr) #2
+declare void @llvm.va_start.p0(ptr) #2
+declare void @llvm.va_end.p0(ptr) #2
 declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #1
 
 define i32 @bar() {
diff --git a/llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64el.ll b/llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64el.ll
index be7ccf00221e..26c8e636b88f 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64el.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/Mips/vararg-mips64el.ll
@@ -6,8 +6,8 @@ target triple = "mips64el--linux"
 define i32 @foo(i32 %guard, ...) {
   %vl = alloca ptr, align 8
   call void @llvm.lifetime.start.p0(i64 32, ptr %vl)
-  call void @llvm.va_start(ptr %vl)
-  call void @llvm.va_end(ptr %vl)
+  call void @llvm.va_start.p0(ptr %vl)
+  call void @llvm.va_end.p0(ptr %vl)
   call void @llvm.lifetime.end.p0(i64 32, ptr %vl)
   ret i32 0
 }
@@ -22,8 +22,8 @@ define i32 @foo(i32 %guard, ...) {
 ; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[C]], ptr align 8 @__msan_va_arg_tls, i64 [[B]], i1 false)
 
 declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #1
-declare void @llvm.va_start(ptr) #2
-declare void @llvm.va_end(ptr) #2
+declare void @llvm.va_start.p0(ptr) #2
+declare void @llvm.va_end.p0(ptr) #2
 declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #1
 
 define i32 @bar() {
diff --git a/llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64.ll b/llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64.ll
index 23978a1d6c88..d3c4b8f48e96 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64.ll
@@ -6,8 +6,8 @@ target triple = "powerpc64--linux"
 define i32 @foo(i32 %guard, ...) {
   %vl = alloca ptr, align 8
   call void @llvm.lifetime.start.p0(i64 32, ptr %vl)
-  call void @llvm.va_start(ptr %vl)
-  call void @llvm.va_end(ptr %vl)
+  call void @llvm.va_start.p0(ptr %vl)
+  call void @llvm.va_end.p0(ptr %vl)
   call void @llvm.lifetime.end.p0(i64 32, ptr %vl)
   ret i32 0
 }
@@ -22,8 +22,8 @@ define i32 @foo(i32 %guard, ...) {
 ; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[C]], ptr align 8 @__msan_va_arg_tls, i64 [[B]], i1 false)
 
 declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #1
-declare void @llvm.va_start(ptr) #2
-declare void @llvm.va_end(ptr) #2
+declare void @llvm.va_start.p0(ptr) #2
+declare void @llvm.va_end.p0(ptr) #2
 declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #1
 
 define i32 @bar() {
diff --git a/llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64le.ll b/llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64le.ll
index 6f5d5d6180e1..0cc7c72769ae 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64le.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/PowerPC/vararg-ppc64le.ll
@@ -6,8 +6,8 @@ target triple = "powerpc64le--linux"
 define i32 @foo(i32 %guard, ...) {
   %vl = alloca ptr, align 8
   call void @llvm.lifetime.start.p0(i64 32, ptr %vl)
-  call void @llvm.va_start(ptr %vl)
-  call void @llvm.va_end(ptr %vl)
+  call void @llvm.va_start.p0(ptr %vl)
+  call void @llvm.va_end.p0(ptr %vl)
   call void @llvm.lifetime.end.p0(i64 32, ptr %vl)
   ret i32 0
 }
@@ -22,8 +22,8 @@ define i32 @foo(i32 %guard, ...) {
 ; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[C]], ptr align 8 @__msan_va_arg_tls, i64 [[B]], i1 false)
 
 declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #1
-declare void @llvm.va_start(ptr) #2
-declare void @llvm.va_end(ptr) #2
+declare void @llvm.va_start.p0(ptr) #2
+declare void @llvm.va_end.p0(ptr) #2
 declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #1
 
 define i32 @bar() {
diff --git a/llvm/test/Instrumentation/MemorySanitizer/SystemZ/vararg.ll b/llvm/test/Instrumentation/MemorySanitizer/SystemZ/vararg.ll
index 574b865da16c..67c0f50cc54e 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/SystemZ/vararg.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/SystemZ/vararg.ll
@@ -8,8 +8,8 @@ target triple = "s390x-unknown-linux-gnu"
 define i64 @foo(i64 %guard, ...) {
   %vl = alloca %struct.__va_list, align 8
   call void @llvm.lifetime.start.p0(i64 32, ptr %vl)
-  call void @llvm.va_start(ptr %vl)
-  call void @llvm.va_end(ptr %vl)
+  call void @llvm.va_start.p0(ptr %vl)
+  call void @llvm.va_end.p0(ptr %vl)
   call void @llvm.lifetime.end.p0(i64 32, ptr %vl)
   ret i64 0
 }
@@ -29,8 +29,8 @@ define i64 @foo(i64 %guard, ...) {
 ; CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 {{%.*}}, ptr align 8 {{%.*}}, i64 [[A]], i1 false)
 
 declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #1
-declare void @llvm.va_start(ptr) #2
-declare void @llvm.va_end(ptr) #2
+declare void @llvm.va_start.p0(ptr) #2
+declare void @llvm.va_end.p0(ptr) #2
 declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #1
 
 declare i32 @random_i32()
diff --git a/llvm/test/Instrumentation/MemorySanitizer/X86/vararg.ll b/llvm/test/Instrumentation/MemorySanitizer/X86/vararg.ll
index eb43ea793b9d..db43ad1591e8 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/X86/vararg.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/X86/vararg.ll
@@ -7,8 +7,8 @@ target triple = "i386-unknown-linux-gnu"
 define void @VaStart(ptr %s, ...) {
 entry:
   %vl = alloca ptr, align 4
-  call void @llvm.va_start(ptr %vl)
+  call void @llvm.va_start.p0(ptr %vl)
   ret void
 }
 
-declare void @llvm.va_start(ptr)
+declare void @llvm.va_start.p0(ptr)
diff --git a/llvm/test/Instrumentation/MemorySanitizer/X86/vararg_call.ll b/llvm/test/Instrumentation/MemorySanitizer/X86/vararg_call.ll
index 32d43e11fbd9..27059fcd2e00 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/X86/vararg_call.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/X86/vararg_call.ll
@@ -34,7 +34,7 @@ define dso_local i32 @sum(i32 %n, ...) local_unnamed_addr #0 {
 entry:
   %args = alloca [1 x %struct.__va_list_tag], align 16
   call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %args) #2
-  call void @llvm.va_start(ptr nonnull %args)
+  call void @llvm.va_start.p0(ptr nonnull %args)
   %cmp9 = icmp sgt i32 %n, 0
   br i1 %cmp9, label %for.body.lr.ph, label %for.end
 
@@ -88,7 +88,7 @@ vaarg.end:                                        ; preds = %vaarg.in_mem, %vaar
 
 for.end:                                          ; preds = %vaarg.end, %entry
   %sum.0.lcssa = phi i32 [ 0, %entry ], [ %add, %vaarg.end ]
-  call void @llvm.va_end(ptr nonnull %args)
+  call void @llvm.va_end.p0(ptr nonnull %args)
   call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %args) #2
   ret i32 %sum.0.lcssa
 }
@@ -98,10 +98,10 @@ for.end:                                          ; preds = %vaarg.end, %entry
 declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #1
 
 ; Function Attrs: nounwind
-declare void @llvm.va_start(ptr) #2
+declare void @llvm.va_start.p0(ptr) #2
 
 ; Function Attrs: nounwind
-declare void @llvm.va_end(ptr) #2
+declare void @llvm.va_end.p0(ptr) #2
 
 ; Function Attrs: argmemonly nounwind
 declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #1
diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
index 89caadb35bd3..1aca926fe4b5 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
@@ -755,7 +755,7 @@ define void @VACopy(ptr %p1, ptr %p2) nounwind uwtable sanitize_memory {
 ; It should work with a local stack copy instead.
 
 %struct.__va_list_tag = type { i32, i32, ptr, ptr }
-declare void @llvm.va_start(ptr) nounwind
+declare void @llvm.va_start.p0(ptr) nounwind
 
 ; Function Attrs: nounwind uwtable
 define void @VAStart(i32 %x, ...) sanitize_memory {
@@ -763,7 +763,7 @@ entry:
   %x.addr = alloca i32, align 4
   %va = alloca [1 x %struct.__va_list_tag], align 16
   store i32 %x, ptr %x.addr, align 4
-  call void @llvm.va_start(ptr %va)
+  call void @llvm.va_start.p0(ptr %va)
   ret void
 }
 
diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_debug_info.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_debug_info.ll
index d95c5edb00b7..1ae514412471 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/msan_debug_info.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/msan_debug_info.ll
@@ -494,7 +494,7 @@ define <4 x i32> @ShuffleVector(<4 x i32> %vec, <4 x i32> %vec1) sanitize_memory
 
 
 %struct.__va_list_tag = type { i32, i32, ptr, ptr }
-declare void @llvm.va_start(ptr) nounwind
+declare void @llvm.va_start.p0(ptr) nounwind
 
 define void @VAStart(i32 %x, ...) sanitize_memory {
 ; CHECK-LABEL: @VAStart(
@@ -540,7 +540,7 @@ define void @VAStart(i32 %x, ...) sanitize_memory {
 ; CHECK-NEXT:    [[TMP29:%.*]] = add i64 [[TMP27]], 17592186044416, !dbg [[DBG11]]
 ; CHECK-NEXT:    [[TMP30:%.*]] = inttoptr i64 [[TMP29]] to ptr, !dbg [[DBG11]]
 ; CHECK-NEXT:    call void @llvm.memset.p0.i32(ptr align 8 [[TMP28]], i8 0, i32 24, i1 false), !dbg [[DBG11]]
-; CHECK-NEXT:    call void @llvm.va_start(ptr [[VA]]), !dbg [[DBG11]]
+; CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VA]]), !dbg [[DBG11]]
 ; CHECK-NEXT:    [[TMP31:%.*]] = ptrtoint ptr [[VA]] to i64, !dbg [[DBG11]]
 ; CHECK-NEXT:    [[TMP32:%.*]] = add i64 [[TMP31]], 16, !dbg [[DBG11]]
 ; CHECK-NEXT:    [[TMP33:%.*]] = inttoptr i64 [[TMP32]] to ptr, !dbg [[DBG11]]
@@ -571,7 +571,7 @@ entry:
   %x.addr = alloca i32, align 4, !dbg !10
   %va = alloca [1 x %struct.__va_list_tag], align 16, !dbg !11
   store i32 %x, ptr %x.addr, align 4, !dbg !12
-  call void @llvm.va_start(ptr %va), !dbg !15
+  call void @llvm.va_start.p0(ptr %va), !dbg !15
   ret void
 }
 
diff --git a/llvm/test/Instrumentation/MemorySanitizer/msan_kernel_basic.ll b/llvm/test/Instrumentation/MemorySanitizer/msan_kernel_basic.ll
index f4fbf5fa4b11..0b2b713eebe0 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/msan_kernel_basic.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/msan_kernel_basic.ll
@@ -313,8 +313,8 @@ entry:
 ; Test kernel-specific va_list instrumentation
 
 %struct.__va_list_tag = type { i32, i32, ptr, ptr }
-declare void @llvm.va_start(ptr) nounwind
-declare void @llvm.va_end(ptr)
+declare void @llvm.va_start.p0(ptr) nounwind
+declare void @llvm.va_end.p0(ptr)
 @.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
 declare dso_local i32 @VAListFn(ptr, ptr) local_unnamed_addr
 
@@ -322,9 +322,9 @@ declare dso_local i32 @VAListFn(ptr, ptr) local_unnamed_addr
 define dso_local i32 @VarArgFn(ptr %fmt, ...) local_unnamed_addr sanitize_memory #0 {
 entry:
   %args = alloca [1 x %struct.__va_list_tag], align 16
-  call void @llvm.va_start(ptr nonnull %args)
+  call void @llvm.va_start.p0(ptr nonnull %args)
   %call = call i32 @VAListFn(ptr %fmt, ptr nonnull %args)
-  call void @llvm.va_end(ptr nonnull %args)
+  call void @llvm.va_end.p0(ptr nonnull %args)
   ret i32 %call
 }
 
diff --git a/llvm/test/Transforms/CodeExtractor/PartialInlineNoInline.ll b/llvm/test/Transforms/CodeExtractor/PartialInlineNoInline.ll
index 6c0b83298d23..aec87faff708 100644
--- a/llvm/test/Transforms/CodeExtractor/PartialInlineNoInline.ll
+++ b/llvm/test/Transforms/CodeExtractor/PartialInlineNoInline.ll
@@ -7,7 +7,7 @@ define i32 @inline_fail(i32 %count, ...) {
 entry:
   %vargs = alloca i8*, align 8
   %vargs1 = bitcast i8** %vargs to i8*
-  call void @llvm.va_start(i8* %vargs1)
+  call void @llvm.va_start.p0(i8* %vargs1)
   %stat1 = load i32, i32* @stat, align 4
   %cmp = icmp slt i32 %stat1, 0
   br i1 %cmp, label %bb2, label %bb1
@@ -21,7 +21,7 @@ bb1:                                              ; preds = %entry
 
 bb2:                                              ; preds = %bb1, %entry
   %res = phi i32 [ 1, %bb1 ], [ 0, %entry ]
-  call void @llvm.va_end(i8* %vargs1)
+  call void @llvm.va_end.p0(i8* %vargs1)
   ret i32 %res
 }
 
@@ -32,8 +32,8 @@ bb:
 }
 
 declare void @foo(i32, i32)
-declare void @llvm.va_start(i8*)
-declare void @llvm.va_end(i8*)
+declare void @llvm.va_start.p0(i8*)
+declare void @llvm.va_end.p0(i8*)
 
 ; Check that no remarks have been emitted, inline_fail has not been partial
 ; inlined, no code has been extracted and the partial-inlining counter
diff --git a/llvm/test/Transforms/CodeExtractor/PartialInlineVarArg.ll b/llvm/test/Transforms/CodeExtractor/PartialInlineVarArg.ll
index 8582f5e18f84..1c9097bea6f9 100644
--- a/llvm/test/Transforms/CodeExtractor/PartialInlineVarArg.ll
+++ b/llvm/test/Transforms/CodeExtractor/PartialInlineVarArg.ll
@@ -14,10 +14,10 @@ bb1:                                              ; preds = %entry
   %vg1 = add nsw i32 %stat1, 1
   store i32 %vg1, i32* @stat, align 4
   %vargs1 = bitcast i8** %vargs to i8*
-  call void @llvm.va_start(i8* %vargs1)
+  call void @llvm.va_start.p0(i8* %vargs1)
   %va1 = va_arg i8** %vargs, i32
   call void @foo(i32 %count, i32 %va1) #2
-  call void @llvm.va_end(i8* %vargs1)
+  call void @llvm.va_end.p0(i8* %vargs1)
   br label %bb2
 
 bb2:                                              ; preds = %bb1, %entry
@@ -26,8 +26,8 @@ bb2:                                              ; preds = %bb1, %entry
 }
 
 declare void @foo(i32, i32)
-declare void @llvm.va_start(i8*)
-declare void @llvm.va_end(i8*)
+declare void @llvm.va_start.p0(i8*)
+declare void @llvm.va_end.p0(i8*)
 
 define i32 @caller1(i32 %arg) {
 bb:
@@ -62,7 +62,7 @@ bb1:                                              ; preds = %entry
   %vg1 = add nsw i32 %stat1, 1
   store i32 %vg1, i32* @stat, align 4
   %vargs1 = bitcast i8** %vargs to i8*
-  call void @llvm.va_start(i8* %vargs1)
+  call void @llvm.va_start.p0(i8* %vargs1)
   %va1 = va_arg i8** %vargs, i32
   call void @foo(i32 %count, i32 %va1)
   br label %bb2
@@ -70,7 +70,7 @@ bb1:                                              ; preds = %entry
 bb2:                                              ; preds = %bb1, %entry
   %res = phi i32 [ 1, %bb1 ], [ 0, %entry ]
   %ptr = phi i8* [ %vargs1, %bb1 ], [ %vargs0, %entry]
-  call void @llvm.va_end(i8* %ptr)
+  call void @llvm.va_end.p0(i8* %ptr)
   ret i32 %res
 }
 
diff --git a/llvm/test/Transforms/DeadArgElim/2008-01-16-VarargsParamAttrs.ll b/llvm/test/Transforms/DeadArgElim/2008-01-16-VarargsParamAttrs.ll
index f7e9b1f545ca..5501c2d91646 100644
--- a/llvm/test/Transforms/DeadArgElim/2008-01-16-VarargsParamAttrs.ll
+++ b/llvm/test/Transforms/DeadArgElim/2008-01-16-VarargsParamAttrs.ll
@@ -9,15 +9,15 @@ entry:
 	%args = alloca i8*		; <i8**> [#uses=2]
 	%"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
 	%args1 = bitcast i8** %args to i8*		; <i8*> [#uses=1]
-	call void @llvm.va_start( i8* %args1 )
+	call void @llvm.va_start.p0( i8* %args1 )
 	%args41 = bitcast i8** %args to i8*		; <i8*> [#uses=1]
-	call void @llvm.va_end( i8* %args41 )
+	call void @llvm.va_end.p0( i8* %args41 )
 	ret i32 undef
 }
 
-declare void @llvm.va_start(i8*) nounwind
+declare void @llvm.va_start.p0(i8*) nounwind
 
-declare void @llvm.va_end(i8*) nounwind
+declare void @llvm.va_end.p0(i8*) nounwind
 
 define i32 @main() {
 entry:
diff --git a/llvm/test/Transforms/DeadArgElim/dead_vaargs.ll b/llvm/test/Transforms/DeadArgElim/dead_vaargs.ll
index 50d52bed73a7..2ff2f1bfa294 100644
--- a/llvm/test/Transforms/DeadArgElim/dead_vaargs.ll
+++ b/llvm/test/Transforms/DeadArgElim/dead_vaargs.ll
@@ -23,12 +23,12 @@ define internal void @thunk(i32 %X, ...) {
 
 define internal i32 @has_vastart(i32 %X, ...) {
   %valist = alloca i8
-  call void @llvm.va_start(i8* %valist)
+  call void @llvm.va_start.p0(i8* %valist)
   ret i32 %X
 }
 ; CHECK-LABEL: define internal i32 @has_vastart(i32 %X, ...)
 
-declare void @llvm.va_start(i8*)
+declare void @llvm.va_start.p0(i8*)
 
 define internal i32 @no_vastart(i32 %X, ...) {
   ret i32 %X
diff --git a/llvm/test/Transforms/DeadArgElim/variadic_safety.ll b/llvm/test/Transforms/DeadArgElim/variadic_safety.ll
index 05d8c5420c3d..cadd6660d36e 100644
--- a/llvm/test/Transforms/DeadArgElim/variadic_safety.ll
+++ b/llvm/test/Transforms/DeadArgElim/variadic_safety.ll
@@ -1,10 +1,10 @@
 ; RUN: opt < %s -passes=deadargelim -S | FileCheck %s
 
-declare void @llvm.va_start(i8*)
+declare void @llvm.va_start.p0(i8*)
 
 define internal i32 @va_func(i32 %a, i32 %b, ...) {
   %valist = alloca i8
-  call void @llvm.va_start(i8* %valist)
+  call void @llvm.va_start.p0(i8* %valist)
 
   ret i32 %b
 }
@@ -24,7 +24,7 @@ define i32 @call_va(i32 %in) {
 
 define internal i32 @va_deadret_func(i32 %a, i32 %b, ...) {
   %valist = alloca i8
-  call void @llvm.va_start(i8* %valist)
+  call void @llvm.va_start.p0(i8* %valist)
 
   ret i32 %a
 }
diff --git a/llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll b/llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
index 5b7be1f2a45f..d12faace1cf1 100644
--- a/llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
+++ b/llvm/test/Transforms/FunctionAttrs/out-of-bounds-iterator-bug.ll
@@ -4,15 +4,15 @@
 ; This checks for a previously existing iterator wraparound bug in
 ; FunctionAttrs, and in the process covers corner cases with varargs.
 
-declare void @llvm.va_start(ptr)
-declare void @llvm.va_end(ptr)
+declare void @llvm.va_start.p0(ptr)
+declare void @llvm.va_end.p0(ptr)
 
 define void @va_func(ptr readonly %b, ...) readonly nounwind {
 ; CHECK-LABEL: define void @va_func(ptr nocapture readonly %b, ...)
  entry:
   %valist = alloca i8
-  call void @llvm.va_start(ptr %valist)
-  call void @llvm.va_end(ptr %valist)
+  call void @llvm.va_start.p0(ptr %valist)
+  call void @llvm.va_end.p0(ptr %valist)
   %x = call i32 @caller(ptr %b)
   ret void
 }
@@ -28,8 +28,8 @@ define void @va_func2(ptr readonly %b, ...) {
 ; CHECK-LABEL: define void @va_func2(ptr nocapture readonly %b, ...)
  entry:
   %valist = alloca i8
-  call void @llvm.va_start(ptr %valist)
-  call void @llvm.va_end(ptr %valist)
+  call void @llvm.va_start.p0(ptr %valist)
+  call void @llvm.va_end.p0(ptr %valist)
   %x = call i32 @caller(ptr %b)
   ret void
 }
diff --git a/llvm/test/Transforms/FunctionImport/Inputs/funcimport.ll b/llvm/test/Transforms/FunctionImport/Inputs/funcimport.ll
index 07a7f99e4626..593cabd973ae 100644
--- a/llvm/test/Transforms/FunctionImport/Inputs/funcimport.ll
+++ b/llvm/test/Transforms/FunctionImport/Inputs/funcimport.ll
@@ -160,8 +160,8 @@ define void @variadic_no_va_start(...) {
 ; doesn't handle it.
 define void @variadic_va_start(...) {
     %ap = alloca ptr, align 8
-    call void @llvm.va_start(ptr %ap)
+    call void @llvm.va_start.p0(ptr %ap)
     ret void
 }
 
-declare void @llvm.va_start(ptr) nounwind
+declare void @llvm.va_start.p0(ptr) nounwind
diff --git a/llvm/test/Transforms/GlobalOpt/inalloca-varargs.ll b/llvm/test/Transforms/GlobalOpt/inalloca-varargs.ll
index 188210782edd..d2dbd3d0d7dc 100644
--- a/llvm/test/Transforms/GlobalOpt/inalloca-varargs.ll
+++ b/llvm/test/Transforms/GlobalOpt/inalloca-varargs.ll
@@ -23,16 +23,16 @@ define internal i32 @i(ptr inalloca(ptr) %a, ...) {
 ; CHECK-LABEL: define {{[^@]+}}@i
 ; CHECK-SAME: (ptr inalloca(ptr) [[A:%.*]], ...) unnamed_addr {
 ; CHECK-NEXT:    [[AP:%.*]] = alloca ptr, align 4
-; CHECK-NEXT:    call void @llvm.va_start(ptr [[AP]])
+; CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[AP]])
 ; CHECK-NEXT:    [[ARGP_CUR:%.*]] = load ptr, ptr [[AP]], align 4
 ; CHECK-NEXT:    [[L:%.*]] = load i32, ptr [[ARGP_CUR]], align 4
 ; CHECK-NEXT:    ret i32 [[L]]
 ;
   %ap = alloca ptr, align 4
-  call void @llvm.va_start(ptr %ap)
+  call void @llvm.va_start.p0(ptr %ap)
   %argp.cur = load ptr, ptr %ap, align 4
   %l = load i32, ptr %argp.cur, align 4
   ret i32 %l
 }
 
-declare void @llvm.va_start(ptr)
+declare void @llvm.va_start.p0(ptr)
diff --git a/llvm/test/Transforms/IROutliner/illegal-vaarg.ll b/llvm/test/Transforms/IROutliner/illegal-vaarg.ll
index eaffefe3d9d5..f606b288541e 100644
--- a/llvm/test/Transforms/IROutliner/illegal-vaarg.ll
+++ b/llvm/test/Transforms/IROutliner/illegal-vaarg.ll
@@ -4,9 +4,9 @@
 ; This test ensures that we do not outline vararg instructions or intrinsics, as
 ; they may cause inconsistencies when outlining.
 
-declare void @llvm.va_start(i8*)
-declare void @llvm.va_copy(i8*, i8*)
-declare void @llvm.va_end(i8*)
+declare void @llvm.va_start.p0i8(i8*)
+declare void @llvm.va_copy.p0i8.p0i8(i8*, i8*)
+declare void @llvm.va_end.p0i8(i8*)
 
 define i32 @func1(i32 %a, double %b, i8* %v, ...) nounwind {
 ; CHECK-LABEL: @func1(
@@ -21,10 +21,10 @@ define i32 @func1(i32 %a, double %b, i8* %v, ...) nounwind {
 ; CHECK-NEXT:    call void @outlined_ir_func_0(i32 [[A:%.*]], i32* [[A_ADDR]], double [[B:%.*]], double* [[B_ADDR]], i8** [[AP]], i8** [[AP1_LOC]])
 ; CHECK-NEXT:    [[AP1_RELOAD:%.*]] = load i8*, i8** [[AP1_LOC]], align 8
 ; CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 -1, i8* [[LT_CAST]])
-; CHECK-NEXT:    call void @llvm.va_start(i8* [[AP1_RELOAD]])
+; CHECK-NEXT:    call void @llvm.va_start.p0i8(i8* [[AP1_RELOAD]])
 ; CHECK-NEXT:    [[TMP0:%.*]] = va_arg i8** [[AP]], i32
-; CHECK-NEXT:    call void @llvm.va_copy(i8* [[V:%.*]], i8* [[AP1_RELOAD]])
-; CHECK-NEXT:    call void @llvm.va_end(i8* [[AP1_RELOAD]])
+; CHECK-NEXT:    call void @llvm.va_copy.p0i8.p0i8(i8* [[V:%.*]], i8* [[AP1_RELOAD]])
+; CHECK-NEXT:    call void @llvm.va_end.p0i8(i8* [[AP1_RELOAD]])
 ; CHECK-NEXT:    store i32 [[TMP0]], i32* [[C]], align 4
 ; CHECK-NEXT:    [[TMP:%.*]] = load i32, i32* [[C]], align 4
 ; CHECK-NEXT:    ret i32 [[TMP]]
@@ -37,10 +37,10 @@ entry:
   store i32 %a, i32* %a.addr, align 4
   store double %b, double* %b.addr, align 8
   %ap1 = bitcast i8** %ap to i8*
-  call void @llvm.va_start(i8* %ap1)
+  call void @llvm.va_start.p0i8(i8* %ap1)
   %0 = va_arg i8** %ap, i32
-  call void @llvm.va_copy(i8* %v, i8* %ap1)
-  call void @llvm.va_end(i8* %ap1)
+  call void @llvm.va_copy.p0i8.p0i8(i8* %v, i8* %ap1)
+  call void @llvm.va_end.p0i8(i8* %ap1)
   store i32 %0, i32* %c, align 4
   %tmp = load i32, i32* %c, align 4
   ret i32 %tmp
@@ -59,10 +59,10 @@ define i32 @func2(i32 %a, double %b, i8* %v, ...) nounwind {
 ; CHECK-NEXT:    call void @outlined_ir_func_0(i32 [[A:%.*]], i32* [[A_ADDR]], double [[B:%.*]], double* [[B_ADDR]], i8** [[AP]], i8** [[AP1_LOC]])
 ; CHECK-NEXT:    [[AP1_RELOAD:%.*]] = load i8*, i8** [[AP1_LOC]], align 8
 ; CHECK-NEXT:    call void @llvm.lifetime.end.p0i8(i64 -1, i8* [[LT_CAST]])
-; CHECK-NEXT:    call void @llvm.va_start(i8* [[AP1_RELOAD]])
+; CHECK-NEXT:    call void @llvm.va_start.p0i8(i8* [[AP1_RELOAD]])
 ; CHECK-NEXT:    [[TMP0:%.*]] = va_arg i8** [[AP]], i32
-; CHECK-NEXT:    call void @llvm.va_copy(i8* [[V:%.*]], i8* [[AP1_RELOAD]])
-; CHECK-NEXT:    call void @llvm.va_end(i8* [[AP1_RELOAD]])
+; CHECK-NEXT:    call void @llvm.va_copy.p0i8.p0i8(i8* [[V:%.*]], i8* [[AP1_RELOAD]])
+; CHECK-NEXT:    call void @llvm.va_end.p0i8(i8* [[AP1_RELOAD]])
 ; CHECK-NEXT:    store i32 [[TMP0]], i32* [[C]], align 4
 ; CHECK-NEXT:    [[AP2:%.*]] = bitcast i8** [[AP]] to i8*
 ; CHECK-NEXT:    [[TMP:%.*]] = load i32, i32* [[C]], align 4
@@ -76,10 +76,10 @@ entry:
   store i32 %a, i32* %a.addr, align 4
   store double %b, double* %b.addr, align 8
   %ap1 = bitcast i8** %ap to i8*
-  call void @llvm.va_start(i8* %ap1)
+  call void @llvm.va_start.p0i8(i8* %ap1)
   %0 = va_arg i8** %ap, i32
-  call void @llvm.va_copy(i8* %v, i8* %ap1)
-  call void @llvm.va_end(i8* %ap1)
+  call void @llvm.va_copy.p0i8.p0i8(i8* %v, i8* %ap1)
+  call void @llvm.va_end.p0i8(i8* %ap1)
   store i32 %0, i32* %c, align 4
   %ap2 = bitcast i8** %ap to i8*
   %tmp = load i32, i32* %c, align 4
diff --git a/llvm/test/Transforms/IROutliner/outline-vaarg-intrinsic.ll b/llvm/test/Transforms/IROutliner/outline-vaarg-intrinsic.ll
index 8e36335b3120..55746cf5fdfc 100644
--- a/llvm/test/Transforms/IROutliner/outline-vaarg-intrinsic.ll
+++ b/llvm/test/Transforms/IROutliner/outline-vaarg-intrinsic.ll
@@ -4,9 +4,9 @@
 ; This test checks that we sucessfully outline identical memcpy var arg
 ; intrinsics, but not the var arg instruction itself.
 
-declare void @llvm.va_start(i8*)
-declare void @llvm.va_copy(i8*, i8*)
-declare void @llvm.va_end(i8*)
+declare void @llvm.va_start.p0i8(i8*)
+declare void @llvm.va_copy.p0i8.p0i8(i8*, i8*)
+declare void @llvm.va_end.p0i8(i8*)
 
 define i32 @func1(i32 %a, double %b, i8* %v, ...) nounwind {
 entry:
@@ -17,10 +17,10 @@ entry:
   store i32 %a, i32* %a.addr, align 4
   store double %b, double* %b.addr, align 8
   %ap1 = bitcast i8** %ap to i8*
-  call void @llvm.va_start(i8* %ap1)
+  call void @llvm.va_start.p0i8(i8* %ap1)
   %0 = va_arg i8** %ap, i32
-  call void @llvm.va_copy(i8* %v, i8* %ap1)
-  call void @llvm.va_end(i8* %ap1)
+  call void @llvm.va_copy.p0i8.p0i8(i8* %v, i8* %ap1)
+  call void @llvm.va_end.p0i8(i8* %ap1)
   store i32 %0, i32* %c, align 4
   %tmp = load i32, i32* %c, align 4
   ret i32 %tmp
@@ -35,10 +35,10 @@ entry:
   store i32 %a, i32* %a.addr, align 4
   store double %b, double* %b.addr, align 8
   %ap1 = bitcast i8** %ap to i8*
-  call void @llvm.va_start(i8* %ap1)
+  call void @llvm.va_start.p0i8(i8* %ap1)
   %0 = va_arg i8** %ap, i32
-  call void @llvm.va_copy(i8* %v, i8* %ap1)
-  call void @llvm.va_end(i8* %ap1)
+  call void @llvm.va_copy.p0i8.p0i8(i8* %v, i8* %ap1)
+  call void @llvm.va_end.p0i8(i8* %ap1)
   store i32 %0, i32* %c, align 4
   %ap2 = bitcast i8** %ap to i8*
   %tmp = load i32, i32* %c, align 4
@@ -53,7 +53,7 @@ entry:
 ; CHECK-NEXT:    store i32 [[A:%.*]], i32* [[A_ADDR]], align 4
 ; CHECK-NEXT:    store double [[B:%.*]], double* [[B_ADDR]], align 8
 ; CHECK-NEXT:    [[AP1:%.*]] = bitcast i8** [[AP]] to i8*
-; CHECK-NEXT:    call void @llvm.va_start(i8* [[AP1]])
+; CHECK-NEXT:    call void @llvm.va_start.p0i8(i8* [[AP1]])
 ; CHECK-NEXT:    [[TMP0:%.*]] = va_arg i8** [[AP]], i32
 ; CHECK-NEXT:    call void @outlined_ir_func_0(i8* [[V:%.*]], i8* [[AP1]], i32 [[TMP0]], i32* [[C]])
 ; CHECK-NEXT:    [[TMP:%.*]] = load i32, i32* [[C]], align 4
@@ -69,7 +69,7 @@ entry:
 ; CHECK-NEXT:    store i32 [[A:%.*]], i32* [[A_ADDR]], align 4
 ; CHECK-NEXT:    store double [[B:%.*]], double* [[B_ADDR]], align 8
 ; CHECK-NEXT:    [[AP1:%.*]] = bitcast i8** [[AP]] to i8*
-; CHECK-NEXT:    call void @llvm.va_start(i8* [[AP1]])
+; CHECK-NEXT:    call void @llvm.va_start.p0i8(i8* [[AP1]])
 ; CHECK-NEXT:    [[TMP0:%.*]] = va_arg i8** [[AP]], i32
 ; CHECK-NEXT:    call void @outlined_ir_func_0(i8* [[V:%.*]], i8* [[AP1]], i32 [[TMP0]], i32* [[C]])
 ; CHECK-NEXT:    [[AP2:%.*]] = bitcast i8** [[AP]] to i8*
@@ -81,8 +81,8 @@ entry:
 ; CHECK-NEXT:  newFuncRoot:
 ; CHECK-NEXT:    br label [[ENTRY_TO_OUTLINE:%.*]]
 ; CHECK:       entry_to_outline:
-; CHECK-NEXT:    call void @llvm.va_copy(i8* [[TMP0:%.*]], i8* [[TMP1:%.*]])
-; CHECK-NEXT:    call void @llvm.va_end(i8* [[TMP1]])
+; CHECK-NEXT:    call void @llvm.va_copy.p0i8.p0i8(i8* [[TMP0:%.*]], i8* [[TMP1:%.*]])
+; CHECK-NEXT:    call void @llvm.va_end.p0i8(i8* [[TMP1]])
 ; CHECK-NEXT:    store i32 [[TMP2:%.*]], i32* [[TMP3:%.*]], align 4
 ; CHECK-NEXT:    br label [[ENTRY_AFTER_OUTLINE_EXITSTUB:%.*]]
 ; CHECK:       entry_after_outline.exitStub:
diff --git a/llvm/test/Transforms/Inline/inline-varargs.ll b/llvm/test/Transforms/Inline/inline-varargs.ll
index 6fbcd123ddfe..bd02d1d42f7d 100644
--- a/llvm/test/Transforms/Inline/inline-varargs.ll
+++ b/llvm/test/Transforms/Inline/inline-varargs.ll
@@ -58,9 +58,9 @@ define internal i32 @varg_accessed(...) {
 entry:
   %vargs = alloca i8*, align 8
   %vargs.ptr = bitcast i8** %vargs to i8*
-  call void @llvm.va_start(i8* %vargs.ptr)
+  call void @llvm.va_start.p0(i8* %vargs.ptr)
   %va1 = va_arg i8** %vargs, i32
-  call void @llvm.va_end(i8* %vargs.ptr)
+  call void @llvm.va_end.p0(i8* %vargs.ptr)
   ret i32 %va1
 }
 
@@ -68,9 +68,9 @@ define internal i32 @varg_accessed_alwaysinline(...) alwaysinline {
 entry:
   %vargs = alloca i8*, align 8
   %vargs.ptr = bitcast i8** %vargs to i8*
-  call void @llvm.va_start(i8* %vargs.ptr)
+  call void @llvm.va_start.p0(i8* %vargs.ptr)
   %va1 = va_arg i8** %vargs, i32
-  call void @llvm.va_end(i8* %vargs.ptr)
+  call void @llvm.va_end.p0(i8* %vargs.ptr)
   ret i32 %va1
 }
 
@@ -90,22 +90,22 @@ entry:
   %ap.ptr = bitcast i8** %ap to i8*
   %ap2 = alloca i8*, align 4
   %ap2.ptr = bitcast i8** %ap to i8*
-  call void @llvm.va_start(i8* nonnull %ap.ptr)
+  call void @llvm.va_start.p0(i8* nonnull %ap.ptr)
   call fastcc void @callee_with_vaend(i8* nonnull %ap.ptr)
-  call void @llvm.va_start(i8* nonnull %ap2.ptr)
+  call void @llvm.va_start.p0(i8* nonnull %ap2.ptr)
   call fastcc void @callee_with_vaend_alwaysinline(i8* nonnull %ap2.ptr)
   ret void
 }
 
 define internal fastcc void @callee_with_vaend_alwaysinline(i8* %a) alwaysinline {
 entry:
-  tail call void @llvm.va_end(i8* %a)
+  tail call void @llvm.va_end.p0(i8* %a)
   ret void
 }
 
 define internal fastcc void @callee_with_vaend(i8* %a) {
 entry:
-  tail call void @llvm.va_end(i8* %a)
+  tail call void @llvm.va_end.p0(i8* %a)
   ret void
 }
 
@@ -113,8 +113,8 @@ entry:
 ; CHECK-NOT: @callee_with_vaend
 ; CHECK-NOT: @callee_with_vaend_alwaysinline
 
-declare void @llvm.va_start(i8*)
-declare void @llvm.va_end(i8*)
+declare void @llvm.va_start.p0(i8*)
+declare void @llvm.va_end.p0(i8*)
 
 ; CHECK: attributes [[FN_ATTRS]] = { "foo"="bar" }
 attributes #0 = { "foo"="bar" }
diff --git a/llvm/test/Transforms/InstCombine/vararg.ll b/llvm/test/Transforms/InstCombine/vararg.ll
index 923486492322..ef2e38cda56a 100644
--- a/llvm/test/Transforms/InstCombine/vararg.ll
+++ b/llvm/test/Transforms/InstCombine/vararg.ll
@@ -4,8 +4,8 @@
 
 declare void @llvm.lifetime.start.p0(i64, ptr nocapture)
 declare void @llvm.lifetime.end.p0(i64, ptr nocapture)
-declare void @llvm.va_start(ptr)
-declare void @llvm.va_end(ptr)
+declare void @llvm.va_start.p0(ptr)
+declare void @llvm.va_end.p0(ptr)
 declare void @llvm.va_copy(ptr, ptr)
 
 define i32 @func(ptr nocapture readnone %fmt, ...) {
@@ -16,12 +16,12 @@ entry:
   %va0 = alloca %struct.__va_list, align 8
   %va1 = alloca %struct.__va_list, align 8
   call void @llvm.lifetime.start.p0(i64 32, ptr %va0)
-  call void @llvm.va_start(ptr %va0)
+  call void @llvm.va_start.p0(ptr %va0)
   call void @llvm.lifetime.start.p0(i64 32, ptr %va1)
   call void @llvm.va_copy(ptr %va1, ptr %va0)
-  call void @llvm.va_end(ptr %va1)
+  call void @llvm.va_end.p0(ptr %va1)
   call void @llvm.lifetime.end.p0(i64 32, ptr %va1)
-  call void @llvm.va_end(ptr %va0)
+  call void @llvm.va_end.p0(ptr %va0)
   call void @llvm.lifetime.end.p0(i64 32, ptr %va0)
   ret i32 0
 }
diff --git a/llvm/test/Transforms/MergeFunc/va_arg.ll b/llvm/test/Transforms/MergeFunc/va_arg.ll
index 1a48a6395ede..3d03e509f65a 100644
--- a/llvm/test/Transforms/MergeFunc/va_arg.ll
+++ b/llvm/test/Transforms/MergeFunc/va_arg.ll
@@ -15,7 +15,7 @@ target triple = "x86_64-unknown-linux-gnu"
 define dso_local void @_Z9simple_vaPKcz(i8* nocapture readnone, ...) unnamed_addr {
   %2 = alloca [1 x %struct.__va_list_tag], align 16
   %3 = bitcast [1 x %struct.__va_list_tag]* %2 to i8*
-  call void @llvm.va_start(i8* nonnull %3)
+  call void @llvm.va_start.p0(i8* nonnull %3)
   %4 = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %2, i64 0, i64 0, i32 0
   %5 = load i32, i32* %4, align 16
   %6 = icmp ult i32 %5, 41
@@ -42,18 +42,18 @@ define dso_local void @_Z9simple_vaPKcz(i8* nocapture readnone, ...) unnamed_add
   %19 = bitcast i8* %18 to i32*
   %20 = load i32, i32* %19, align 4
   call void @_Z6escapei(i32 %20)
-  call void @llvm.va_end(i8* nonnull %3)
+  call void @llvm.va_end.p0(i8* nonnull %3)
   ret void
 }
 
 ; Function Attrs: nounwind
-declare void @llvm.va_start(i8*)
+declare void @llvm.va_start.p0(i8*)
 
 ; Function Attrs: minsize optsize
 declare dso_local void @_Z6escapei(i32) local_unnamed_addr
 
 ; Function Attrs: nounwind
-declare void @llvm.va_end(i8*)
+declare void @llvm.va_end.p0(i8*)
 
 ; CHECK-LABEL: define {{.*}}@_Z10simple_va2PKcz
 ; CHECK: call void @llvm.va_start
@@ -61,7 +61,7 @@ declare void @llvm.va_end(i8*)
 define dso_local void @_Z10simple_va2PKcz(i8* nocapture readnone, ...) unnamed_addr {
   %2 = alloca [1 x %struct.__va_list_tag], align 16
   %3 = bitcast [1 x %struct.__va_list_tag]* %2 to i8*
-  call void @llvm.va_start(i8* nonnull %3)
+  call void @llvm.va_start.p0(i8* nonnull %3)
   %4 = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %2, i64 0, i64 0, i32 0
   %5 = load i32, i32* %4, align 16
   %6 = icmp ult i32 %5, 41
@@ -88,6 +88,6 @@ define dso_local void @_Z10simple_va2PKcz(i8* nocapture readnone, ...) unnamed_a
   %19 = bitcast i8* %18 to i32*
   %20 = load i32, i32* %19, align 4
   call void @_Z6escapei(i32 %20)
-  call void @llvm.va_end(i8* nonnull %3)
+  call void @llvm.va_end.p0(i8* nonnull %3)
   ret void
 }
diff --git a/llvm/test/Transforms/NewGVN/pr31483.ll b/llvm/test/Transforms/NewGVN/pr31483.ll
index fc5e64d11249..0cce7bc53b68 100644
--- a/llvm/test/Transforms/NewGVN/pr31483.ll
+++ b/llvm/test/Transforms/NewGVN/pr31483.ll
@@ -44,7 +44,7 @@ define signext i32 @ham(i8* %arg, i8* %arg1) #0 {
 ; CHECK-NEXT:    br label %bb2
 ; CHECK:       bb23:
 ; CHECK-NEXT:    [[TMP24:%.*]] = bitcast i8** [[TMP]] to i8*
-; CHECK-NEXT:    call void @llvm.va_end(i8* [[TMP24]])
+; CHECK-NEXT:    call void @llvm.va_end.p0i8(i8* [[TMP24]])
 ; CHECK-NEXT:    ret i32 undef
 ;
 bb:
@@ -91,14 +91,14 @@ bb22:                                             ; preds = %bb16, %bb10, %bb6
 
 bb23:                                             ; preds = %bb2
   %tmp24 = bitcast i8** %tmp to i8*
-  call void @llvm.va_end(i8* %tmp24)
+  call void @llvm.va_end.p0i8(i8* %tmp24)
   ret i32 undef
 }
 
 declare signext i32 @zot(i8*, ...) #1
 
 ; Function Attrs: nounwind
-declare void @llvm.va_end(i8*) #2
+declare void @llvm.va_end.p0i8(i8*) #2
 
 attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64" "target-features"="+altivec,-bpermd,-crypto,-direct-move,-extdiv,-power8-vector,-vsx" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64" "target-features"="+altivec,-bpermd,-crypto,-direct-move,-extdiv,-power8-vector,-vsx" "unsafe-fp-math"="false" "use-soft-float"="false" }
diff --git a/llvm/test/Transforms/Reassociate/vaarg_movable.ll b/llvm/test/Transforms/Reassociate/vaarg_movable.ll
index 337877a54a90..e52aa1a3a3af 100644
--- a/llvm/test/Transforms/Reassociate/vaarg_movable.ll
+++ b/llvm/test/Transforms/Reassociate/vaarg_movable.ll
@@ -10,24 +10,24 @@ define i32 @func(i32 %dummy, ...) {
 ;
 ; CHECK-LABEL: @func(
 ; CHECK-NEXT:    [[VARARGS:%.*]] = alloca ptr, align 8
-; CHECK-NEXT:    call void @llvm.va_start(ptr [[VARARGS]])
+; CHECK-NEXT:    call void @llvm.va_start.p0(ptr [[VARARGS]])
 ; CHECK-NEXT:    [[V0:%.*]] = va_arg ptr [[VARARGS]], i32
 ; CHECK-NEXT:    [[V1:%.*]] = va_arg ptr [[VARARGS]], i32
 ; CHECK-NEXT:    [[V0_NEG:%.*]] = sub i32 0, [[V0]]
 ; CHECK-NEXT:    [[SUB:%.*]] = add i32 [[V0_NEG]], 1
 ; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[SUB]], [[V1]]
-; CHECK-NEXT:    call void @llvm.va_end(ptr [[VARARGS]])
+; CHECK-NEXT:    call void @llvm.va_end.p0(ptr [[VARARGS]])
 ; CHECK-NEXT:    ret i32 [[ADD]]
 ;
   %varargs = alloca ptr, align 8
-  call void @llvm.va_start(ptr %varargs)
+  call void @llvm.va_start.p0(ptr %varargs)
   %v0 = va_arg ptr %varargs, i32
   %v1 = va_arg ptr %varargs, i32
   %sub = sub nsw i32 %v1, %v0
   %add = add nsw i32 %sub, 1
-  call void @llvm.va_end(ptr %varargs)
+  call void @llvm.va_end.p0(ptr %varargs)
   ret i32 %add
 }
 
-declare void @llvm.va_start(ptr)
-declare void @llvm.va_end(ptr)
+declare void @llvm.va_start.p0(ptr)
+declare void @llvm.va_end.p0(ptr)