From f3f87d35e69455f4cde857d96cf954f498bb1ce1 Mon Sep 17 00:00:00 2001 From: gitoleg Date: Thu, 19 Dec 2024 17:29:02 +0300 Subject: [PATCH] [CIR][Lowering] fixes return value for = operator for bitfields --- clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp | 7 ++++--- clang/test/CIR/CodeGen/bitfields.c | 12 ++++++++++++ 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp index c0400de4418f..c933035cd850 100644 --- a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp +++ b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp @@ -3576,9 +3576,6 @@ mlir::LogicalResult CIRToLLVMSetBitfieldOpLowering::matchAndRewrite( auto resultTy = getTypeConverter()->convertType(op.getType()); - resultVal = createIntCast(rewriter, resultVal, - mlir::cast(resultTy)); - if (info.getIsSigned()) { assert(size <= storageSize); unsigned highBits = storageSize - size; @@ -3589,6 +3586,10 @@ mlir::LogicalResult CIRToLLVMSetBitfieldOpLowering::matchAndRewrite( } } + resultVal = createIntCast(rewriter, resultVal, + mlir::cast(resultTy), + info.getIsSigned()); + rewriter.replaceOp(op, resultVal); return mlir::success(); } diff --git a/clang/test/CIR/CodeGen/bitfields.c b/clang/test/CIR/CodeGen/bitfields.c index 2671523cc4ca..9aace04ead08 100644 --- a/clang/test/CIR/CodeGen/bitfields.c +++ b/clang/test/CIR/CodeGen/bitfields.c @@ -1,5 +1,7 @@ // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-cir %s -o %t.cir // RUN: FileCheck --input-file=%t.cir %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t.ll +// RUN: FileCheck --check-prefix=LLVM --input-file=%t.ll %s struct __long { struct __attribute__((__packed__)) { @@ -129,3 +131,13 @@ void createU() { void createD() { D d = {1,2,3}; } + +// check the -1 is stored to the ret value +// LLVM: define dso_local i32 {{@.*get_a.*}} +// LLVM: %[[V1:.*]] = alloca i32 +// LLVM: store i32 -1, ptr %[[V1]], align 4 +// LLVM: %[[V2:.*]] = load i32, ptr %[[V1]], align 4 +// LLVM: ret i32 %[[V2:.*]] +int get_a(T *t) { + return (t->a = 7); +}