From 22a5b0e03e561cfabf3d6be605afe6f04aab3c61 Mon Sep 17 00:00:00 2001 From: Brandon Wu Date: Tue, 14 Jan 2025 02:31:59 -0800 Subject: [PATCH] fixup! Add all 32-65536 calling conventions and remove log2ABIVLen --- clang/include/clang-c/Index.h | 13 +- clang/include/clang/AST/Type.h | 44 +++---- clang/include/clang/AST/TypeProperties.td | 7 +- clang/include/clang/Basic/Specifiers.h | 62 +++++---- clang/include/clang/CodeGen/CGFunctionInfo.h | 9 +- clang/lib/AST/ASTContext.cpp | 2 - clang/lib/AST/ItaniumMangle.cpp | 15 ++- clang/lib/AST/Type.cpp | 16 ++- clang/lib/AST/TypePrinter.cpp | 20 ++- clang/lib/Basic/Targets/RISCV.cpp | 13 +- clang/lib/CodeGen/CGCall.cpp | 42 ++++++- clang/lib/CodeGen/CGDebugInfo.cpp | 17 ++- clang/lib/CodeGen/Targets/RISCV.cpp | 43 ++++++- clang/lib/Sema/SemaDeclAttr.cpp | 25 +++- clang/lib/Sema/SemaType.cpp | 38 +++--- .../RISCV/riscv-vector-callingconv-llvm-ir.c | 60 ++++----- .../riscv-vector-callingconv-llvm-ir.cpp | 50 ++++---- .../CodeGen/RISCV/riscv-vector-callingconv.c | 12 +- .../RISCV/riscv-vector-callingconv.cpp | 6 +- clang/tools/libclang/CXType.cpp | 13 +- llvm/include/llvm/IR/CallingConv.h | 13 +- llvm/lib/AsmParser/LLParser.cpp | 30 ++++- llvm/lib/IR/AsmWriter.cpp | 18 ++- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 15 ++- llvm/test/Assembler/riscv_vls_cc.ll | 118 +++++++++++++++++- llvm/test/Bitcode/compatibility.ll | 50 +++++++- 26 files changed, 564 insertions(+), 187 deletions(-) diff --git a/clang/include/clang-c/Index.h b/clang/include/clang-c/Index.h index 21a4863203b6ec..dfcd493470075e 100644 --- a/clang/include/clang-c/Index.h +++ b/clang/include/clang-c/Index.h @@ -3053,7 +3053,18 @@ enum CXCallingConv { CXCallingConv_M68kRTD = 19, CXCallingConv_PreserveNone = 20, CXCallingConv_RISCVVectorCall = 21, - CXCallingConv_RISCVVLSCall = 22, + CXCallingConv_RISCVVLSCall_32 = 22, + CXCallingConv_RISCVVLSCall_64 = 23, + CXCallingConv_RISCVVLSCall_128 = 24, + CXCallingConv_RISCVVLSCall_256 = 25, + CXCallingConv_RISCVVLSCall_512 = 26, + CXCallingConv_RISCVVLSCall_1024 = 27, + CXCallingConv_RISCVVLSCall_2048 = 28, + CXCallingConv_RISCVVLSCall_4096 = 29, + CXCallingConv_RISCVVLSCall_8192 = 30, + CXCallingConv_RISCVVLSCall_16384 = 31, + CXCallingConv_RISCVVLSCall_32768 = 32, + CXCallingConv_RISCVVLSCall_65536 = 33, CXCallingConv_Invalid = 100, CXCallingConv_Unexposed = 200 diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h index ccdcbfe14ff24b..1568ee4c8f8dcc 100644 --- a/clang/include/clang/AST/Type.h +++ b/clang/include/clang/AST/Type.h @@ -1946,7 +1946,7 @@ class alignas(TypeAlignment) Type : public ExtQualsTypeCommonBase { /// Extra information which affects how the function is called, like /// regparm and the calling convention. LLVM_PREFERRED_TYPE(CallingConv) - unsigned ExtInfo : 18; + unsigned ExtInfo : 14; /// The ref-qualifier associated with a \c FunctionProtoType. /// @@ -4437,40 +4437,36 @@ class FunctionType : public Type { // Type::FunctionTypeBitfields::ExtInfo as well. // | CC |noreturn|produces|nocallersavedregs|regparm|nocfcheck|cmsenscall| - // |0 .. 4| 5 | 6 | 7 |8 .. 10| 11 | 12 | - // |RISCV-ABI-VLEN| - // |13 .. 17| + // |0 .. 5| 6 | 7 | 8 |9 .. 11| 12 | 13 | // // regparm is either 0 (no regparm attribute) or the regparm value+1. - enum { CallConvMask = 0x1F }; - enum { NoReturnMask = 0x20 }; - enum { ProducesResultMask = 0x40 }; - enum { NoCallerSavedRegsMask = 0x80 }; + enum { CallConvMask = 0x3F }; + enum { NoReturnMask = 0x40 }; + enum { ProducesResultMask = 0x80 }; + enum { NoCallerSavedRegsMask = 0x100 }; enum { - RegParmMask = 0x700, - RegParmOffset = 8 + RegParmMask = 0xe00, + RegParmOffset = 9 }; - enum { NoCfCheckMask = 0x800 }; - enum { CmseNSCallMask = 0x1000 }; - enum { Log2RISCVABIVLenMask = 0x3E000, Log2RISCVABIVLenOffset = 13 }; - uint32_t Bits = CC_C; + enum { NoCfCheckMask = 0x1000 }; + enum { CmseNSCallMask = 0x2000 }; + uint16_t Bits = CC_C; - ExtInfo(unsigned Bits) : Bits(static_cast(Bits)) {} + ExtInfo(unsigned Bits) : Bits(static_cast(Bits)) {} public: // Constructor with no defaults. Use this when you know that you // have all the elements (when reading an AST file for example). ExtInfo(bool noReturn, bool hasRegParm, unsigned regParm, CallingConv cc, bool producesResult, bool noCallerSavedRegs, bool NoCfCheck, - bool cmseNSCall, unsigned Log2RISCVABIVLen) { + bool cmseNSCall) { assert((!hasRegParm || regParm < 7) && "Invalid regparm value"); Bits = ((unsigned)cc) | (noReturn ? NoReturnMask : 0) | (producesResult ? ProducesResultMask : 0) | (noCallerSavedRegs ? NoCallerSavedRegsMask : 0) | (hasRegParm ? ((regParm + 1) << RegParmOffset) : 0) | (NoCfCheck ? NoCfCheckMask : 0) | - (cmseNSCall ? CmseNSCallMask : 0) | - (Log2RISCVABIVLen << Log2RISCVABIVLenOffset); + (cmseNSCall ? CmseNSCallMask : 0); } // Constructor with all defaults. Use when for example creating a @@ -4497,10 +4493,6 @@ class FunctionType : public Type { CallingConv getCC() const { return CallingConv(Bits & CallConvMask); } - unsigned getLog2RISCVABIVLen() const { - return (Bits & Log2RISCVABIVLenMask) >> Log2RISCVABIVLenOffset; - } - bool operator==(ExtInfo Other) const { return Bits == Other.Bits; } @@ -4556,11 +4548,6 @@ class FunctionType : public Type { return ExtInfo((Bits & ~CallConvMask) | (unsigned) cc); } - ExtInfo withLog2RISCVABIVLen(unsigned Log2RISCVABIVLen) const { - return ExtInfo((Bits & ~Log2RISCVABIVLenMask) | - (Log2RISCVABIVLen << Log2RISCVABIVLenOffset)); - } - void Profile(llvm::FoldingSetNodeID &ID) const { ID.AddInteger(Bits); } @@ -4670,9 +4657,6 @@ class FunctionType : public Type { bool getCmseNSCallAttr() const { return getExtInfo().getCmseNSCall(); } CallingConv getCallConv() const { return getExtInfo().getCC(); } - unsigned getLog2RISCVABIVLen() const { - return getExtInfo().getLog2RISCVABIVLen(); - } ExtInfo getExtInfo() const { return ExtInfo(FunctionTypeBits.ExtInfo); } static_assert((~Qualifiers::FastMask & Qualifiers::CVRMask) == 0, diff --git a/clang/include/clang/AST/TypeProperties.td b/clang/include/clang/AST/TypeProperties.td index d5f653013a9b8b..6f1a76bd18fb50 100644 --- a/clang/include/clang/AST/TypeProperties.td +++ b/clang/include/clang/AST/TypeProperties.td @@ -313,9 +313,6 @@ let Class = FunctionType in { def : Property<"cmseNSCall", Bool> { let Read = [{ node->getExtInfo().getCmseNSCall() }]; } - def : Property<"Log2RISCVABIVLen", UInt32> { - let Read = [{ node->getExtInfo().getLog2RISCVABIVLen() }]; - } } let Class = FunctionNoProtoType in { @@ -323,7 +320,7 @@ let Class = FunctionNoProtoType in { auto extInfo = FunctionType::ExtInfo(noReturn, hasRegParm, regParm, callingConvention, producesResult, noCallerSavedRegs, noCfCheck, - cmseNSCall, Log2RISCVABIVLen); + cmseNSCall); return ctx.getFunctionNoProtoType(returnType, extInfo); }]>; } @@ -366,7 +363,7 @@ let Class = FunctionProtoType in { auto extInfo = FunctionType::ExtInfo(noReturn, hasRegParm, regParm, callingConvention, producesResult, noCallerSavedRegs, noCfCheck, - cmseNSCall, Log2RISCVABIVLen); + cmseNSCall); FunctionProtoType::ExtProtoInfo epi; epi.ExtInfo = extInfo; epi.Variadic = variadic; diff --git a/clang/include/clang/Basic/Specifiers.h b/clang/include/clang/Basic/Specifiers.h index d2df5a24da143e..491badcc804e77 100644 --- a/clang/include/clang/Basic/Specifiers.h +++ b/clang/include/clang/Basic/Specifiers.h @@ -276,31 +276,43 @@ namespace clang { /// CallingConv - Specifies the calling convention that a function uses. enum CallingConv { - CC_C, // __attribute__((cdecl)) - CC_X86StdCall, // __attribute__((stdcall)) - CC_X86FastCall, // __attribute__((fastcall)) - CC_X86ThisCall, // __attribute__((thiscall)) - CC_X86VectorCall, // __attribute__((vectorcall)) - CC_X86Pascal, // __attribute__((pascal)) - CC_Win64, // __attribute__((ms_abi)) - CC_X86_64SysV, // __attribute__((sysv_abi)) - CC_X86RegCall, // __attribute__((regcall)) - CC_AAPCS, // __attribute__((pcs("aapcs"))) - CC_AAPCS_VFP, // __attribute__((pcs("aapcs-vfp"))) - CC_IntelOclBicc, // __attribute__((intel_ocl_bicc)) - CC_SpirFunction, // default for OpenCL functions on SPIR target - CC_OpenCLKernel, // inferred for OpenCL kernels - CC_Swift, // __attribute__((swiftcall)) - CC_SwiftAsync, // __attribute__((swiftasynccall)) - CC_PreserveMost, // __attribute__((preserve_most)) - CC_PreserveAll, // __attribute__((preserve_all)) - CC_AArch64VectorCall, // __attribute__((aarch64_vector_pcs)) - CC_AArch64SVEPCS, // __attribute__((aarch64_sve_pcs)) - CC_AMDGPUKernelCall, // __attribute__((amdgpu_kernel)) - CC_M68kRTD, // __attribute__((m68k_rtd)) - CC_PreserveNone, // __attribute__((preserve_none)) - CC_RISCVVectorCall, // __attribute__((riscv_vector_cc)) - CC_RISCVVLSCall, // __attribute__((riscv_vls_cc)) + CC_C, // __attribute__((cdecl)) + CC_X86StdCall, // __attribute__((stdcall)) + CC_X86FastCall, // __attribute__((fastcall)) + CC_X86ThisCall, // __attribute__((thiscall)) + CC_X86VectorCall, // __attribute__((vectorcall)) + CC_X86Pascal, // __attribute__((pascal)) + CC_Win64, // __attribute__((ms_abi)) + CC_X86_64SysV, // __attribute__((sysv_abi)) + CC_X86RegCall, // __attribute__((regcall)) + CC_AAPCS, // __attribute__((pcs("aapcs"))) + CC_AAPCS_VFP, // __attribute__((pcs("aapcs-vfp"))) + CC_IntelOclBicc, // __attribute__((intel_ocl_bicc)) + CC_SpirFunction, // default for OpenCL functions on SPIR target + CC_OpenCLKernel, // inferred for OpenCL kernels + CC_Swift, // __attribute__((swiftcall)) + CC_SwiftAsync, // __attribute__((swiftasynccall)) + CC_PreserveMost, // __attribute__((preserve_most)) + CC_PreserveAll, // __attribute__((preserve_all)) + CC_AArch64VectorCall, // __attribute__((aarch64_vector_pcs)) + CC_AArch64SVEPCS, // __attribute__((aarch64_sve_pcs)) + CC_AMDGPUKernelCall, // __attribute__((amdgpu_kernel)) + CC_M68kRTD, // __attribute__((m68k_rtd)) + CC_PreserveNone, // __attribute__((preserve_none)) + CC_RISCVVectorCall, // __attribute__((riscv_vector_cc)) + CC_RISCVVLSCall_32, // __attribute__((riscv_vls_cc(32))) + CC_RISCVVLSCall_64, // __attribute__((riscv_vls_cc(64))) + CC_RISCVVLSCall_128, // __attribute__((riscv_vls_cc)) or + // __attribute__((riscv_vls_cc(128))) + CC_RISCVVLSCall_256, // __attribute__((riscv_vls_cc(256))) + CC_RISCVVLSCall_512, // __attribute__((riscv_vls_cc(512))) + CC_RISCVVLSCall_1024, // __attribute__((riscv_vls_cc(1024))) + CC_RISCVVLSCall_2048, // __attribute__((riscv_vls_cc(2048))) + CC_RISCVVLSCall_4096, // __attribute__((riscv_vls_cc(4096))) + CC_RISCVVLSCall_8192, // __attribute__((riscv_vls_cc(8192))) + CC_RISCVVLSCall_16384, // __attribute__((riscv_vls_cc(16384))) + CC_RISCVVLSCall_32768, // __attribute__((riscv_vls_cc(32768))) + CC_RISCVVLSCall_65536, // __attribute__((riscv_vls_cc(65536))) }; /// Checks whether the given calling convention supports variadic diff --git a/clang/include/clang/CodeGen/CGFunctionInfo.h b/clang/include/clang/CodeGen/CGFunctionInfo.h index 44ae2755a2ab04..9d785d878b61dc 100644 --- a/clang/include/clang/CodeGen/CGFunctionInfo.h +++ b/clang/include/clang/CodeGen/CGFunctionInfo.h @@ -625,9 +625,6 @@ class CGFunctionInfo final /// Log 2 of the maximum vector width. unsigned MaxVectorWidth : 4; - /// Log2 of ABI_VLEN used in RISCV VLS calling convention. - unsigned Log2RISCVABIVLen : 5; - RequiredArgs Required; /// The struct representing all arguments passed in memory. Only used when @@ -738,13 +735,11 @@ class CGFunctionInfo final bool getHasRegParm() const { return HasRegParm; } unsigned getRegParm() const { return RegParm; } - unsigned getLog2RISCVABIVLen() const { return Log2RISCVABIVLen; } - FunctionType::ExtInfo getExtInfo() const { return FunctionType::ExtInfo(isNoReturn(), getHasRegParm(), getRegParm(), getASTCallingConvention(), isReturnsRetained(), isNoCallerSavedRegs(), isNoCfCheck(), - isCmseNSCall(), getLog2RISCVABIVLen()); + isCmseNSCall()); } CanQualType getReturnType() const { return getArgsBuffer()[0].type; } @@ -798,7 +793,6 @@ class CGFunctionInfo final ID.AddInteger(RegParm); ID.AddBoolean(NoCfCheck); ID.AddBoolean(CmseNSCall); - ID.AddInteger(Log2RISCVABIVLen); ID.AddInteger(Required.getOpaqueData()); ID.AddBoolean(HasExtParameterInfos); if (HasExtParameterInfos) { @@ -826,7 +820,6 @@ class CGFunctionInfo final ID.AddInteger(info.getRegParm()); ID.AddBoolean(info.getNoCfCheck()); ID.AddBoolean(info.getCmseNSCall()); - ID.AddInteger(info.getLog2RISCVABIVLen()); ID.AddInteger(required.getOpaqueData()); ID.AddBoolean(!paramInfos.empty()); if (!paramInfos.empty()) { diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp index 7d043068fa095c..be1dd29d462788 100644 --- a/clang/lib/AST/ASTContext.cpp +++ b/clang/lib/AST/ASTContext.cpp @@ -11108,8 +11108,6 @@ QualType ASTContext::mergeFunctionTypes(QualType lhs, QualType rhs, return {}; if (lbaseInfo.getNoCfCheck() != rbaseInfo.getNoCfCheck()) return {}; - if (lbaseInfo.getLog2RISCVABIVLen() != rbaseInfo.getLog2RISCVABIVLen()) - return {}; // When merging declarations, it's common for supplemental information like // attributes to only be present in one of the declarations, and we generally diff --git a/clang/lib/AST/ItaniumMangle.cpp b/clang/lib/AST/ItaniumMangle.cpp index a63556c647af42..a6ec9925a6fc20 100644 --- a/clang/lib/AST/ItaniumMangle.cpp +++ b/clang/lib/AST/ItaniumMangle.cpp @@ -3489,7 +3489,20 @@ StringRef CXXNameMangler::getCallingConvQualifierName(CallingConv CC) { case CC_M68kRTD: case CC_PreserveNone: case CC_RISCVVectorCall: - case CC_RISCVVLSCall: +#define CC_VLS_CASE(ABI_VLEN) case CC_RISCVVLSCall_##ABI_VLEN: + CC_VLS_CASE(32) + CC_VLS_CASE(64) + CC_VLS_CASE(128) + CC_VLS_CASE(256) + CC_VLS_CASE(512) + CC_VLS_CASE(1024) + CC_VLS_CASE(2048) + CC_VLS_CASE(4096) + CC_VLS_CASE(8192) + CC_VLS_CASE(16384) + CC_VLS_CASE(32768) + CC_VLS_CASE(65536) +#undef CC_VLS_CASE // FIXME: we should be mangling all of the above. return ""; diff --git a/clang/lib/AST/Type.cpp b/clang/lib/AST/Type.cpp index 3472972f6f1065..ff7ea5d97b83b2 100644 --- a/clang/lib/AST/Type.cpp +++ b/clang/lib/AST/Type.cpp @@ -3561,7 +3561,21 @@ StringRef FunctionType::getNameForCallConv(CallingConv CC) { case CC_PreserveNone: return "preserve_none"; // clang-format off case CC_RISCVVectorCall: return "riscv_vector_cc"; - case CC_RISCVVLSCall: return "riscv_vls_cc"; +#define CC_VLS_CASE(ABI_VLEN) \ + case CC_RISCVVLSCall_##ABI_VLEN: return "riscv_vls_cc(" #ABI_VLEN ")"; + CC_VLS_CASE(32) + CC_VLS_CASE(64) + CC_VLS_CASE(128) + CC_VLS_CASE(256) + CC_VLS_CASE(512) + CC_VLS_CASE(1024) + CC_VLS_CASE(2048) + CC_VLS_CASE(4096) + CC_VLS_CASE(8192) + CC_VLS_CASE(16384) + CC_VLS_CASE(32768) + CC_VLS_CASE(65536) +#undef CC_VLS_CASE // clang-format on } diff --git a/clang/lib/AST/TypePrinter.cpp b/clang/lib/AST/TypePrinter.cpp index 65d3b3108175d2..ca62112e22c61a 100644 --- a/clang/lib/AST/TypePrinter.cpp +++ b/clang/lib/AST/TypePrinter.cpp @@ -1136,9 +1136,23 @@ void TypePrinter::printFunctionAfter(const FunctionType::ExtInfo &Info, case CC_RISCVVectorCall: OS << "__attribute__((riscv_vector_cc))"; break; - case CC_RISCVVLSCall: - OS << "__attribute__((riscv_vls_cc))"; - break; +#define CC_VLS_CASE(ABI_VLEN) \ + case CC_RISCVVLSCall_##ABI_VLEN: \ + OS << "__attribute__((riscv_vls_cc" #ABI_VLEN "))"; \ + break; + CC_VLS_CASE(32) + CC_VLS_CASE(64) + CC_VLS_CASE(128) + CC_VLS_CASE(256) + CC_VLS_CASE(512) + CC_VLS_CASE(1024) + CC_VLS_CASE(2048) + CC_VLS_CASE(4096) + CC_VLS_CASE(8192) + CC_VLS_CASE(16384) + CC_VLS_CASE(32768) + CC_VLS_CASE(65536) +#undef CC_VLS_CASE } } diff --git a/clang/lib/Basic/Targets/RISCV.cpp b/clang/lib/Basic/Targets/RISCV.cpp index ebced9da22e8c0..d7fa44f5cf4005 100644 --- a/clang/lib/Basic/Targets/RISCV.cpp +++ b/clang/lib/Basic/Targets/RISCV.cpp @@ -516,7 +516,18 @@ RISCVTargetInfo::checkCallingConvention(CallingConv CC) const { return CCCR_Warning; case CC_C: case CC_RISCVVectorCall: - case CC_RISCVVLSCall: + case CC_RISCVVLSCall_32: + case CC_RISCVVLSCall_64: + case CC_RISCVVLSCall_128: + case CC_RISCVVLSCall_256: + case CC_RISCVVLSCall_512: + case CC_RISCVVLSCall_1024: + case CC_RISCVVLSCall_2048: + case CC_RISCVVLSCall_4096: + case CC_RISCVVLSCall_8192: + case CC_RISCVVLSCall_16384: + case CC_RISCVVLSCall_32768: + case CC_RISCVVLSCall_65536: return CCCR_OK; } } diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp index e2364cf3b303c8..1564b2cdcdf3ab 100644 --- a/clang/lib/CodeGen/CGCall.cpp +++ b/clang/lib/CodeGen/CGCall.cpp @@ -76,8 +76,23 @@ unsigned CodeGenTypes::ClangCallConvToLLVMCallConv(CallingConv CC) { case CC_PreserveNone: return llvm::CallingConv::PreserveNone; // clang-format off case CC_RISCVVectorCall: return llvm::CallingConv::RISCV_VectorCall; - case CC_RISCVVLSCall: return llvm::CallingConv::RISCV_VLSCall; // clang-format on +#define CC_VLS_CASE(ABI_VLEN) \ + case CC_RISCVVLSCall_##ABI_VLEN: \ + return llvm::CallingConv::RISCV_VLSCall_##ABI_VLEN; + CC_VLS_CASE(32) + CC_VLS_CASE(64) + CC_VLS_CASE(128) + CC_VLS_CASE(256) + CC_VLS_CASE(512) + CC_VLS_CASE(1024) + CC_VLS_CASE(2048) + CC_VLS_CASE(4096) + CC_VLS_CASE(8192) + CC_VLS_CASE(16384) + CC_VLS_CASE(32768) + CC_VLS_CASE(65536) +#undef CC_VLS_CASE } } @@ -267,8 +282,28 @@ static CallingConv getCallingConventionForDecl(const ObjCMethodDecl *D, if (D->hasAttr()) return CC_RISCVVectorCall; - if (D->hasAttr()) - return CC_RISCVVLSCall; + if (RISCVVLSCCAttr *PCS = D->getAttr()) { + switch (PCS->getVectorWidth()) { + default: + llvm_unreachable("Invalid RISC-V VLS ABI VLEN"); +#define CC_VLS_CASE(ABI_VLEN) \ + case ABI_VLEN: \ + return CC_RISCVVLSCall_##ABI_VLEN; + CC_VLS_CASE(32) + CC_VLS_CASE(64) + CC_VLS_CASE(128) + CC_VLS_CASE(256) + CC_VLS_CASE(512) + CC_VLS_CASE(1024) + CC_VLS_CASE(2048) + CC_VLS_CASE(4096) + CC_VLS_CASE(8192) + CC_VLS_CASE(16384) + CC_VLS_CASE(32768) + CC_VLS_CASE(65536) +#undef CC_VLS_CASE + } + } return CC_C; } @@ -865,7 +900,6 @@ CGFunctionInfo *CGFunctionInfo::create(unsigned llvmCC, bool instanceMethod, FI->HasExtParameterInfos = !paramInfos.empty(); FI->getArgsBuffer()[0].type = resultType; FI->MaxVectorWidth = 0; - FI->Log2RISCVABIVLen = info.getLog2RISCVABIVLen(); for (unsigned i = 0, e = argTypes.size(); i != e; ++i) FI->getArgsBuffer()[i + 1].type = argTypes[i]; for (unsigned i = 0, e = paramInfos.size(); i != e; ++i) diff --git a/clang/lib/CodeGen/CGDebugInfo.cpp b/clang/lib/CodeGen/CGDebugInfo.cpp index 9d6fa7f98461b7..68bf847f868133 100644 --- a/clang/lib/CodeGen/CGDebugInfo.cpp +++ b/clang/lib/CodeGen/CGDebugInfo.cpp @@ -1593,8 +1593,21 @@ static unsigned getDwarfCC(CallingConv CC) { return llvm::dwarf::DW_CC_LLVM_PreserveNone; case CC_RISCVVectorCall: return llvm::dwarf::DW_CC_LLVM_RISCVVectorCall; - case CC_RISCVVLSCall: - return llvm::dwarf::DW_CC_LLVM_RISCVVectorCall; +#define CC_VLS_CASE(ABI_VLEN) case CC_RISCVVLSCall_##ABI_VLEN: + CC_VLS_CASE(32) + CC_VLS_CASE(64) + CC_VLS_CASE(128) + CC_VLS_CASE(256) + CC_VLS_CASE(512) + CC_VLS_CASE(1024) + CC_VLS_CASE(2048) + CC_VLS_CASE(4096) + CC_VLS_CASE(8192) + CC_VLS_CASE(16384) + CC_VLS_CASE(32768) + CC_VLS_CASE(65536) +#undef CC_VLS_CASE + return llvm::dwarf::DW_CC_LLVM_RISCVVLSCall; } return 0; } diff --git a/clang/lib/CodeGen/Targets/RISCV.cpp b/clang/lib/CodeGen/Targets/RISCV.cpp index 80e09ec6c455fe..bbc23738074fcb 100644 --- a/clang/lib/CodeGen/Targets/RISCV.cpp +++ b/clang/lib/CodeGen/Targets/RISCV.cpp @@ -115,7 +115,48 @@ void RISCVABIInfo::appendAttributeMangling(StringRef AttrStr, } void RISCVABIInfo::computeInfo(CGFunctionInfo &FI) const { - unsigned ABIVLen = 1 << FI.getExtInfo().getLog2RISCVABIVLen(); + unsigned ABIVLen; + switch (FI.getExtInfo().getCC()) { + default: + ABIVLen = 1; + break; + case CallingConv::CC_RISCVVLSCall_32: + ABIVLen = 32; + break; + case CallingConv::CC_RISCVVLSCall_64: + ABIVLen = 64; + break; + case CallingConv::CC_RISCVVLSCall_128: + ABIVLen = 128; + break; + case CallingConv::CC_RISCVVLSCall_256: + ABIVLen = 256; + break; + case CallingConv::CC_RISCVVLSCall_512: + ABIVLen = 512; + break; + case CallingConv::CC_RISCVVLSCall_1024: + ABIVLen = 1024; + break; + case CallingConv::CC_RISCVVLSCall_2048: + ABIVLen = 2048; + break; + case CallingConv::CC_RISCVVLSCall_4096: + ABIVLen = 4096; + break; + case CallingConv::CC_RISCVVLSCall_8192: + ABIVLen = 8192; + break; + case CallingConv::CC_RISCVVLSCall_16384: + ABIVLen = 16384; + break; + case CallingConv::CC_RISCVVLSCall_32768: + ABIVLen = 32768; + break; + case CallingConv::CC_RISCVVLSCall_65536: + ABIVLen = 65536; + break; + } QualType RetTy = FI.getReturnType(); if (!getCXXABI().classifyReturnType(FI)) FI.getReturnInfo() = classifyReturnType(RetTy, ABIVLen); diff --git a/clang/lib/Sema/SemaDeclAttr.cpp b/clang/lib/Sema/SemaDeclAttr.cpp index 4645c47f85b597..e730f25201dcd8 100644 --- a/clang/lib/Sema/SemaDeclAttr.cpp +++ b/clang/lib/Sema/SemaDeclAttr.cpp @@ -5248,9 +5248,30 @@ bool Sema::CheckCallingConvAttr(const ParsedAttr &Attrs, CallingConv &CC, case ParsedAttr::AT_RISCVVectorCC: CC = CC_RISCVVectorCall; break; - case ParsedAttr::AT_RISCVVLSCC: - CC = CC_RISCVVLSCall; + case ParsedAttr::AT_RISCVVLSCC: { + // If the riscv_abi_vlen doesn't have any argument, we set set it to default + // value 128. + unsigned ABIVLen = 128; + if (Attrs.getNumArgs() && + !checkUInt32Argument(Attrs, Attrs.getArgAsExpr(0), ABIVLen)) { + Attrs.setInvalid(); + return true; + } + if (Attrs.getNumArgs() && (ABIVLen < 32 || ABIVLen > 65536)) { + Attrs.setInvalid(); + Diag(Attrs.getLoc(), diag::err_argument_invalid_range) + << ABIVLen << 32 << 65536; + return true; + } + if (!llvm::isPowerOf2_64(ABIVLen)) { + Attrs.setInvalid(); + Diag(Attrs.getLoc(), diag::err_argument_not_power_of_2); + return true; + } + CC = static_cast(CallingConv::CC_RISCVVLSCall_32 + + llvm::Log2_64(ABIVLen) - 5); break; + } default: llvm_unreachable("unexpected attribute kind"); } diff --git a/clang/lib/Sema/SemaType.cpp b/clang/lib/Sema/SemaType.cpp index 88e47fd5f82499..04e024764c22cc 100644 --- a/clang/lib/Sema/SemaType.cpp +++ b/clang/lib/Sema/SemaType.cpp @@ -7618,8 +7618,20 @@ static Attr *getCCTypeAttr(ASTContext &Ctx, ParsedAttr &Attr) { return createSimpleAttr(Ctx, Attr); case ParsedAttr::AT_RISCVVectorCC: return createSimpleAttr(Ctx, Attr); - case ParsedAttr::AT_RISCVVLSCC: - return ::new (Ctx) RISCVVLSCCAttr(Ctx, Attr, /*dummy*/ 0); + case ParsedAttr::AT_RISCVVLSCC: { + // If the riscv_abi_vlen doesn't have any argument, we set set it to default + // value 128. + unsigned ABIVLen = 128; + if (Attr.getNumArgs()) { + std::optional MaybeABIVLen = + Attr.getArgAsExpr(0)->getIntegerConstantExpr(Ctx); + if (!MaybeABIVLen) + llvm_unreachable("Invalid RISC-V ABI VLEN"); + ABIVLen = MaybeABIVLen->getZExtValue(); + } + + return ::new (Ctx) RISCVVLSCCAttr(Ctx, Attr, ABIVLen); + } } llvm_unreachable("unexpected attribute kind!"); } @@ -8106,28 +8118,6 @@ static bool handleFunctionTypeAttr(TypeProcessingState &state, ParsedAttr &attr, CallingConv CCOld = fn->getCallConv(); Attr *CCAttr = getCCTypeAttr(S.Context, attr); - if (attr.getKind() == ParsedAttr::AT_RISCVVLSCC) { - // If the riscv_abi_vlen doesn't have any argument, we set set it to default - // value 128. - unsigned ABIVLen = 128; - if (attr.getNumArgs() && - !S.checkUInt32Argument(attr, attr.getArgAsExpr(0), ABIVLen)) - return false; - if (attr.getNumArgs() && (ABIVLen < 32 || ABIVLen > 65536)) { - S.Diag(attr.getLoc(), diag::err_argument_invalid_range) - << ABIVLen << 32 << 65536; - return false; - } - if (!llvm::isPowerOf2_64(ABIVLen)) { - S.Diag(attr.getLoc(), diag::err_argument_not_power_of_2); - return false; - } - - auto EI = unwrapped.get()->getExtInfo().withLog2RISCVABIVLen( - llvm::Log2_64(ABIVLen)); - type = unwrapped.wrap(S, S.Context.adjustFunctionType(unwrapped.get(), EI)); - } - if (CCOld != CC) { // Error out on when there's already an attribute on the type // and the CCs don't match. diff --git a/clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c b/clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c index 78e1ed37727894..61300d62e1eb69 100644 --- a/clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c +++ b/clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c @@ -38,34 +38,34 @@ vint32m1_t test_no_vector_cc_attr(vint32m1_t input, int32_t *base, size_t vl) { // CHECK-LLVM: define dso_local void @test_vls_no_cc(i128 noundef %arg.coerce) void test_vls_no_cc(__attribute__((vector_size(16))) int arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_vls_default_abi_vlen( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_vls_default_abi_vlen( noundef %arg.coerce) void __attribute__((riscv_vls_cc)) test_vls_default_abi_vlen(__attribute__((vector_size(16))) int arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_vls_default_abi_vlen_c23( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_vls_default_abi_vlen_c23( noundef %arg.coerce) [[riscv::vls_cc]] void test_vls_default_abi_vlen_c23(__attribute__((vector_size(16))) int arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_vls_default_abi_vlen_unsupported_feature( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_vls_default_abi_vlen_unsupported_feature( noundef %arg.coerce) void __attribute__((riscv_vls_cc)) test_vls_default_abi_vlen_unsupported_feature(__attribute__((vector_size(16))) _Float16 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_vls_default_abi_vlen_c23_unsupported_feature( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_vls_default_abi_vlen_c23_unsupported_feature( noundef %arg.coerce) [[riscv::vls_cc]] void test_vls_default_abi_vlen_c23_unsupported_feature(__attribute__((vector_size(16))) _Float16 arg) {} -// CHECK-LLVM-ZVE32X: define dso_local riscv_vls_cc void @test_vls_default_abi_vlen_unsupported_feature_zve32x( noundef %arg.coerce) +// CHECK-LLVM-ZVE32X: define dso_local riscv_vls_cc(128) void @test_vls_default_abi_vlen_unsupported_feature_zve32x( noundef %arg.coerce) void __attribute__((riscv_vls_cc)) test_vls_default_abi_vlen_unsupported_feature_zve32x(__attribute__((vector_size(16))) float arg) {} -// CHECK-LLVM-ZVE32X: define dso_local riscv_vls_cc void @test_vls_default_abi_vlen_c23_unsupported_feature_zve32x( noundef %arg.coerce) +// CHECK-LLVM-ZVE32X: define dso_local riscv_vls_cc(128) void @test_vls_default_abi_vlen_c23_unsupported_feature_zve32x( noundef %arg.coerce) [[riscv::vls_cc]] void test_vls_default_abi_vlen_c23_unsupported_feature_zve32x(__attribute__((vector_size(16))) float arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_vls_256_abi_vlen( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_vls_256_abi_vlen( noundef %arg.coerce) void __attribute__((riscv_vls_cc(256))) test_vls_256_abi_vlen(__attribute__((vector_size(16))) int arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_vls_256_abi_vlen_c23( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_vls_256_abi_vlen_c23( noundef %arg.coerce) [[riscv::vls_cc(256)]] void test_vls_256_abi_vlen_c23(__attribute__((vector_size(16))) int arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_vls_least_element( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(1024) void @test_vls_least_element( noundef %arg.coerce) void __attribute__((riscv_vls_cc(1024))) test_vls_least_element(__attribute__((vector_size(8))) int arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_vls_least_element_c23( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(1024) void @test_vls_least_element_c23( noundef %arg.coerce) [[riscv::vls_cc(1024)]] void test_vls_least_element_c23(__attribute__((vector_size(8))) int arg) {} @@ -126,52 +126,52 @@ struct st_i32x4x9{ typedef int __attribute__((vector_size(256))) int32x64_t; -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_too_large(ptr noundef %0) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_too_large(ptr noundef %0) void __attribute__((riscv_vls_cc)) test_too_large(int32x64_t arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_too_large_256( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_too_large_256( noundef %arg.coerce) void __attribute__((riscv_vls_cc(256))) test_too_large_256(int32x64_t arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_st_i32x4( %arg) void __attribute__((riscv_vls_cc)) test_st_i32x4(struct st_i32x4 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4_256( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_st_i32x4_256( %arg) void __attribute__((riscv_vls_cc(256))) test_st_i32x4_256(struct st_i32x4 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4_arr1( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_st_i32x4_arr1( %arg) void __attribute__((riscv_vls_cc)) test_st_i32x4_arr1(struct st_i32x4_arr1 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4_arr1_256( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_st_i32x4_arr1_256( %arg) void __attribute__((riscv_vls_cc(256))) test_st_i32x4_arr1_256(struct st_i32x4_arr1 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4_arr4( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_st_i32x4_arr4( %arg) void __attribute__((riscv_vls_cc)) test_st_i32x4_arr4(struct st_i32x4_arr4 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4_arr4_256( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_st_i32x4_arr4_256( %arg) void __attribute__((riscv_vls_cc(256))) test_st_i32x4_arr4_256(struct st_i32x4_arr4 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4_arr8( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_st_i32x4_arr8( %arg) void __attribute__((riscv_vls_cc)) test_st_i32x4_arr8(struct st_i32x4_arr8 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4_arr8_256( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_st_i32x4_arr8_256( %arg) void __attribute__((riscv_vls_cc(256))) test_st_i32x4_arr8_256(struct st_i32x4_arr8 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4x2(target("riscv.vector.tuple", , 2) %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_st_i32x4x2(target("riscv.vector.tuple", , 2) %arg) void __attribute__((riscv_vls_cc)) test_st_i32x4x2(struct st_i32x4x2 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4x2_256(target("riscv.vector.tuple", , 2) %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_st_i32x4x2_256(target("riscv.vector.tuple", , 2) %arg) void __attribute__((riscv_vls_cc(256))) test_st_i32x4x2_256(struct st_i32x4x2 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x8x2(target("riscv.vector.tuple", , 2) %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_st_i32x8x2(target("riscv.vector.tuple", , 2) %arg) void __attribute__((riscv_vls_cc)) test_st_i32x8x2(struct st_i32x8x2 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x8x2_256(target("riscv.vector.tuple", , 2) %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_st_i32x8x2_256(target("riscv.vector.tuple", , 2) %arg) void __attribute__((riscv_vls_cc(256))) test_st_i32x8x2_256(struct st_i32x8x2 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x64x2(ptr noundef %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_st_i32x64x2(ptr noundef %arg) void __attribute__((riscv_vls_cc)) test_st_i32x64x2(struct st_i32x64x2 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x64x2_256(ptr noundef %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_st_i32x64x2_256(ptr noundef %arg) void __attribute__((riscv_vls_cc(256))) test_st_i32x64x2_256(struct st_i32x64x2 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4x8(target("riscv.vector.tuple", , 8) %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_st_i32x4x8(target("riscv.vector.tuple", , 8) %arg) void __attribute__((riscv_vls_cc)) test_st_i32x4x8(struct st_i32x4x8 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4x8_256(target("riscv.vector.tuple", , 8) %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_st_i32x4x8_256(target("riscv.vector.tuple", , 8) %arg) void __attribute__((riscv_vls_cc(256))) test_st_i32x4x8_256(struct st_i32x4x8 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4x9(ptr noundef %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @test_st_i32x4x9(ptr noundef %arg) void __attribute__((riscv_vls_cc)) test_st_i32x4x9(struct st_i32x4x9 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @test_st_i32x4x9_256(ptr noundef %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @test_st_i32x4x9_256(ptr noundef %arg) void __attribute__((riscv_vls_cc(256))) test_st_i32x4x9_256(struct st_i32x4x9 arg) {} diff --git a/clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp b/clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp index 6281b640c4df06..dbf7671d967328 100644 --- a/clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp +++ b/clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp @@ -36,19 +36,19 @@ vint32m1_t test_no_vector_cc_attr(vint32m1_t input, int32_t *base, size_t vl) { // CHECK-LLVM: define dso_local void @_Z14test_vls_no_ccDv4_i(i128 noundef %arg.coerce) void test_vls_no_cc(__attribute__((vector_size(16))) int arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z25test_vls_default_abi_vlenDv4_i( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z25test_vls_default_abi_vlenDv4_i( noundef %arg.coerce) [[riscv::vls_cc]] void test_vls_default_abi_vlen(__attribute__((vector_size(16))) int arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z45test_vls_default_abi_vlen_unsupported_featureDv8_DF16_( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z45test_vls_default_abi_vlen_unsupported_featureDv8_DF16_( noundef %arg.coerce) [[riscv::vls_cc]] void test_vls_default_abi_vlen_unsupported_feature(__attribute__((vector_size(16))) _Float16 arg) {} -// CHECK-LLVM-ZVE32X: define dso_local riscv_vls_cc void @_Z52test_vls_default_abi_vlen_unsupported_feature_zve32xDv4_f( noundef %arg.coerce) +// CHECK-LLVM-ZVE32X: define dso_local riscv_vls_cc(128) void @_Z52test_vls_default_abi_vlen_unsupported_feature_zve32xDv4_f( noundef %arg.coerce) [[riscv::vls_cc]] void test_vls_default_abi_vlen_unsupported_feature_zve32x(__attribute__((vector_size(16))) float arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z21test_vls_256_abi_vlenDv4_i( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z21test_vls_256_abi_vlenDv4_i( noundef %arg.coerce) [[riscv::vls_cc(256)]] void test_vls_256_abi_vlen(__attribute__((vector_size(16))) int arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z22test_vls_least_elementDv2_i( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(1024) void @_Z22test_vls_least_elementDv2_i( noundef %arg.coerce) [[riscv::vls_cc(1024)]] void test_vls_least_element(__attribute__((vector_size(8))) int arg) {} @@ -109,52 +109,52 @@ struct st_i32x4x9{ typedef int __attribute__((vector_size(256))) int32x64_t; -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z14test_too_largeDv64_i(ptr noundef %0) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z14test_too_largeDv64_i(ptr noundef %0) [[riscv::vls_cc]] void test_too_large(int32x64_t arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z18test_too_large_256Dv64_i( noundef %arg.coerce) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z18test_too_large_256Dv64_i( noundef %arg.coerce) [[riscv::vls_cc(256)]] void test_too_large_256(int32x64_t arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z13test_st_i32x48st_i32x4( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z13test_st_i32x48st_i32x4( %arg) [[riscv::vls_cc]] void test_st_i32x4(struct st_i32x4 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z17test_st_i32x4_2568st_i32x4( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z17test_st_i32x4_2568st_i32x4( %arg) [[riscv::vls_cc(256)]] void test_st_i32x4_256(struct st_i32x4 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z18test_st_i32x4_arr113st_i32x4_arr1( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z18test_st_i32x4_arr113st_i32x4_arr1( %arg) [[riscv::vls_cc]] void test_st_i32x4_arr1(struct st_i32x4_arr1 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z22test_st_i32x4_arr1_25613st_i32x4_arr1( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z22test_st_i32x4_arr1_25613st_i32x4_arr1( %arg) [[riscv::vls_cc(256)]] void test_st_i32x4_arr1_256(struct st_i32x4_arr1 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z18test_st_i32x4_arr413st_i32x4_arr4( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z18test_st_i32x4_arr413st_i32x4_arr4( %arg) [[riscv::vls_cc]] void test_st_i32x4_arr4(struct st_i32x4_arr4 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z22test_st_i32x4_arr4_25613st_i32x4_arr4( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z22test_st_i32x4_arr4_25613st_i32x4_arr4( %arg) [[riscv::vls_cc(256)]] void test_st_i32x4_arr4_256(struct st_i32x4_arr4 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z18test_st_i32x4_arr813st_i32x4_arr8( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z18test_st_i32x4_arr813st_i32x4_arr8( %arg) [[riscv::vls_cc]] void test_st_i32x4_arr8(struct st_i32x4_arr8 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z22test_st_i32x4_arr8_25613st_i32x4_arr8( %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z22test_st_i32x4_arr8_25613st_i32x4_arr8( %arg) [[riscv::vls_cc(256)]] void test_st_i32x4_arr8_256(struct st_i32x4_arr8 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z15test_st_i32x4x210st_i32x4x2(target("riscv.vector.tuple", , 2) %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z15test_st_i32x4x210st_i32x4x2(target("riscv.vector.tuple", , 2) %arg) [[riscv::vls_cc]] void test_st_i32x4x2(struct st_i32x4x2 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z19test_st_i32x4x2_25610st_i32x4x2(target("riscv.vector.tuple", , 2) %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z19test_st_i32x4x2_25610st_i32x4x2(target("riscv.vector.tuple", , 2) %arg) [[riscv::vls_cc(256)]] void test_st_i32x4x2_256(struct st_i32x4x2 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z15test_st_i32x8x210st_i32x8x2(target("riscv.vector.tuple", , 2) %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z15test_st_i32x8x210st_i32x8x2(target("riscv.vector.tuple", , 2) %arg) [[riscv::vls_cc]] void test_st_i32x8x2(struct st_i32x8x2 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z19test_st_i32x8x2_25610st_i32x8x2(target("riscv.vector.tuple", , 2) %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z19test_st_i32x8x2_25610st_i32x8x2(target("riscv.vector.tuple", , 2) %arg) [[riscv::vls_cc(256)]] void test_st_i32x8x2_256(struct st_i32x8x2 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z16test_st_i32x64x211st_i32x64x2(ptr noundef %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z16test_st_i32x64x211st_i32x64x2(ptr noundef %arg) [[riscv::vls_cc]] void test_st_i32x64x2(struct st_i32x64x2 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z20test_st_i32x64x2_25611st_i32x64x2(ptr noundef %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z20test_st_i32x64x2_25611st_i32x64x2(ptr noundef %arg) [[riscv::vls_cc(256)]] void test_st_i32x64x2_256(struct st_i32x64x2 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z15test_st_i32x4x810st_i32x4x8(target("riscv.vector.tuple", , 8) %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z15test_st_i32x4x810st_i32x4x8(target("riscv.vector.tuple", , 8) %arg) [[riscv::vls_cc]] void test_st_i32x4x8(struct st_i32x4x8 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z19test_st_i32x4x8_25610st_i32x4x8(target("riscv.vector.tuple", , 8) %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z19test_st_i32x4x8_25610st_i32x4x8(target("riscv.vector.tuple", , 8) %arg) [[riscv::vls_cc(256)]] void test_st_i32x4x8_256(struct st_i32x4x8 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z15test_st_i32x4x910st_i32x4x9(ptr noundef %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(128) void @_Z15test_st_i32x4x910st_i32x4x9(ptr noundef %arg) [[riscv::vls_cc]] void test_st_i32x4x9(struct st_i32x4x9 arg) {} -// CHECK-LLVM: define dso_local riscv_vls_cc void @_Z19test_st_i32x4x9_25610st_i32x4x9(ptr noundef %arg) +// CHECK-LLVM: define dso_local riscv_vls_cc(256) void @_Z19test_st_i32x4x9_25610st_i32x4x9(ptr noundef %arg) [[riscv::vls_cc(256)]] void test_st_i32x4x9_256(struct st_i32x4x9 arg) {} diff --git a/clang/test/CodeGen/RISCV/riscv-vector-callingconv.c b/clang/test/CodeGen/RISCV/riscv-vector-callingconv.c index da4819186f4e21..6a71d1a9db81fc 100644 --- a/clang/test/CodeGen/RISCV/riscv-vector-callingconv.c +++ b/clang/test/CodeGen/RISCV/riscv-vector-callingconv.c @@ -19,17 +19,17 @@ void test_no_attribute2(int); // expected-note {{previous declaration is here}} __attribute__((riscv_vls_cc)) int var_vls; // expected-warning {{'riscv_vls_cc' only applies to function types; type here is 'int'}} __attribute__((riscv_vls_cc)) void func_vls(); -__attribute__((riscv_vls_cc(1))) void func_vls_invalid(); // expected-error {{argument value 1 is outside the valid range [32, 65536]}} expected-warning {{'riscv_vls_cc' only applies to function types; type here is 'void (void)__attribute__((riscv_vls_cc))'}} -__attribute__((riscv_vls_cc(129))) void func_vls_invalid(); // expected-error {{argument should be a power of 2}} expected-warning {{'riscv_vls_cc' only applies to function types; type here is 'void (void)__attribute__((riscv_vls_cc))'}} +__attribute__((riscv_vls_cc(1))) void func_vls_invalid(); // expected-error {{argument value 1 is outside the valid range [32, 65536]}} +__attribute__((riscv_vls_cc(129))) void func_vls_invalid(); // expected-error {{argument should be a power of 2}} void test_vls_no_attribute(int); // expected-note {{previous declaration is here}} -void __attribute__((riscv_vls_cc)) test_vls_no_attribute(int x) { } // expected-error {{function declared 'riscv_vls_cc' here was previously declared without calling convention}} +void __attribute__((riscv_vls_cc)) test_vls_no_attribute(int x) { } // expected-error {{function declared 'riscv_vls_cc(128)' here was previously declared without calling convention}} [[riscv::vls_cc]] int var2_vls; // expected-warning {{'vls_cc' only applies to function types; type here is 'int'}} [[riscv::vls_cc]] void func2_vls(); -[[riscv::vls_cc(1)]] void func_vls_invalid2(); // expected-error {{argument value 1 is outside the valid range [32, 65536]}} expected-warning {{'vls_cc' only applies to function types; type here is 'void (void)'}} -[[riscv::vls_cc(129)]] void func_vls_invalid2(); // expected-error {{argument should be a power of 2}} expected-warning {{'vls_cc' only applies to function types; type here is 'void (void)'}} +[[riscv::vls_cc(1)]] void func_vls_invalid2(); // expected-error {{argument value 1 is outside the valid range [32, 65536]}} +[[riscv::vls_cc(129)]] void func_vls_invalid2(); // expected-error {{argument should be a power of 2}} void test_vls_no_attribute2(int); // expected-note {{previous declaration is here}} -[[riscv::vls_cc]] void test_vls_no_attribute2(int x) { } // expected-error {{function declared 'riscv_vls_cc' here was previously declared without calling convention}} +[[riscv::vls_cc]] void test_vls_no_attribute2(int x) { } // expected-error {{function declared 'riscv_vls_cc(128)' here was previously declared without calling convention}} diff --git a/clang/test/CodeGen/RISCV/riscv-vector-callingconv.cpp b/clang/test/CodeGen/RISCV/riscv-vector-callingconv.cpp index 5e27c76d5307fc..f041b0d36529ca 100644 --- a/clang/test/CodeGen/RISCV/riscv-vector-callingconv.cpp +++ b/clang/test/CodeGen/RISCV/riscv-vector-callingconv.cpp @@ -37,11 +37,11 @@ void test_lambda2() { [[riscv::vls_cc]] int var_vls; // expected-warning {{'vls_cc' only applies to function types; type here is 'int'}} [[riscv::vls_cc]] void func_vls(); -[[riscv::vls_cc(1)]] void func_invalid_vls(); // expected-error {{argument value 1 is outside the valid range [32, 65536]}} expected-warning {{'vls_cc' only applies to function types; type here is 'void ()'}} -[[riscv::vls_cc(129)]] void func_invalid_vls(); // expected-error {{argument should be a power of 2}} expected-warning {{'vls_cc' only applies to function types; type here is 'void ()'}} +[[riscv::vls_cc(1)]] void func_invalid_vls(); // expected-error {{argument value 1 is outside the valid range [32, 65536]}} +[[riscv::vls_cc(129)]] void func_invalid_vls(); // expected-error {{argument should be a power of 2}} void test_no_attribute_vls(int); // expected-note {{previous declaration is here}} -[[riscv::vls_cc]] void test_no_attribute_vls(int x) { } // expected-error {{function declared 'riscv_vls_cc' here was previously declared without calling convention}} +[[riscv::vls_cc]] void test_no_attribute_vls(int x) { } // expected-error {{function declared 'riscv_vls_cc(128)' here was previously declared without calling convention}} class test_cc_vls { [[riscv::vls_cc]] void member_func(); diff --git a/clang/tools/libclang/CXType.cpp b/clang/tools/libclang/CXType.cpp index 65fa6fa2540954..f4227fd0307343 100644 --- a/clang/tools/libclang/CXType.cpp +++ b/clang/tools/libclang/CXType.cpp @@ -701,7 +701,18 @@ CXCallingConv clang_getFunctionTypeCallingConv(CXType X) { TCALLINGCONV(M68kRTD); TCALLINGCONV(PreserveNone); TCALLINGCONV(RISCVVectorCall); - TCALLINGCONV(RISCVVLSCall); + TCALLINGCONV(RISCVVLSCall_32); + TCALLINGCONV(RISCVVLSCall_64); + TCALLINGCONV(RISCVVLSCall_128); + TCALLINGCONV(RISCVVLSCall_256); + TCALLINGCONV(RISCVVLSCall_512); + TCALLINGCONV(RISCVVLSCall_1024); + TCALLINGCONV(RISCVVLSCall_2048); + TCALLINGCONV(RISCVVLSCall_4096); + TCALLINGCONV(RISCVVLSCall_8192); + TCALLINGCONV(RISCVVLSCall_16384); + TCALLINGCONV(RISCVVLSCall_32768); + TCALLINGCONV(RISCVVLSCall_65536); case CC_SpirFunction: return CXCallingConv_Unexposed; case CC_AMDGPUKernelCall: return CXCallingConv_Unexposed; case CC_OpenCLKernel: return CXCallingConv_Unexposed; diff --git a/llvm/include/llvm/IR/CallingConv.h b/llvm/include/llvm/IR/CallingConv.h index bc3a75f2fe6656..7897aabb6c1a9b 100644 --- a/llvm/include/llvm/IR/CallingConv.h +++ b/llvm/include/llvm/IR/CallingConv.h @@ -271,7 +271,18 @@ namespace CallingConv { AArch64_SME_ABI_Support_Routines_PreserveMost_From_X1 = 111, /// Calling convention used for RISC-V V-extension fixed vectors. - RISCV_VLSCall = 112, + RISCV_VLSCall_32 = 112, + RISCV_VLSCall_64 = 113, + RISCV_VLSCall_128 = 114, + RISCV_VLSCall_256 = 115, + RISCV_VLSCall_512 = 116, + RISCV_VLSCall_1024 = 117, + RISCV_VLSCall_2048 = 118, + RISCV_VLSCall_4096 = 119, + RISCV_VLSCall_8192 = 120, + RISCV_VLSCall_16384 = 121, + RISCV_VLSCall_32768 = 122, + RISCV_VLSCall_65536 = 123, /// The highest possible ID. Must be some 2^k - 1. MaxID = 1023 diff --git a/llvm/lib/AsmParser/LLParser.cpp b/llvm/lib/AsmParser/LLParser.cpp index abf98f76b6a610..6d5600212f2635 100644 --- a/llvm/lib/AsmParser/LLParser.cpp +++ b/llvm/lib/AsmParser/LLParser.cpp @@ -2285,8 +2285,36 @@ bool LLParser::parseOptionalCallingConv(unsigned &CC) { CC = CallingConv::RISCV_VectorCall; break; case lltok::kw_riscv_vls_cc: - CC = CallingConv::RISCV_VLSCall; + // Default ABI_VLEN + CC = CallingConv::RISCV_VLSCall_128; + Lex.Lex(); + if (!EatIfPresent(lltok::lparen)) + break; + uint32_t ABIVlen; + if (parseUInt32(ABIVlen) || !EatIfPresent(lltok::rparen)) + return true; + switch (ABIVlen) { + default: + return tokError("unknown RISC-V ABI VLEN"); +#define CC_VLS_CASE(ABIVlen) \ + case ABIVlen: \ + CC = CallingConv::RISCV_VLSCall_##ABIVlen; \ break; + CC_VLS_CASE(32) + CC_VLS_CASE(64) + CC_VLS_CASE(128) + CC_VLS_CASE(256) + CC_VLS_CASE(512) + CC_VLS_CASE(1024) + CC_VLS_CASE(2048) + CC_VLS_CASE(4096) + CC_VLS_CASE(8192) + CC_VLS_CASE(16384) + CC_VLS_CASE(32768) + CC_VLS_CASE(65536) +#undef CC_VLS_CASE + } + return false; case lltok::kw_cc: { Lex.Lex(); return parseUInt32(CC); diff --git a/llvm/lib/IR/AsmWriter.cpp b/llvm/lib/IR/AsmWriter.cpp index 67a8e6260f1e39..f3cbc13a534e13 100644 --- a/llvm/lib/IR/AsmWriter.cpp +++ b/llvm/lib/IR/AsmWriter.cpp @@ -368,9 +368,23 @@ static void PrintCallingConv(unsigned cc, raw_ostream &Out) { case CallingConv::RISCV_VectorCall: Out << "riscv_vector_cc"; break; - case CallingConv::RISCV_VLSCall: - Out << "riscv_vls_cc"; +#define CC_VLS_CASE(ABI_VLEN) \ + case CallingConv::RISCV_VLSCall_##ABI_VLEN: \ + Out << "riscv_vls_cc(" #ABI_VLEN ")"; \ break; + CC_VLS_CASE(32) + CC_VLS_CASE(64) + CC_VLS_CASE(128) + CC_VLS_CASE(256) + CC_VLS_CASE(512) + CC_VLS_CASE(1024) + CC_VLS_CASE(2048) + CC_VLS_CASE(4096) + CC_VLS_CASE(8192) + CC_VLS_CASE(16384) + CC_VLS_CASE(32768) + CC_VLS_CASE(65536) +#undef CC_VLS_CASE } } diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index 96f51580d6ace9..0103b7d428976d 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -19901,7 +19901,20 @@ SDValue RISCVTargetLowering::LowerFormalArguments( case CallingConv::SPIR_KERNEL: case CallingConv::GRAAL: case CallingConv::RISCV_VectorCall: - case CallingConv::RISCV_VLSCall: +#define CC_VLS_CASE(ABI_VLEN) case CallingConv::RISCV_VLSCall_##ABI_VLEN: + CC_VLS_CASE(32) + CC_VLS_CASE(64) + CC_VLS_CASE(128) + CC_VLS_CASE(256) + CC_VLS_CASE(512) + CC_VLS_CASE(1024) + CC_VLS_CASE(2048) + CC_VLS_CASE(4096) + CC_VLS_CASE(8192) + CC_VLS_CASE(16384) + CC_VLS_CASE(32768) + CC_VLS_CASE(65536) +#undef CC_VLS_CASE break; case CallingConv::GHC: if (Subtarget.hasStdExtE()) diff --git a/llvm/test/Assembler/riscv_vls_cc.ll b/llvm/test/Assembler/riscv_vls_cc.ll index cc63e61ed6a1f7..bfe1def3fc3bed 100644 --- a/llvm/test/Assembler/riscv_vls_cc.ll +++ b/llvm/test/Assembler/riscv_vls_cc.ll @@ -1,12 +1,122 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s ; RUN: verify-uselistorder %s -; CHECK: define riscv_vls_cc void @no_args() { -define riscv_vls_cc void @no_args() { +; CHECK: define riscv_vls_cc(32) void @no_args_32() { +define riscv_vls_cc(32) void @no_args_32() { ret void } -; CHECK: define riscv_vls_cc void @byval_arg(ptr byval(i32) %0) { -define riscv_vls_cc void @byval_arg(ptr byval(i32)) { +; CHECK: define riscv_vls_cc(64) void @no_args_64() { +define riscv_vls_cc(64) void @no_args_64() { + ret void +} + +; CHECK: define riscv_vls_cc(128) void @no_args_128() { +define riscv_vls_cc(128) void @no_args_128() { + ret void +} + +; CHECK: define riscv_vls_cc(256) void @no_args_256() { +define riscv_vls_cc(256) void @no_args_256() { + ret void +} + +; CHECK: define riscv_vls_cc(512) void @no_args_512() { +define riscv_vls_cc(512) void @no_args_512() { + ret void +} + +; CHECK: define riscv_vls_cc(1024) void @no_args_1024() { +define riscv_vls_cc(1024) void @no_args_1024() { + ret void +} + +; CHECK: define riscv_vls_cc(2048) void @no_args_2048() { +define riscv_vls_cc(2048) void @no_args_2048() { + ret void +} + +; CHECK: define riscv_vls_cc(4096) void @no_args_4096() { +define riscv_vls_cc(4096) void @no_args_4096() { + ret void +} + +; CHECK: define riscv_vls_cc(8192) void @no_args_8192() { +define riscv_vls_cc(8192) void @no_args_8192() { + ret void +} + +; CHECK: define riscv_vls_cc(16384) void @no_args_16384() { +define riscv_vls_cc(16384) void @no_args_16384() { + ret void +} + +; CHECK: define riscv_vls_cc(32768) void @no_args_32768() { +define riscv_vls_cc(32768) void @no_args_32768() { + ret void +} + +; CHECK: define riscv_vls_cc(65536) void @no_args_65536() { +define riscv_vls_cc(65536) void @no_args_65536() { + ret void +} + +; CHECK: define riscv_vls_cc(32) void @byval_arg_32(ptr byval(i32) %0) { +define riscv_vls_cc(32) void @byval_arg_32(ptr byval(i32)) { + ret void +} + +; CHECK: define riscv_vls_cc(64) void @byval_arg_64(ptr byval(i32) %0) { +define riscv_vls_cc(64) void @byval_arg_64(ptr byval(i32)) { + ret void +} + +; CHECK: define riscv_vls_cc(128) void @byval_arg_128(ptr byval(i32) %0) { +define riscv_vls_cc(128) void @byval_arg_128(ptr byval(i32)) { + ret void +} + +; CHECK: define riscv_vls_cc(256) void @byval_arg_256(ptr byval(i32) %0) { +define riscv_vls_cc(256) void @byval_arg_256(ptr byval(i32)) { + ret void +} + +; CHECK: define riscv_vls_cc(512) void @byval_arg_512(ptr byval(i32) %0) { +define riscv_vls_cc(512) void @byval_arg_512(ptr byval(i32)) { + ret void +} + +; CHECK: define riscv_vls_cc(1024) void @byval_arg_1024(ptr byval(i32) %0) { +define riscv_vls_cc(1024) void @byval_arg_1024(ptr byval(i32)) { + ret void +} + +; CHECK: define riscv_vls_cc(2048) void @byval_arg_2048(ptr byval(i32) %0) { +define riscv_vls_cc(2048) void @byval_arg_2048(ptr byval(i32)) { + ret void +} + +; CHECK: define riscv_vls_cc(4096) void @byval_arg_4096(ptr byval(i32) %0) { +define riscv_vls_cc(4096) void @byval_arg_4096(ptr byval(i32)) { + ret void +} + +; CHECK: define riscv_vls_cc(8192) void @byval_arg_8192(ptr byval(i32) %0) { +define riscv_vls_cc(8192) void @byval_arg_8192(ptr byval(i32)) { + ret void +} + +; CHECK: define riscv_vls_cc(16384) void @byval_arg_16384(ptr byval(i32) %0) { +define riscv_vls_cc(16384) void @byval_arg_16384(ptr byval(i32)) { + ret void +} + +; CHECK: define riscv_vls_cc(32768) void @byval_arg_32768(ptr byval(i32) %0) { +define riscv_vls_cc(32768) void @byval_arg_32768(ptr byval(i32)) { + ret void +} + +; CHECK: define riscv_vls_cc(65536) void @byval_arg_65536(ptr byval(i32) %0) { +define riscv_vls_cc(65536) void @byval_arg_65536(ptr byval(i32)) { ret void } diff --git a/llvm/test/Bitcode/compatibility.ll b/llvm/test/Bitcode/compatibility.ll index 485508ca0013ad..3e68ca061bd2eb 100644 --- a/llvm/test/Bitcode/compatibility.ll +++ b/llvm/test/Bitcode/compatibility.ll @@ -517,9 +517,53 @@ declare cc96 void @f.cc96() declare amdgpu_es void @f.amdgpu_es() ; CHECK: declare amdgpu_es void @f.amdgpu_es() declare cc112 void @f.cc112() -; CHECK: declare riscv_vls_cc void @f.cc112() -declare riscv_vls_cc void @riscv_vls_cc() -; CHECK: declare riscv_vls_cc void @riscv_vls_cc() +; CHECK: declare riscv_vls_cc(32) void @f.cc112() +declare cc113 void @f.cc113() +; CHECK: declare riscv_vls_cc(64) void @f.cc113() +declare cc114 void @f.cc114() +; CHECK: declare riscv_vls_cc(128) void @f.cc114() +declare cc115 void @f.cc115() +; CHECK: declare riscv_vls_cc(256) void @f.cc115() +declare cc116 void @f.cc116() +; CHECK: declare riscv_vls_cc(512) void @f.cc116() +declare cc117 void @f.cc117() +; CHECK: declare riscv_vls_cc(1024) void @f.cc117() +declare cc118 void @f.cc118() +; CHECK: declare riscv_vls_cc(2048) void @f.cc118() +declare cc119 void @f.cc119() +; CHECK: declare riscv_vls_cc(4096) void @f.cc119() +declare cc120 void @f.cc120() +; CHECK: declare riscv_vls_cc(8192) void @f.cc120() +declare cc121 void @f.cc121() +; CHECK: declare riscv_vls_cc(16384) void @f.cc121() +declare cc122 void @f.cc122() +; CHECK: declare riscv_vls_cc(32768) void @f.cc122() +declare cc123 void @f.cc123() +; CHECK: declare riscv_vls_cc(65536) void @f.cc123() +declare riscv_vls_cc(32) void @riscv_vls_cc_32() +; CHECK: declare riscv_vls_cc(32) void @riscv_vls_cc_32() +declare riscv_vls_cc(64) void @riscv_vls_cc_64() +; CHECK: declare riscv_vls_cc(64) void @riscv_vls_cc_64() +declare riscv_vls_cc(128) void @riscv_vls_cc_128() +; CHECK: declare riscv_vls_cc(128) void @riscv_vls_cc_128() +declare riscv_vls_cc(256) void @riscv_vls_cc_256() +; CHECK: declare riscv_vls_cc(256) void @riscv_vls_cc_256() +declare riscv_vls_cc(512) void @riscv_vls_cc_512() +; CHECK: declare riscv_vls_cc(512) void @riscv_vls_cc_512() +declare riscv_vls_cc(1024) void @riscv_vls_cc_1024() +; CHECK: declare riscv_vls_cc(1024) void @riscv_vls_cc_1024() +declare riscv_vls_cc(2048) void @riscv_vls_cc_2048() +; CHECK: declare riscv_vls_cc(2048) void @riscv_vls_cc_2048() +declare riscv_vls_cc(4096) void @riscv_vls_cc_4096() +; CHECK: declare riscv_vls_cc(4096) void @riscv_vls_cc_4096() +declare riscv_vls_cc(8192) void @riscv_vls_cc_8192() +; CHECK: declare riscv_vls_cc(8192) void @riscv_vls_cc_8192() +declare riscv_vls_cc(16384) void @riscv_vls_cc_16384() +; CHECK: declare riscv_vls_cc(16384) void @riscv_vls_cc_16384() +declare riscv_vls_cc(32768) void @riscv_vls_cc_32768() +; CHECK: declare riscv_vls_cc(32768) void @riscv_vls_cc_32768() +declare riscv_vls_cc(65536) void @riscv_vls_cc_65536() +; CHECK: declare riscv_vls_cc(65536) void @riscv_vls_cc_65536() declare cc1023 void @f.cc1023() ; CHECK: declare cc1023 void @f.cc1023()